You are on page 1of 5


DECEMBER 20-22,2004

45 I

Development of DC Power Line Carrier Communication Interface for Digital Networking for Control of COIL
BB Shrivastava
Power Line technology provides very high data transmission, is economical because of single cording system and offers increased ruggedness [3]. In our control system, we are superimposing the digital information on dc power line in serial protocol without modulating on a carrier freqiency. In such concept, power line is used as connecting wire of net. It empowers various modules (nodes of the system), which communicate in half duplex mode and control various subsystems.Serial is very common communication protocol (not Index Terms-Control of COIL, Networking, PLCC,Power to be confused with USB) for device communication that line Modem, Serial Communication. . . comes standard on just about every PC and many devices for instrumentation [4]. Instead of using the off-the-shelf I. INTRODUCTION protocols, a unique protocol has been developed for precise control and fast data communication, which is running In conventional power line carrier communication (PLCC) successfully. The serial port sends and receives bytes of the voice signal is modulated on carrier frequency' and information at the rate of one bit at a time. Although it is transmitted over power line [1]-[2]. The digital power line slower than a parallel port, it is simpler and can be used over technology similarly allows flow of information through longer distance (can be extended up to 1200 meters [4]).
Abstract-Power Line Carrier Commudca~on (PLCC) integrates the transmission of voice and data through the m e electrical line, Keeping in view the advantages of power Line carrier communication, we have implemented it in the control system for Chemical Oxygen Iodine Laser (COIL). We have developed an interface card to couple PC witb the power h e using low-cost, easily avatlable semiconductor devires. In this paper we are presenting description of the Interface cnrd and Its operation.


Rg.I. Prototypeasscmbly of DC power tine nrodem

same cording which supplies the electric power to the node.

1 1 .
Mnuscript received August IS, 2Wand accepted on October 18.2004. DB Shrivastava is with Chemical and Excimcr Laser Section Centre for Advanced Technology, Dept. of Atomic Energy, Indm. 452 013 India (phone: 091-731-248-8246; fax: 091-731-248-8250; e-mail:


The circuit developed by us is depicted in fig 1. This device modulates and demodulates the serial data by superimposing it on power line. Waveform of level conversion by this device is shown in fig. 3 and fig. 4. The schematic of the device is depicted in fig 2. The first stage of the circuit is RS (EB-232/ RS-422 / RS-485)to TTL level

I .




Fig. 2. Schematic circuit diagram of dc power'he interface card using RS 232 serial port. Marker A, B. C, D, E, Tx and Rx'are placed elaborate circuit by the help of waveforms

converter [5J.We have used TC232 integrated chip' that transistor 4 2 and 43, This confighation is used to'drive the provides s i p 1 conversion between RS232 to TTL'and'vice- MOSFET which works like an on / off switch for modulation versa. One can also use SN 75176 integrated c!ip to interface of space and mark '(as depicted in fig 7). The power line is this card with RS-485. Serial communication provides two shorted when the MOSFET across it is on, in case of space. independent channels for data communications (i.e. @ n & t Since it is on or a short interval it does not affect functioning (Tx)and receive (Rx)) along with some hand-shaking signal. of device connected across the power line. The resistance RS, Since this card provides channel for data f l o w fiom PC t6 R6 and capacitor C2 are used to bias MOSFET.Opto-isolator power line and vice-versa,' one can ignore hand-shaking is used as a demodulator for the power line data. The anode signals. Since power line communication tequires.ody a pair of opto,isolator is kept at constant.voltage by diode D 1 and of wires, it is necessary ,to couple transmit', and receive, .4.capacitor C1..The cathode .is, connected to input power line. charqels together. A twisted pair .cable is .&d as connecting Whenever space is present on'power line opto isolator starts wire of the network because of its .low cost, easy installation, conducting. The .'resistarice R9 is used to .bias the * optoflexibility for moves and changes, and ability to support 'the. coupler. This configuration is of. more. importance ,.when fuil LAN bandwidth.' signal is coming fiom long distance. This stage also reshapes' One important advantage of twisted-pair cable over non:' the.demodulated signal. This demodulated data (shown in fig twisted cable is resistance to cross talk. 8) is fed to stage-I1 where it is processed by logical gates. The .second stage integrates.monostable dtivibrator [6] This data is sent to stage-I for appropriate 'level conversion, iCD4047)and some logical gates, which is used to prevent .after whch data is transmitted to PC. echoing of data f i l e transmission from PC to power line. In the circuit, capacitor C1 and Schottky diode Dlform a Thb monostable multivibrator is triggered by start bit of half wave rectifier that provides power for the this modem r o m the power line during the idle transmitted serial data (Tx pin of PC Serial port) and the board by ''stealing" it f output of monostabie dtivibrator &sables the AND gate communication periods when the bus is at logic high. This (G4)for fhdfe duration .of time (which is determined by arrangement also provides power at the presence of mark on extema1,compotmt R and C connected at pin no. 1, 2 and 3 the net during communication. Diode D1 prevents power loss of CD 4047) at tihe data flow f r o m PC to power line (as . of modem board, at the presence of space on power line. This depicted in fig 5). The AND gate G1, G2 and G3 are is a discrete implementation of parasite power technique used confgured as inverting buffer. To compensate the for such device to provide their operating power. The small propagation delay caused by multivibrator, fured delay has value of'resistance RI (1E) is connected to prevent large been introduced in data line between stage4 and stage4 current flow through diode while charging of capacitor C1 using .R3and C10 (illustrated by fig 6). Due to this, the hence it prevents the sudden overloading of power line. The echaed signal arrives at .34a% the arrival of signal from resistance R10 i s used to bias -led which gives the visual CD4047 and hence it i s blocked by AND gate G4. .indicationof power. The Transient Voltage Suppressor (TVS)connected across The third stage anodulates transmitted data on to power the MOSFET and power line is used to provide circuit line. The transistor Q1 is inverting buffers which protection by restricting the signal excursions and surge on drives the totem pole configuration made with bipolar the powerline.






1 3 m 0 1






The niceties of device are elaborated clearly by following waveforms. Figure 3 and 4 show the level conversion of RS232 to power line and vice-versa by this modem. The waveform at channel 2 i n fig.3 represents the R5232 signal transmitted f r o m PC. The first wavefom in channel 1 Gust above the channel 2 wavefor&) represents the transmitted s i p 1 over power line. The next waveform in channel 1 is same signal which is being retransmitted after a certain delay from another node to PC to show the demodulation process of the circuit. To illustrate waveform more clearly 10101010 binary data has been employed over power line.



.2 tis


I 2 v



-550 vs

?4 -1.818



Fig. 5. Generation of receive disable at transmission of dah from pc


-931 MY

Fig.6. Shows the action of low pass filter (using R3 and C10) to introduce the. delay in transmission line to compensate the propagation delay caused by multivibrator. Without this delay the echo preventer gate G4 is ineffective as echoed signal at marker D reaches before receive disable signal at nyrker E. channel 1 represents the output of TC232 at marker A in the
15: 13:59




10.26 U

1.907 U

Fig. 3. Modulation of RS232 signal over power line

I '

.... .... .... , . . .

. . . . .... . . _ . _ . .



B a
-38.658 V S

t 1 v Dcll

1h-25.073X #

580 US/s

2 t U DE

1 OC t . B V


Fig. 6. Waveform at marker A and B of schematic diagram

schematic whereas channel 2 represents the signal after delay circuit (marker B in the schematic).
. L ns I 9



-542 VS

- t ,845 It t
L "

55 mws

2 I

1 OC.15.6

Fig. 4. Demodulation of RS232 from power line

Fig. 7. Shows the modulation of space and mark on power line using MOSFET.The wavefom represented by channel 2 is input to the MOSFET (Marker C in the schematic

Fig, 5 shows (channel 2 ) the output of monostable multivibrator at marker E of schematic diagram. Logic low disables the AND. gate G4 for the duration of input signal from PC. Hence it prevents the echoing of transmitted signal,






D D'

I I : 25 :07

flow, 10" bit contains space. The ll* bit is stop bit, which contains mark.

26.0 U

-931 nV

/ D O X D f X D 2 X D 3 w b T O P BlT START BlT DE- 1: ADDReSS D8-0 DATA

Fig. 9. Serial transmission protocol




t I
J -

1 I f I I I II
At -542 yS

1 T
2 I


-1.816 k W

25 MS/S


1 oc

15.6 U


Fig. 7. Waveform at the input and output of the MOSFET


Fig. 8 represents the demodulated and reshaped data (at marker D in the schematic disgram) received fiom power line using opto coupler and logic gates.

Central processor initiates the communication in multiprocessor environment by transmitting the address bj.te to specific module. An interrupt is generated in each module of the network. The address-matching module replies to central processor and enables itielf for data communication. Now all the information is transmitted as data i.e. lO* bit contains space all the t i m e . At this t i m e interrupt is generated only on selected module however other module are doing there specified task without being disturbed by data communication. At the end of data communication central process transmits END OF COMMUNICATION signal to particular module to disable data communication till further addressing. - .



.Fig. 8. Demodulated data

In first phase we could test our circuit up to 57.6 kbps data transfer speed and we found that baud rate is not limited by the connecting wire of the net i.e. the twisted pair cable. We found that circuit is not susceptible to noise occurred on power line below 3V. We found that at larger number of nodes (i.e. at higher power line current), the resistance of cable also plays an important role in data transmission. The m a i n data error during the communication was due to long distance (in our case, 100 meters) between nodes. This was happening due to ground liAing of signals, which was transmitted f i o m node located at far away f i o m centralize dc power supply. After the incorporation of opto-coupler and reshaping of demodulated signal, we are able to get error free signals.


In this scheme all the modules are connected via a power line cable in a bus topology [7]. A unique protocol has been developed*for precise control and fast data communication among nodes. These nodes are configured in a multiprocessor communication environment [S] in which each byte is consists of 11 bits. The transmitted (Tx),or received (Rx) byte starts w i t h space followed by 8-bit data stream.
At the end of data stream i.e. 10' bit contains the signature of data stream M a r k at this position denotes that the content of


This circuit enables data communication as well as power transm$sion to various control module spread over local area network of our control system on a single pair of wire. This helped us in implementing a very neat and easy to h d l e sFtem particularly so for troublcshooting. The circuit has worked reliably up to 57.6 Kbps data rate and is bemg tested
for higher baud rates.

data stream is address of specific node, At the time of data



[J] Application Note:Using the TC232, Microchip Technology REFEREN& IncOrpO~tod, David H,"Unlockingrhe potcntiil of power distribdn networks", httpd/wwl .microchip.comldownloadslen/AppNotes/0034.pdf Power line commwricalions, Power Economics,April 2000 [6J GcIosLogic Duta Book National SemiconductorCorporation, Hcndrik C.F. et al, " Power Line Communication:An OvcrView", Tnamuction 1988, pp. 5.149 5.153 of the S A Institute o f Hect~Icd Engineers,Scptrmba 1995 A s c m Incorpamted. h t e p ~ / ~ . a s c o m c o m o ~ e ~ b j c c t s / t c o r 171 Paul J. F,"Handbook of LAN Technology",Interkxt Publications, McGraw-Hill,Inc., New York, 1989 ,pp. 159- I # d c l s h o w N o d J s i t e N o d ~ ~ 3 6 3 ~ ~ c o n t c n l l q l 7 0 5 6 4 ~ l ~ ~.hbnl 1pgcIDJ [8] Almel Mjcrucontroller Datu Book, Atmel Corporation, December Paul H. and Winfield H, "Art of Elecrtonicr", 2"" edition ,Cambridge I997 University F'ress, 1 9 8 9 , ' ~727 ~.