Jawaharlal Nehru Engineering Collage

Laboratory Manual
EDC-I For Second Year Students

Manual made by Prof Aashish Saraf

Author JNEC, Aurangabad

Jawaharlal Nehru Engineering College

Technical Document
This technical document is a series of Laboratory manuals of Electronics and Telecommunication Department and is a certified document of Jawaharlal Nehru engineering College. The care has been taken to make the document error-free. But still if any error is found, kindly bring it to the notice of subject teacher and HOD.

Recommended by. HOD

Approved by. Principal

FOREWORD

It is my great pleasure to present this laboratory manual for second year engineering students for the subject of Electronic Devices &circuits-I to understand and visualize the basic concepts of various circuits using ICs. Electronic Devices &circuits-I covers basic concepts of electronics. This being a core subject, it becomes very essential to have clear theoretical and designing aspects. This lab manual provides a platform to the students for understanding the basic concepts of electronic devices and circuits. This practical background will help students to gain confidence in qualitative and quantitative approach to electronic circuits. Good Luck for your Enjoyable Laboratory Sessions.

H.O.D ECT Dept

LABORATORY MANUAL CONTENTS

This manual is intended for the Second Year students of ECT/IE branches in the subject of Electronic Devices & Circuits-I. This manual typically contains practical/ Lab Sessions related to Electronic Devices & Circuits covering various aspects related to the subject for enhanced understanding. Students are advised to thoroughly go through this manual rather than only topics mentioned in the syllabus as practical aspects are the key to understanding and conceptual visualization of theoretical aspects covered in the books. Good Luck for your enjoyable Laboratory Sessions.

SUBJECT INDEX:
1. Dos & Donts in Laboratory. 2. Lab Exercises

1.

To plot VI characteristic of junction diode and Zener diode.

2. For half wave rectifier with capacitor filter find line and load regulation and ripple factor. 3. For bridge rectifier with capacitor filter find line and load regulation and ripple factor. 4. To determine h parameter for CE configuration. 5. To determine voltage gain, current gain, input impedance and output impedance of common Emitter amplifier. 6. To study BJT fixed bias with & without emitter resistor. 7. Plot Characteristic of CSFET, determine amplification factor, transconductance and amplification factor 8. Determine Input and Output impedance, and voltage and current gain for CSFET

3. Quiz 4. Conduction of viva voce examination 5. Evaluation & marking scheme

Dos and Donts in Laboratory :1. Do not handle any equipment before reading the instructions /Instruction manuals.

2. Read carefully the power ratings of the equipment before it is switched ON, whether ratings 230 V/50 Hz or 115V/60 Hz. For Indian equipment, the power ratings are normally 230V/50Hz. If you have equipment with 115/60 Hz ratings, do not insert power plug, as our normal supply is 230V/50Hz., which will damage the equipment. 3. Observe type of sockets of equipment power to avoid mechanical damage. 4. Do not forcefully place connectors to avoid the damage. 5. Strictly observe the instructions given by the Teacher/ Lab Instructor. Instruction for Laboratory Teachers:1. Submission related to whatever lab work has been completed should be done during the next lab session.

2. Students should be instructed to switch on the power supply after getting the checked by the lab assistant / teacher. After the experiment is over, the students must hand over the circuit board, wires, CRO probe to the lab assistant/teacher. 3. The promptness of submission should be encouraged by way of marking and evaluation patterns that will benefit the sincere students.

Exercise No.1:(2 Hours):- 1 Practical

Aim :-

To plot VI characteristic of junction diode and Zener diode.

Apparatus :- D.C.regulated power supply (0-30V) , Diode(1N4007),

Resistance (820 ), voltmeter, ammeter (0-25mA) Connecting wires

Circuit Diagram :-

R1 1k Vf 30V +

D1 DIODE

A a

+ 10V -

Procedure:1. Connect the circuit as shown in fig. 2. By varying applied voltage measure corresponding reading for voltage & current. 3. Plot the graph of voltage & forward current.

Observations:-

Applied voltage Vdc ( V)

O/P Voltage Vf ( V)

Current If ( mA)

Result:- Current increases exponentially with respect to voltage after cut

in voltage as seen from the graph

Exercise No.2:(2 Hours):-

Aim :- For half wave rectifier with capacitor filter find line and load regulation

and ripple factor.

Apparatus :- D.C.regulated power supply (0-30V) , Diode(1N4007),

Resistance (820 ), voltmeter,voltmeter,inductor, capacitor (100 microfarad) oscilloscope, Connecting wires.

Circuit Diagram :-

Procedure:1. Connect the circuit as shown in fig. 2. By varying applied voltage measure corresponding reading for voltage & current. 3. Observe the output DC voltage and calculate ripple factor 4. by varying resistive load observe the change in output voltage, and calculate load regulation.

Observations:-

Result:- Write down the conclusion based on the reading of load and line regulations in terms of
efficiency .

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Exercise No.3:(2 Hours):-

Aim :- For Bridge rectifier with capacitor filter find line and load regulation and

ripple factor.

Apparatus :- D.C.regulated power supply (0-30V) , Diode(1N4007), inductor,

capacitor(100 microfarad),Resistance (820 ), voltmeter,voltmeter, oscilloscope, Connecting wires.

Circuit Diagram :-

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Procedure:1. Connect the circuit as shown in fig. 2. By varying applied voltage measure corresponding reading for voltage & current. 3. Observe the output DC voltage and calculate ripple factor 4. by varying resistive load observe the change in output voltage, and calculate load regulation.

Observations:-

Result:- Write down the conclusion based on the reading of load and line regulations in terms of
efficiency .

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Exercise No.4:(2 Hours)

TRANSISTOR CE CHARACTERSTICS
AIM: 1. To draw the input and output characteristics of transistor connected in CE configuration 2. To find h parameters of the given transistor.

APPARATUS: Transistor (BC 107) Regulated Power Supply (O-15/30V) Voltmeters (0-20V) Ammeters (0-200A), (0-500mA) Resistors Bread board THEORY: A transistor is a three terminal device. The terminals are emitter, base, collector. In common emitter configuration, input voltage is applied between base and emitter terminals and output is taken across the collector and emitter terminals. Therefore the emitter terminal is common to both input and output. The input characteristics resemble that of a forward biased diode curve. This is expected since the Base-Emitter junction of the transistor is forward biased. As compared to CB arrangement IB increases less rapidly with VBE resistance of CE circuit is higher than that of CB circuit. The output characteristics are drawn between Ic and VCE at constant IB. the collector current varies with VCE unto few volts only. After this the collector current becomes almost constant, and independent of V CE. The value of VCE up to which the collector current changes with V
CE .

2Nos 2Nos

1Kohm, 100ohm

Therefore input

is known as Knee voltage. The transistor always

operated in the region above Knee voltage, I C is always constant and is approximately equal to IB. The current amplification factor of CE configuration is given by = IC/IB 13

CIRCUIT DIAGRAM:

PROCEDURE:

INPUT CHARECTERSTICS: 1. Connect the circuit as per the circuit diagram. 2. For plotting the input characteristics the output voltage VCE is kept constant at 2V and for different values of VBE Note down the values of IC. 3. Tabulate all the readings. 4. Plot the graph between VBE and IB for constant VCE. OUTPUT CHARACTERSTICS: 1. Connect the circuit as per the circuit diagram 2. For plotting the output characteristics the input current IB is kept constant at 20A and for different values of VCE note down the values of IC. 3. Tabulate the all the readings. 4. Plot the graph between VCE and IC for constant IB.

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OBSERVATIONS:

INPUT CHARACTERISTICS:

VCE = 2V S.NO VBE(V) IB(A)

OUT PUT CHAREACTARISTICS:

IB = 20 A S.NO VCE(V) IC(mA)

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MODEL GRAPHS: INPUT CHARACTERSTICS:

OUTPUT CHARECTERSTICS:

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PRECAUTIONS: 1. The supply voltage should not exceed the rating of the transistor 2. Meters should be connected properly according to their polarities

RESULT: 1. The input and out put characteristics of a transistor in CE configuration are Drawn 2. The h parameters of a given transistor are calculated

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Exercise No. 5:(2 Hours) Aim: To determine voltage gain, current gain, input impedance and output

impedance of common Emitter amplifier. Apparatus :- D.C. regulated power supply (0-30V) ,Resistance (1000 ), voltmeter, breadboard,
Transistor (BC548),capacitor (100 microfarad), oscilloscope, Connecting wires.

Circuit Diagram :-

Procedure:1. Connect the circuit as shown in fig. 2. Apply the sin wave input in between base and emitter 3. Observe the amplified output across collector and emitter 4. Calculate voltage gain, current gain, input impedance, output impedance

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Theory:

input impedance
(ri) =

r(pi)||R(B)

ouput impedance (ro) = Rc || ro

current gain
Ai = Io Iin

Observations:Input voltage 1. 2. 3. Output voltage

Conclusion:
1. Input impedance is moderately large , output impedance is fairly large.

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2. Large voltage and current gains are possible.

Exercise No.6:(2 Hours) Aim :- To study BJT fixed bias with & without emitter resistor.
.

Apparatus :- Transistor BC148, =173 approx, resistors RB1 =100k,

RB2=180k, RC=470, RE=180 , bulb , Supply voltage :+12V, Ammeter (0-100A)(0-25mA), Voltmeter(0-15V)

Circuit Diagram :-

V1 10V +V RB1 100k 1 RB2 180K RC 470

2 Q1 NPN

RE 180K

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Procedure:1. Study the circuit provided on the front panel of the kit & connect the ammeter voltmeter as shown in circuit diagram. 2. Connect Base of transistor to base resistor RB1 and Emitter to point 2 (ground) , by using patch cords the circuit becomes Fixed Bias. Calculate the theoretical value of currents & voltages and note the corresponding values as per observation table , by observing ammeter & voltmeter readings.

Repeat the above procedure for R=RB1. 3. Now , connect the Emitter resistor RE in the circuit & select R=R B1,the circuit becomes Fixed Bias with Emitter Resistor .Repeat the above procedure & note the ammeter voltmeter reading as per observation table. Repeat the above procedure for R=RB2 4. Draw the DC load line .

Observations:For Fixed Bias:- =173 Base Resistor IB=VCC/R

B

IB (PR)

IC= IB (TH)

IC (PR)

VCE = VCC + ICRC (TH)

VCE (PR)

(TH) RB =RB1 =--------RB =RB2 =---------

-----mA

-----mA

-----mA

-----mA

-----mA

-----mA

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Stability factor= S=1+ For Fixed Bias with Emitter Resistor : =173 , RB1 =---------- , RC =---------- , RE =---------- , RB2 =---------. IB = VCC RB VC= VCC - IC RC ,
,

IC (sat) =

VCC RE +RC

Actual IC =

VCC RE +RB/

VE=

IE RE

IE RE ,

VCE=

VC - VE

S=

1+ RE RE +RC

1+
,

RB

IB (TH)

IB (PR)

ICsat (TH)

VC (TH)

VC (PR)

VE (TH)

VE (PR)

VCE (TH)

VCE (PR)

RB =RB1 =------RB =RB2 =-------

Result:- The stability factor for fixed bias & fixed bias with emitter resistor is found to be ----------&----------- respectively.

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Exercise No.7:(2 Hours)

FET CHARACTERISTICS
AIM: a). To draw the drain / output and transfer characteristics of a given FET. b). To find the drain resistance (rd) amplification factor () and Tran conductance (gm) of the given FET. APPARATUS: FET Regulated power supply Voltmeter (0-20V) Ammeter (0-100mA) Bread board Connecting wires THEORY: A FET is a three terminal device, having the characteristics of high input impedance and less noise, the Gate to Source junction of the FET s always reverse biased. In response to small applied voltage from drain to source, the n-type bar acts as sample resistor, and the drain current increases linearly with VDS. With increase in ID the ohmic voltage drop between the source and the channel region reverse biases the junction and the conducting position of the channel begins to remain constant. The V DS at this instant is called pinch of voltage. If the gate to source voltage (VGS) is applied in the direction to provide additional reverse bias, the pinch off voltage is decreased. In amplifier application, the FET is always used in the region beyond the pinch-off. FDS=IDSS(1-VGS/VP)^2

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CIRCUIT DIAGRAM

PROCEDURE: 1. All the connections are made as per the circuit diagram. 2. To plot the drain / output characteristics, keep VGS constant at 0V. 3. Vary the VDD in step of 1V up to 10V and observe the values of VDS and ID. 4. All the readings are tabulated. 5. To plot the transfer characteristics, keep VDS constant at 1V. 6. Vary VGG and observe the values of VGS and ID. 7. Tabulate all the readings. 8. From drain characteristics, calculate the values of dynamic resistance (rd) by using the formula rd = VDS/ID 9. From transfer characteristics, calculate the value of transconductace (gm) By using the formula Gm=ID/VDS 10. Amplification factor () = dynamic resistance. Tran conductance = VDS/VGS 24

OBSERVATIONS:

DRAIN CHARACTERISTICS:

S.NO

VGS=0V VDS(V) ID(mA)

TRANSFER CHARACTERISTICS:

S.NO

VDS=1V VGS (V) ID(mA)

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MODEL GRAPH:

TRANSFER CHARACTERISTICS

OUTPUT CHARACTERISTICS

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PRECAUTIONS:

1. The three terminals of the FET must be carefully identified 2. Practically FET contains four terminals, which are called source, drain, Gate, substrate. 3. Source and case should be short circuited. 4. Voltages exceeding the ratings of the FET should not be applied.

RESULT :

1. The drain / output and transfer characteristics of a given FET are drawn 2. The dynamic resistance (rd), amplification factor () and Tran conductance (gm) of the given FET are calculated.

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Exercise No.8:(2 Hours):-

Aim: Determine Input and Output impedance, and voltage and current gain for
CSFET

Apparatus: D.C. regulated power supply (0-30V) ,Resistance (1000 ), voltmeter, breadboard,
JFET,capacitor (100 microfarad), oscilloscope, Connecting wires.

Circuit Diagram :-

Procedure:1. Connect the circuit as shown in fig. 2. Apply the sin wave input in between base and emitter 3. Observe the amplified output across collector and emitter 4. Calculate voltage gain, current gain, input impedance, output impedance

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Theory:

The input signal, (Vin) of the common source JFET amplifier is applied between the Gate terminal and the zero volts rail, (0v). With a constant value of gate voltage Vg applied the JFET operates within its "Ohmic region" acting like a linear resistive device. The drain circuit contains the load resistor, Rd. The output voltage, Vout is developed across this load resistance. The efficiency of the common source JFET amplifier can be improved by the addition of a resistor, Rs included in the source lead with the same drain current flowing through this resistor. Resistor, Rs is also used to set the JFET amplifiers "Q-point".

Observations:Input voltage 1. 2. 3. Output voltage

Conclusion: write down the effect of high input impedance and low output impedance.

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3.Quiz on the subject:Q:1 When a pn-junction is forward biased (a) electrons in the n region enter into the p region (b) holes in the p region enter into the n region (c) both a and b (d) none of these Q:2 under normaloperating voltage , the reverse current in a silicon diode is about (a) 10mA (b) 1A (c) 1000 A (d) none of these Q:3 The most commonly used transistor circuit arrangement is (a) CB (b) CE (c) CC (d) none of these Q:4 The emitter of transistor is doped

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(a) heavily (b) lightly (c) moderately (d) none of these Q:5 The biasing circuit which gives best stability to the Q point is (a) base resistor biasing (b) feedback resistor biasing (c) potential divider biasing (d) emitter resistor biasing Q:6 The ideal value of stability factor is (a) 1 (b) 5 (c) 10 (d) 100 Q:7 A practical constant current source should have internal resistance as (a) zero (b) low (c) high (d) none of these

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4. Conduction of Viva-Voce Examinations:

Teacher should conduct oral exams of the students with full preparation. Normally, the objective questions with guess are to be avoided. To make it meaningful, the questions should be such that depth of the students in the subject is tested. Oral examinations are to be conducted in cordial environment amongst the teachers taking the examination. Teachers taking such examinations should not have ill thoughts about each other and courtesies should be offered to each other in case of difference of opinion, which should be critically suppressed in front of the students.

5. Evaluation and marking system:

Basic honesty in the evaluation and marking system is absolutely essential and in the process impartial nature of the evaluator is required in the examination system to become. It is a primary responsibility of the teacher to see that right students who are really putting up lot of hard work with right kind of intelligence are correctly awarded. The marking patterns should be justifiable to the students without any ambiguity and teacher should see that students are faced with just circumstances.

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