Sie sind auf Seite 1von 10

RIZAL TECHNOLOGICAL UNIVERSITY

COLLEGE OF ENGINEERING AND INDUSTRIAL TECHNOLOGY E C E II RESEARCH WORK

FIELD EFFECT TRANSISTOR


Name ; Armodia Tevarms t, Time/day ; TF 7:30P 9:00P Course ; Bs Ece Submitted to ;Engr Nasuli

FET
The field-effect transistor (FET) is a transistor that uses an electric field to control the shape and hence the conductivity of a channel of one type of charge carrier in a semiconductor material. FETs are sometimes called unipolar transistors to contrast their single-carrier-type operation with the dual-carrier-type operation of bipolar (junction) transistors (BJT). The concept of the FET predates the BJT, though it was not physically implemented until after BJTs due to the limitations of semiconductor materials and the relative ease of manufacturing BJTs compared to FETs at the time. The field-effect transistor (FET) is a three-terminal device used for a variety of applications that match to a large extent, those of the BJT transistor. Although there are important differences between the two types of devices, there are also many similarities, which will be pointed out in the sections to follow. The primary difference between the two types of transistors is the fact that; The BJT transistor is a current-controlled device as depicted where as the JFET transistor is a voltage-controlled device. The term field effect in the name deserves some explanation. We are all familiar with the ability of permanent magnet to draw metal fillings to itself without the need for actual contact. The magnetic field of the permanent magnet envelopes the fillings and attracts them to the magnet because the magnetic flux lines act so as to be short as possible. For the FET an electric field is established by the charges present, which controls the conduction path of the output circuit without the need for direct contact between the controlling and controlled quantities. There is a natural tendency when introducing a device with a range of applications similar to one already introduced to compare some of the general characteristics of one to those of the other: One of the most important characteristics of the FET is its high input impedance FETs are more temperature stable than BJT, and FET are usually smaller than BJT, making them particularly useful in integrated-circuit (IC)chips. A field effect transistor (FET) is a unipolar device, conducting a current using only one kind of charge carrier. If based on an N-type slab of semiconductor, the carriers are electrons. Conversely, a P-type based device uses only holes. At the circuit level, field effect transistor operation is simple. A voltage applied to the gate, input element, controls the resistance of the channel, the unipolar region between the gate regions.In an N-channel device, this is a lightly doped N-type slab of silicon with terminals at the ends. The source and drain terminals are analogous to

the emitter and collector, respectively, of a BJT. In an N-channel device, a heavy P-type region on both sides of the center of the slab serves as a control electrode, the gate. The gate is analogous to the base of a BJT In the FET, current flows along a semiconductor path called the channel. At one end of the channel, there is an electrode called the source. At the other end of the channel, there is an electrode called the drain. The physical diameter of the channel is fixed, but its effective electrical diameter can be varied by the application of a voltage to a control electrode called the gate. The conductivity of the FET depends, at any given instant in time, on the electrical diameter of the channel. A small change in gate voltage can cause a large variation in the current from the source to the drain. This is how the FET amplifies signals.

History
The field-effect transistor was first patented by Julius Edgar Lilienfeld in 1925 and by Oskar Heil in 1934, but practical semi-conducting devices (the JFET, junction gate field-effect transistor) were only developed much later after the transistor effect was observed and explained by the team of William Shockley at Bell Labs in 1947. The MOSFET (metaloxidesemiconductor fieldeffect transistor), which largely superseded the JFET and had a more profound effect on electronic development, was first proposed by Dawon Kahng in 1960. Drs. Ian Munro Ross and G.C. Dacey jointly developed an experimental procedure for measuring the characteristics of a field-effect transistor in 1995.

Types of Field-Effect Transistors


CNTFET (Carbon nanotube field-effect transistor) The DEPFET is a FET formed in a fully depleted substrate and acts as a sensor, amplifier and memory node at the same time. It can be used as an image (photon) sensor. The DGMOSFET is a MOSFET with dual gates. The DNAFET is a specialized FET that acts as a biosensor, by using a gate made of single-strand DNA molecules to detect matching DNA strands. The FREDFET (Fast Reverse or Fast Recovery Epitaxial Diode FET) is a specialized FET designed to provide a very fast recovery (turn-off) of the body diode. The HEMT (high electron mobility transistor), also called a HFET (heterostructure FET), can be made using bandgapengineering in a ternary semiconductor such as AlGaAs. The fully depleted wide-band-gap material forms the isolation between gate and body. The HIGFET (heterostructure insulated gate field effect transisitor)), is used mainly in research now. [1] The IGBT (insulated-gate bipolar transistor) is a device for power control. It has a structure akin to a MOSFET coupled with a bipolar-like main conduction channel. These are commonly used for the 200-3000 V drain-to-source voltage range of operation. Power MOSFETs are still the device of choice for drain-tosource voltages of 1 to 200 V. The ISFET (ion-sensitive field-effect transistor) used to measure ion concentrations in a solution; when the ion concentration (such as H+, see pH electrode) changes, the current through the transistor will change accordingly. The MESFET (MetalSemiconductor Field-Effect Transistor) substitutes the p-n junction of the JFET with a Schottky barrier; used in GaAs and other III-V semiconductor materials. The MODFET (Modulation-Doped Field Effect Transistor) uses a quantum well structure formed by graded doping of the active region. The MOSFET (MetalOxideSemiconductor Field-Effect Transistor) utilizes an insulator (typically SiO2) between the gate and the body. The NOMFET is a Nanoparticle Organic Memory Field-Effect Transistor.[2] The OFET is an Organic Field-Effect Transistor using an organic semiconductor in its channel. The GNRFET is a Field-Effect Transistor that uses a graphene nanoribbon for its channel. The VeSFET (Vertical-Slit Field-Effect Transistor) is a square-shaped junctionless FET with a narrow slit connecting the source and drain at opposite corners. Two gates occupy the other corners, and control the current through the slit. [3] [4] The TFET (Tunnel Field-Effect Transistor) is based on band to band tunneling

JFET There are two basic types of FET. In the junction FET (JFET), the gate material is made of the opposite polarity semiconductor to the channel material (for a Pchannel FET the gate is made of N-type semiconductor material). The gate-channel junction is similar to a diode's PN junction. As with the diode, current is high if the junction is forward biased and is extremely small when the junction is reverse biased. The latter case is the way that JFETs are used, since any current in the gate is undesirable. The magnitude of the reverse bias at the junction is proportional to the size of the electric field that 11 pinches" the channel. Thus, the current in the channel is reduced for higher reverse gate bias voltage. Because the gate-channel junction in a JFET is similar to a bipolar junction diode, this junction must never be forward biased, otherwise large currents will pass through the gate and into the channel. For an N-channel JFET, the gate must always be at a lower potential than the source (Vcs < 0). The channel is as fully open as it can get when the gate and source voltages are equal (VGS = 0). The prohibited condition is when VGS > 0. For P-channel JFETs these conditions are reversed (in normal operation VGS 0 and the prohibited condition is when VGS < 0). MOSFET Placing an insulating layer between the gate and the channel allows for a wider range of control (gate) voltages and further decreases the gate current (and thus increases the device input resistance). The insulator is typically made of an oxide (such as silicon dioxide, SiO2), This type of device is called a metal-oxidesemiconductor FET (MOSFET) or insulated-gate FET (IGFET). The substrate is often connected to the source internally. The insulated gate is on the opposite side of the channel from the substrate. The bias voltage on the gate terminal either attracts or repels the majority carriers of the substrate across the PN junction with the channel. This narrows (depletes) or widens (enhances) the channel, respectively, as VGS changes polarity. For N-channel MOSFETs, positive gate voltages with respect to the substrate and the source (VGS > 0) repel holes from the channel into the substrate, thereby widening the channel and decreasing channel resistance. Conversely, VGS < 0 causes holes to be attracted from the substrate, narrowing the channel and increasing the channel resistance. Once again, the polarities discussed in this example are reversed for P-channel devices. The common abbreviation for an N-channel MOSFET is NMOS, and for a P-channel MOSFET, PMOS. Because of the insulating layer next to the gate, input resistance of a MOSFET is usually greater than 1012 Ohms (a million megohms). Since MOSFETs can both deplete the channel, like the JFET, and also enhance it, the construction of MOSFET devices differs based on the channel size in the resting state, VGS = 0. A depletion mode, device (also called a normally on MOSFET) has a channel in resting state that gets smaller as a reverse bias s applied, this device conducts current with no bias applied. An enhancement mode device (also called a normally off MOSFET) is

built without a channel and does not conduct current when VGS = 0; increasing forward bias forms a channel that conducts current.

Characteristics Of FETs
The JFETs is a three-terminal device with one terminal capable of controlling the current between the other two. For the JFET transistor the n-channel device will be the prominent device, with paragraphs and sections devoted to the effects of using a p-channel JFET. The basic construction of the n-channel FET is the major part of the structure is the n-type material, which forms the channel between the embedded layers of ptype material. The top of the n-type channel is connected through an ohmic contact to a terminal referred to as the drain, whereas the lower end of the same material is connected through an ohmic contact to a terminal referred to as the source. The two p-type terminal materials are connected together and to the gate terminal. In essence, therefore, the drain and the source are connected to the ends of the n-type channel and the gate to the two layers of p-type material. In the absence of any applied potentials the FET has two p-n junctions under no-bias conditions. The result is a depletion region as each junction, that resembles the same region of a diode under no=bias conditions. Recall also that a depletion region is void of free carriers and is therefore unable to support conduction. Analogies are seldom perfect and at times can be misleading, but the water analogy does provide a sense for the FET control at the terminal and the appropriateness of the terminology applied to the terminals of the device. The source of water pressure can be likened to the applied voltage from drain to source, which establishes a flow of water (electrons) from the spigot (source). The gate through an applied signal(potential), controls the flow of water (charge) to the drain The drain and source terminals are at opposite ends of the n-channel because the terminology is defined for electron flow.

FET operation
The FET controls the flow of electrons (or electron holes) from the source to drain by affecting the size and shape of a "conductive channel" created and influenced by voltage (or lack of voltage) applied across the gate and source terminals (For ease of discussion, this assumes body and source are connected). This conductive channel is the "stream" through which electrons flow from source to drain. In an n-channel depletion-mode device, a negative gate-to-source voltage causes a depletion region to expand in width and encroach on the channel from the sides, narrowing the channel. If the depletion region expands to completely close the channel, the resistance of the channel from source to drain becomes large, and the FET is effectively turned off like a switch. Likewise a positive gate-to-source voltage increases the channel size and allows electrons to flow easily. Conversely, in an n-channel enhancement-mode device, a positive gate-to-source voltage is necessary to create a conductive channel, since one does not exist naturally within the transistor. The positive voltage attracts free-floating electrons within the body towards the gate, forming a conductive channel. But first, enough electrons must be attracted near the gate to counter the dopant ions added to the body of the FET; this forms a region free of mobile carriers called a depletion region, and the phenomenon is referred to as the threshold voltage of the FET. Further gate-to-source voltage increase will attract even more electrons towards the gate which are able to create a conductive channel from source to drain; this process is called inversion. For either enhancement- or depletion-mode devices, at drain-to-source voltages much less than gate-to-source voltages, changing the gate voltage will alter the channel resistance, and drain current will be proportional to drain voltage (referenced to source voltage). In this mode the FET operates like a variable resistor and the FET is said to be operating in a linear mode or ohmic mode. If drain-to-source voltage is increased, this creates a significant asymmetrical change in the shape of the channel due to a gradient of voltage potential from source to drain. The shape of the inversion region becomes "pinched-off" near the drain end of the channel. If drain-to-source voltage is increased further, the pinchoff point of the channel begins to move away from the drain towards the source. The FET is said to be in saturation mode; some authors refer to it as active mode, for a better analogy with bipolar transistor operating regions. The saturation mode, or the region between ohmic and saturation, is used when amplification is needed. The in-between region is sometimes considered to be part of the ohmic or linear region, even where drain current is not approximately linear with drain voltage. Even though the conductive channel formed by gate-to-source voltage no longer connects source to drain during saturation mode, carriers are not blocked from flowing. Considering again an n-channel device, a depletion region exists in the ptype body, surrounding the conductive channel and drain and source regions. The electrons which comprise the channel are free to move out of the channel through the depletion region if attracted to the drain by drain-to-source voltage. The

depletion region is free of carriers and has a resistance similar to silicon. Any increase of the drain-to-source voltage will increase the distance from drain to the pinch-off point, increasing resistance due to the depletion region proportionally to the applied drain-to-source voltage. This proportional change causes the drain-tosource current to remain relatively fixed independent of changes to the drain-tosource voltage and quite unlike the linear mode operation. Thus in saturation mode, the FET behaves as a constant-current source rather than as a resistor and can be used most effectively as a voltage amplifier. In this case, the gate-to-source voltage determines the level of constant current through the channel.

Parameters of AC and DC,

Name Symbol Description Vt0 Vth Beta Beta Lambda Rd Rs Is N Isr Nr Cgs Cgd Pb Fc Fe M M Kf

Unit V A/V 1/V

Default -2.0 10 0.0

zero -bias threshold voltage transconductance parameter channel-length modulation parameter drain ohmic resistance source ohmic resistance gate-junction saturation current gate P-N emission coefficient gate-junction recombination current parameter Isr emission coefficient zero-bias gate-source junction capacitance zero-bias gate-drain junction capacitance gate-junction potential forward-bias junction capacitance coefficient gate P-N grading coefficient flicker noise coefficient

ohms 0.0 ohms 0.0 A A F F V 10 1.0 0.0 2.0 0.0 0.0 1.0 0.5 0.5 0.0

Af Ffe Temp Xti Vt0tc Betatce Tnom Area

flicker noise exponent flicker noise frequency exponent device temperature saturation current exponent Vt0 temperature coefficient Beta exponential temperature coefficient temperature at which parameters were extracted default area for JFET

1.0 1.0 26.85 3.0 0.0 0.0 26.85 1.0

Bibliography :
I.J. Nagrath, Electronic devices and circuits, 2007 ,published by Asoke k. Ghosg, EEE eastern economy edition, pp 1 18.

Balbir kumar and shail b. jain, Electronic devices and circuits, 2007 ,published by Asoke k. Ghosg, EEE eastern economy edition, pp 4 20. B. P. Singh Rekha Singh, Electronics devices and integrated circuits, first impression,2006, published by Dorling Kindersley ( India) pvt. Ltd, licenses of pearson in sounth Asia. pp 1 50. S. salivahanan, N.suresh kumar, A vallavaraj, Electronic devices and circuits, 1998, Tata McgrawHill Publishing Company Limited, This edition can be exported from india only by the publishers.

Das könnte Ihnen auch gefallen