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Abstract - This paper presents a general-purpose kernel genetic algorithms. The optimization of any new block is
based genetic algorithms for optimizing complex analog basically carried-out by simply providing two additional
circuits and systems. The developed tool is very flexible files to the kernel. A text file containing the information of
allowing optimizations at different levels of abstraction. The the genes (variables) of the chromosome and, on the other
optimization of any new block is basically carried-out by hand, a dynamic link library (DLL) type file, which is ob-
simply providing two additional files to the kernel. A text tained by compiling a C++ code-source file comprising the
file containing the information of the genes (variables) of the overall fitness function. Two examples are given to illustrate
chromosome and, on the other hand, a dynamic link library the efficiency of the optimizer at both, circuit and system
(DLL) type file, which is obtained by compiling a C++ levels. In section 3 the results of the optimization of a low-
code-source file comprising the overall fitness function. Op- voltage pipelined ADC are shown, taking into account major
timization examples of two low-voltage circuits clearly as- issues, such as, thermal noise, power dissipation and linear-
sess the attractiveness of this tool. ity. In section 4, the results of the optimization of a low-
voltage two-stage Miller compensated amplifier are pre-
1. INTRODUCTION sented and compared with simulated results. Finally, conclu-
sions are drawn in section 5.
According to the Semiconductor Industry Association’s
roadmap [1] a fast scaling-down of the transistor’s minimum 2. DESCRIPTION OF THE GENERAL-PURPOSE
channel lengths is expected. Furthermore, this technology KERNEL STRUCTURE
scaling will be accomplished by a reduction of the supply
voltages of the circuits (1.8 Volt by 2000 and 0.3 Volt by 2.1 – ARCHITECTURE OF THE TOOL
2014). However, this reduction of the supply voltage se-
verely affects the analog circuit design basically due to two
main reasons. Firstly, in smaller technologies, the supply
voltage scales roughly linear with the minimum feature size
but the threshold voltages of the transistors do not. As a con-
sequence, the number of topologies capable of operating at
low voltages is highly reduced. On the other hand, since the
voltage swings have to be proportionally decreased, the sig-
nal-to-noise ratios of the circuits are directly affected. In
order to maintain the current efficiency (power dissipation)
is mandatory to have efficient optimization tools to assure
that the overall performance of the circuit or system is not
degraded. Moreover, from the IC market point of view is
highly desirable to have short redesign cycles either for dif-
ferent technologies or specifications.
Figure 1 – Tool’s Architecture.
Several approaches for automatic design and optimization
(automatic sizing) of analog cells were already proposed The architecture of the proposed kernel is presented in Fig-
using statistical optimization techniques such as simulated ure 1. There are two text files that should be provided to the
annealing, either in equation-based systems [2] or in simula- application: one contains the structure of the chromosome
tion-based systems [3]. The optimization tool proposed in and another the desired parameters that are envisaged. The
this paper follows, as suggested in [4], an equation-based
approach for optimization of analog building blocks using chromosome, x , consists of one or more genes. Basically,
the genes are the variables, xi, that the algorithm will found
that best fit the desired goals. The first file comprises the
information regarding the upper (Lmax) and lower (Lmin) lim-
its of the genes and also the resolution of each gene (Rg).
The second file contains the desired value and the relative
strength of all of them. Additionally it can be provided, de-
pending on the problem, another text file containing specific
parameters – Technology file -. One of the most important
blocks of this architecture is the DLL that contains the fit- a) b)
()
ness function, f x . This file has all the mathematical func-
Figure 2 – (a) Roulette System for 5 individuals;
(b) Rank System for 5 individuals
tions that model the behavior circuit. The chromosome that
best fits the goal (the entire set of the desired parameters) is B – Cross-operator
saved for later simulation and confirmation of the results.
Within each chromosome, genes are represented in binary
2.2 – GENETIC ALGORITHM code where the number of bits is dependent of the desired
precision according to:
The heart of the application is the genetic algorithm. A full
description of the genetic algorithm’s theory is out of the Rg −1
scope of this paper. Basically, this algorithm can be summa- x i = L min + (L max − L min ) ∑b j ⋅2 j (2 Rg
)
−1 (1)
rized in the next steps. j =0
A - Selection
Figure 3 – The Cross-operator.
One possible approach to select the individuals is to pre-
define a percentage of individuals that are directly copied C – The Mutation Operator
into the next population. The remaining individuals are
crossed and finally the mutation operator is applied to new The mutation operator work as follows. Firstly, one bit of
population. A different approach is that only the best chro- the gene to be mutated is randomly chosen. This bit changes
mosome is copied to next population and it remains un- its digital value as it is represented in Figure 4.
changed. There are two ways of selecting individuals: rou-
lette and rank systems.
# of stages
(NS)
C
(S&H)
Res.
stage 1
Cunit Res.
(stage 1) stage 2
Cunit
(stage 2)
... Res
(stage NS)
5. CONCLUSIONS
This paper presented a general-purpose kernel based ge-
netic algorithms for optimizing complex analog circuits and
systems. The developed tool is very flexible allowing op-
timizations at different levels of abstraction. Optimization
examples of two low-voltage circuits were presented to
clearly assess the attractiveness of this tool.
ACKNOWLEDGMENTS
The research work that led to this implementation was partially
supported by the Portuguese Foundation for Science and Technol-
ogy under ADOPT (PCTI/1999/ESE/33311) Project.
REFERENCES
[1] International Technology Roadmap for Semiconductors, Semi-
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[2] G. E. Gielen, H. Walsharts and W. Sansen, “Analog circuits
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