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The main idea of this project is to build a simple voice recognition system using HM2007 voice recognition chip that controls home appliances (i.e. turning on/off, speed, volume etc) by processing the spoken word. These networks allow users to consolidate lighting, fan, entertainment, security systems and other appliances into an easy-to-operate unified network. Interactive applications operated by voice recognition, are key features of home automation networks. A home automation system must also be scalable to allow future evolution, flexible to support field upgrades, interactive, easy-to-use, costefficient and reliable.The method used is simple voice comparison technique. The voice recognition chip stores the spoken word into the memory in training mode. When the trained word matches with the spoken word , the decoder logic drives the respective output appliances.
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ACKNOWLEDGEMENT
Without the guidance and support of the following people we would not have been able to complete this project. Hence its our pleasure to thank all these people who made this project a reality. We are extremely grateful to our guide Prof. Tenson Jose, Senior Lecturer, Department of Electronics and Communication for his suggestions and Guidance. We are extremely grateful to Prof. Rafeeq Ahmed, Head of Electronics and Communication Department for his moral support and Guidance. We are extremely grateful to Dr. Jose Alex Mathew, Professor and Director of Electronics and Communication for his support and encouragement to lead us to the right path. We are indebted to our Principal, Dr. Abdul Sharief and the Management of PA College of Engineering for providing an environment with all facilities that helped us in completing our project in time. We are also extremely grateful to our project coordinator, Prof. Jithendra N.K, Associate Professor in Electronics and Communication Engineering for his guidance and suggestions. We take this opportunity to convey my gratitude to all the teaching and nonteaching staff of the Department of Electronics and Communication Engineering for their help. Our heartfelt thanks go out to all our family members and friends, who have supported us and encouraged us throughout.
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CONTENTS
CHAPTER 1 Objective TITLE PAGE NO 1
Project methodology 2.1 Voice recognition system 2.1.1 Circuit diagram of VRS 2.2 Training procedure 2.2.1Testing Recognition 2.2.2 Simulated independent recognition 2.2.3 Speaker dependent/Speaker independent 2.3 HM2007 Pin Configuration 2.3.1 Pin description of HM2007 IC 2.4 Keypad 2.5 Oscilators 2.6 Microphones 2.6.1 Microphone fundamentals 2.7 Memory 2.8 D-Type Latch 2.8.1 Octal D-Type Latch 2.9 Seven Segment Display Driver
2 3 3 6 6 7 9 9 11 13 14 16 17 18 21 21 23
Decoder Logic 3.1 Basic gates in decoder logic 3.2 555 Timer 3.2.1 Astable mode
26 28 37 42
Buffer and Driver 4.1 Hex Buffer 4050 4.2 Driver (ULN2003)
46 46 47 50
Applications
51
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52
Result
53
54 54
Reference
Appendix
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LIST OF FIGURES
Sl.No
1 2 3 4 5 6 7 8 9 10 11 12 13
Figure Name
2.1(a) System Block Diagram 2.1(b) Circuit Diagram of VRS 2.3(a) PLCC 2.3(b) PDIP 2.4 Keypad 2.5 Physical Structure of Quartz Crystal 2.7(a) Memory (SRAM) 2.7(b) Timing diagram of memory READ 2.7(c) Timing Diagram of memory WRITE 2.8(a) Pin diagram of D-type Latch 2.8(b) Internal structure of D-type latch 2.9(a) Seven segment display 2.9(b) Pin diagram of 7 segment display driver
Page.No
3 5 9 10 13 16 19 20 20 22 23 24 24
14 15 16 17 18 19 20 21 22 23 24 25
3 Decoder Logic 3.1 3-8 Decoder 3.1(a) Pin diagram of XOR Gate 3.1(b) Pin diagram of NOT Gate 3.1(c) NOT Gate in RTL logic 3.1(d) AND Gate 3.1(e) 3 input NOR Gate 3.1(f) NOR IC 3.1(g) JK Flipflop using NAND Gate 3.1(h) D Flipflop 3.2(a) Internal structure of 555 Timer 3.2(b) Astable multivibrator
26 29 30 32 32 33 34 36 37 37 38 45
26 27 28 29
4.1 HEX buffer 4.2(a) ULN2003 driver 4.2(b) Buffer&Driver 4.3 Relay
46 48 49 50
LIST OF TABLES
Sl.No 1 2 3 4 5 6 Table name 2.3 Pin description of HM2007 IC 2.9 Truth table of BCD to 7 segment driver 3 Truth table of decoder logic 3.1(a) Truth table of 3to 8 decoder 3.1(b) Truth table XOR Gate 3.1(c) Truth table of 3 input NOR gate Page.no 11 25 28 30 31 34
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