You are on page 1of 2

Experiment 6 Arithmetic Circuits Design and Implementation Introduction:

Addition is just what you would expect in computers. Digits are added bit by bit from right to left, with carries passed to the next digit to the left, just as you would do by hand. Subtraction uses addition: the appropriate operand is simply negated before being added.

Objectives:
To understand the concept of Half and Full Adders. Design and build Ripple Carry Adder and Adder/Subtractor. Introduce two important MSI circuits: 4-bit adder and 4-bit magnitude comparator. Design and implement binary multiplier

Procedure:
Part 1: Design and Implement Adder
.Implement a half adder using an AND and an XOR gates on Multisim -1 .Design the Full Adder circuit shown in Figure 1, and then implement it on Multisim -2

Figure 1 Use the design of Full adder in step2 to implement 3-Bit Ripple Carry Adder as .shown in Figure 2 on Multisim

-3

Figure 2 Modify the circuit you built in step 4 to detect overflow and support subtraction .operation Design a 4-bit parallel adder/subtractor circuit on Multisim using the following two ICs 74LS83 (4-bit parallel adder) and 74LS86 (2-input XOR). The IC 74LS83 has two four bit number input (A4-A1), (B4-B1) and one control signal (C0) and four .output number (S4-S1) result and C4(Cout)as shown in Figure 3 When C0 = 0 the circuit works as Adder. When C0 = 1 the circuit works as Subtractor.

-4 -5

CPE 0907234 Digital logic lab Prepared by: Eng. Ala`a Arabiyat Page 1 of 2

Figure 3

Part 2: Comparator
Analyze the operation of the IC 74LS85 (4-bit Magnitude comparator), shown in -1 Figure 4, on the kit by connecting its inputs (A3-A0), (B3-B0) and the inputs (A>B, A<B, A=B) to switches and outputs (A>B, A<B, A=B) to the LEDs and then fill .Table 1

Figure 4
Inputs Input A A3 0 0 0 0 1 1 1 1 A2 0 1 1 1 0 0 1 1 A1 0 1 0 0 1 0 0 1 A0 1 1 1 1 1 1 0 1 B3 0 0 0 0 1 1 1 1 Input B B2 0 1 1 1 0 1 0 1 B1 1 0 0 0 1 0 1 1 B0 1 0 1 1 1 0 0 1 Cascade Input A>B 1 0 1 0 0 1 1 1 A<B 0 1 0 1 0 1 1 1 A=B 1 0 0 0 1 1 1 1 A>B A<B A=B Outputs

Table 1 Use Multisim to expand the 4-bit Magnitude Comparator to obtain 8 bit Magnitude .Comparator and test it -2

Part 3: Design and Implement Multiplier


Design and implement a 2-bit Multiplier that has four inputs (A1, A0, B1, and B0) and four outputs (S3, S2, S1, S0) as shown in Figure 5 using Half Adders on .Multisim -1

Figure 5 Design and implement a multi-bit Multiplier that will multiply (A1A0 B2B1B0) and produce the product (C4C3C2C1C0) using 4-bit parallel adder/subtractor on .Multisim
CPE 0907234 Digital logic lab Prepared by: Eng. Ala`a Arabiyat Page 2 of 2

-2