Sie sind auf Seite 1von 4

JAZELLE ® TECHNOLOGY

FOR EXECUTION ENVIRONMENTS


w w w . a r m . c o m

High performance & efficient solutions


through integrated hardware and software
design
There has been significant growth in the deployment of virtual execution

environments, such as the Java platform, in a range of consumer devices:

from mobile phones to portable games players, set top boxes and digital TV.

Application developers benefit from increased portability and reduced

development time and cost. The challenge is how to achieve great

performance from an execution environment without increasing system cost

and complexity, or reducing battery life.

ARM Jazelle ® technology for acceleration of execution environments


provides the ARM Connected Community with high quality, class leading

solutions for the ARM architecture that offer the optimum combination of

high performance, low power and low cost.

ARM Jazelle DBX (Direct Bytecode eXecution)


Jazelle DBX technology delivers an unparalleled combination of Java performance and the
world’s leading 32-bit embedded RISC architecture - giving platform developers the freedom to
run Java applications alongside established OS, middleware and application code on a single
processor.

ARM Jazelle RCT (Runtime Compilation


Target)
Jazelle RCT technology enables high performance support for ahead-of-time (AOT) and just-in-
time (JIT) compilation of Java and other execution environments such as Microsoft .NET
Compact Framework with up to 3x less memory usage, resulting in lower cost and increased
battery life.

ARM Jazelle Software


ARM offer a range of highly optimized virtual machine solutions, tightly coupled to the
hardware, in particular the Jazelle architecture extensions, delivering the optimum
performance, power and cost balance with the Java ME platform.

ARM Jazelle DBX and Jazelle RCT technologies, together with the supporting Jazelle software,
offer customers maximum flexibility and choice with a powerful roadmap for efficient and high
performance execution environments on a wide range of ARM platforms.

T H E A R C H I T E C T U R E F O R T H E D I G I T A L W O R L D ®
Jazelle DBX for Memory Efficiency Jazelle RCT
Unlike a Java co-processor, Jazelle DBX is tightly
Java ™ integrated with the core architecture, meaning
Features
• Highest performance bytecode execution
Jazelle DBX is able to make use of the processor
Features
cache and does not suffer from the bus bandwidth • Low memory and system costs
• High-efficiency Java bytecode execution
limitations seen between co-processors and core. • Support for JIT/DAC and AOT compilation
• Ultra-low Java system cost
Ease of Integration • Integrated into latest generation of ARM CPU
• Low power consumption for battery operated
cores
wireless embedded devices Jazelle DBX technology is extremely quick and
easy to integrate into a JVM and underlying OS — • Supported by leading execution environments
• Supported by leading OS and Java run-times
typically taking only a few days. Jazelle DBX is • Beneficial to Java and other similar languages
Performance Without also supported by many leading OS and Java e.g. Microsoft .NET, MSIL, Python, Flash
Penalty runtime vendors. Unlike a JIT or DAC compiler, a • Complementary to Jazelle DBX technology
Jazelle DBX enabled solution does not require
High Performance Ultimate performance
costly and time-consuming tuning for each new
Jazelle DBX technology typically increases the platform and application configuration. without increasing costs
performance of a commercial JVM by 4 times
Next generation ARM Cortex™ processors will bring
when running benchmarks or complex MIDP 2.0 Low Power Consumption
processor speeds in the order of a GHz and
applications. Battery life can be extended by using Jazelle DBX
beyond. At these frequencies, issues with
technology, due to the minimal complexity of the
Outstanding User Experience application start-time and responsiveness are
additional logic to implement. Power consumption
lessened and it is anticipated there will be
A good user experience is not determined simply is also reduced because Jazelle DBX technology
increasing use of compilation techniques, such as
by how fast a device can run an application: is implemented inside the system cache.
JIT, DAC and AOT.
factors such as start-time and responsiveness,
while difficult to measure, are usually far more Low Silicon Cost Jazelle RCT will enable JIT and AOT compilation
important. Jazelle DBX enables fast start-time, Jazelle DBX is implemented in less than 12k gates techniques to achieve near-native code
consistent and highly responsive applications, — much smaller than co-processors that typically performance with features targeted specifically at
resulting in great user experience. consume 60k to 100k gates. virtual execution environments. This high
performance can be achieved while reducing RAM
Real Time Performance Jazelle DBX technology- memory usage by up to 3x.
Devices such as home gateways and mobile enabled Cores
phones demand excellent real-time performance Award winning
ARM has currently integrated Jazelle DBX
from a processor to run the network protocol technology
software as well as the middleware. The Jazelle technology into
“The Cortex-A8 processor was touted as giving the
DBX architecture extensions enable the processor • the ARM1176JZ(F)-S processor ARM architecture a pleasant boost because of the
to maintain fast interrupt response and provide
• the ARM1136J(F)-S processor Jazelle® RCT technology that is a part of the
good real-time performance.
• the ARM1026EJ-S processor processor architecture. Specifically the Thumb®-
• the ARM926EJ-S processor 2EE instruction set, which is used in the Jazelle

• and the ARM7EJ-S processor. RCT technology, is cited as being a

www.arm.com

info@arm.com
“virtual-machine designer’s dream” because it
Jazelle Software Jazelle Software
enables run time compilers to deliver the highest
Evolution
performance and is applicable to instruction sets
Features
like Java, Microsoft.NET, MSIL/Compact The original ARM Jazelle JTEK was a simple piece
• Highly optimized support for Jazelle technology
Framework, and Perl and Python…” Electronic hardware of “driver code” for Jazelle DBX enabled
Design Magazine - ‘Best of Embedded 2005’. • High performance in low memory processors, giving an instant performance boost to
existing JVMs.
• Full multi-tasking capabilities (MVM)
Future-proof: beyond
• Simple integration JVM optimizations to areas such as garbage
Java
• Wide support in leading Java runtimes collection and method invocation doubled the
Jazelle RCT not only provides excellent support for performance of version 3 of Jazelle JTEK, while
compilation techniques deployed in Java runtimes. Amazing performance — high
efficiency minimizing memory usage — up to 8x less than a
The Common Intermediate Language (CIL) used by JIT or DAC software-only solution.
ARM have unparalleled experience in creating the
Microsoft .NET Compact Framework was given
most highly optimized JVM solutions for the ARM The need for a multi-tasking Java platform required
significant consideration during development, and
Jazelle technology platforms. Jazelle software ARM to re-architect the JVM to be a Multi-tasking
the instruction set is applicable to other similar
solutions provide extremely high performance and Virtual Machine (MVM). Working with industry
execution environments, such as Flash and
incredible user experience from the most resource partners, including Qualcomm, Sprint, Aplix and a
Python.
constrained devices up to high-end devices, such top 5 handset vendor, ARM has defined a common
as Smart Phone and Digital TV. The Jazelle Java
Availability API for multi-tasking between the JVM and the
Technology Enabling Kit (JTEK) has been licensed upper Java stack (MIDP and other JSRs) and has
Jazelle RCT is available in all ARM Cortex-A CPU
since 2002 to enable JVMs to take full advantage developed a highly optimized MVM implementation
cores. ARM is working with leading virtual
of Jazelle DBX technology enabled processors — achieving high performance, fast response and
machine and handset vendors to ensure wide
offering high performance in up to 8x less RAM switching, smooth consistent behaviour and a very
support for this latest architecture extension.
compared to a system running a JIT or DAC small memory footprint.
Please contact ARM directly for a list of the latest
compiler, where bytecode compilation may cause
licensees and adopters.
significant code bloat.

JTEK 2.x JTEK 3.x JTEK 4.x Jazelle® MobileVM


MIDlet MIDlet MIDlets MIDlets
JAM

JAM

JAM
JAM

MIDP JSR184 JSR135 JSR... MIDP JSR184 JSR135 JSR... MIDP JSR184 JSR135 JSR... MIDP JSR184 JSR135 JSR...

JVM JVM
MI GC JVM (MVM) JVM (MVM)
®
Jazelle ‘driver’ Jazelle ‘driver’

• Replaces bytecode • Optimize JVM parts: • New JVM architecture: • Debug and profiling
interpreter: • Method invocation, • Multi-tasking
• JRO bytecode optimizer
• ‘driver’ software Garbage collector etc • Configurable API

• Simple integration: • Higher performance:


• 1-2 day • >2x JTEK 2.x
• Performance boost: • Efficient memory use:
• 4-10x • 8x less than DAC/JIT
Version 1.0
Available 2H07

2002 2007
UK FRANCE JAPAN TAIWAN CHINA SINGAPORE
T: +44 1223 400400 T: +33 1 39 30 47 89 T: +81 45 477 5260 T: +886 2 2627 1681 T: +86 21 62351296 T: +65 6728 0950
F: +44 1223 400410 F: +33 1 39 30 47 88 F: +81 45 477 5261 F: +886 2 2627 1682 F: +86 21 62351207 F: +65 6728 7901

USA GERMANY KOREA ISRAEL INDIA


T: +1 408.734.5600 T: +49 89 928 615 0 T: +82 31 712 8234 T: +972 9 7632000 T: +91 80 5138 4000
F: +1 408.734.5050 F: +49 89 928 615 19 F: +82 31 713 8225 F: +972 9 7677020 F: +91 80 5112 7403

Jazelle MobileVM Jazelle Runtime Debug Availability


This MVM solution forms the basis of the ARM (JRD) Jazelle JTEK and Jazelle MobileVM software is
Jazelle MobileVM software. Jazelle MobileVM is a The Jazelle Runtime Debug (JRD) builds on the available to existing Sun licensees for CLDC and
complete JVM, engineered to provide high framework of the JRO, with the debug “agent” CDC technologies. Many leading Java platforms and
performance multi-tasking in a very small memory running as a background MIDlet in the MVM OS already include Jazelle DBX support — please
footprint. platform. talk to ARM for the latest list of licensees.

The re-architecting of the JVM has allowed ARM to As well as fully supporting the KDWP standard to
invest in and build a number of significant new support any generic debug IDE such as Eclipse, JRD
features to enhance the Java platform. The first of is capable of debugging foreground, as well as
these new features: JRO and JRD are described background, applications while others run in
below. parallel.

The architecture of JRD means it is extremely easy


Jazelle Runtime
to customize, giving licensees the ability to extend a
Optimizer (JRO)
handset’s debug capabilities to support their own
As with any architecture, it is possible to optimize developer community needs. For example, the ability
software specifically for the underlying Jazelle DBX to define multiple access privileges or produce code
technology hardware. coverage information.
Optimizing a JVM for Jazelle DBX technology is a Both JRO and JRD form part of the new Jazelle
relatively straightforward concept: execute as much MobileVM software from ARM. For more
Java bytecode in hardware as possible and ensure information, please contact ARM directly.
the bytecode sequence is optimal.

Java source code compilers produce generic Java


bytecode that is not optimized for the target platform.
Jazelle DBX technology hardware does not
differentiate between optimized and un-optimized
bytecode: it will simply execute the sequence of
bytecodes passed to it.

The Jazelle Runtime Optimizer (JRO) performs Java- TARGET device


to-Java bytecode translation at runtime – in-lining
frequent method calls, avoiding pipeline stalls and Comms JRD
BT, USB, WiFi Midlet
link
replacing software executed bytecodes with
MIDP J
sequences of hardware executed bytecodes. It runs A
as a low priority multi-tasking Java thread in parallel M
to other applications and delivers up to 40%
MVM
Java Debugger
additional speed up with no perceptible impact on
user experience. Debug I/f Jazelle® Runtime Framework
= Provided by ARM

ARM, ARM Powered, StrongARM, Thumb, Multi-ICE, ModelGen, PrimeCell, PrimeXsys, RealView, TrustZone, Jazelle, ARM7TDMI, ARM9TDMI, ARMulator AMBA, and The Architecture for the Digital World are registered trademarks of ARM Limited. Cortex, AXI, AHB, ARM7, ARM7TDMI-S,
ARM7EJ-S, ARM720T, ARM740T, ARM9, ARM9TDMI, ARM920T, ARM922T, ARM940T, ARM9E, ARM9E-S, ARM926EJ-S, ARM946E-S, ARM966E-S, ARM968E-S, ARM996HS, ARM10, ARM1020E, ARM1022E, ARM1026EJ-S, ARM11, ARM1136J-S, ARM1136JF-S, ARM1156T2-S, ARM1156T2F-S,
ARM1176JZ-S, ARM1176JZF-S, EmbeddedICE, EmbeddedICE-RT, AMBA, ARM Development Suite, ETM, ETM7, ETM9, ETM10, ETM10RV, ETM11, Embedded Trace Macrocell, Embedded Trace Buffer, ETB, ETB11, Embedded Trace Kit, Integrator, JTEK, MultiTrace, MPCore, MOVE, OptimoDE,
AudioDE, SecurCore, SC100, SC110, SC200, SC210 are trademarks of ARM Limited. Java is a trademark of Sun Microsystems, Inc. XScale is a trademark of Intel Corporation. All other brand names or product names are the property of their respective holders. "ARM" is used to represent ARM
holdings plc (LSE: ARM and NASDAQ: ARMHY); its operating company ARM Limited and the regional subsidiaries ARM, INC.; ARM KK; ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai) Co. Ltd.; ARM Belgium N.V.; and ARM Embedded Technologies Pvt. Ltd, ARM
Physical IP, Inc. and ARM Norway AS. Neither the whole nor any part of the information contained in, or the product described in, this document may be adapted or reproduced in any material form except with the prior written permission of the copyright holder. The product described in this
document is subject to continuous developments and improvements. All particulars of the product and its use contained in this document are given by ARM in good faith. All warranties implied or expressed, including but not limited to implied warranties of satisfactory quality or fitness for
purpose are excluded. This document is intended only to provide information to the reader about the product. To the extent permitted by local laws ARM shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information.

www.arm.com
Jazelle® DBX™ Technology | ARM DOI 0114-9/05.07

Das könnte Ihnen auch gefallen