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Foreword
Page2
References
Page3
Objectives
Page4
Contents
1. BSC6900 System Overview 2. BSC6900 Hardware Architecture 3. BSC6900 Signal Flows 4. BSC6900 Typical Configuration
Page5
Uu/Um
BSC6900 GU
Iub NodeB
Iu/A/Gb
Iu-CS/A
CS
Iur
BTS
Iub/Abis
MBTS
BSC6900 GU
Iu-PS/Gb
PS
Page6
Capacity
Specification ITEM System Capacity (Boards Supported by BSC6900 V900R012) GSM network Traffic (Erl) Number of cells Number of TRXs Maximum number of PDCHs to be configured Maximum number of activated PDCHs (MCS-9) Gb interface throughput (Mbit/s) 24,000 2,048 4096 30,720 16,384 1,536 Same Same Same Same Same Same System Capacity (Boards Supported by BSC6900 V900R013)
*A multi-core board DPUf is added in the TC subrack. In BM/TC combined and allTDM mode, the number of subracks is reduced from 1MPS+3EPS to 1MPS+2EPS.
Copyright 2010 Huawei Technologies Co., Ltd. All rights reserved. Page7
The BSC6900 can be configured as one of the three variants, therefore facilitating the smooth evolution between GSM, GSM&UMTS, and UMTS.
Page8
A maximum of 16,384 active PDCHs are supported. Maximum traffic: 24,000 Erl Comprehensive BHCA: 5,900,000 Gb throughput: 1,536 Mbit/s
Page9
Features
platform
Supporting dynamic data configuration and smooth expansion of the system capacity
Supporting star, chain, and tree networking with NodeBs and BTSs
Page11
RNC
BSC
RNC
RNC
BSC
BSC
Smooth evolution from BSC to RNC with software upgrade Reducing CAPEX by reusing hardware Dynamic capacity adjustment between 2G&3G
Page13
Unified WEB LMT for maintenance: Easy and visual maintenance of 2G/3G systems
Page14
Contents
1. BSC6900 System Overview 2. BSC6900 Hardware Structure 3. BSC6900 Signal Flows 4. BSC6900 Typical Configuration
Page17
Contents
2. BSC6900 Hardware Structure
2.1 Cabinets
2.2 Subracks 2.3 Subsystems and Boards
Page18
BSC6900 Cabinet
The BSC6900 uses the standard N68E-22 cabinet The N68E-22 cabinet is of two types, the single-door cabinet and the double-door cabinet
2200 mm 2200 mm
600 mm
800 mm
600 mm
800 mm
Page20
BSC6900.
EPS
EPS
MPS
MPR
1200 W
Copyright 2010 Huawei Technologies Co., Ltd. All rights reserved. Page21
EPR or no EPR.
EPS
EPS
EPR
Page22
TCS
TCS
1000 W
TCS
TCR
Page23
Contents
2. BSC6900 Hardware Structure
2.1 Cabinets
2.2 Subracks 2.3 Subsystems and Boards
Page25
Subrack
436 mm
12 U
500 mm
(1) Fan box (4) Front cable trough (7) DC power input port
(2) Mounting ear (5) Board (8) Monitoring signal input port for
Page26
The DIP switch on the subrack consists of eight bits from bit 1 to bit 8. Subrack No.
0 1 2 3 4 5
Bit 1
0
2
0
3
0
4
0
5
0
6
ON OFF OFF ON OFF ON
7
ON ON ON ON ON ON
8
OFF OFF OFF OFF OFF OFF
ON
1 OFF 0
ON
0 ON 1
ON
0 ON 0
ON
0 ON 0
ON
0 ON 0
ON
1 OFF 0
OFF
1 OFF 0
ON
0 ON 1
ON
0 ON 0
ON
0 ON 0
ON
1 OFF
ON
0 ON
OFF
1 OFF
ON
0 ON
ON
0 ON
Page27
The boards are installed on both the front and rear sides of the backplane, which is located in the middle of the subrack.
(1) Front
slot
(2) Backplane
(3) Rear
slot
Page28
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
O M U c
O M U c
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
G C U a
G C U a
10
11
12
13
Page29
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
D P U g
10
11
12
13
Page30
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
O M U c
O M U c
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
D P U f
D P U f
G C U a
G C U a
10
11
12
13
Page31
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
D P U f
D P U f
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
D P U g
D P U f
D P U f
D P U f
10
11
12
13
Page32
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
O M U c
O M U c
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
D P U f
D P U f
G C U a
G C U a
10
11
12
13
Page33
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
Backplane
Front panel
X P U
X P U
X P U
X P U
T N U a
T N U a
S C U a
S C U a
D P U g
D P U g
D P U g
D P U f
D P U f
D P U f
10
11
12
13
Page34
Rear panel
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
I N T
Backplane
D D D D P P P P U U U U f f f f (opt (opt (opt (opt ) ) ) ) 0 1 2 3 D P U f (opt ) 8 9 10 11 12 13
Front panel
T N U a
T N U a
S C U a
S C U a
Page35
Contents
2. BSC6900 Hardware Structure
2.1 Cabinets
2.2 Subracks 2.3 Subsystems and Boards
2.4 Cables
Page36
OM subsystem LMT/M2000
Page37
Switching Subsystem
Intra-subrack Media Access Control (MAC) switching Intra-subrack Time Division Multiplexing (TDM) switching Inter-subrack MAC and TDM switching
Provides OM channels
Page38
Page39
Switching Subsystem
Another board
Another board
Another board
Another board
Another board
TCS
Another board
Page40
Switching Subsystem
SCU
SCU
MPS
SCU
SCU
EPS
SCU
SCU
Page41
SCUa Board
Functions
Provides the maintenance management function Monitors the power supply, fans, and environment of the cabinet
Supports the port trunking function Provides configuration and maintenance of a subrack or the whole BSC
Provides a total switching capacity of 60 Gbit/s Distributes clock signals and RFN signals for the BSC6900
Working mode
SCUb Board
Functions
Provides the maintenance management function Monitors the power supply, fans, and environment of the cabinet
Supports the port trunking function Provides configuration and maintenance of a subrack or the whole BSC
Provides a total switching capacity of 240 Gbit/s Distributes clock signals and RFN signals for the BSC6900
Working mode
Inter-Subrack Connections
EPS
Inter-Subrack SCUa
SCUa (Active)
MPS
SCUa (Standby)
Page44
Inter-subrack cable connections between SCUb boards by using SFP+ high-speed cables (MPR/EPR in full configuration, remote TC configuration)
Page45
Inter-subrack cable
connections between SCUb boards by using
Page46
Switching Subsystem
. . .
Another board
Another board
. . .
Another board
EPS
MPS
. . .
Another board
EPS
Page47
TNUa Board
Functions
Page48
TNUa Board
Inter-TNUa crossover
cables
between subracks
Page49
functions:
User data and signaling processing Radio channel ciphering and deciphering Radio resource management and control System information and user message tracing
Page50
processing unit
SPU 0
DSP 0
SPU 0
DSP 0
SPU 7
DSP 21
SPU 7
DSP 21
Switching Subsystem
XPUa Board
Subsystems 1 to 3 of the main control XPUa board belong to the CPU for Service (CPUS), which is used to process the services on the control plane.
XPUb Board
Subsystem 0 of the main control XPUb board is the Main Processing Unit (MPU). It is used to manage the user plane resources, control plane resources, and transmission resources
SSN0 MPU
SSN0 SPU
of the system.
SSN7 SPU
SSN7 SPU
DPUc Board
Components
22 DSP chips
Functions
Converts the speech format and forwards data Performs codec of voice services of 960 TCH/Fs and supports 3,740 IWF flow numbers Provides the Tandem Free Operation (TFO) function Provides the voice enhancement function Detects voice faults automatically
Page57
DPUd Board
Components
22 DSP chips
Functions
Processes the PS services on up to 1,024 simultaneously active PDCHs where signals are coded in MCS9 Processes packet links Detects packet faults automatically Supports GSM only
Page58
DPUg Board
The DPUg board has almost the same functions as the DPUd board, whereas its capacity is higher than the DPUd board.
DPUd: Process 48 simultaneously active PDCHs (MCS9) per cell DPUg: Process 110 simultaneously active PDCHs (MCS9) per cell
The DPUg board can process the PS services on up to 1,024 simultaneously active PDCHs where signals are coded in MCS9.
Page59
DPUf Board
Components
48 DSP chips
Functions
Clock Subsystem
CN BITS MPS To MBTS
I N T I N T
Clock module
GPS
GCUa
8 kHz 8 kHz
S C U a
EPS To BTS
I N T
S C U a
S C U a
EPS
I N T
To NodeB
Clock cable
Page61
GCUa/GCGa Board
Functions
Extracts timing signals from the external synchronization timing port and from the synchronization line signals, processes the timing signals,
Provides the timing signals and the reference clock for the entire system
clock
GCUa/GCGa Board
Clock cable between the GCUa/GCGa board and the SCUa board
Page63
Board categorization
E1 Electrical port FE/GE IP STM-1 Optical port Interface board GE Channelized STM-1 Unchannelized STM-1 FG2a POUa UOIa_IP GOUa GOUc FG2c POUc PEUa
E1 Channelized STM-1
Page64
Electrical port
TDM Optical port
EIUa
OIUa
GSM Only
GSM Only
POUc INT
IP Optical port Electrical port FE/GE E1 STM-1 GE FG2a/FG2c PEUa POUc GOUa/GOUc
GSM&UMTS
GSM&UMTS GSM&UMTS GSM&UMTS GSM&UMTS
Page65
EIUa Board
Functions
Transmits and receives 32 E1/T1 signals, and encodes and decodes the E1/T1 signals
Provides the board-level Tributary Protect Switch (TPS) function Provides the OM links when the TCS is configured on the MSC side Supports the A, Abis, Ater, and Pb interfaces
Supports 384 TRXs when serving as the Abis interface board and
supports 960 CICs when serving as the A interface board
Page66
OIUa Board
Functions
Provides one STM-1 port for TDM transmission and supports the rate of 155.52
Mbit/s
Provides the board-level Automatic Protection Switching (APS) function Processes signals according to the Link Access Procedure on the D channel (LAPD) protocol and SS7 Message Transfer Part Layer 2 (MTP2) protocol
Provides the OM links when the TCS is configured on the MSC side Supports the A, Abis, Ater, and Pb interfaces Supports 384 TRXs when serving as the Abis interface board and supports 1920 CICs when serving as the A interface board
Page67
FG2a Board
Functions
Page68
FG2c Board
Functions
10M/100M/1000M
Page69
PEUa Board
Functions
Provides 32 channels of HDLC over E1/T1 or 32 channels of IP over PPP/MLPPP over E1/T1 Provides 128 PPP links or 32 MLPPP groups, with each MLPPP group containing eight MLPPP links Provides the board-level Tributary Protect Switch (TPS) function Transmits, receives, encodes, and decodes the 32 E1s/T1s. The E1 transmission rate is 2.048 Mbit/s; the T1 transmission rate is 1.544 Mbit/s
Page70
POUc Board
Functions
Provides four channels over the channelized STM-1/OC-3c optical ports based on TDM or IP
Page71
GOUa Board
Functions
Provides two channels over GE ports, which are used for IP transmission
Page73
GOUc Board
Functions
Provides four channels over GE ports, which are used for IP transmission Provides the routing-based backup and load sharing Supports the extraction of line clock signals Supports the A, Abis, Gb, Iu, Iur, and Iub interfaces Supports 2048 TRXs when serving as the Abis interface board, supports
23040 CICs when serving as the A interface board, and supports a maximum
data flow of 1024 Mbit/s when serving as the Gb interface board
Page74
OM Subsystem
S C U a
Intran et
Extranet
S C U a
S C U a
EPS
O M U
HUB
O M U
S C U a
MPS
To M2000
Alarm box
LMT
Page75
Dual OM Plane
standby mode.
The active/standby OMU boards use the same external virtual IP address to communicate with the LMT or M2000. The active/standby OMU boards use the same internal virtual IP address to communicate with the
SCU boards.
Copyright 2010 Huawei Technologies Co., Ltd. All rights reserved. Page76
OMUa/OMUb Board
The OMUa/OMUb board works as a back administration module (BAM). It performs the following functions:
Page77
OMUc Board
Manages the configuration, performance, and loading, facilitates troubleshooting, and ensures security
Difference:
Hardware Reliability
Board
SCUa/SCUb XPUa/XPUbSPUa/SPUb
Redundancy Mode
Board redundancy + port trunking on GE ports Board redundancy
DPUb/DPUc/DPUd/DPUf/DPUg
GCUa/GCGa AOUa/AOUc/OIUa/ UOIa/UOIc/POUa/POUc
TNUa
PEUa/AEUa/EIUa GOUa/GOUc FG2a/FG2c OMUa/OMUc
Board redundancy
Board redundancy Board redundancy + GE port redundancy or load sharing Board redundancy + GE/FE port redundancy or load sharing Board redundancy
Page79
OM boards: OMUa/OMUb/OMUc Switching and control boards: SCUa/SCUb/TNUa Clock signal processing board: GCUa/GCGa
Page81
Page82
Contents
1. BSC6900 System Overview 2. BSC6900 Hardware Structure 3. BSC6900 Signal Flows 4. BSC6900 Typical Configuration
Page95
Signaling Flow on the A Interface Signaling Flow on the Abis Interface Signaling Flow on the Gb Interface
Page96
Page97
Page98
Abis over IP
Page99
A over TDM
Page100
A over IP
Page101
Abis over IP
Page102
Gb over IP/FR
Page103
Contents
1. BSC6900 System Overview 2. BSC6900 Hardware Structure 3. BSC6900 Signal Flows 4. BSC6900 Typical Configuration
Page104
The number of A-interface circuits should be considered in the configuration of DPUc/f boards.
The number of PDCHs should be considered in the configuration of DPUd/g boards. The number of TRXs should be considered in the configuration of XPUa/XPUb boards.
Interface boards
In Abis over IP mode, the FG2a, FG2c, PEUa, POUc, GOUa, and GOUc boards can be configured. In Abis over TDM mode, the EIUa and OIUa boards can be configured. In A over IP mode, the FG2a, FG2a, GOUa, and GOUc boards can be configured. In A over TDM mode, the EIUa, OIUa, and POUc boards can be configured.
Page105
V900R012/R013
BSC6000 V900R008 Board Main control XPUa 270 270 270 BSC6900 V900R012 Main control XPUb 1024 640 640 640 Non-main control XPUb 640 640 640 BSC6900 V900R013 DPUd
DPUc
DPUd
DPUc
DPUf
DPUg
Number of TRXs Number of cells Number of BTSs Number of active PDCHs (MCS-9) Number of TCHs/Fs
960
960
1024 -
1920
1024 -
Page106
Item
EIUa
FG2a
OIUa
PEUa
GOUa
FG2c
GOUc
POUc_TDM
POUc_IP
384
384
384
384
384
2048
2048
512
2048
960 -
6144 128
1920 -
64
6144 -
23,040 1024
23,040 1024
3906 504
23,040 -
Page107
R13 R12/R13
EPS 1536 TRXs 1536 TRXs EPS 1024 TRXs
R12/R13
EPS
1024 TRXs
EPS
1024 TRXs
EPS
EPS
1536 TRXs
1536 TRXs
EPS
2048 TRXs
EPS
512 TRXs
MPS
MPS
1024 TRXs
1024 TRXs
MPS
1024 TRXs
MPS
BM/TC Combined
BM/TC Separated
A over IP
Page108
TC
14 POUc(Abis)
15 POUc(Abis)
16 POUc(Abis)
17 POUc(Abis)
18 POUc(Abis)
19 POUc(Abis)
20
21
22
23
24
25
26
27
14 15 16 17 18 19 20 21 22 23 24 25 26 27
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
POUc(A)
POUc(A)
DPUf(TC)
DPUf(TC)
DPUf(TC)
DPUf(TC)
DPUg
DPUg
TNUa
TNUa
SCUb
SCUb
XPUb 0
XPUb 1 15 POUc(Abis)
XPUb 2 16 POUc(Abis)
XPUb 3 17 POUc(Abis)
TNUa 4 18 POUc(Abis)
TNUa 5 19 POUc(Abis)
SCUb 6 20
SCUb 7 21
XPUb 8 22
XPUb 9 23 10 24 11 25
12 26
13 27
10 11 12 13
14 POUc(Abis)
14 15 16 17 18 19 20 21 22 23 24 25 26 27
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
OIUa(Ater)
POUc(A)
POUc(A)
POUc(A)
POUc(A)
DPUf(TC)
DPUg
DPUg
TNUa
TNUa
SCUb
SCUb
XPUb
XPUb
XPUb
XPUb
TNUa
TNUa
SCUb
SCUb
TDM resource, the POUc and OIUa boards that serve as the Ater interface boards have the same specifications.
0 14 POUc(Abis) XPUb 0
1 15 POUc(Abis) XPUb 1
2 16 POUc(Abis) XPUb 2
3 17 POUc(Abis) XPUb 3
4 18
5 19
6 20
7 21
8 22
9 23
10 24
11 25
12 26
13 27
10 11 12 13
14 15 16 17 18 19 20 21 22 23 24 25 26 27
OIUa(Ater)
OIUa(Ater)
OIUa(Ater) TNUa 4
POUc(A)
POUc(A)
OMUC
OMUc
10
DPUg
11
DPUg
DPUf(TC)
DPUf(TC)
DPUf(TC)
DPUf(TC)
12
Page109
GCUa
13
GCUa 0 1 2 3
TNUa 4
TNUa 5
SCUb 6
SCUb 7
10 11 12 13
14 15 16 17 18 19 20 21 22 23 24 25 26 27
10 11 12 13
14 15 16 17 18 19 20 21 22 23 24 25 26 27
10 11 12 13
14 15 16 17 18 19 20 21 22 23 24 25 26 27
DPUg DPUg DPUf(TC) DPUf(TC) POUc(A) 9 9 POUc(A) 8 8 DPUf(TC) POUc(GB) XPUb DPUf(TC) 8 7 9 DPUf(TC) XPUb DPUf(TC) DPUf(TC) DPUg DPUf(TC) DPUf(TC) DPUg DPUf(TC) DPUg DPUf(TC) OMUc GCUa
DPUg
DPUf(TC)
OMUc
GCUa
4096TRX
POUc(A) 6 6 POUc(Abis) 5 5 POUc(Abis) 4 4 POUc(Abis) 3 3 POUc(Abis) 2 2 POUc(Abis) 1 1 POUc(Abis) 0 0 XPUb POUc(Abis) XPUb POUc(Abis) XPUb XPUb POUc(Abis) XPUb POUc(Abis) XPUb XPUb POUc(Abis) XPUb POUc(Abis) XPUb 2 3 XPUb POUc(Abis) XPUb POUc(Abis) XPUb 4 TNUa POUc(Abis) TNUa POUc(A) TNUa 5 TNUa POUc(Abis) TNUa POUc(A) TNUa 6
SCUb
POUc(A)
SCUb
SCUb
transmission)
Page110
POUc(A) 7 7
SCUb
POUc(A)
SCUb
SCUb
10 11 12 13
Abis/A/Gb interface: IP
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 FG2c(Abis) FG2c(Abis) GOUc(A) GOUc(A) XPUb XPUb SCUb SCUb GOUc(A) GOUc(A) SCUb SCUb
0 1 2 3 4 5 6 7 8 9 10 11 12 13
Page111
Summary
Page112
Terms
Page113
Thank you
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