P-N Junctions/Diodes

p
n
p
n
I
V
log I log I
slope = 60 mV/decade
I
V
slope = 60 mV/decade
V V
Static Properties p
(a)
c
E
E
E
i
E
f
c
E
E
E
i
E
f
q
E
v
n-type p-type
E
v
c
E
E
(b)
q
bi
E
v
E
i
E
f
c
E
E
v
E
i
E
f
0 =
|
|
.
|

\
|
+ =
dx
dn
q
kT
n q J
n n
E
No net current
dx
d
=
i

E
E E kT kT ( )/ ( )/
dE
dx
f
= 0
No net current
flow at thermal
equilibrium:
n n e n e
i
E E kT
i
q kT
f i i f
= =
( )/ ( )/
Built-in Potential
Fermi level E
f
is spatially constant (flat), causing a
f
built-in potential difference across the diode.
Built-in potential: p
|
|
.
|

\
|
=
|
|
.
|

\
|
=
|
|
.
|

\
|
=
0
0
2
ln ln ln
n
p
d a
bi
n
n
kT
p
p
kT
N N
kT q
p
p
= (majority) hole density on p-side ~ N
a
|
.

\
|
.

\
|
.

\
0 0 p n
i
n p
n
p
n
= (minority) hole density on n-side
n
n
= (majority) electron density on n-side ~ N
d
n
p
= (minority) electron density on p-side
p
( y) y p
Abrupt Junctions: Depletion Approx.
Quasi-neutral
p-region
Quasi-neutral
n-region
Depletion
region
2
0
x
x
n
-x
p
(x)
qN
d
=
d
dx
qN
i d
si
2
2

c
=
d qN
i a
2

for 0 s x s x
n
for -x s x s 0 0 n p
E(x)
a
-qN
E
m
i d n
a p
d
d
qN x
qN x

= =

=
dx
si
2
c
for x
p
s x s 0
x
E (x)
-E
m
-x
p
x
n
0
m
x
si si
dx
=
c c
0
2 2
) (
d m
p n m
m
W
x x
E
E
=
+
=
m

m
p
(x) - (-x )
i i
W
N N
qN N
d
si a d m
a d
=
+ 2c ( )
2 2
x

m
x
n
-x
p
0
m bi app
V =
One-Sided n
+
-p Diode p
Quasi-neutral
n-region
Quasi-neutral
p-region
Depletion
region
(x)
qN
d
-x
n
x
p
0
x
n
a
-qN
- Charge neutrality: N
d
x
n
= N
a
x
p
, if N
d
>> N
a
x
p
>> x
n
,
i e depletion layer and voltage drop primarily appear i.e., depletion layer and voltage drop primarily appear
on the lightly doped side.
One-Sided n
+
-p Diode p
- Built-in potential:
1.05
|
|
.
|

\
|
+ ~
i
a
g
bi
n
N
kT
E
q ln
2

0.95
1.00
1.05
(
V
)
0.85
0.90
i
n

p
o
t
e
n
t
i
a
l

0.75
0.80
B
u
i
l
t
-
i
1E+14 1E+15 1E+16 1E+17 1E+18
0.70
Doping concentration (cm
3
)
Built-in potential a weak function of doping conc.
One-Sided n
+
-p Diode p
- Depletion-layer width:
p p n
a
app bi si
d
x x x
qN
V
W ~ + =

=
) ( 2 c
- Depletion-layer capacitance: C
d
dQ
d
/dV
app
= c
si
/W
d
10 10
/

m
2
)
)
1 1
c
i
t
a
n
c
e

(
f
F
/
w
i
d
t
h

(

m
)
C
d
0.1 0.1
-
l
a
y
e
r

c
a
p
a
c
e
t
i
o
n
-
l
a
y
e
r

W
d
1E+14 1E+15 1E+16 1E+17 1E+18
0.01 0.01
D
e
p
l
e
t
i
o
n
-
D
e
p
l
e W
d
Doping concentration (cm )
-3
Quasi-Fermi Potentials |
n
and |
p
|
n i
i
kT
q
n
n

|
\

|
.
|
ln
i
q n \ .
|
p i
i
kT
q
p
n
+
|
\

|
.
|
ln
Nonequilibrium near the
junction pn=n
i
2
| |
pn n q kT
i p n
=
2
exp ( ) / | |
junction, pn=n
i
.
J qn
d
dx
kT
qn
dn
dx
qn
d
dx
n n
i
n
n
=
|
\

|
.
|
=

|
d kT dp
d | |

|
J qp
d
dx
kT
qp
dp
dx
qp
d
dx
p p
i
p
p
= +
|
\

|
.
|
=

|
Spatial Variations of |
n
and |
p
V
app
= |
p
|
n
at junction
boundaries.
Inside the space-charge
region: J
n
is constant
(neglect G-R currents)
[n
n

n
d|
n
/dx]
xn
=
[n
p

n
d|
n
/dx]
xp
[d|
n
/dx at x
n
] <<
[d|
n
/dx at x
p
]
|
n
~ constant inside space-charge region
Practically all spatial variation in |
n
occurs in p-region,
Likewise, all spatial variation in |
p
occurs in n-region.
Currents in a p-n Junction
(x)
Quasi-neutral
n-region
Quasi-neutral
p-region
Depletion
region
Generation-recombination
currents in space-charge
region are usually negligible
x
x
p
qN
d
region are usually negligible.
Electron current leaving
n-side = electron current
t i id
0
x
-x
n
p
a
-qN
entering p-side.
Hole current leaving p-
side = hole current entering
n side
Ec
Ev
n+
p
n-side.
Need to consider
minority carriers and
Ev
e
h
minority carriers and
currents only.
Total current in diode =
0 W 0
electron current + hole
current.
Excess Electrons in the p-Region
0
1
= + =
n n
n
G R
x
J
q t
n
c
c
c
c
dx
dn
kT
dx
dn
qn
kT
dx
d
qn J
n n n

=
|
|
.
|

\
|
=
n
n n
n n
G R
t
0

=
q
. \ n
L D
kT
q
n n n
n n
= t
t
d n
dx
n n
L
p p p
n
2
2
0
2
0

= ,
where is the
minority carrier diffusion
length.
Boundary conditions:
Space-charge region
Boundary conditions:
at x=0,
and
( )
n n qV kT
p p app
=
0
exp /
Emitter Base
at x=W (ohmic contact).
n n
p p
=
0
x
0
n+ p
W
Excess Electrons in the p-Region
d n
dx
n n
L
p p p
n
2
2
0
2
0

= ,
Boundary conditions:
t 0
( )
n n qV kT
p p app
=
0
exp /
at x=0,
and
at x=W (ohmic contact).
n n
p p
=
0
| |
| |
n n n qV kT
W x L
W L
p p p app
n
n
=

0 0
1 exp( / )
sinh ( ) /
sinh( / )
.
0.8
1
r
o
n

d
e
n
s
i
t
y
a (o c co ac )
W/L = 0.2
0.4
0.6
e
x
c
e
s
s

e
l
e
c
t
r
0.5 1.0
2.0
exp(-x/L)
0
0.2
N
o
m
a
l
i
z
e
d

e
0 0.5 1 1.5 2 2.5 3
0
x/L
N
Wide-Base and Narrow-Base Diodes
J x qD
dn
dx
n n
p
x
( ) = =
|
\

|
.
|
=
0
0
| |
=
qD n qV kT
L W L
n p app
n n
0
1 exp( / )
tanh( / )
| |
=
qD n qV kT
p L W L
n i app
p n n
2
0
1 exp( / )
tanh( / )
Wide-base: W>>L
n
Forward-bias: J
n
(x = 0)= [qD
n
n
i
2
/N
a
L
n
]exp(qV
app
/kT)
C t i ti ll ith V t 60 V Current increases exponentially with V
app
, at 60 mV per
decade at RT.
Reverse-bias: J
n
(x = 0)= +[qD
n
n
i
2
/N
a
L
n
]
Electrons on p side but within a diffusion length of the Electrons on p-side but within a diffusion length of the
depletion-region boundary diffuse towards n-side.
N b W<<L Narrow-base: W<<L
n
Forward-bias: J
n
(x = 0)= [qD
n
n
i
2
/N
a
W]exp(qV
app
/kT)
Reverse-bias: J
n
(x = 0)= +[qD
n
n
i
2
/N
a
W]
Currents increase rapidly as Wdecreases! Currents increase rapidly as W decreases!
See Appendix 5
Turning Off a p-n Diode
Excess electrons in p-region
t < 0
n
+
p
V
F R
i(t)
Q q n n dx
W
=
}
( )
Effective turn off starts only after
most excess minority carriers have
V
R
n
+
p
R i(t)
t > 0
Q q n n dx
B p p
=
}
( )
0
0
recombined or have drained off.
t
t
s
i(t)
I
F
x
0
1E-4
s
)
Electrons Holes
t
-I
R
0
( )
1E-7
1E-6
1E-5
a
r
r
i
e
r

l
i
f
e
t
i
m
e

(
s
t = 0
t > 0
t = t
s
(n - n )
p0 p
1E-10
1E-9
1E-8
M
i
n
o
r
i
t
y
-
c
a
s
x
0
1E+17 1E+18 1E+19 1E+20
0
Doping concentration (cm )
-3
Diffusion Capacitance
Diffusion capacitance C
D
is due to stored minority carriers
responding to applied voltage responding to applied voltage.
C
D
due to electrons stored in p-type region:
C dQ /dV ( V /kT) C
Dn
= dQ
B
/dV
app
exp(qV
app
/kT)
For a diode or bipolar transistor to switch fast, it must have
minimal diffusion capacitance minimal diffusion capacitance.
To minimize diffusion capacitance: increase doping
concentration and minimize charge-storage volume. concentration and minimize charge storage volume.
Modern high-speed bipolar transistors require very thin
base.
MOS Device
Silicon
dioxide
Gate electrode
(metal or polysilicon)
t
ox
Vacuum Vacuum
Silicon substrate
Vacuum
level
Vacuum
level
E
c
= 4.10 eV
0.95 eV
= 4.05 eV
q_
q
m
|
q|
E
c
E
v
8-9 eV
q
s
|
Metal
( l i )
1.12 eV
E
g
=
q
B

E
i
E
f
E
f

E
v
v
(aluminum)
Silicon
(p-type)
f



g
E
v
Silicon
dioxide
| _
s
g
B
q
= + +
2
Flatband Condition
ox
ox
ms
ox
ox
s m fb
C
Q
C
Q
V = = | | | ) (
C
t
ox
ox
ox
=
c
E
c
0.95
eV
Free
electron
level
=
4 05 eV
q_
q
m
|
0.95
eV
Free
electron
level
=
4 05 eV
q_
4.05 eV
E
f
q
s
|
m
E
f

E
c
4.05 eV
E
f
q
s
|
q
m
|
E
f
q(| | )
m s
E
v
Silicon
(p-type)
f


Metal

E
v
Silicon
(p-type)
f


Metal
f


(a)
SiO
2
v
SiO
2
(b)
Fig. 2.29. Band diagrams of an MOS system under (a) the flatband condition, and (b) zero
gate-voltage condition.
Rules of Band Diagram Rules of Band Diagram
1 I i i l E d i 1. In a given material, E
g
and q_ are given.
They do not change spatially.
2. The free electron level is continuous at the
interface between two different materials.
3. The displacement (D = cE ) is continuous at
the interface between two different materials.
Example: Heterojunction Example: Heterojunction
q_
1
q_
2
q_
1
q_
E
g2
q_
2
E
g1
g2
E
g1
E
g2
band discontinuity
band discontinuity
Band alignment Zero bias voltage Band alignment Zero bias voltage
Bandgap Heaven in Color
450
G Sb
AlSb
1550
1350
200
500
250
InGaP AlAs
InAs
GaSb
770
GaAs
1420
InGaAs
760
InAlAs
1460
InP
1350
200
450
InGaP
1900
InSb
220
AlAs
2170
360
200
170
150
550
170
200
assuming alloy compositions when grown on GaAs assumes (I guess) not clear if this is unstrained or g y p
lattice-matched
to InP
g ( g )
growth on a strain-relaxed layer
of GaSb, so the InAs and AlSb are
both somewhat strained
includes effect of strain resulting
from growth on relaxed GaSb
MOS: Gate Voltage Equation
s
ox
s
s ox fb g
C
Q
V V V +

= + =
Fi 2 30 E b d d t ti l
V V
fb g
V
ox

s
Fig. 2.30. Energy band and potential
diagrams of an MOS capacitor showing
how the bands change under different
gate bias conditions. The solid lines
represent the flatband condition. The
E
f

dashed lines represent the condition
when a positive gate voltage is applied.
Note that in the diagram the electron
energy increases upward while the
potential or voltage increases
Silicon Metal SiO
V V
fb g
E
f
f
E
f

s
V
g
V
fb
p g
downward.
Silicon
(p-type)
Metal SiO
2
s si ox ox
E E c c =
Accumulation, Depletion, Inversion
(a) (e)
E
c
E E
V = 0
g
E
c
E
f
E
f
V = 0
g
p-type n-type
flatband
_ _ _ _ _ _ _ _
Assume |
m
=|
s
:
E
v
E
f

E
f

V 0
g
E
v
f

+ + + + + + + +
(b) (f) E
c
E
v
E
f

E
f

E
c
E
v
E
f

E
f

accumulation
V < 0
g

V > 0
g

+ + + + + +
_ _ _ _ _
+ +
_ _ _
_
_ _
_
_
_
_
_
_
+
+
+
+
+
+
+
+
(c) (g)
depletion
E
c
E
v
E
f
E
V > 0
g

E
c
E
v
E
f

E
f

V < 0
g

+ + + + +
_ _
_ _ _ _ _
+ +
inversion
E
v E
f

E
f

V < 0
g

+
_
(d) (h) E
c
E
v
E
f

E
f

V > 0
g

E
c
E
v
E
f

+ + + +
_ _ _ _
+ +
_ _
_
_
_
_
_
__ _
_
_
_
_
+
+
+
+
+
+
+
+
+
+
+
Poissons Equation
Silicon
surface
| | ) ( ) ( ) ( ) (
2
2
x N x N x n x p
q
dx
d
dx
d
a d
i
+
+ = =
c
E
E
c
E
E
g
q x ( )
dx dx
si
c
q
s

(> 0)
E
i
E
v
q
B

q( )
E
f


p x n e n e N e
i
q kT
i
q kT
a
q kT f i
B
( )
( )/
( )/ /
= = =

Oxide p-type silicon
x
p
i i a
( )
n x n e n e
n
N
e
i
q kT
i
q kT i
a
q kT i f
B
( )
( )/
( )/ /
= = =

2
x
( ) ( )
(

=

1 1
/
2
/
2
2
kT q
a
i kT q
a
si
e
N
n
e N
q
dx
d

c

Solving Poissons Equation
(

|
.
|

\
|
+
|
.
|

\
|
+ =
|
.
|

\
|
=

1 1
2
) (
/
2
2
/
2
kT
q
e
N
n
kT
q
e
kTN
dx
d
x
kT q
a
i kT q
si
a 2

c

E
2 / 1
2
(
| | | |
/
/
2
2
/
1 1 2
(

|
.
|

\
|
+ |
.
|

\
|
+ = =

kT
q
e
N
n
kT
q
e kTN Q
s
kT q
a
i s
kT q
a si s si s
s s

c c

E
Depletion Approximation
(1 D Uniform Doping) (1-D Uniform Doping)
qN

Q
d
= qN W
d
W
d
x
qN
a
Q
d
qN
a
W
d
E = qN
a
(W
d
- x)/c
si
E E
= qN
a
(W
d
- x)
2
/2c
si
N W
2
/2
x
W
d

s
= qN
a
W
d
2
/2c
si
W
si s
=
2c
x
W
d
W
qN
d
a
=
=
|

|
|
x
1
2

=
\

.
|
s
d
W
1
Condition for Strong Inversion g
Silicon
surface

a
inv
kT N
( ) ln
|

|
|
2 2
E
c
E

s B
i
inv
q n
( ) ln = =
\

.
|
2 2
q
s

(> 0)
E
i
E
v
E
g
q
B

q x ( )
E
f

i.e., (n
i
2
/N
a
2
)exp(q
s
/kT) = 1.
v
Oxide p-type silicon

And the electron
concentration at the
surface equals the hole
x
concentration in the bulk
Si.
Max. Depletion Width in MOS
(1 D Uniform Doping) (1-D Uniform Doping)
In contrast to p-n junctions, W
d
10
In contrast to p n junctions, W
d
reaches a maximum value W
dm
at the onset of strong inversion
when
1
i
o
n

W
i
d
t
h

(

m
)
k 4 l ( / )

s
= 2
B
= 2(kT/q)ln(N
a
/n
i
):
0.1
M
a
x
i
m
u
m

D
e
p
l
e
t
i
W
kT N n
q N
dm
si a i
a
=
4
2
c ln( / )
1.0E+14 1.0E+15 1.0E+16 1.0E+17 1.0E+18 1.0E+19
0.01
Substrate Doping Concentration (cm )
M
-3
This defines the threshold condition of a MOSFET.
W
dm
also plays a key role in the short-channel
scaling of a MOSFET namel L W scaling of a MOSFET, namely, L
min
W
dm
.
Strong Inversion

d
dx
kTN q
kT
n
N
e
a
si
i
a
q kT

c


= +
|
\

|
.
|
2
2
2
/
1E+19
1.2E+19
N
a
=

10
16 3
cm
x
)


(
c
m



)
-
3Charge per area:
Q
kTn
N
e
i
si i q kT
s
=
2
2
2
c
/
6E+18
8E+18

s
=088 . V
t
r
a
t
i
o
n
,


n
(
x
Electron conc. at
surface:
N
a
2E+18
4E+18

s
=085 . V
t
r
o
n

c
o
n
c
e
n
t
surface:
n
n
N
e
i
a
q kT
s
( )
/
0
2
=

0 50 100 150 200
0
Distance from surface, x ( )
E
l
e
c
t
Inversion layer
thickness:
Q
i
/qn(0) = 2c
si
kT/qQ
i
Q
i
q ( )
si
qQ
i
Quantum Effect in MOS Inversion
In an MOS inversion layer, carriers are confined in the direction
perpendicular to the surface and therefore need be treated
quantum mechanically (2 D)
Silicon
surface
E
quantum mechanically (2-D).
Discrete energy levels:
q
s

E
c
E
j
Slope = E
s
E
'
E
hq
m
j
j
s
x
= +
|
\

|
.
|

(
(
3
4 2
3
4
2 3
E
/
E
v
E
c
'
E
f

Average distance of inversion layer
from the surface:
Oxide p-type silicon
x
E
q
j
j
s
=
2
3 E
from the surface:
Self-Consistent QM Solution
d
e
n
s
i
t
y
Classical
Electron ground state is
E
l
e
c
t
r
o
n

Quantum
Depth
Electron ground state is
at some finite energy
above the bottom of the
conduction band.
Conduction
band edge
O
x
i
d
e
p
Band bending must
exceed 2
B
to invert

e
n
e
r
g
y
Lowest subband
surface.
The centroid of inversion
layer is farther away
E
l
e
c
t
r
o
n
Bottom of the well
layer is farther away
from the surface than in
the classical case.
MOSFET Charge and Potential
1.2 1E-6
V
)

)
t = 10 nm
ox
N = 10 cm
a
17 -3
2
Oxide p-type
silicon
q
s

E
c
Metal
V
ox
0.6
0.8
1
6E-7
8E-7
o
t
e
n
t
i
a
l







(
V
n
s
i
t
y


(
C
/
c
m

s
2
Q
s
Q
i
2
B
q
s

E
i
E
v
q
B

V
g
>0
Deple-
tion
Neutral
region
E
f


0.2
0.4
2E-7
4E-7
S
u
r
f
a
c
e

P
o
C
h
a
r
g
e

D
e
n
Q
d
Q
i
tion
region
Inversion
region
region
E
f


0 0.5 1 1.5 2 2.5 3 3.5
0 0E+0
Gate Voltage (V) V
g
Q
M
0
x
t
W
dm
Gate voltage equation (V
fb
=0):
Q
d
Q
i
Q
s
Q
M
=
x
t
ox
Gate voltage equation (V
fb
0):
V V
Q
C
g ox s
s
ox
s
= + =

+
Note C /t
2 / 1
( Note: C
ox
=c
ox
/t
ox
and c
ox
E
ox
=c
si
E
s
2 / 1
/
2
2
/
1 1 2
(

|
.
|

\
|
+ |
.
|

\
|
+ = =

kT
q
e
N
n
kT
q
e kTN Q
s kT q
a
i s kT q
a si s si s
s s

c c

E
Inversion Charge in Log Scale
1E 7
1E-5 1E-6
c
m


)
c
m


)
2
2
1E-9
1E-7
6E-7
8E-7
s
i
t
y


(
C
/
c
s
i
t
y


(
C
/
c
1E-13
1E-11
4E-7
r
g
e

D
e
n
s
r
g
e

D
e
n
s
Q
i
Q
i
1E-15
2E-7
I
n
v
.

C
h
a
I
n
v
.

C
h
a
Q
i
2
B
0 0.5 1 1.5 2 2.5 3 3.5
1E-17 0E+0
Gate Voltage (V)
V
g
t = 10 nm
ox
N = 10 cm
a
17 -3
MOS Capacitances
Gate Gate
V
g
V
g
d Q ( )
C
ox
C
ox
Q
s
Q
s
C
d Q
dV
s
g
=
( )
d Q ( )
C C
(inversion)
C
C
d Q
d
si
s
s
=
( )

C
si
C
i
(low freq.)
C
d
Q
s
Q
d
Q
i
) (
1 1

s
s
ox
Q d
d
C C
+ =

p-type
substrate
n
+
channel
p-type
substrate
s ox
si ox
C C
1 1
+ =
substrate channel substrate
Capacitance-Voltage Characteristics
In accumulation, Q
s
exp(-q
s
/2kT),
so C
i
=-dQ /d =(q/2kT)Q
1 1
1
2kT q
= +

(
(
/
so C
si
=-dQ
s
/d
s
=(q/2kT)Q
s
=(q/2kT)C
ox
|V
g
-
s
|.
1
C C
V ox
g s
= +

(
(

Capacitance-Voltage Characteristics
At flatband voltage, q
s
/kT<<1,
D
L kT
+ = + =
1 1 1
therefore, Q
s
=(c
si
q
2
N
a
/kT)
1/2

s
.
si ox a si ox fb
C N q C C c c
+ = + =
2
Capacitance-Voltage Characteristics
In depletion,
where
d ox
C C C
1 1 1
+ =
where
C
d Q
d
qN
W
d
d
s
si a
s
si
d
=

= =
( )

c
2
Note that
V
qN W
C
qN
C
g
a d
s
si a s
s
= + = +
c

2
C C
g
ox
s
ox
s

Capacitance-Voltage Characteristics
Inversion, high freq.:
Inversion charge
cannot respond, cannot respond,

1 1 4
2
C C
kT N n
q N
ox
a i
si a min
ln( / )
= +
c
Inversion, low freq.,
or connected to a
reservoir:
where
1 1 1
C C C C
ox d i
= +
+
d Q
Q
( )
is the inv. layer cap.
C
d Q
d
Q
kT q
i
i
s
i
=

=
( )
/ 2
(

1 1
1
2
C C
kT q
V ox
g s
= +

(
(
/

Like accumulation,
Split C-V Measurement
Effect of Gate Work Function
V V V V
Q
C
t fb B ox fb B
d
ox
= + + = + + 2 2
Q
Vacuum
level
Vacuum
l l
ox
ox
s m fb
C
Q
V = ) ( | |
g
E
level level
E
c
= 4.10 eV
0.95 eV
= 4.05 eV
q_
q
m
|
q
s
|
| _
s
g
B
q
= + +
2
E
c
E
v
8-9 eV
Metal
(aluminum)
Silicon
1.12 eV
E
g
=
q
B

E
i
E
f

E
f


poly) (n
+
= _ |
m
( id )
E
g
|
E
v
Silicon
(p-type)
poly) (p
+
+ =
E
g
m
_ |
(midgap)
2q
g
m
+ = _ |
dioxide
p y) (p
q
m
_ |
Effect of Gate Work Function
Example: n
+
polysilicon gate on p-type silicon
| |
|
ms
g
B
a
i
E
q
kT
q
N
n
= =
|
\

|
.
|
2
056 . ln
q
ms
|
V
g
V
fb
ms
= =| V
g
=0

B
q
ms
|
E
c
E
v
E
i
E
c
E
v
E
i
E
f

E
f

E
f


E
f

oxide
p-type silicon n+ poly n+ poly p-type silicon


oxide
oxide
Poly-Si Gate Depletion Effect
p-type silicon Oxide n+ poly
Q
Gate eq. becomes:
E
c
E
V
ox

s
V V
Q
C
g fb s p
s
ox
= + +
and,
E
i
E
v E
c
V
g

p
E
f


E
f

1 1 1 1
C C C C
ox si p
= + +
E
i
E
v
p f


0.6
0.8
1
C
0
0.2
0.4
C
inv
Typically, t
inv
is 0.8-1.0 nm
thicker than t
-2 -1 0 1 2
0
thicker than t
ox
.
Gated-Diode: MOS + p-n Junction
Zero-bias on the p-n junction (equilibrium):
The electron quasi-Fermi level in the MOS is the same as
the Fermi level of the p-type Si the Fermi level of the p-type Si.
Inversion occurs when
s
= 2
B
.
Gated-Diode: Reverse Biased
(N ilib i ) (Nonequilibrium)
MOS under Nonequilibrium
For a p-n junction reverse-biased at a voltage V
R
,
the electron concentration on the p-side of the p
junction is
, V
R
'<V
R
kT qV
i
R
e
N
n
n
/ '
2

=
If a gate voltage is applied to bend the p-type
bands by
s
, the electron concentration at the
f i
a
N
surface is
kT qV kT q
a
i
R s
e e
N
n
n
/ ' /
2

=

As
s
2
B
, V
R
'V
R
. For surface inversion to
occur, i.e., n = N
a
, Need
inv V ( ) + 2
s R B
inv V ( ) = + 2
MOS under Nonequilibrium
V 2 2 ( )
W
V
qN
dm
si R B
a
=
+ 2 2 c ( )
Maximum depletion width at inversion is
Nonequilibrium C-V Curves