Design of High Speed Low Power Multiplier using Reversible logic: a Vedic Mathematical Approach A M: The main aim

of the project is to design !Design of High Speed Low Power Multiplier using Reversible logic: a Vedic Mathematical Approach"# A$S%RA&%: Multipliers are vital components of any processor or computing machine. More often than not, performance of microcontrollers and Digital signal processors are evaluated on the basis of number of multiplications performed in unit time. Hence better multiplier architectures are bound to increase the efficiency of the system. Vedic multiplier is one such promising solution. Its simple architecture coupled with increased speed forms an unparalleled combination for serving any comple multiplication computations. Tagged with these highlights, implementing this with reversible logic further reduces power dissipation. !ower dissipation is another important constraint in an embedded system which cannot be neglected. In this paper we bring out a Vedic multiplier "nown as #$rdhva Tirya"bhayam# meaning vertical and crosswise, implemented using reversible logic, which is the first of its "ind. This multiplier may find applications in %ast %ourier Transforms &%%Ts', and other applications of D(! li"e imaging, software defined radios, wireless communications.

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%ig) *eversible logic gate.

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V.Mallikarjuna (Project manager)

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Na'()r

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APPL &A% '* ADVA*%A)+S: The 1uantum cost is better than 2 of the studied 34 designs and c34se in value to remaining three. The proposed design as the lowest T*5I6 it has the lowest delay, thus upholding the immortality of Vedic multipliers for speedy operations not only for mental calculations but also for hardware implementations. R+,+R+*&+S: (wami 7harati 8rsna Tirtha, Vedic Mathematics. Delhi) Motilal

7anarsidass publishers. *a"shith (aligram and *a"shith T.*. #Design of *eversible Multipliers for linear filtering 9pplications in D(!# International :ournal of V5(I Design and 6ommunication systems. *. 5andauer,#Irreversibility and Heat ;eneration in the 6omputational !rocess#, I7M :ournal of *esearch and Development, <, pp.3=>?3,3, 3,/3. 6.H. 7ennett, #5ogical reversibility of 6omputation#, I7M :. *esearch and Development, pp.<-<?<>-. *. %eynman, #@uantum Mechanical 6omputers,# Aptics Bews, Vol.3l, pp. 33?-4, 3,=<.
V.Mallikarjuna (Project manager)

ISO: 9001- 2008 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &

V.Mallikarjuna (Project manager)

ISO: 9001- 2008 CERTIFIED COMPANY

Na'()r

Mobile No: +91-8297578555. Branch !: "#$ ra%a$ &