Digital Speedometer using FPGA

Anita Agrawal1, Vaidya Alekh Sunil2, Uike Abhijeet Himmatrao2 and N.M.Sastry2
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3rd year, EEE, BITS, Pilani Goa Campus Email: aagrawal@bits-goa.ac.in, alekhvaidya@gmail.com, abhijeet.uike@gmail.com, mrutynjaya.sastry@gmail.com

M.E., Electronics, PhD(app), Faculty, BITS, Pilani Goa Campus

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Abstract:

This paper introduces a modified technique of speed and direction determination using digital logic in place of a conventional analog one. In the analog speedometers being used so far, the speed is measured using a rotating magnet. In this paper an attempt has been made to use the optical encoder to measure the speed at a greater accuracy and lesser delay time. The concept of induced pulse width encoder has been employed for this purpose. This encoder is an electro-opto-mechanical device. The important and interesting part of the paper is that the digital speedometer also gives the direction of the rotation of the wheel by making use of an index pulse. A Field Programmable Gate Array (FPGA) can be programmed using the Verilog/VHDL code to determine the speed and direction of rotation and displaying the output.

Most of the speed drives today demand an instantaneous feedback for effective speed control. Also the knowledge of direction of speed is becoming important, especially in drives that have to rotate in both directions. Thus the digital speedometer proposed in this paper seems to be a viable option giving direction and speed outputs with accuracy, lesser hardware and lesser delay time.

1. Why a new speedometer?

The first speedometer used (by Ford in 1911) was sheet metal stamped wheel gear with 6 holes stamped in it. Present analog speedometers use a gear-driven flexible shaft (connected to the wheel) attached to a permanent magnet.[5] A recent development in this field is the use of incremental optical encoders to determine the speed. The incremental optical encoders being used so far have a rotating disk with a number of slits on it, a source and a detector of light.[6] The speed is measured by counting the number of pulses obtained in a particular time interval. Direction is determined by using a second disk or a separate light source. This process, though determines the speed of rotation of the wheel, does not provide the instantaneous value of the speed. It only gives an average value of the speed over a specific interval of time. Using a second light source also is not a reliable option as even the slightest mechanical disturbance gives rise to a considerable inaccuracy in measuring the offset of one set of pulses from the other.

Of the two types of encoders rotary and linear, the principle of operation of rotary encoders is discussed briefly hereunder, as the proposed optical encoder works on a similar principle. Rotary encoders consist of the following important components [p1]: a) A light source (LED) b) A rotating coded disk c) A stationary mask d) A photo detector with multiple sensing elements e) Analog to digital converter electronics (shaper circuits)

2. Rotary encoders:

Fig.2 Experimental Setup for Rotary Encoder The output of the multi-sensing detector is a sine wave, with dc offset and other noises removed. This is passed to A/D converter circuit to convert it into square wave form. There are two major types of rotary encoders incremental and absolute. Absolute encoders are useful in determining the position of the wheel exactly as they generate a unique bit pattern for each position. Incremental encoders use one or two disks to determine the speed.

Fig 1. Existing Optical Encoder output

3. Introducing an Induced pulse width:

generated by the encoder. The following figures show the pulse train formed as a result of introducing the induced pulse.

The incremental encoders discussed so far generate a continuous pulse with a 50% duty cycle when the disk rotates at a constant speed. That means the widths of the adjacent transparent and opaque areas in the pattern on the disk are the same. Also, they make use of two outputs (channel A and channel B) to determine the direction of rotation. Here we propose to use a pulse train with an increased on time for one particular pulse in the pattern. This increased duty cycle pulse (INDEX pulse) helps in determining the direction of rotation, by comparing a set of pulses surrounding the index pulse. The introduction of this index pulse helps to eliminate the need to take a second pattern of pulses, thus reducing the hardware requirements.

Fig 4. Waveform with induced pulse A change in the on and off times of the induced pulse (marked in red) can be observed from the above figure. For constant speed, the normal pulses in the pulse train will have a 50% duty cycle [p1]. Thus, in case of constant speed drives, index pulse can be easily recognized. The time period of each state in every pulse, collected during calculation of speed can be used here to recognize the index pulse. Once the index pulse is found, the required data can be processed to find out the direction of rotation. In the case of a non uniform speed drive, the speed can be determined using the same logic as described above. The logic for recognizing the index pulse is shown below.

4. Determining the speed:

To calculate the speed we make use of the resolution and time period of each pulse. The resolution of the disk is known from its construction and is constant for a particular encoder. To find out the time period, pulses from an external clock whose frequency is sufficiently high are used. The number of pulses of the external clock for each pulse output of the encoder is counted. Thus the speed of the disk in rpm is given by the formula: S = 60f / (n*N) Where S is the speed in rpm, f is the frequency of the external clock used n is the number of pulses of the clock in one pulse of the encoder N is the number of slits on the encoder disk The frequency of the external clock is to be carefully selected not to limit the accuracy of the digital output. For example, if an encoder with 50 slits on the disk has to measure the speed of a shaft whose maximum speed is 2000 rpm, then the frequency of the clock has to be at least 100 kHz. Here care has been taken so that the number of clock pulses for each output pulse is at least 60. This ensures that the error due to partial clock pulses that creep into the measurement of the time period of each output pulse is negligible. The worst case error can be of 1 clock pulse (almost). In that case the output is shown as 2033rpm instead of 2000 rpm which is 1.65% error and can be safely neglected. The average value of error is 0.84%.

Fig 3. Speed Determination

The concept of induced pulse discussed above will be used here to determine the direction. Firstly the index pulse has to be recognized among the sequence of pulses

5. Determining the direction of rotation:

Fig 5. Flowchart for direction determination

Here, from the flow chart, it can be observed that, it is checked for four consecutive change of time periods, that is for 4 consecutive states. Here T0 and T1 store the time periods of two consecutive states and they are compared. After comparison, T1 is updated with the value of T0 and T0 with the new time period (of the next state). For every consecutive unequal time period encountered, the value of F is incremented by one.

FPGA offers the advantage of real time processing. It raises the level of abstraction & reduces the turn around time. Thus the compatibility for various applications increases & end-user gets higher degree of freedom to make any changes as per his constraints. Taking a hypothetical example, suppose a digital speedometer using FPGA is manufactured and implemented to measure the linear velocity of a vehicle in km per hour. The same instrument can be used to measure the number of turns of ' spherometer' to find the pitch of a screw in millimeters with some minor changes in the program and without any need for changes in hardware. Thus, reducing time and cost required, with an added advantage of flexibilty & higher degree of compatibility, the FPGA provides a valuable option.

6. Why FPGA Implementation?

once in one rotation (N3>N4, N1=N2). For pattern B, this happens for two consecutive times in one rotation (N1>N2, N3>N4). This particular event is used to differentiate between the directions. The speed of Pattern A can be calculated by taking no. of clock pulses per slit as (N1+N2). For the pattern B, no. of pulses per slit are (N1+N4). So once the direction is determined, speed can be obtained in the same loop. The formula for calculation of speed is: Speed (in RPM) = (clock freq. * 60) / [(No. of slits) * (No. of pulses/slit pair)]. The speed is given as a 16-bit data on the output lines. Direction is given as a 2-bit data where one bit stands for the direction and the other denotes whether the speed remains constant or is variable. This can be connected to 7 segment displays or a LCD screen to view the output. A Xilinx Spartan 3E FPGA was used to implement the program. ModelSim Simulator was used to simulate the code and the waveforms obtained are as shown on the next page.

7. Programming the FPGA:

A FPGA has been programmed using the Verilog HDL code written to find the speed and direction of rotation. The following paragraphs discuss the logic used in the code in brief. The output signal of the encoder (train of pulses) and an external clock of suitable known frequency are given as inputs to the FPGA. The program consists of two modulesone for speed and direction determination and the other for division. The speed module counts the number of clock pulses in each state of the encoder output. The counting starts with the positive edge of the induced pulse, the number in the negative half are also counted in the same loop.

Fig. 6 Encoder output waveforms The logic uses four memory locations to store the values for consecutive counts N1, N2, N3 and N4, as shown in the above figure. For pattern A, the number of clock pulses in the positive state is more than that in the negative state only

Simulation No. 1 Waveforms as obtained in ModelSim Simulator. The yellow line indicates the ending of the index pulse. The first waveform shows the clock; second one shows the encoder output. The third one shows the direction of rotation and can be seen as going high after the index shown, indication pattern A. Thus, the logic is verified and is found to give acceptable results

The modifications suggested to the existing incremental encoders should help in reducing the hardware and thus the cost of implementing a speedometer with direction determination. Advancements to be done in the paper include real time direction determination for variable speed.

8. Conclusion:

References:-

Publications:

1. PCEA IFTOMM International Conference PICA -2006, Nagpur Optical Incremental Rotary Induced Pulse Width Encoder (OIRIPWE) with Test Results P.P. 53. Authors: Dr.A.A.Ghatol (Vice-Chancellor, BA Technological University, Lonere, Dist. Raigarh), Mr.Sham Nayse (Assisst Professor, PCCE, Verna, Goa) Mrs.Anita Agrawal,( Faculty, EEE Group, BITS, Pilani, Goa) 2. National Conference under TE QIP TSYGECA -2006, Aurangabad Optical Incremental Rotary Induced Pulse Width Encoder (OIRIPWE) P.P. 680-683 Mrs.Anita Agrawal, Mr.Sham Nayse

[1] Technical document on rotary encoders, http://www.heidenhain.com/techart.html [2] Technical document on rotary encoders, http://www.ni.com/ [3] Encoder basics, www.neat.com [4] Mark Chapman,Director & General Manager, Laser & Calibration Products Division [5] Renishaw, RLE Technical article issue 2.doc M.A.V.Chapman Jan 2002 [6] www.zone.ni.com. [7] www.opticalencoder.com [8] www.qsl.net [9] R. A. Krohling, Y. Zhou, and A. M. Tyrrell, Evolving FPGA-based robot controllers using an evolutionary Algorithm [10] Xilinx datasheet, (2001). Xilinx Inc. Virtex Field Programmable Gate Arrays data book. Version 2.5. [11] R.S. Zebulum, M.M.R. Vellasco, and M.A.C. Pacheco (2001). Evolutionary electronics: Automatic design of electronic circuits. CRC Press, Boca Raton, FL, USA. [12] Agilent Validating Transceiver FPGAs Using Advanced Calibration Technique DesignCon 2005, Santa Clara Convention Center, Jan 31, 2005, Santa Clara, CA.