SERIAL COMMUNICATION PROTOCOLS

Prepared byIsha Ahuja Niti Varma

SERIAL COMMUNICATION PROTOCOLS

Serial communication is the process of sending data one bit at a time, sequentially, over a communication channel.

UNIVERSAL SERIAL BUS(USB)

USB was designed to standardize the connection of computer peripherals(including keyboards, digital cameras, printers , portable media players, disk drives and network adapters to personal computers , both to communicate and to supply electric power. !t has become commonplace on other devices, such as smart phones ,video games etc. Serial transmission and reception takes place between host and serial devices.

USB FEATURES

"an be hot plugged (attached , configured and used,reset, reconfigured and used.

Bandwidth sharing with other devices# $ost schedules the sharing of bandwidth among the attached devices at an instance. "an be detached (while others are in operation and reattached.

USB VERSIONS
There are three stan ar s! "#USB "#"! !t supports two speeds,a full speed mode of %&'b(s,&) meter channel and low speed mode of %.)'b(s,* meter channel. $#USB $#%! !t has high data speed of +,-'b(s,&) meter channel. &#'IRELESS USB! $igh data speed of +,-'b(s,* meter channel.

USB S(STEM
USB system consists of three distinct parts# %.USB device(s . &. USB interconnect. *. USB host. USB )e*ices! USB devices are classified as either a hu+ or a ,unction . $ubs provide additional attachment points, whereas functions provide capabilities to the system. -unction! .ll functions understand the USB protocol, respond to standard operations , and describe capabilities to the USB host.

/here are three speed classes of functions# .i/h0s1ee functions operate at up to +,- 'b(s. -ull0s1ee functions operate at up to %& 'b(s. Lo20s1ee functions operate at up to %.) 'b(s. .u+s! . high0speed hub plays a special role./he high0speed hub establishes a high0speed transfer rate with the host. USB Interconnect! /he USB interconnect provides a connection from the USB device(s to the USB host. USB .ost! . USB system contains only one USB host. /he host interfaces with the USB interconnect via a host controller. /he host includes an embedded hub called the root hu+ which provides one or more attachment points, or ports.

(UNIVERSAL ASYNCHRONOUS RECEIVER TRANSMITTER)UART

A UART is an integrated circuit that plays the most important role in serial communication. A UART is a circuit that sends parallel data through serial lines. Main function of a UART is parallel-serial conversion during transmission and serial-parallel conversion during reception.

FUNCTIONS OF UART

UART communication needs only t o signal lines !"#$% &#$' to achieve full-duple# serial data transmission.

(hen transmitting% the UART converts the incoming multi-bit data stream into serial data stream and sends it serially via the "#$ pin.

(hen receiving% the UART receives the data serially on the &#$ pin and provides the parallel data to the application.

"here are t o states in the signal line) logic *+, and logic *-,.

(hen no data is transmitted% the signal line is in *idle, state hich is generally represented by logic *+, !mar.'.

(hen a data ord is given to UART% the asynchronous data transmission starts ith a *start bit, !logic *-,' hich is added at the beginning of each ord to be transmitted.

"he start bit is used to alert the receiver that a data ord is about to be sent. "he start bit follo s the data ord to be transmitted.

UART TRANSMITTER

/A&" transmitter performs the follo ing steps) +. If there is data available% loads a byte into the shift register. 0. 1ends a start bit on the serial line% indicating the beginning of a frame. 2. 1hifts out data bits from the shift register to the serial line. 3. If parity is enabled% sends a Parity 4it after all data bits are sent. 5. 1ends stop bit!s' on the serial line% indicating the end of a frame.

UART RECEIVER
"he receiver performs the follo ing steps) +.6unts for a valid start bit% hich indicates the beginning of a frame. 0. 1hifts in data bits from the serial line to the shift register. 2. If parity is enabled% compares received parity bit ith the e#pected value. 3. 7hec.s for a valid stop bit on the serial line% hich indicates the end of a frame.

I2C(Inter Integrated Circuit Bu )

ORIGIN: - Philips Semiconductors (now NXP Semiconductors), in 1982, developed a simple bidirectional 2-wire bus for efficient inter-IC control. This bus is called the Inter-IC or I2C-bus. -Its original purpose was to provide an easy way to connect a CPU to peripherals chips in a TV set.

-The original specification defined a bus speed of 100 kbps (kilo bits per second).

I2C Bu C!n"igurati!n

0- ire serial bus 8 1erial data !1$A' and 1erial cloc. !179' 6alf-duple#% synchronous% multi-master bus Serial, bidirectional data transfers can be made at up to

00%-- kbit(s in the Stan ar 0mo e3 00up to +-- kbit(s in the -ast0mo e3 00up to % 'bit(s in the -ast0mo e Plus (-m4)3 00or up to *.+ 'bit(s in the .i/h0s1ee mo e.

00/he Ultra -ast0mo e is a uni0directional mode with data transfers of up to ) 'bit(s

I2C Signa#

Start high-to-low transition of the SDA line while SCL line is high Stop low-to-high transition of the SDA line while SCL line is high Ack receiver pulls SDA low while SCL line is still high Data transition takes place while SCL is slow, valid while SCL is high

I2C $r!t!c!#

1. Master sends start condition (S) and controls the clock signal 2. Master sends a unique 7-bit slave device address 3. Master sends read/write bit ( /!) " # - slave receive$ 1 - slave trans%it &. eceiver sends acknowledge bit ('()) *. +rans%itter (slave or %aster) trans%its 1 b,te o- data .. eceiver issues an '() bit -or the b,te received 7.a) /or write transaction (%aster trans%itting)$ %aster issues sto0 condition (1) a-ter last b,te o- data. 7.b) /or read transaction (%aster receiving)$ %aster does not acknowledge -inal b,te$ 2ust issues sto0 condition (1) to tell the slave the trans%ission is done

S$I(Seria# $eri%&era# Inter"ace)

Shorthand -or 3Serial 1eri0heral 4nter-ace5 6e-ined b, Motorola on the M(.78(99 line o- %icrocontrollers :enerall, -aster than 42($ ca0able o- several Mb0s '00lications; <ike 42($ used in ==1 >M$ /lash$ and real ti%e clocks ?etter suited -or 3data strea%s5$ i.e. '6( converters /ull du0le9 ca0abilit,

S$I Bu C!n"igurati!n

1ynchronous serial data lin. operating at full duple# Master:slave relationship 0 data signals)

M;1I 8 master data output% slave data input MI1; 8 master data input% slave data output 179< 8 cloc. :11 8 slave select !no addressing'

0 control signals)

S$I $r!t!c!#

(hen the 1PI master ishes to send data to a slave and:or re=uest information from it% -it selects slave by pulling the corresponding 11 line lo -it activates the cloc. signal at a cloc. fre=uency usable by the master and the slave.

"he master generates information onto M;1I line hile it samples the MI1; line

'a(e"!r)

C!)%ari !n
Parameter 1ins Au%ber >- 6evices SPI 3 @ 1 0er device 's 0er require%ent 7 I2C 2 1#2&

?its in data b,te trans-er 'ddress b,te be-ore trans%ission (lock t,0e

B( 7 @ 1 acknowledge%ent bit) Ces

A>

Master clock onl, /ull du0le9

Master clock that slave can in-luence 8al- du0le9

Mode oco%%unication