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NOR Gate
Lets take a quick look at a slightly more complicated gate, the NOR gate Since either input can make the output go high, this is the easiest to implement: We simply put two inverting gates in parallel. Why is the output low if any input is high?
VDD
Vout V1 V2
Analytical values
We can look at the equations that relate the input to the output voltage in each of the three regions. In each case, we need to translate from the drain current of the MOSFET to the voltage drop across the resistor In cutoff, there is no current, so the voltage output is pegged: In the saturation region, we have: Which can be used to get the gain: Finally in the triode region we have: Simplified for small output voltages:
Cutoff
vI < Vt vO = VDD
Saturation
vI Vt
vO vI Vt
Triode
vO = VDD RD nCOX W 2 (vI Vt )vO 1 vO L 2
Example
Lets consider an example using the CS circuit: The MOSFET has these qualities:
Kn(W/L)=1mA/V2 Vt=1V
RD=12k VDD=10V We want to determine the values for the labeled points on the transfer curve.
Example
Point X
vI = 0V vO = 10V
Point A
vI = 1V vO = 10V
Point B
This is the saturation threshold point
vI = vO + Vt
2 9vO + vO 10 = 0
vO = 1V
vI = 1 + 1 = 2V
Point C
vI = 10V W (vI Vt ) vO = VDD / 1 + RD nCOX = 0.061V L
Example
Now lets consider using this circuit for amplification: We will want to use the saturation region. This covers output voltages between 10 and 1V By choosing the output voltage to be centered on 4V, we will have the maximum range that avoids clipping and has a large linear range (5.5V does not have this) We have to determine what input voltage will get us this output voltage.
Example
At 4V output the drain I D = VDD VO = 0.333mA RD current must be: From this we can find 2I D the overdrive voltage: VOV = kn (W / L ) = 0.816V Thus the MOSFET must be operating VI = Vt + VOV = 1.816V with an input voltage of: We can find the gain AV = RD nCOX W (V1Q Vt ) = 14.7V / V L at this bias point:
Due to this, the drain current will vary wildly and unpredictably from transistor to transistor and it will vary with temperature on top of that!
A Better Way
There is in fact a very simple way to improve this situation. By adding a source resistance, there is a negative feedback set up between the gate-source voltage and the current:
More current though the device means that there will be a larger voltage drop across the resistor, thus weakening the gate-source voltage and reducing the current We can see that by selecting a appropriate resistor, we can get a small variation in drain current between two devices.
The catch is that the larger RS is, the better the response. But we dont want to go too big.
Two Ways
Both circuits would use a capacitively coupled input signal
Here we are using just a single supply voltage with a voltage divider to get the desired gate voltage. We can choose very large values for RG1 and RG2 to minimize power dissipation
Here we are using a dual power supply with the gate connected to ground to simplify the circuit. The resistor in the gate circuit is needed to present a high impedance to ground for any input signal