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# Ece202 Design Problem 4 Bit Odd Counter

Submitted To :-

Ms.Kavita Dubey
Submitted By:-

## Kulpreet Singh 11104742

Aim:To design 4-bit asyncronous counter(odd) Material Required:- IC 7476 , IC7408 ,LED ,IC555,Resistor & Capacitor Theory:-

A resistor is a two-terminal electrical component that implements electrical resistance as a circuit element. The current through a resistor is in direct proportion to the voltage across the resistor's terminals. This relationship is represented by Ohm's law: I=V/R [I=Current||V=Voltage||R=Resistance]

Resistor

Capacitance is the ability of a body to store an electrical charge. Anybody or structure that is capable of being charged, either with static electricity or by an electric current, exhibits capacitance. A common form of energy storage device is a parallel-plate capacitor. In a parallel plate capacitor, capacitance is directly proportional to the surface area of the conductor plates and inversely proportional to the separation distance between the plates. If the charges on the plates are +q and q, and V give the voltage between the plates, then the capacitance C is given by C=q/V

Capacitance

A flip-flop is a circuit that has two stable states and can be used to store state information. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. There are four types of flip flop depending on the no of input they take and type of output they gives. i) JK Flip Flop- Its is also known as universal flip flop as all other flip flops can be made by this.

Flip Flop

J K Q(t+1) Comment 0 0 0 1 1 0 1 1
ii) SR Flip Flop

Q 0 1 Q

iii) D Flip Flop

1 -

ot

S t N

## T Q(t+1) Comment 0 1 Q Q No Change Toggle

A logic gate is an idealized or physical device implementing a Boolean function, that is, it performs a logical operation on one or more logic inputs and produces a single logic output. Basic Gates i) And Gate ii) Or Gate iii) Not Gate Other Gates i) NOR Gate ii) XNOR Gate iii) NAND Gate iV) XOR Gate Truth Table of all the gates:INPUT A B AND A.B OR A+B NOT NAND A OUTPUT NOR XNOR XOR

Logic Gates

## (A.B) (A+B) (A.B)+(A.B) (A.B)+(A.B)

0 0 0 1

0 1 1 1

1 1 0 0

1 1 1 0

1 0 0 0

1 0 0 1

0 1 1 0

IC7476

It has two JK flip flop with the above pin diagram configuration. The description of the pin diagram is as follow:-

IC7408

It is having 4 and gate woth the above pin diagram configuration. Pin 7 is the ground pin and pin 14 has positive supply. The description of the pin diagram is as follow:-

IC555
The IC555 is an integrated circuit (chip) used in a variety of timer, pulse generation, and oscillator applications. The 555 can be used to provide time delays, as an oscillator, and as a flip-flop element. Derivatives provide up to four timing circuits in one package. Standard ic 555 circuit to generate the logic clocks. The value of R1, R2 and C is choosen according to the required frequency of output.

Counter
In digital logic and computing, a counter is a device which stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship to a clock signal. Types of counters:i) Asynchronous (Ripple) Counter- changing state bits are used as clocks to subsequent state flip-flops

## every flip flop in the

High input is given to all the JK and a clock to the first flip flop. All other flip flop will get clock from the changing states of the previous flip flop. When the clock is 0 this is the initial state of reset the output. When first clock arrives the first flip flop gets toggled because both the inputs are 1. As Q0 is 1 (i.e. Q0 is 0) then Q1 will remain unchanged but when Q0 is 0 the Q1 gets toggled and this goes on till all the flip flops. Timing diagram of 4 bit counter

ii) Synchronous (Parallel) counter- All state bits change under control of a single clock

## 3 Bit Synchronous Counter

It is seen that from the circuit we notice that Q0 changes state at every clock pulse. So the flip flop 0 is mode to toggle by putting J and K equal to 1. Q1 goes to opposite state following each time Q0=1. When Q0=1 and positive edge of the clock occurs flip flop 1 is in toggle mode and will change state. Other times the Q0=0 the flip flop 1 is in the old mode and remains in the present state. Flip flop 2 will go toggle state following each time Q0 and Q1 is equal to 1. This condition is detected by the and gate that makes the JK input of flip flop 2 high. When either Q0 or Q1 is 0 or the clock has the negative edge the flip flop 2 will not change its state and it will remain in its present state.

## Output is taken at Q of every flip flop in the series Q2 Q1 Q0.

Odd counter is which counts only for the odd numbers. Below is the circuit of the 4 bit odd counter made by 4 bit asynchronous counter.

Odd Counter

Truth table

Input BASE10 0 1 2 3 0 1 0 Q3 0 0 0 0 0 5 0 Q2 0 0 0 0 1 1 1 Q1 0 0 1 1 0 0 1 Q0 0 1 0 1 0 1 0 O3 0 0 0 0 0 0 0 O2 0 0 0 0 0 1 0

## Output O1 0 0 0 1 0 0 0 Output Q1 1 0 0 1 1 0 0 1 1 Q0 1 0 1 0 1 0 1 0 1 O3 0 0 1 0 1 0 1 0 1 O2 1 0 0 0 0 0 1 0 1 O1 1 0 0 0 1 0 0 0 1 O0 1 0 1 0 1 0 1 0 1 BASE10 7 0 9 0 11 0 13 0 15 O0 0 1 0 1

0 1 0

BASE10 0 1 0 3
0 5 0

Input BASE10 7 8 9 10 11 12 13 14 15 Q3 0 1 1 1 1 1 1 1 1 Q2 1 0 0 0 0 1 1 1 1

The above truth table clearly shows that the circuit will give the output only at odd numbers.