The objective of this experiment is to learn how to implement binary arithmetic in logic gates and in logic circuits.

We are expecting to learn how to solve lo gic gates and circuits using paper and pen, then implement that knowledge on a s oftware simulator to perform binary sums. -Introduction: Logic gates are the most basic components of a computer. Every electoral device requires logic gates in order to produce outputs from a single or differ ent combinations of inputs. To understand logic gates, you must know that logic gates only run numbers in binary, which are ones and zeros. If the switch is on , or true, the input/output is a 1. If the switch is off, or false, the input/ou tput is zero. Logic gates take the binary inputs, does a command based on what k ind of gate it is and then it releases a binary output. We were using Data for 3 -input AND and OR gates to compute all the possible out puts for x, then using t his knowledge to further calculate half- adder and full adders. A half adder is a logical circuit that performs an addition operation on two binary digits. The half adder produces a sum and a carry value which are both binary digits. A full adder is a logical circuit that performs an addition operation on three binary digits. The full adder produces a sum and carry value, which are both binary dig its. It can be combined with other full adders or work on its own. Using everyth ing to this point to construct a full- adder and a 4-but full adder. -Procedure: We started out the lab trying to hand write out the addition of a 4-bit numbers. we first converted the hexadecimal number into binary number then we a dded them together to get a result then we had to have a carry-in of 1 or 0 to c heck if there was a result of the carry-out being too large to fit in a 4-bit nu mber. For the next step of the lab we used logic gates in multisim. we simulated a 3-input AND gate and a 3-input OR gate with a input waveform that cycled thro ugh binary number 0 through 9. To see the output we used a 4-channel oscillosco pe as seen in our data sheets that we printed out with the results. For the next part of the lab we used binary arithmetic to find out how digital logic circuit s are used to implement circuits to perform binary operation. We used half-adder to added two bits in multisim to verify the truth table(table 4) outputs. Using the software we found that the truth table for the half-adder we true in table 5. we then repeat the experiment again for the full-adder to prove table 6 to be true. Results of this section is printed out in the back. Last part of the lab we had to create a 4-but full-adder using a 74LS83 4 bit adder to check the resu lts of the calculation we did in the beginning of the lab. the results of this s howed use that we were correct with our calculations. Using multisim to perform binary arithmetic or to solve logic gates is a "bit" f rustrated because there is so many names for a single chip. By the end of the la b, making logic gates and logic circuits in multisim got easy to understand and perform. Objective: The objective of this lab is to verify the applicability of the combinat ional logic circuits. The second part is to simulate and implement the AND-OR lo gic with NAND gates. The whole point of the lab is to design a circuit that mim ic the passing or failing of a proposal with a majority vote of two out of three votes. -Procedure: We need to design a circuit that has three inputs and one output. To do this we made a truth table showing the correct values of the output signal for e ach combination of inputs. Second step we wrote a SOP Boolean equation for the p ass/fail output signal and simplify the equation. Then we use the DeMorgan s theor em to convert the simplify Boolean equation to express using the NAND gates. We then went on to design the circuit in multisim to test if the simulation works. For the last part of the experiment we had to implement the hardware for the cir cuit. We used two NAND gates and a multi-meter to test the results. -Conclusion:

Throughout the lab we did not run in to any hiccups. This lab was pretty much st raight through. At the end of this lab we had made a circuit that took three inp uts and gave out one output of a pass or fail depending majority of the three in puts.