Why Design with a Soft-Core Processor?

There are many reasons for selecting a soft-core processor over other processing options. The first reason is that this type of processor provides a substantial amount of fle ibility through the configurable nature of the !P"#.# soft-core processor allows a designer to add or subtract peripherals from the SoPC with ease. $n many toolsets% adding and configuring a peripheral is typically done in a few short steps. &ot only is the addition of a peripheral easy to do% but there are a wide variety of peripherals available from vendors. #dding Peripherals The method in which the peripherals are connected to the processor within the SoPC is fle ible. The SoPC system is comprised of memory-mapped devices with read and write interfaces. Customi'able Processor Core # soft-core processor also offers the fle ibility of tailoring the core itself for the application. There are a few different levels of how this can be accomplished% depending on the vendor. (n one level% things such as cache si'e can be easily ad)usted. Testing the !P"# design with software on actual hardware earlier in the design process gives the design team more confidence and reduces the time spent debugging form factor hardware when it arrives. #s fle ible as the development platform is% the design team will not be able to completely test a design due to limitations with the hardware e ternal to the !P"#. *ultiple Processors. *ore comple embedded systems could benefit from the use of multiple processors to decrease the e ecution time by e ecuting tas+s in parallel. Soft-core processors and their accompanying toolsets can ma+e the tas+ of implementing multiple processor cores that interface with a common set of peripherals much more feasible and appealing to designers.

Benefits of Hierarchical Multiprocessor Systems

Multiprocessor systems possess the benefit of increased performance, but nearly always at the price of significantly increased system complexity for both hardware and software. The idea of using multiple processors to perform different tasks and functions on different processors in real-time embedded applications is gaining popularity. Altera FP As pro!ide an ideal platform for de!eloping embedded multiprocessor systems, because the hardware can easily be modified and tuned using the "sys tool to pro!ide optimal system performance. #ncreases in the si$e of Altera FP As make possible system designs with many %ios ## processors on a single chip. Furthermore, with a powerful integration tool like "sys, different system configurations can be designed, built, and e!aluated !ery &uickly. "sys enables hierarchical designs, reducing system complexity through compartmentali$ation of the design into discrete subsystems. 'ach subsystem exports user-defined interfaces, linking the subsystem hierarchy together. Multiprocessing, especially the following concepts( ) Mutual exclusion and mutex usage ) *oncurrency Multiprocessing, especially the following concepts( ) Mutual exclusion and mutex usage ) *oncurrency ) +ynchroni$ation ) ,ierarchical system design in "sys
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connection to an A!alon1 Memory-Mapped 2A!alon-MM3 pipeline bridge. An A!alon-MM pipeline bridge also pro!ides a mechanism for simultaneous connection of a sla!e interface to both a processor master local to the subsystem and an external processor master elsewhere in the hierarchy. #n that case, the pipeline bridge exports the sla!e interface, instead of the peripheral exporting the sla!e interface directly. The software running on each processor is responsible for coordinating mutually exclusi!e access to shared peripherals with the system4s other processors through employment of mutex peripherals. The %ios ## processor pro!ides protection of shared peripherals by accessing the

hardware mutex core, which ensures only one processor has ownership of the mutex at any gi!en time. The hardware mutex core is not an internal feature of the %ios ## processor. #t is a simple "sys component. The term mutex stands for mutual exclusion, and a mutex does exactly as its name suggests. A mutex allows cooperating processors to agree that only one processor at a time is allowed access to a particular hardware peripheral. This is useful for the purpose of protecting peripherals from data corruption that can occur if multiple

Analyzing Potential Throughput Improvement of Power- and ThermalConstrained MulticoreProcessors by E ploiting !"#$ and PCP%
processors attempt to use the peripheral at the same time.
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A %o!el Multiple *ore *o-Processor Architecture for 'fficient +er!er-based Public 5ey *ryptographic Applications

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Multiprocessor $ystem-on-Chip 5MP$oC6 Technology

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