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STUDY OF LOGIC GATES AIM: To study about logic gates and verify their truth tables.

THEORY: Logic gates are electronic circuit, that performs one or more logical operations on one or more input signals. Logic gates are the building blocks of digital technology. Each gate has one or more input and only one output.OR, AND and NOT are basic gates. NAND, NOR and X-OR are known as universal gates. Basic gates form these gates. AND GATE: The AND gate performs a logical multiplication commonly known as AND function. The output is high when both the inputs are high. The output is low level when any one of the inputs is low. OR GATE: The OR gate performs a logical addition commonly known as OR function. The output is high when any one of the inputs is high. The output is low level when both the inputs are low. NOT GATE: The NOT gate is called an inverter. The output is high when the input is low. The output is low when the input is high. NAND GATE: The NAND gate is a contraction of AND-NOT. The output is high when both inputs are low and any one of the input is low .The output is low level when both inputs are high. NOR GATE: The NOR gate is a contraction of OR-NOT. The output is high when both inputs are low. The output is low when one or both inputs are high. X-OR GATE: The output is high when any one of the inputs is high. The output is low when both the inputs are low and both the inputs are high. PROCEDURE: (i) (ii) (iii) Connections are given as per circuit diagram. Logical inputs are given as per circuit diagram. Observe the output and verify the truth table.

VERIFICATION OF BOOLEAN THEOREMS USING LOGIC GATES Aim: To verify the truth table of basic Boolean algebric laws by using logic gates. Theory: Demorgans Theorems First Theorem: It states that the complement of a product is equal to the sum of the complements. (AB) =A +B Second Theorem: It states that the complement of a sum is equal to the product of the complements. (A+B) =A.B Boolean Laws: Boolean algebra is a mathematical system consisting of a set of two or more distinct elements, two binary operators denoted by the symbols (+) and (.) and one unary operator denoted by the symbol either bar (-) or prime (). They satisfy the commutative, associative, distributive and absorption properties of the Boolean algebra. Commutative Property: Boolean addition is commutative, given by A+B=B+A Boolean algebra is also commutative over multiplication, given by A.B=B.A Associative Property: The associative property of addition is given by A+ (B+C) = (A+B) +C The associative law of multiplication is given by A. (B.C) = (A.B).C Distributive Property: The Boolean addition is distributive over Boolean multiplication, given by A+BC = (A+B) (A+C) Boolean multiplication is also distributive over Boolean addition given by A.(B+C)=A.B+A.C Procedure: 1. Test the individual ICs with its specified verification table for proper working. 2. Connections are made as per the circuit/logic diagram. 3. Make sure that the ICs are enabled by giving the suitable Vcc and ground connections.

4. Apply the logic inputs to the appropriate terminals of the ICs. 5. Observe the logic output for the inputs applied. Result: Thus the verification of Boolean laws and theorems using digital logic gates were performed. DESIGN AND IMPLEMENTATION OF CODE CONVERTERS AIM: To design and implement a combinational circuit to convert gray code to Binary and BCD to Excess-3 vice versa. Theory: Binary to Gray Vice versa: The binary coded decimal (BCD) code is one of the early computer codes. Each decimal digit is independently converted to a 4 bit binary number. A binary code will have some unassigned bit combinations if the number of elements in the set is not a multiple power of 2. The 10 decimal digits form such a set. A binary code that distinguishes among 10 elements must contain at least four bits, but 6 out of the 16 possible combinations remain unassigned. Different binary codes can be obtained by arranging four bits in 10 distinct combinations. The code most commonly used for the decimal digits is the straight binary assignment. This is called binary coded decimal. The gray code is used in applications where the normal sequence of binary numbers may produce an error or ambiguity during the transition from one number to the next. If binary numbers are used, a change from 0111 to 1100 may produce an intermediate erroneous number 1001 if the rightmost bit takes longer to change in value than the other three bits. The gray code eliminates this problem since only one bit changes in value during any transition between two numbers. BCD to Excess 3 Vice versa: Excess 3 code is a modified form of a BCD number. The excess 3 code can be derived from the natural BCD code by adding 3 to each coded number. For example, decimal 6 can be represented in BCD as 0110. Now adding 3 to the given number yield equivalent excess 3 code i.e., 6 + 3 = 9 0110 + 0011 = 1001. Thus for the entire sequence of BCD value (i.e., 0 to 9) excess 3 equivalent table should be made so that the realization of Boolean expression for the circuit implementation is feasible. In the reverse process of designing a code converter from excess 3 to BCD the same procedure is followed.

LOGIC DIAGRAM: BINARY TO GRAY CODE CONVERTOR

K-Map for G3:

G3 = B3 K-Map for G2:

K-Map for G1:

K-Map for G0:

TRUTH TABLE: | B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Binary input B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 | G3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Gray code output G2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 G1 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 G0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 |

LOGIC DIAGRAM: GRAY CODE TO BINARY CONVERTOR

K-Map for B3:

B3 = G3 K-Map for B2:

K-Map for B1:

K-Map for B0:

TRUTH TABLE: | G3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Gray Code G2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 G1 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 G0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 | B3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Binary Code B2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 |

LOGIC DIAGRAM: BCD TO EXCESS-3 CONVERTOR

K-Map for E3:

E3 = B3 + B2 (B0 + B1) K-Map for E2:

K-Map for E1:

K-Map for E0:

TRUTH TABLE: | BCD input B3 B2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 | B1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 B0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Excess 3 output G3 G2 G1 0 0 0 0 0 1 1 1 1 1 x x x x x x 0 1 1 1 1 0 0 0 0 1 x x x x x x 1 0 0 1 1 0 0 1 1 0 x x x x x x | G0 1 0 1 0 1 0 1 0 1 0 x x x x x x

LOGIC DIAGRAM: EXCESS-3 TO BCD CONVERTOR

K-Map for A:

A = X1 X2 + X3 X4 X1 K-Map for B:

K-Map for C:

K-Map for D:

TRUTH TABLE: | B3 0 0 0 0 0 1 1 1 1 1 Excess 3 Input B2 0 1 1 1 1 0 0 0 0 1 B1 1 0 0 1 1 0 0 1 1 0 B0 1 0 1 0 1 0 1 0 1 0 | BCD Output G3 0 0 0 0 0 0 0 0 1 1 G2 0 0 0 0 1 1 1 1 0 0 G1 0 0 1 1 0 0 1 1 0 0 G0 0 1 0 1 0 1 0 1 0 1 |

Result: Thus the combinational circuit for code converter using logic gates was designed, implemented and tested its performance with truth table.

DESIGN OF ADDER AND SUBTRACTOR AIM: To design and construct half adder, full adder, half subtractor and full subtractor circuits and verify the truth table using logic gates. THEORY: HALF ADDER: A logical circuit which performs the addition of two binary bits is called a half adder. A half adder has two inputs for the two bits to be added and two outputs one from the sum S and other from the carry c into the higher adder position.

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