HUMBOLDT-UNIVERSITÄT ZU BERLIN

INSTITUT FÜR INFORMATIK

Lecture 5

DATA AND INSTRUCTION FORMATS,

ADDRESSING METHODS
AND MACHINE PROGRAMMING
CONCEPTS (2)

Sommersemester 2002

Leitung: Prof. Dr. Miroslaw Malek

www.informatik.hu-berlin.de/rok/ca

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 COMPUTER PROGRAMMING CONCEPTS

• Choice of a language:
– machine language (uses 0‘s and 1‘s or hex, inconvenient and error
prone)
– assembly language (machine dependent but efficient)
– high-level language (convenient and universal)

• Compiler/assembler and operating system in combination with

computer architecture (instruction set plus I/O capabilities)
are decisive factors with respect to computer performance

• The most important advantages of knowing an assembly

langage:
– understanding how a computer really works
– learning how to debug programs
– being able to optimize the performance
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 EXAMPLE OF AN INSTRUCTION EXECUTION
4-bit operation 6-bit source 6-bit destination
field address field address field
Op-code src dstn ADD #R7, R3
15 12 11 6 5 0
General format

R3 32 R3 49

PC = R7 i PC = R7 i+4
Autoincrement mode 010 (210): EA=[PC]=[R7] and increment PC=R7

i add 2 R7 0 R3 i add 2 R7 0 R3

i+2 17 i+2 17
i+4 i+4

Before instruction fetch After instruction execution

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 EXAMPLE OF A SHORT PROGRAM EXECUTION
Main memory
address 16-bit word contents

A = 1150 317 1) R0 = 317

B = 1152 - 193
2) R0 = 124

1200 MOV 6 R7 0 R0 EA = X + PC = -54 + 1204 = 1150

1202 - 54
1204 ADD 6 R7 0 R0 MOV A, R0
1206 - 56 ADD B, R0
1208 MOV 0 R6 6 R7 MOV R0, C
1210 988 HALT
1212 HALT Assembly language version of program

Mode “6“ - Relative index

addressing
EA=X + [PC]=X + [R7 ]
C = 2200 124

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 Example of an stw (storeword) instruction execution
(Power PC)
6 bit 5 bit 5 bit
Opcode Source register Source- Offset
address A

(a) G en eral format

Autoincrement mode stw

stw rS, d(rA) , where rS (Source) and rA (Destination) are registers and d is an offset
The contents of rS are stored into the word in memory addressed by EA, where
EA=(rA)+d.
Binary representation of mnemonic stw: 100100
Decimal representation of mnemonic stw: 36

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 I/O PROGRAMMING (I)

I/O BUS

TERMINAL
Big Problem:
CPU
TTYIN TTYOUT
8 Matching
10 Op./s CIN COUT Speeds
Keyboard Monitor

e.g., 10 - 100 Characters/sec.

TTYIN 8 bit buffer register associated with a keyboard

TTYOUT 8 bit buffer register associated with a monitor
CIN, COUT control flags
CIN = 1 informs CPU that a valid character is in TTYIN
COUT= 1 informs CPU that it can transfer a valid character to TTYOUT

MOVB TTYIN, R1 input operation

MOVB R1, TTYOUT output operation
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 I/O PROGRAMMING (II)
MOV #LOC,R0 Initialize pointer register R0 to contain the address of
the first location of the area in main memory where
the characters are to be loaded.
READ: TSTB KBSTATUS Wait for a character to be entered into the keyboard
BPL READ buffer register TTYIN.
MOVB TTYIN,@R0 Transfer the character from into the main memory
(this clears CIN to 0).
ECHO-
BACK: TSTB PRSTATUS Wait for the monitor to become ready.
BPL ECHOBACK

MOVB @R0,TTYOUT Move the character just read the monitor buffer
register TTYOUT for printing (this clears COUT to
0).

CMPB (R0)+,#CR Check to see if the character just read is "carriage

BNE READ return” (CR). If it is not CR, branch back and read
HALT another character, otherwise stop. The pointer
register R0 is incremented , anticipating that another
character will be read.
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 TYPE OF ARCHITECTURES

• STACK ARCHITECTURES
• REGISTER-REGISTER ARCHITECTURES
• REGISTER-STORAGE ARCHITECTURES
• STORAGE-STORAGE ARCHITECTURES
• TAGGED ARCHITECTURES
• TRADEOFFS AMONG STACK, REGISTER AND STORAGE
ARCHITECTURES
– PERFORMANCE
– EFFICIENCY
– DESIGN COMPLEXITY
– EASE OF PROGRAMMING
– EASE OF PARAMETER PASSING AND SUBROUTINE CALLS
– RECURSION

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 A STACK IN THE MAIN MEMORY
0
Stack
.
Pointer
Register .
. Current
Ri -28 Top
17 Element
739
The Stack .
.
Bottom
43 Element
.
.
M–1

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 EXAMPLES OF STACK OPERATIONS
MOV NEWITEM,- (R1) (push)
MOV (R1)+,TOPITEM (pop)

R1 -28 R1 19 R1 17 R1 -11

17 -28 739 739

.

739 17 .
. Stack . .
. 739 . .
. . . .
. . . .

43 43 43 43

Newitem 19 Newitem 19 Newitem 19 Newitem 19

Topitem Topitem Topitem -28 Topitem

(a) Initial contents of stack (b) After push from c) After pop d) After executing
NEWITEM into TOPITEM ADD (R1)+, @R1

Notice (a) => (b), (a) => (c), (a) => (d)

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 STACK MACHINES (1)

• Most instructions manipulate the top few data items (mostly top
2) of a pushdown stack
• Additional instructions are provided to move data between
memory and top of stack
• Top few items of the stack (2 to 8 items or more) are kept in the
CPU
• Instructions manipulate the top of the stack implicitly
• Ideal for evaluating expressions (stack holds intermediate
results)
• Were thought to be a good match for high level languages
• Awkward:
– stack becomes very slow if it grows beyond CPU local storage

– no simple way to get data from ‘middle of stack‘

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 STACK MACHINES (2)
• Binary arithmetic and logic operations:

– operands: top 2 items on stack

– operands are removed from stack

– result is placed on top of stack

• Unary arithmetic and logic operations:

– operand: top item on the stack

– operand is replaced by result of operation

• Data move operations:

– push: place memory data on top of stack

– pop: move top of stack to memory

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 STACK MACHINES - SAMPLE PROGRAM
• We evaluate our favorite expression(y ← ax2+ bx+c) ; we use a
hypothetical assembly language (as usual)

push a ; tos: a
push x ; tos: a x
dup ; tos: a x x
mult ; tos: a x2
mult ; tos: a x2
push b ; tos: a x2 b
push x ; tos: a x2 b x
mult ; tos: a x2 bx
push c ; tos: a x2 bx c
add ; tos: a x2 bx+c
add ; tos: a x2+bx+c
pop y ; y <- a x2+bx+c

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 GENERAL PURPOSE REGISTER MACHINES

• With stack machines, only the top two elements of the stack are
directly available to instructions. In general purpose register
machines, the CPU storage is organized as a set of registers
which are equally available to the instructions.

• Frequently used operands are placed in registers (under

program control)

– this reduces instruction size

– also reduces memory traffic

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 GPR MACHINES - SAMPLE PROGRAM

• Again, we evaluate (y←ax2+bx+c) on a hypothetical machine with

16 registers, R0 to R15, and 2 operand register-register ALU
operations

load x, R1 ; R1 <- x
load a, R2 ; R2 <- a
load b, R3 ; R3 <- b
load c, R4 ; R4 <- c
mult R1, R2 ; R2 <- ax
mult R1, R2 ; R2 <- ax2
mult R1, R3 ; R3 <- bx
add R2, R3 ; R3 <- ax2 + bx
add R3, R4 ; R4 <- ax2 + bx + c
store R4, y ; y <- ax2 + bx + c

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 GPR MACHINES - SAMPLE MACHINES

• VAX

• IBM 360, IBM 370, PC-RT, RISC 6000

• PowerPC, MOTOROLA 68000

• CDC AND CRAY

• SPARC, MIPS, PENTIUM

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 EXAMPLE OF PROGRAM AND DATA
SEGMENT ORGANIZATION MC68000
Program
Data segment
segment Data limit (DL)
Program base
(PB)
Data
area
Program Data base (DB)
counter (PC) Stack
filled by
previous
procedures
Program Stack marker
limit (PL) Stack filled
by current
Stack pointer procedure
(SP)
Increasing
memory Empty
stack
addresses
locations
Stack limit (SL)
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 CALLING STACK (I)

Memory Calling Program Subroutine

location

200 Call_subroutine SUB SUB “first instruction”

201 “next instruction”
Branch (LINK)

The Call_subroutine instruction

places the address 201 into
memory location LINK

a) Through a dedicated location LINK

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 CALLING STACK (II)

Memory Calling Program Subroutine

location

200 Call_subroutine SUB SUB “first instruction”

201 “next instruction”
Return

The Call_subroutine instruction The return instruction

pushes the address 201 pops the top of the stack
onto the stack. into the PC.

b) Using a stack

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NESTED SUBROUTINE CALLS ON A STACK (I)

R5 old value of R5

[R6] = 1050 topvalue

.
Processorstack
.
.

a) Initially

R5 is a linkage register (stores the value of the PC).

R6 is a pointer to the processor stack.

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 NESTED SUBROUTINE CALLS ON A STACK (II)

R5 2004 R5 2006

[R6] = 1042 2254

[R6] = 1048 old value of R5
[R1] main
topvalue
[R0] main
.
old value of R5
.
topvalue
.
.
.
.

b) After execution of JSR R5, SUB1 c) After execution of JSR R7, SUB2

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 NESTED SUBROUTINE CALLS ON A STACK (III)

R5 2006 R5 2006

[R6] = 1040 [R0] sub1 [R6] = 1044 [R1] main

2254 [R0] main
[R1] main old value of R5
[R0] main topvalue
old value of R5 .
topvalue .
. .
.
.

d) After execution of MOV R0, -(R6) in SUB 2 e) After execution of RTS R7

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NESTED SUBROUTINE CALLS ON A STACK (IV)

R5 old value of R5

[R6] = 1050 topvalue

.
.
.

f) After execution of RTS R5

2006

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 NESTED SUBROUTINE CALLS ON A STACK ii
Main program …
2000 JSR R5,SUB1 Call SUB1, passing addresses PARAM and ANSWER
2004 .WORD PARAM through memory locations.
2006 .WORD ANSWER
2008 next instruction
…….
Subroutine
2200 SUB1: MOV R0,-(R6) Save [R0]main and [R1]main on the processor stack.
MOV R1,-(R6) Load parameter into R0.
MOV @(R5)+,R0
…….
MOV LOC,R1 Place a parameter into R1 and call SUB2.
2250 JSR R7,SUB2
2254 next instruction
…….
MOV RESULT,@(R5)+ Send [RESULT] as a “result“ into location
ANSWER in the main program.
MOV (R6)+,R1 Restore original contents of
MOV (R6)+,R0 registers R0 and R1
RTS R5
Subroutine
3000 SUB2: MOV R0,-(R6) Save [R0]sub1 on the processor stack.
……..
ADD R0,R1 Send a result to SUB1 through R1.
MOV (R6)+,R0 Restore R0.
RTS R7
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 EXAMPLE PROGRAM FOR THE CALCULATION OF
n FACTORIAL ON PowerPC

lbz r1, 15(r0) Load the number n from MEM[15+ r0] into register r1
clz r2
add 1 Load 1 into register r2, which holds the result
fac: cmpwi crf0, r1, 2 Compare r1 to 2; crf0 is condition register field 0, which
is the same as less than, in other words: if r1<2 the
bit in crf0 is set to 1
blt end Conditional jump to a label end, if bit in crf0 is 1
mullw r2, r1, r2 Multiply r2, by r1, the result is stored into r2
subi r1, r1, 1 Decrement r1 by 1
b fac Jump to a label fac
end: blr Branch to linkregister
The result is stored in register r2.

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