experiment 14

Goal of the experiment

To design a digitally controlled oscillators where the oscillation frequency of the output square and triangular wave forms is controlled by a binary pattern. Such systems are useful in digital PLL and in FSK generation in a MODEM.

14.2 Specifications
Design a Digitally Programmable Oscillator that can generate square and triangular waveforms with a maximum frequency of 400 Hz.

14.1 Brief theory and motivation

In Experiment 6, we used an analog multiplier in conjunction with an integrator to build a VCO. In this experiment, we will use a multiplying DAC7821 (instead of a multiplier) and an integrator to implement a digitally controlled square and triangular wave generator. See Figure 14.1 for the circuit schematic of a digitally programmable square and triangular wave generator. VOUT is the square wave output and the output of the integrator is the triangular waveform.
C 1u C1 R 1k TL082 IOUT1 TL082 IOUT2 RFB VDD VDD GND

14.3 Measurements to be taken

Implement the Digitally programmable Square and Triangular wave generator using the circuit as shown in Figure 14.1.Observe the frequency of Oscillations of system and vary it by varying bit pattern input to the DAC.

14.4 What Should you Submit

1
Simulate the circuit using any simulator and observe the frequency of oscillation of the square and triangular waveforms. See Figure 14.2 for the result of simulation. The typical simulation waveforms are of the form shown in Figure 14.3. For this simulation, we used the macro-model of MV95308 since the macro-model for the DAC is not available at the time of writing. Vary the bit pattern input to the DAC in manner specified in Table 14.1 and note down the change in the frequency of oscillations and compare the practical results with the simulation results. Plot a graph where the x-axis shows the analog equivalent of the bit pattern and the y-axis shows the frequency of oscillations. Note that the 12-bit input to the DAC is interpreted as an unsigned number.

DAC7821 VREF

TL082 R2

VOUT

R1

S.No. 1 Figure 14.1: Circuit for Digital Controlled Gain Stage Amplifier Frequency of oscillations of digital programmable oscillator is given by 2 3 4

BIT Pattern 100000000000 010000000000 001000000000 000100000000

Peak to Peak Amplitude of the output

1 $ 1 R2 $ 0 4RC b + R1 l 4096 Q = 10
n

f=

/A 2

11

Table 14.1: Varying the bit pattern input to the DAC

page 72

Analog System Lab Kit PRO

J1 + V2 0 E 1 2 A 3 4 RO 5 6 RI 7 8 GND 9 10 11 MV95308

+ V1 10V

V tri R4 1k J2 TL082 J1 R2 R1 R3 1k J2 TL082 V squ J1

5V R 1k

J2 TL082 J1

+ V3

10V

J2

Figure 14.2: Circuit for Simulation

10.00 V squ

Notes on Experiment 14:

-10.00 3.00 V tri

-3.00

0.00

25.00m

50.00m Time(s)

75.00m

100.00m

Figure 14.3: Simulation Results

14.5 Exercise Set 14

Analog System Lab Kit PRO

f = 1 $ b1 + R2 l $ 0 R1 4096 4RC Design a digitally programmable band-pass filter with Q = 10 and gain of 1 at the centre frequency.
n

/A 2

11

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experiment 13

C 1u