Advanced Power MOSFET

FEATURES
Avalanche Rugged Technology Rugged Gate Oxide Technology Lower Input Capacitance Improved Gate Charge Extended Safe Operating Area Lower Leakage Current : 25 A (Max.) @ VDS = 600V Lower RDS(ON) : 0.977 (Typ.)

SSS7N60A
BVDSS = 600 V RDS(on) = 1.2 ID = 4 A
TO-220F

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol VDSS ID IDM VGS EAS IAR EAR dv/dt PD TJ , TSTG TL Characteristic Drain-to-Source Voltage Continuous Drain Current (TC=25 C) Continuous Drain Current (TC=100 oC) Drain Current-Pulsed Gate-to-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Total Power Dissipation (TC=25 oC) Linear Derating Factor Operating Junction and Storage Temperature Range Maximum Lead Temp. for Soldering Purposes, 1/8 from case for 5-seconds
1 O
o

Value 600 4 2.5 28 + _ 30 611 4 4.8 3.0 48 0.38 - 55 to +150

Units V A A V mJ A mJ V/ns W W/ C
o

O 1 O 1 O 3 O
2

300

Thermal Resistance
Symbol R JC RJA Characteristic Junction-to-Case Junction-to-Ambient Typ. --Max. 2.6 62.5 Units
o

C/W

Rev. B

1999 Fairchild Semiconductor Corporation

SSS7N60A
Symbol BVDSS BV/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd Characteristic Drain-Source Breakdown Voltage Breakdown Voltage Temp. Coeff. Gate Threshold Voltage Gate-Source Leakage , Forward Gate-Source Leakage , Reverse Drain-to-Source Leakage Current Static Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain(Miller) Charge Min. Typ. Max. Units 600 -2.0 -----------------0.65 ------4.37 130 53 18 19 72 28 49 8.4 22.1 --4.0 100 -100 25 250 1.2 -150 62 45 50 155 65 65 --nC ns A pF V V nA

N-CHANNEL POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Test Condition VGS=0V,ID=250A See Fig 7 VDS=5V,ID=250 A VGS=30V VGS=-30V VDS=600V VDS=480V,TC=125 C VGS=10V,ID=2A VDS=50V,ID=2A
4 O 4 O
o

o V/ C ID=250 A

1150 1500

VGS=0V,VDS=25V,f =1MHz See Fig 5 VDD=300V,ID=7A, RG=9.1 See Fig 13 VDS=480V,VGS=10V, ID=7A See Fig 6 & Fig 12
4 O 5 O 4 O 5 O

Source-Drain Diode Ratings and Characteristics

Symbol IS ISM VSD trr Qrr Characteristic Continuous Source Current Pulsed-Source Current Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge
1 O

Min. Typ. Max. Units --------415 3.8 4 28 1.4 --A V ns C

Test Condition Integral reverse pn-diode in the MOSFET TJ=25oC,IS=4A,VGS=0V TJ=25oC ,IF=7A diF/dt=100A/ s
4 O

O
4

Notes ; 1 O Repetitive Rating : Pulse Width Limited by Maximum oJunction Temperature 2 L=70mH, I AS=4A, VDD=50V, R G=27 , Starting T J =25 C O 3 ISD < _120A/ s, V DD < _ 7A, di/dt < _ BVDSS , Starting T J =25 oC O _ Pulse Test : Pulse Width = 250 2% 4 s, Duty Cycle < O Essentially Independent of Operating Temperature 5 O

N-CHANNEL POWER MOSFET

Fig 1. Output Characteristics
[A]
Top : 15V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V

SSS7N60A
Fig 2. Transfer Characteristics
[A] ID , Drain Current

VGS

10

101

ID , Drain Current

150 oC

100

100 25 oC @ Notes : =0V 1. V GS 2. V = 50 V DS 3. 250 s Pulse Test 6 8 10

10-1 10-1 100

@ Notes : 1. 250 s Pulse Test 2. T = 25 oC C 101

- 55 oC 10-1

VDS , Drain-Source Voltage [V] [A]

VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current

RDS(on) , [ ] Drain-Source On-Resistance
2 . 5

Fig 4. Source-Drain Diode Forward Voltage

IDR , Reverse Drain Current

2 . 0 VGS = 10 V 1 . 5

1 01

1 . 0 VGS = 20 V 0 . 5 @N o t e : TJ = 2 5 oC 0 . 0 0 5 10 15 20 2 5 3 0

1 00

1 5 0 oC 2 5 oC 1 0-1 0 . 4 0 . 6 0 . 8

@N o t e s: 1 . VGS = 0 V 2 .2 5 0 s P u l s eT e s t 1 . 0 1 . 2

ID , Drain Current [A]

VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage

2 0 0 0 Ciss= Cgs+ C h o r t e d) gd ( C ds= s Coss= Cds+ C gd

Fig 6. Gate Charge vs. Gate-Source Voltage

[V]

[pF]

VGS , Gate-Source Voltage

Crss= Cgd 1 5 0 0 C iss

1 0

V 2 0V DS = 1 VDS = 3 0 0V VDS = 4 8 0V

Capacitance

1 0 0 0

C oss 5 0 0 C rss

@N o t e s: 1 .V GS = 0 V 2 .f=1M H z

@N o t e s : ID = 7 . 0A 0 0 1 0 2 0 3 0 4 0 5 0

00 10

1 10

VDS , Drain-Source Voltage [V]

QG , Total Gate Charge [nC]

SSS7N60A
BVDSS , (Normalized) Drain-Source Breakdown Voltage

N-CHANNEL POWER MOSFET

Fig 8. On-Resistance vs. Temperature
RDS(on) , (Normalized) Drain-Source On-Resistance
3.0

Fig 7. Breakdown Voltage vs. Temperature

1.2

2.5

1.1

2.0

1.0

1.5

1.0 @ Notes : 1. V = 10 V GS 2. I = 3.5 A D

0.9

@ Notes : =0V 1. V GS = 250 A 2. I D

0.5

0.8 -75

-50

-25

25

50

75

100

125

150

175

0.0 -75

-50

-25

25

50

75

100

125

150

175

TJ , Junction Temperature [ oC]

TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area

[A]
10
2

Fig 10. Max. Drain Current vs. Case Temperature

5

Operation in This Area is Limited by R DS(on) 10 s

[A]
100 s 1 ms

ID , Drain Current

1 10

ID , Drain Current

10 ms 100 ms
0 10

DC

10-1

@ Notes : = 25 oC 1. T C 2. T = 150 oC J 3. Single Pulse

10-2 0 10

1 10

2 10

3 10

0 25

50

75

100

125

150

VDS , Drain-Source Voltage [V]

Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5 100 0.2 0.1 0.05 10

-1

@ Notes : 1. Z J C (t)=2.6

C/W Max.

/t2 2. Duty Factor, D=t 1 3. TJ M -TC =PD M *Z J C (t)

ZJC(t) ,

0.02 0.01 single pulse 10- 2 10- 5 10- 4 10- 3 10- 2 10- 1 100 101

PDM t1 t2

t 1 , Square Wave Pulse Duration

[sec]

N-CHANNEL POWER MOSFET

Fig 12. Gate Charge Test Circuit & Waveform

SSS7N60A

Current Regulator
50K 12V 200nF 300nF

Same Type as DUT

VGS Qg
10V

VDS VGS DUT

3mA

Qgs

Qgd

R1
Current Sampling (IG) Resistor

R2
Current Sampling (ID) Resistor

Charge

Fig 13. Resistive Switching Test Circuit & Waveforms

RL Vout Vin RG DUT 10V Vin

10%

Vout VDD
( 0.5 rated VDS )

90%

td(on) t on

tr

td(off) t off

tf

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

LL VDS
Vary tp to obtain required peak ID

BVDSS 1 EAS = ---- LL IAS2 -------------------2 BVDSS -- VDD BVDSS IAS C VDD VDD
tp

ID

RG DUT 10V
tp

ID (t) VDS (t) Time

SSS7N60A

N-CHANNEL POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

+ VDS --

IS L Driver RG VGS
Same Type as DUT

VGS

VDD

dv/dt controlled by RG IS controlled by Duty Factor D

VGS ( Driver )

Gate Pulse Width D = -------------------------Gate Pulse Period

10V

IFM , Body Diode Forward Current

IS ( DUT ) IRM

di/dt

Body Diode Reverse Current

VDS ( DUT )

Body Diode Recovery dv/dt

Vf

VDD

Body Diode Forward Voltage Drop

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