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Sierra TEE
For the Xilinx Zynq-7000 EPP
Walkthrough Guide
V1.01
Sierraware
Introduction
The document describes the steps necessary to run a Sierra TEE application on the Xilinx ZC702 Evaluation Board using the Xilinx ISE Design Suite. Therefore, it is assumed that the ISE Design Suite v14.3 is already installed in your PC. The document is divided in 7 sections: Requirements Steps for installing the Sierra TEE Software Generating bit Stream Steps for creating the boot map image Steps for building the Kernel Steps for building the Sierra TEE Sierra TEE Testing
1 Requirements
Ubuntu PC Xilinx ISE Design Suite 14.3 Sierraware Software ( Sierra TEE ) Serial Terminal Program (minicom, etc.) Xilinx ZC702 Evaluation Board Rev C
3.2
Step #2
Figure 3-2 shows the Plan Ahead software main screen. The PA software will help you create a PA project that includes both hardware and software data files necessary to support the ZC702 evaluation board. Select Create New Project to open the New Project Wizard.
3.3 Step #3
Figure 3-3 shows the first screen of the new Plan Ahead project wizard. Click next to continue.
3.4 Step #4
Enter a name for your project and specify a directory where the project data files need to be stored. Keep in mind that this project will contain both hardware and software data files. Click Next to continue as shown in Figure 3-4:
Figure 3-4 PlanAhead Software: New PlanAhead Project wizard: Project name
3.5 Step #5
Select the Specify RTL Sources checkbox as shown and click Next to continue
Figure 3-5 PlanAhead Software: New PlanAhead Project wizard: Design Source
3.6 Step #6
Leave the Add Sources screen unchanged as shown in Figure 3-6 and click Next to continue:
Figure 3-6 PlanAhead Software: New PlanAhead Project wizard: Add Sources
3.7 Step #7
Leave the Add Existing IP screen unchanged as shown in Figure 3-7 and click Next to continue:
Figure 3-7 PlanAhead Software: New PlanAhead Project wizard: Add Existing IP
3.8 Step #8
Leave the Add Constraints screen unchanged as shown in Figure 3-8 and click Next to continue:
Figure 3-8 PlanAhead Software: New PlanAhead Project wizard: Add Constraints
3.9 Step #9
Select the item Boards under the Specify panel, filter by Zynq-7000 family and select the ZC702 Evaluation Board as shown in Figure 3-9. Click Next to continue:
Figure 3-9 PlanAhead Software: New PlanAhead Project wizard: Default Part
Figure 3-14 PlanAhead Software: Add Sources Add or Create Embedded Sources
Figure 3-16 PlanAhead Software: Add Sources: Add or Create Embedded Sources
Figure 3-20 Xilinx Platform Studio: BSB Wizard: Board and System Selection
Figure 3-25: PlanAhead Software: Generating the Top Level Hardware Design
Figure 3-26: PlanAhead Software: Progress report for creating Top HDL
4.2 Step #2
In Software Development kit Select Xilinx Tools -> Create Boot Image as shown in the Figure 4-2 to create a boot image.
Figure 4-2 Software Development Kit: Creating Boot map image Specification
4.3 Step #3
Create Zynq Boot Image dialog box opens as shown in the Figure 4-3:
4.4
Step #4
Using the link http://www.wiki.xilinx.com/Zynq+Base+TRD+14.3 Download the zynq_base_TRD package and then log in to your account and after extracting the zyng_base_TRD package. In the create Zynq Boot Image dialog box, add the files zynq_fsbl.elf, system.bit (or <name>.bit is created in the Generating system Bit steps), and u-boot.elf from the <trd package extracted directory>/boot_image directory and enter or browse to <trd package extracted directory>/boot_image in the output folder field as shown in the Figure 4-4. Press Create Image. This step will generate a file named under u-boot.bin, rename this to BOOT.bin at the specified location.
6.2
Step #2
New project dialog box will open and choose the option Make File Project with existing code and click Next as shown in the Figure 6-2:
Figure 6-2: Software Development Kit: Making file Project with Existing code
6.3 Step #3
Import existing code dialog box asks the path of the Project name and the location. Browse the path of the tzone_sdk from the sierra sdk installed path. In Languages unchecked the C++ option and In Tool chain for Indexer Settings choose none option and then click the finish button as shown in the Figure 4-7:
6.4
Step #4
In Project Explorer right click the tzone_sdk option and then choose properties option as shown in the Figure 6-4:
6.5 Step #5
In properties for tzone_sdk dialog box choose Environment and select Add option as shown in the Figure 6-5:
6.6 Step #6
Type the name as CROSS_COMPILE and give the path of the Tool chain For Example: <Xilinx_SDK_installed_directory>/ISE_DS/EDK/gnu/arm/lin64/arm-xilinx-linixeabi. Click ok.
Figure 4-10 Software Development Kit: Adding CROSS_COMPILE Tool chain path
6.7 Step #7
Type the name as CROSS_COMPILE_NEWLIB Note: Extract the sierraware supplied newlib toolchain. It is available in sierra/toolchain/sierranewlib.tar.bz2. Type the path of the tool chain as <sierra installed directory>/sierra/toolchain/sierra_toolcahin/arm-none-eabi.
Figure 6-7: Software Development Kit: Adding NEW_LIB Tool chain path
6.8 Step #8
In Project Explorer right click tzone_sdk and choose Build Project option as shown in the Figure 6-8:
7.2 Testing
Board setup Please refer http://wiki.xilinx.com/zynq-base-trd-14-3#toc19. From the U-Boot prompt a. Load Sierra TEE.bin to 0x3c000000.Note: prebuilt binary is available in sierra/patches/xilinx/bin directory. <u-boot> mmcinfo; fatload mmc 0 0x3c000000 SierraTEE.bin b. Jump to 0x3c000000 <u-boot> go 0x3c000000.
This will initiate the following sequence a. Run secure world OS. b. Load and run the Linux in non-secure world