40 Inventive Principles in Microelectronics

By: Gennady Retseptor gennadyr@avx.co.il 2002. Gennady Retseptor. AVX Israel Ltd. !2"2"#!20$2%. All rig&ts reserved. Bot& 'icroelectronics and (RI) e*erged independently aro+nd #0 years ago in ,estern co+ntries and t&e -or*er .//R. 'icroelectronics &as 0een already recogni1ed as one o- t&e tre*endo+s ac&ieve*ents o- XX cent+ry. (RI) &as started its proli-eration in ,estern co+ntries only in t&e last decade. 2or people 3or4ing in 'icroelectronics it *ay 0e interesting to 4no3 &o3 tec&nical sol+tions in t&eir scope are loo4ing -ro* t&e point o- vie3 o- (RI). (&is article is t&e a+t&or5s endeavor to *a4e classi-ication and s+**ari1e exa*ples o- (RI) inventive principles in 'icroelectronics. Editors note: There is some debate about whether one becomes more creative by reading examples of creative problem solving in fields other than ones own, or if, for many people, examples in ones own field are needed to get started understanding how the 40 principles work The editors experience as a T!"# teacher has been that most people need a mixture of examples from their own field and from others, so we have been very glad to publish lists of examples from many fields $%ee !eferences& Principle 1. Segmentation/Fragmentation/Division A. 6ivide an o07ect into independent parts. o Individual dies on Si (Silicon) wafer. Beam splitting. 'a4e an o07ect easy to disasse*0le. o Integrated Circuits (IC) and passive components assembly on Multi-C ip Module (MCM). !#aug ter" boards assembly on !mot er" board. Increase t&e degree o- -rag*entation or seg*entation. o Increase in number of gates per microprocessor c ip ($.%& times per year).

o o o o o o o o o o o o

Two-stage diffusion process.

B.

Multi-c ip modules assembly on !daug ter" board.

8.

Increase in number of bits per memory c ip ($.& times per year). Increase in number of inputs'outputs (I'() per c ip and pins per pac)age.

6.

Sea of *ands (S(*) - ultra- ig density pac)aging. (ransition to *icro"level. o Spray development and spray etc ing. Sub-layers wit different in erent stress at Microelectronic Mec anical Systems (M+MS). #ecrease of feature si,e (to -.-& microns and less). Molecular Beam +pita.y (MB+). /tomic *ayer #eposition (/*#). 0anometry.

Principle 2. Taking out/Separation/Removal/ !traction/Segregation A. /eparate an inter-ering part or property -ro* an o07ect9 or single o+t t&e only necessary part :or property; o- an o07ect. o Clean rooms.

o o o o o o o o o o o o o

Isolation of Copper areas at wafer fab. Separation of wafers from people. Cluster tooling. Single wafer processing. Impurities segregation at Si crystal growt (C1 process). *(C(S isolation. Barrier for Copper diffusion prevention. Ion separation at ion implantation. +tc stop layer. 2olari,ed lig t microscopy. #ie separation by grooves at C ip Scale 2ac)aging (CS2). +lectrical and visual screening. Burn-in.

Principle ". #ocal $ualit%

A.

8&ange an o07ect<s str+ct+re -ro* +ni-or* to non"+ni-or*9 c&ange an external environ*ent :or external in-l+ence; -ro* +ni-or* to non"+ni-or*. o Temperature gradient at C1 process3 epita.y3 o.idation3 diffusion.

o o o o o o
8.

2ressure gradient at C emical 4apor #eposition (C4#). Selectivity and anisotropy at wet and dry etc ing. Impurities concentration gradient at diffusion wit diverse doping profiles5 e.ponent3 power-law3 step3 grade. #epletion layer.

B.

6ield +ffect Transistor (6+T) wit arbitrary c arge distribution. 'a4e eac& part o- an o07ect -+nction in conditions *ost s+ita0le -or its operation. Single wafer processing5 C4#3 2 ysical 4apor #eposition (24#)3 dry etc ing3 etc.

'a4e eac& part o- an o07ect -+l-ill a di--erent and +se-+l -+nction. o Buried layer wit opposite impurity type.

2-n-p poc)et in n-p-n substrate at CM(S IC.

Principle 4. &s%mmetr%/S%mmetr% c'ange A. 8&ange t&e s&ape o- an o07ect -ro* sy**etrical to asy**etrical. o S+MI standard for Si wafers crystallograp ic orientation mar)ing5 7$$$83 7$$-83 7$--8.

B. 8.

o 2-n 9unction asymmetry. 8&ange t&e s&ape or properties o- an o07ect to s+it external asy**etries. o /nisotropic plasma etc ing. I- an o07ect is asy**etrical9 increase its degree o- asy**etry. o Increasing features aspect ratio.

Principle (. Merging/)om*ining/)omposition/Integration/&gglomeration A. Bring closer toget&er :or *erge; identical or si*ilar o07ects= asse*0le identical or si*ilar parts to per-or* parallel operations. o Subtracting images from neig boring dies for visual defects detection.

B.

:iga-scale System on C ip (:S(C). 'a4e operations contig+o+s or parallel= 0ring t&e* toget&er in ti*e. o Multi-beam electron writing.

o o o o o o o o o o o

Integrated circuit. Multi-c ip module. :iga-scale Integration (:SI).

;afer level clean rooms operations. ;afer level SM# termination <=>. ;afer level burn-in.

8.

;afer *evel 2ac)aging (;*2). Agglo*erate o07ects to Bi" and >oly" syste*. o Bi-layers5 Ti'Ti03 Ta'Ta0. C emical Mec anical 2olis ing (CM2). +lectroc emical Mec anical #eposition (+CM#). Mec anical3 electrical3 magnet3 plasma3 etc. fields agglomeration.

Principle +. ,niversalit%/Multi-.unctionalit% A. 'a4e a part or o07ect per-or* *+ltiple -+nctions= eli*inate t&e need -or ot&er parts. o Multi-tas) dispensing system.

B.

IC pac)age substrate multi-function5 multi-layer connection3 eat dissipation3 escaping I'( traces3 controlled impedance3 ground return. o Components pac)aging (tape and reel3 bul) feed cassette3 etc.) multi-function5 components protection3 transportation3 and presentation to pic)-and-place mac ine. .se standardi1ed -eat+res.

o o o o

Multiple targets in sputtering mac ine. +lectron beam direct writing. 0o need for mas). 2lasma C6? wit (.ygen for bot p otoresist strip and surface cleaning in one process.

o o o

International standards in Semiconductors and Microelectronics. 4isual wor)mans ip standards. Measurement3 inspection and test e@uipment calibration.

o o

Specifications for incoming3 in-process and final @uality inspection. Specifications for functional3 mec anical and environmental testing.

Principle /. 0esting/10este2 2oll1/Recess/ m*e22ing A. >lace one o07ect inside anot&er= place eac& o07ect9 in t+rn9 inside t&e ot&er.

o o o o o o o o o o o
B.

Clean rooms and clean areas multi-step nesting. 2-n-p poc)et in n-p-n substrate for CM(S IC. Buried layer. Inverse conductivity type area made by diffusion or ion implantation. Multi-layer termination structure. +lectrical tolerances nesting. +mbedded air-gap region wit in S(*. Aecessed contact pad at #-B:/ pac)aging. +mbedding of integrated passives into *ow Temperature Co-fired Ceramic (*TCC) substrate at CS2. 2ac)aging ierarc y 5 c ip - module - card - board - system. Micro-pac)aging and meso-pac)aging integration at M+MS5 die - device - system.

'a4e one part pass :dyna*ically; t&ro+g& a cavity in t&e ot&er. o M+MS micro-mac ines.

Principle 3. )ounter4eig't/&nti-4eig't/5eig't compensation/#evitation A. (o co*pensate -or t&e 3eig&t o- an o07ect9 *erge it 3it& ot&er o07ects t&at provide li-t. o *evitation of wafer by air or 0itrogen cus ion.

B.

o Transportation of ultra-t in wafer by floating. (o co*pensate -or t&e 3eig&t o- an o07ect9 *a4e it interact 3it& t&e environ*ent :e.g. +se aerodyna*ic9 &ydrodyna*ic9 0+oyancy and ot&er -orces;. o o
Capillary effects for cleaning and c emical treatment in trenc es and vias. Capillary action for solder drawing from tip to 2CB pad.

Principle 6. Preliminar% anti-action/Prior counteraction A. I- it 3ill 0e necessary to do an action 3it& 0ot& &ar*-+l and +se-+l e--ects9 t&is action s&o+ld 0e replaced 3it& anti" actions to control &ar*-+l e--ects. o Si%0? mas)ing for *(C(S.

o o o o o o o o

*(C(S mas)ing for ion implantation. Silicon o.ide and poly-silicon mas)ing for diffusion. Aesist mas)ing for lit ograp y. Buffered o.ide etc ant. 2re-cleaning before epita.y3 o.idation3 diffusion3 metalli,ation3 etc. Infra-red wafer surface drying before p otoresist coating. 2riming before polyimide or epo.y dispensing. 2CB mas)ing by tape.

Principle 10. Preliminar% action/ Prior action/Do it a2vance A. >er-or*9 0e-ore it is needed9 t&e re?+ired c&ange o- an o07ect :eit&er -+lly or partially;.

o o o o o o

Substrate cleaning. Sputter target pre-cleaning. 2 otomas) pre-cleaning. +@uipment set-up. 6unctional tests for raw materials. C emicals and bat es preparation.

o o o
B.

#ummy runs for C4#3 24#3 CM23 etc. 2re-formed solder balls for B:/. 2re-fabricated film or tape-based interposer for c ip connection to 2CB.

>re"arrange o07ects s+c& t&at t&ey can co*e into action -ro* t&e *ost convenient place and 3it&o+t losing ti*e -or t&eir delivery.

o o o

2rocess flow c art. Batc route card. Set-up time decrease by using Single Minute +.c ange of #ie (SM+#) tec ni@ues.

Principle 11. Beforehand cushioning/Cushion in advance/Beforehand compensation

A. >repare e*ergency *eans 0e-ore&and to co*pensate -or t&e relatively lo3 relia0ility o- an o07ect.

o o o o o o o o o

#esign for reliability. +lectrical circuit redundancy. #erating. Safety margins for elements dimensions and layers t ic)ness. Clean room air ioni,ation for +lectrostatic #isc arge (+S#) prevention. Scrubber for Bydrogen neutrali,ation at epita.y3 C4#3 plasma etc ing. 2assivation3 protection3 encapsulation and stress compensation layers. 2olymer collar around solder balls at B:/ to e.tend temperature cycling reliability. Burn-in3 Big ly /ccelerated Stress Screening (B/SS)3 +nvironmental Stress Screening (+SS) for sorting out marginal parts prone to failure at infant mortality period.

Principle 12. $uipotentialit%/Remove Tension A. In a potential -ield9 li*it position c&anges :e.g. c&ange operating conditions to eli*inate t&e need to raise or lo3er o07ects in a gravity -ield;.

o o o

Tunnel effect devices. Step smoot ing5 local planari,ation3 2 osp orus Silicate :lass (2S:) melting3 laser ablation. +S# elimination by providing continuous disc arge pat s.

Principle 1". Inversion/Reverse/7T'e ot'er 4a% roun21 A. Invert t&e action:s; +sed to solve t&e pro0le* :e.g. instead o- cooling an o07ect9 &eat it;. o #ar) field microscopy. Substractive vs additive lit ograp y. 'a4e *ova0le parts :or t&e external environ*ent; -ixed9 and -ixed parts *ova0le. o +lectron motion interpretation by ! ole" motion. (+rn t&e o07ect :or process; @+pside do3n5. o M(S structure inversion.

o o

2ositive p otoresist vs negative p otoresist.

B. 8.

o o

*ift-off lit ograp y. Stress-6ree 2olis ing (S62) as reverse process to +lectroc emical #eposition (+C#).

Principle 14. Sp'eroi2alit%/Sp'ericit%/)urvilinearit% A. Instead o- +sing rectilinear parts9 s+r-aces9 or -or*s9 +se c+rvilinear ones= *ove -ro* -lat s+r-aces to sp&erical ones= -ro* parts s&aped as a c+0e :parallelepiped; to 0all"s&aped str+ct+res.

o o o o o

Circular Si wafer. ;afer edge rounding to prevent c ipping. Step smoot ing to prevent contact disruption. Aounded element features. Copper deposition in rings at partial electroplating.

B.

Cylinder and dis) button pac)ages. .se rollers9 0alls9 spirals9 do*es.

o o o o o o o

Micro-via drilling. C and S terminal s apes. Ball :rid /rray (B:/). (ctagonal window for solder ball.

Cylinder c amber wit dome lid. Spiral bawl at tape-and-reel mac ine.

8.

Go -ro* linear to rotary *otion :or vise versa;. o Aotary motion at c emical treatment3 drying3 development3 etc ing.

6.

Aotary s@ueegee3 paste rolling. .se centri-+gal -orces. o Spin-on resist dispensing.

o o o o o o o o

Bat li@uid circulation. Aotary or planetary motion at 24#3 C4#3 CM23 ion implantation. Spin-+tc ing 2lanari,ation (S+2).

Spin-on polyimide coating. Spin-(n :lass (S(:). Spin-(n #ielectric (S(#). Spin-on sol-gel coating.

Principle 1(. D%namics/D%namicit%/D%nami8ation/9ptimi8ation A. Allo3 :or design; t&e c&aracteristics o- an o07ect9 external environ*ent9 or process to c&ange to 0e opti*al or to -ind an opti*al operating condition.

B.

/d9ustable coating3 plating3 C4#3 24# deposition rate. 6ivide an o07ect into parts capa0le o- *ove*ent relative to eac& ot&er.

o o o o

/d9ustable lit ograp y e.posure3 development and etc ing time.

M+MS micro-mac ines. M+MS variable capacitors.

8.

I- an o07ect :or process; is rigid or in-lexi0le9 *a4e it *ova0le or adaptive. o Aotary motion of ingot for better convection at C1 process.

o o o o

/gitation at development3 etc ing3 stripping3 electroplating. *inear3 rotary or planetary motion of wafers at C4#3 24#3 CM23 etc.

6.

D-a.is no,,le scanning3 E-a.is wafer scanning at scan-coating tec nology. Increase degree o- -ree *otion. Fltrasonic agitation at cleaning and plating.

Principle 1+. Partial or e!cessive actions/ !cess or s'ortage A. I- $00 percent o- an o07ect is &ard to ac&ieve +sing a given sol+tion *et&od t&en9 0y +sing <slig&tly less< or <slig&tly *ore< o- t&e sa*e *et&od9 t&e pro0le* *ay 0e considera0ly easier to solve.

o o o o o o

+.cessive spin-on coated material removal by centrifugal forces. +.tended etc time to compensate for non-uniform layer t ic)ness. +.cessive 2 osp orus removal by 2S: boiling. +.cessive resistor area removal by laser trimming. +.cessive screen printed paste removal by s@ueegee. Safety margins for electrical parameters.

Principle 1/. &not'er 2imension/)'ange 2imension/Moving to a ne4 2imension A. 'ove an o07ect in t3o" or t&ree"di*ensional space.

B.

%# M+MS. .se a *+lti"story arrange*ent o- o07ects instead o- a single"story arrange*ent. o Multi-layer resist.

o o o o o o o o o o o o o

G# arrays for flip c ip terminal ports (2:/3 B:/3 *:/3 C:/3 etc.). G# bar-code data matri. on components and 2CB. Aedistribution of ports at ;*2 from perip eral to array arrangement. %# p otolit ograp y. %# microscope. %# D-ray board test system.

Multi-story IC structure. Build-up Multi-layer (BFM) micro-via pac)aging substrate. Multi-layer flip-c ip pac)age. Stac)ed flip-c ip pac)age. Multi-story MCM structure.

8. 6.

Multi-layer 2CB. (ilt or re"orient t&e o07ect9 lay it on its side. o SM# G-port components wit reverse (long side) termination (-%-=3 -&-H3 -=$G). .se <anot&er side< o- a given area. o #ouble-sided mas) aligner.

#ouble-sided !mot er" 2CB assembly.

Principle 13. Mec'anical vi*ration/9scillation A. 8a+se an o07ect to oscillate or vi0rate.

B.

Aandom vibration testing. Increase its -re?+ency :even +p to t&e +ltrasonic;. o Fltrasonic cleaning. Fltrasonic and t ermo-sonic bonding. .se an o07ect<s resonant -re?+ency. o Microwave drying for water residues removal.

o o o o

/gitation by s a)ing.

Fltrasonic electroless plating.

8.

6. A.

o Iuart, resonator for coating t ic)ness measurement. .se pie1oelectric vi0rators instead o- *ec&anical ones. o 2ie,oelectric vibrators at spray development and etc ing. .se co*0ined +ltrasonic and electro*agnetic -ield oscillations.

Principle 16. Perio2ic action A. Instead o- contin+o+s action9 +se periodic or p+lsating actions.

B.

2eriodical reliability testing. I- an action is already periodic9 c&ange t&e periodic *agnit+de or -re?+ency. o Single wafer processing at C4#3 24#3 CM23 dry etc ing3 etc. 2ulsed laser cutting. .se pa+ses 0et3een i*p+lses to per-or* a di--erent action. o SM+# tec ni@ues for set-up during process p ase.

o o o o o o o o

Batc manufacture. Multiple process runs. Impulses at voltage sorting. Temperature s oc) cycling. 2eriodical in-process control (analysis3 inspection3 testing).

Step-and-repeat pro9ection lit ograp y.

8.

Principle 20. )ontinuit% o. use.ul action/Stea2% use.ul action A. 8arry on 3or4 contin+o+sly= *a4e all parts o- an o07ect 3or4 at -+ll load9 all t&e ti*e.

B.

o Seven days a wee)3 G? ours a day processing at wafer fab. Ali*inate all idle or inter*ittent actions or 3or4. o Streamline bot internal and e.ternal setups to reduce total set-up time (SM+#). o
;afer level clean room processes.

o o o

;afer level SM# termination <=>. ;afer level burn-in. ;afer level pac)aging.

Principle 21. Skipping/ Rus'ing t'roug'/:urr%ing A. 8ond+ct a process9 or certain stages :e.g. destr+cti0le9 &ar*-+l or &a1ardo+s operations; at &ig& speed.

o o

6las 24# for ultra-t in metalli,ation layers. 2ositive p otoresist development time - t e smaller t e better.

Principle 22. 7;lessing in 2isguise1/7Turn lemons into lemona2e1/)onvert 'arm into *ene.it/Turn minus into plus A. .se &ar*-+l -actors :partic+larly9 &ar*-+l e--ects o- t&e environ*ent or s+rro+ndings; to ac&ieve a positive e--ect

B. 8.

/valanc e effect semiconductor devices. Ali*inate t&e pri*ary &ar*-+l action 0y adding it to anot&er &ar*-+l action to resolve t&e pro0le*. o Buffering anti-corrosive solution. A*pli-y a &ar*-+l -actor to s+c& a degree t&at it is no longer &ar*-+l.

o o

Controllable undercut.

Burn-in3 Big ly /ccelerated Stress Screening (B/SS)3 +nvironmental Stress Screening (+SS) for sorting out marginal parts prone to failure at infant mortality period.

Principle 2". Fee2*ack A. Introd+ce -eed0ac4 :re-erring 0ac49 cross"c&ec4ing; to i*prove a process or action.

B.

6ailure Mode and +ffect /nalysis (6M+/)3 6ault Tree /nalysis (6T/). I- -eed0ac4 is already +sed9 c&ange its *agnit+de or in-l+ence. o In-line wafer measurements using test structures.

o o o o o o o

+nd-point detection at CM23 dry etc ing. T ermostat for optimal temperature stabili,ation. Test run for process parameters ad9ustment. 6irst article inspection. In-process3 final and periodical @uality inspection and testing. Statistical 2rocess Control (S2C).

Principle 24. Interme2iar%/Me2iator/Insertion A. .se an inter*ediary carrier article or inter*ediary process

o o o o o o o o o o
B.

/d esion layer of Ti3 Ta3 Cr. Barrier layer of Ti;3 Ti03 Ta03 Si03 ;G0. /d esion promoter for coating and bonding. 2rimer for polyimide or epo.y dispensing. *(C(S mas)ing for ion implantation. Silicon o.ide and poly-silicon mas)ing for diffusion. Compliant polymer layer for reducing stress under solder ball. C ip underfill process to compensate t ermally induced strains. Interposer for c ip connection to 2CB. 6ootprint conversion adapter for fine pitc (-G-$3 B:/) SM# components.

'erge one o07ect te*porarily 3it& anot&er :3&ic& can 0e easily re*oved;. o Aesists for p oto-3 deep F43 e.treme F43 D-ray and e-beam lit ograp y.

o o

2 otomas). Si%0? mas)ing for *(C(S.

o o o

Temporary wafer carriers. Sacrificial layer removal to leave cavity at M+MS micro-mac ining. 6illing recess wit temporary material3 depositing movable c arge plate and wet etc ing of filler at M+MS variable capacitors.

Principle 2(. Sel.-service/Sel.-organi8ation A. 'a4e an o07ect serve itsel- 0y per-or*ing a+xiliary &elp-+l -+nctions. 'se self(performed actions.

o o o o o o o
B.

;afer self-mas)ing by Si o.idation. /uto-doping. Impurities segregation on materials or p ases border. :ate self-alignment in M(S transistors. Self-Ioni,ed 2lasma (SI2) directional 24#. +tc -stop layer. Self-assembly of micro-scale parts at M+MS.

.se 3aste reso+rces9 energy9 or s+0stances. o #eioni,ed water (#I) water recycling system.

Fse of scrapped wafers and c ips for dummy runs and e.periments.

Principle 2+. )op%ing A. Instead o- an +navaila0le9 expensive9 -ragile o07ect9 +se si*pler and inexpensive copies

B.

Test structures. Replace an o07ect9 or process 3it& optical copies. o 2 otomas).

o o o o o o o o o o o o o o o o o o o o o o o o

!Boles" movement model. 4irtual prototyping. IC design and comple. process modeling. #ummy wafers and components.

2ro9ection lit ograp y. (ptical comparator for component dimensions measurement. Image processing for components visual sorting. 2attern recognition for oriented pac)aging. Color scanner /utomated (ptical Inspection (/(I).

8.

4ideo system for pic)-and-place. I- visi0le optical copies are already +sed9 *ove to in-rared or +ltraviolet copies. o F4 lig t for p otoresist or polyimide e.posure. #eep F4 and +.treme F4 (+F4) lit ograp y. #eep F4 reflectometry. Infrared interferometry. Infrared spectroscopic ellipsometry. *aser ellipsometry. (ptoacoustics. 2olari,ed lig t microscope. 2 otoluminescence. Spectrop otometry. Scatterometry. D-ray fluorescence (DA6). D-ray diffraction (DA#). D-ray 2CB test system.

Principle 2/. )'eap s'ort-living o*<ects/)'eap 2isposa*les A. Replace an expensive o07ect 3it& a *+ltiple o- inexpensive o07ects9 co*prising certain ?+alities :s+c& as service li-e9 -or instance;.

o o o o

Single-time usage face mas)3 gloves3 and s oes cover for clean room. #ummy wafers and components. Test 2CB cards. 2lastic or cartoon bo.3 vial3 bag3 cassette3 tape for product andling3 storage and transportation.

Principle 23. Mec'anics su*stitution/Replacement o. mec'anical s%stem/Re2esigning/Replace mec'anical s%stem 4it' .iel2s A. Replace a *ec&anical *eans 3it& a sensory :optical9 aco+stic9 taste or s*ell; *eans

o o o
B.

+nd-point detection at CM2 and dry etc ing by optical reflection. (ptical comparator for component dimensions measurement. Bar coding3 G# matri. data coding.

.se electric9 *agnetic and electro*agnetic -ields to interact 3it& t&e o07ect. Replace *ec&anical devices 3it& p&ysical -ields.

o o
8.

+lectrop oretic resist coating. +nd-point detection met ods at CM2 and dry etc ing5 plasma impedance measurement3 byproducts emission spectrometry3 +ddy current.

8&ange -ro* static to *ova0le -ields9 -ro* +nstr+ct+red -ields to t&ose &aving str+ct+re. o Microwave 5 plasma3 cleaning3 drying3 curing.

6.

- Aadiation for M(S and BM(S transistors t res old control. .se -ields in con7+nction 3it& -ield"activated :e.g. -erro*agnetic; particles. o Magnetic field at ion separation and sputtering.

o o o o o o o o o o o o o o o o o

+.B plasma drift directional 24#. :low c arge dry etc ing. 4acuum arc deposition. +lectron beam direct writing lit ograp y. Scanning electron microscopy. *aser 5 ellipsometry3 annealing3 scribing3 trimming. *aser direct writing C4#. 2ulsed laser cutting for M+MS. D-ray 5 lit ograp y3 fluorescence3 diffraction.

2oint-cusp magnetic 24#. 2lasma 5 C4#3 descum3 anodic o.idation3 sputter etc ing3 spraying. Ion beam 5 24#3 lit ograp y3 milling3 sputtering3 implantation. Aeactive ion etc ing. Ioni,ed directional 24#. +lectron gun for MB+. +lectron Cyclotron Aesonance (+CA) plasma 24#.

Principle 26. Pneumatics an2 '%2raulics/Flui2 s%stem A. .se gas and li?+id parts o- an o07ect instead o- solid parts :e.g. in-lata0le9 -illed 3it& li?+ids9 air c+s&ion9 &ydrostatic9 &ydro"reactive;. o *aminar air flow at clean rooms and oods.

o o o o o o o o o o

/ir s ower. Cascade #I water. #I water or bat li@uid turbulence by 0itrogen bubbles. 4acuum c uc) for wafer olding. /ir or 0itrogen cus ion for touc -less wafer andling and transportation. Transportation of ultra-t in wafer by floating. 0itrogen gun for drying. Beating or cooling fan. 4acuum degassing. 4acuum pic)-and-place.

Principle "0. Fle!i*le s'ells an2 t'in .ilms/Fle!i*le mem*ranes A. .se -lexi0le s&ells and t&in -il*s instead o- t&ree di*ensional str+ct+res.

B.

T in-film epita.y3 o.idation3 poly-silicon3 metalli,ation and ot er layers at planar Si wafer. Isolate t&e o07ect -ro* t&e external environ*ent +sing -lexi0le s&ells and t&in -il*s. o T in-film passivation3 protection3 encapsulation and stress compensation layers.

o o o o o

T in-film dielectrics.

/ir gap wit polymer encapsulation as cus ion at S(*. 2lastic bags. Cover tape for tape-and-reel.

Principle "1. Porous materials A. 'a4e an o07ect poro+s or add poro+s ele*ents :inserts9 coatings9 etc.;.

B.

2orous umidity consumption materials. I- an o07ect is already poro+s9 +se t&e pores to introd+ce a +se-+l s+0stance or -+nction. o Capillary effects for cleaning and c emical treatment in vias and trenc es.

o o o o o o o o o o

Multi-step air filtration at clean rooms. Multipore filters for #I water. 2olypropilen and carbon filters for c emicals. 2orous c uc) for wafer olding. 2orous tampon for mar)ing. Metal web bas)ets3 barrels3 sieves. 2arylene3 Silicon :el3 2olymer overlay for die surface passivation.

Metal web for screen printing of solder paste. Capillary action for solder drawing from tip to 2CB pad.

Principle "2. )olor c'ange/9ptical properties c'ange A. 8&ange t&e color o- an o07ect or its external environ*ent.

B.

2olari,ed lig t microscope. 8&ange t&e transparency o- an o07ect or its external environ*ent. o /nti-reflection coating.

o o o o o o o o o o o o

Eellow lig t in p otolit ograp y room. Illumination sc eme for optical microscopy. Color scanner /(I. Colors addition-subtraction at image processing.

(bscure-transparent pattern at p otomas). 6iducials3 insignia3 mar)ing for multi-layer alignment. Transparent cover glass substrate at CS2 for CM(S image sensor.

8.

Transparent tape-and-reel cover tape. In order to i*prove o0serva0ility o- t&ings t&at are di--ic+lt to see9 +se colored additives or l+*inescent ele*ents. o 2 otoluminescence t in-film measurement. *uminescent mar)ing. 6luorescent molecules at *ig t +mission #iode (*+#) display. :old sputtering for S+M.

Principle "". :omogeneit% A. 'a4e o07ects interacting 3it& a given o07ect o- t&e sa*e *aterial :or *aterial 3it& identical properties;. o Silicon wafer polis ing by colloid mi.ture wit Si(G particles.

o o

/lumina substrate grinding by colloid mi.ture wit /lG(% sand. Silicon rubber for Si die isolation.

Principle "4. Discar2ing an2 recovering/Re<ection an2 regeneration A. 'a4e portions o- an o07ect t&at &ave -+l-illed t&eir -+nctions go a3ay :discard 0y dissolving9 evaporating9 etc.; or *odi-y t&ese directly d+ring operation. o Aesist strip.

o o o

S%0? temporary mas) removal. *(C(S temporary mas) removal. T ic) wafer bac)side grinding after processing3 andling and transportation at clean room operations.

B.

2CB mas)ing tape removal. 8onversely9 restore cons+*a0le parts o- an o07ect directly in operation. o #I water recycling system.

o o o

Temporary wafer carrier discarding.

Self-s arpening cutting blades.

Principle "(. Parameter c'ange/)'anging properties/Trans.ormation o. p'%sical an2 c'emical states A. 8&ange an o07ect<s p&ysical state :e.g. to a gas9 li?+id9 or solid;.

o o o o o

*i@uid - solid transformation of resist3 polyimide3 coating layers. *i@uid (.ygen3 0itrogen.

B.

Solid diffusion sources. 8&ange t&e concentration or consistency. .se r&eological li?+ids o +.posure to dilute Silane for Silicide passivation. +ncapsulation glue. Screen printable paste. 8&ange t&e degree o- -lexi0ility. o #amping of vibration for precise e@uipment.

8.

o
6. A.

/ir gap wit polymer encapsulation as cus ion at S(*.

8&ange t&e te*perat+re. o #ecreased process temperature by use of plasma at 2+C4#. 8&ange t&e press+re. o *ow pressure C4#.

o o o o

4acuum at 24#3 ion implantation3 dry etc ing. Big pressure C4#. Big pressure o.idation. 4ariable /rgon pressure at sputtering for sub-layer stress control (M+MS).

Principle "+. P'ase transitions/,se o. p'ase c'anges A. .se p&eno*ena occ+rring d+ring p&ase transitions :e.g. vol+*e c&anges9 loss or a0sorption o- &eat9 etc.;.

o o

*i@uid - solid p ase transition at C1 process. :as - solid3 li@uid - gas - solid and solid - gas - solid p ase transition at o.idation3 epita.y3 C4#3 24#3 diffusion3 ion implantation.

Principle "/. T'ermal e!pansion A. B. .se t&er*al expansion :or contraction; o- *aterials. o T ermal e.pansion drive at variable M+MS capacitors. I- t&er*al expansion is 0eing +sed9 +se *+ltiple *aterials 3it& di--erent coe--icients o- t&er*al expansion. o *eaf spring t ermostat.

Bi-metallic sensor.

Principle "3. Strong o!i2ants/ nric'e2 atmosp'ere/&ccelerate2 o!i2ation A. Replace co**on air 3it& oxygen"enric&ed air. o Si o.idation by wet (.ygen.

B. 8. 6.

o #iffusion en ancement by wet (.ygen. Replace enric&ed air 3it& p+re oxygen. o Si o.idation by ig pressure dry (.ygen. Axpose air or oxygen to ioni1ing radiation. .se ioni1ed oxygen. o (.ygen plasma descum.
2lasma as ing (C6? wit (.ygen) for p otoresist removal. Replace o1oni1ed :or ioni1ed; oxygen 3it& o1one. o F4-(,one dry cleaning.

o o o

/nodic arc plasma o.idation.

A.

(,one at reactive ion etc ing.

Principle "6. Inert environment/Inert atmosp'ere A. Replace a nor*al environ*ent 3it& an inert one. o Clean rooms.

B.

Bermetically closed plastic bags. Add ne+tral parts9 or inert additives to an o07ect. o /rgon at magnetron sputtering.

o o o o o o o o o

#eioni,ed water. Teflon 9igs and cassettes. #esiccators. 0itrogen turbulence of rinsing water. 0itrogen drying gun. 0itrogen atmosp ere at p otoresist e.posure. 0itrogen atmosp ere at polyimide e.posure3 drying3 curing. /rgon or 0itrogen atmosp ere for wafer storage.

Principle 40. )omposite materials A. 8&ange -ro* +ni-or* to co*posite :*+ltiple; *aterials. o Silicon-on-Insulator (S(I).

o o o o o o o o
Re.erences $.

Silicon-on-Sapp ire (S(S). Binary metalli,ation alloys. Inorganic resist - polymer bi-level sc eme lit ograp y. Silicon (.ynitride composite dielectric. Sol-gel dielectrics. M(S3 BM(S3 CM(S structures. Compound semiconductors. Betero-structures.

2. F.

6o*09 A.9 @B0 Inventive >rinciples ,it& Axa*ples59 (RI) Co+rnal9 C+ly $ !. /ee also: B+siness Axa*ples: (&e (RI) Co+rnal9 /epte*0er $ /ocial Axa*ples: (&e (RI) Co+rnal9 C+ne 200$ Arc&itect+re Axa*ples: (&e (RI) Co+rnal9 C+ly 200$ 2ood (ec&nology Axa*ples: (&e (RI) Co+rnal9 Dcto0er 200$ /o-t3are 6evelop*ent Axa*ples: (&e (RI) Co+rnal9 /epte*0er and Eove*0er9 200$ /1e9 /.'.9 @VL/I (ec&nology59 Bell La0oratories9 Inc. Ee3 Cersey9 $ %F. @/e*icond+ctor International5: 333.e"insite.netGse*icond+ctor. @Alectronic >ac4aging H >rod+ction >ro-essionals5: 333.e"insite.netGepp. @Alectronic 8o*ponents Ee3sI: 333.e"insite.netGecn*ag. ./ J9$BB9#B!9 2000. 'iniat+re s+r-ace *o+nt capacitor and *et&od o- *a4ing sa*e.

4. 5.
J.

&*out t'e aut'or= :ennady Aetseptor received ':/c; degree 3it& &onors -ro* 'osco3 /teel and Alloys .niversity9 /e*icond+ctor 'aterials and 6evices 2ac+lty in $ !2 and &as 2! years experience in 'icroelectronics9 incl+ding $J years in .//R :/e*icond+ctors; and $$ years in Israel :Alectronic >assive 8o*ponents;. Ke &as t3o .//R patents and one ./ patent :re-erence LJM;. Gennady Retseptor is c+rrently N+ality Ass+rance 'anager o- AVX Israel Ltd9 -acility o- AVX 8orporation.