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RDS(on) 60 m (*)
IOUT 6 A (*)
VCC 36 V (*)
10
DC SHORT CIRCUIT CURRENT: 6A I CMOS COMPATIBLE INPUTS I PROPORTIONAL LOAD CURRENT SENSE I UNDERVOLTAGE AND OVERVOLTAGE SHUT-DOWN I OVERVOLTAGE CLAMP I THERMAL SHUT-DOWN I CURRENT LIMITATION I VERY LOW STAND-BY POWER DISSIPATION
I
PowerSO-10 VND830ASP VND830ASP13TR side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). This device has two channels in high side configuration; each channel has an analog sense output on which the sensing current is proportional (according to a known ratio) to the corresponding load current. Built-in thermal shut-down and outputs current limitation protect the chip from over temperature and short circuit. Device turns off in case of ground pin disconnection.
PROTECTION AGAINST: LOSS OF GROUND AND LOSS OF VCC I REVERSE BATTERY PROTECTION (**)
I
DESCRIPTION The VND830ASP is a monolithic device made using STMicroelectronics VIPower M0-3 technology. It is intended for driving any kind of load with one BLOCK DIAGRAM
VCC
OUTPUT 1
PwCLAMP 2
Ot1
OVERTEMP. 1 OVERTEMP. 2
Ot2
CURRENT SENSE 2
November 2003
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VND830ASP
ABSOLUTE MAXIMUM RATING
Symbol VCC -VCC -IGND IOUT IR IIN VCSENSE Parameter DC Supply Voltage Reverse Supply Voltage DC Reverse Ground Pin Current Output Current Reverse Output Current Input Current Current Sense Maximum Voltage Electrostatic Discharge (Human Body Model: R=1.5; C=100pF) - INPUT VESD - CURRENT SENSE - OUTPUT - VCC Maximum Switching Energy (L=1.8mH; RL=0; Vbat=13.5V; Tjstart=150C; IL=9A) Power Dissipation at TC=25C Junction Operating Temperature Case Operating Temperature Storage Temperature 4000 2000 5000 5000 100 74 Internally Limited - 40 to 150 - 55 to 150 V V V V mJ W C C C Value 41 - 0.3 - 200 Internally Limited -6 +/- 10 -3 +15 Unit V V mA A A mA V V
6 7 8 9 10 11 VCC
5 4 3 2 1
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VND830ASP
THERMAL DATA
Symbol Rthj-case Rthj-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Value 1.2 51.2 (*) Unit C/W C/W
(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35m thick). Horizontal mounting and no artificial air flow
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40C< Tj <150C, unless otherwise specified) (Per each channel) POWER OUTPUT
Symbol VCC VUSD VOV RON Vclamp Parameter Operating Supply Voltage Undervoltage Shut-down Overvoltage Shut-down On State Resistance Clamp voltage Test Conditions Min 5.5 3 36 Typ 13 4 Max 36 5.5 60 41 48 12 12 120 55 40 25 7 50 0 5 3 Unit V V V m m V A A mA A A A A
IOUT =2A; Tj=25C IOUT =2A; Tj=150C ICC=20 mA (see note 1) Off State; VCC=13V; VIN=VOUT=0V Off State; VCC=13V; VIN=VOUT=0V; Tj =25C On State; VIN=5V; VCC=13V; IOUT=0A; RSENSE=3.9K VIN=VOUT=0V; VCC=36V; Tj=125C VIN=0V; VOUT=3.5V VIN=VOUT=0V; VCC=13V; Tj =125C VIN=VOUT=0V; VCC=13V; Tj =25C
IS
Supply Current
Off State Output Current Off State Output Current Off State Output Current Off State Output Current
0 -75
V/s
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VND830ASP
ELECTRICAL CHARACTERISTICS (continued) VCC - OUTPUT DIODE
Symbol VF Parameter Forward on Voltage Test Conditions -IOUT=2A; Tj=150C Min Typ Max 0.6 Unit V
PROTECTIONS
Symbol Ilim TTSD TR THYST Vdemag VON Parameter Current limitation Vcc=13V Test Conditions Min 6 Typ 9 Max 15 15 150 175 200 Unit A A C C C V mV
5.5V<Vcc<36V Thermal shut-down temperature Thermal reset temperature Thermal hysteresis Turn-off output voltage clamp IOUT=2A; VIN=0V; L=6mH Output voltage drop limitation IOUT=10mA
IOUT/I SENSE
IOUT/I SENSE
ISENSE
Analog Sense Leakage Cur- Tj=-40C...150C rent VIN=5V; IOUT=0A; VSENSE=0V; Max Analog Sense Output Voltage Sense Voltage in Overtemperature conditions Tj=-40C...150C VCC=5.5V; IOUT1,2=1.3A; RSENSE=10k VCC>8V, IOUT1,2=2.5A; RSENSE=10k VCC=13V; RSENSE=3.9k
VSENSE VSENSEH
Analog Sense Output RVSENSEH Impedance in Overtemperature Condition Current sense delay tDSENSE response
Note 2: current sense signal delay after positive input slope. Note: Sense pin doesnt have to be left floating.
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VND830ASP
TRUTH TABLE (per channel)
CONDITIONS Normal operation Overtemperature Undervoltage Overvoltage INPUT L H L H L H L H L H H L H L OUTPUT L H L L L L L L L L L H H L SENSE 0 Nominal 0 VSENSEH 0 0 0 0 0 (Tj<TTSD) 0 (Tj>TTSD) VSENSEH 0 < Nominal 0
I C C C C C C
IV C C C C C E
CONTENTS All functions of the device are performed as designed after exposure to disturbance. One or more functions of the device is not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device.
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VND830ASP
Figure 1: IOUT/ISENSE versus IOUT
Iout/Isense
2250
2000
1750
1500
1250
1000
750
Iout (A)
INPUT
tDSENSE
t td(off)
td(on)
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VND830ASP
Figure 3: Waveforms
NORMAL OPERATION INPUTn LOAD CURRENTn SENSEn UNDERVOLTAGE VCC INPUTn LOAD CURRENTn SENSEn OVERVOLTAGE
VOV VUSD VUSDhyst
<Nominal
<Nominal
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VND830ASP
APPLICATION SCHEMATIC
+5V
Rprot INPUT1
VCC
Dld
Rprot Rprot
OUTPUT1
Rprot
RSENSE1
RSENSE2
VGND
RGND
DGND
NETWORK
AGAINST
Solution 1: Resistor in the ground line (RGND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor. 1) RGND 600mV / IS(on)max. 2) RGND (VCC) / (-IGND) where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the devices datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)2/RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSDs. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input thresholds and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT line is also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT pin is to leave it unconnected, while unused SENSE pin has to be connected to Ground pin.
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VND830ASP
C I/Os PROTECTION:
If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/Os pins to latch-up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os. -VCCpeak/Ilatchup Rprot (VOHC-VIH-VGND) / IIHmax Calculation example: For VCCpeak= - 100V and Ilatchup 20mA; VOHC 4.5V 5k Rprot 65k. Recommended Rprot value is 10k.
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VND830ASP
Off State Output Current
IL(off1) (uA)
8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 150 175
Vin=3.25V
4 3.5 3 2.5 2 1.5 1 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Iin=1mA
7.6 7.4 7.2 7 6.8 6.6
Vcc=13V
3.2 3 2.8 2.6 2.4
Tc (C)
Tc (C)
Vcc=13V
2.2
Vcc=13V
1.3 1.2
Tc (C)
Tc (C)
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VND830ASP
Overvoltage Shutdown
Vov (V)
50 47.5 45 42.5 40 37.5 35 32.5 30 -50 -25 0 25 50 75 100 125 150 175
ILIM Vs Tcase
Ilim (A)
20 17.5
Vcc=13V
15 12.5 10 7.5 5 2.5 0 -50 -25 0 25 50 75 100 125 150 175
Tc (C)
Tc (C)
Vcc=13V Rl=6.5Ohm
Vcc=13V Rl=6.5Ohm
Tc (C)
Tc (C)
Tc=150C
80
Iout=5A
70 60 50
Tc=25C
40
Tc= -40C
Tc (C)
Vcc (V)
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VND830ASP
Maximum turn off current versus load inductance
10
A B C
1 0.1 1 L(mH)
A = Single Pulse at TJstart=150C B= Repetitive pulse at TJstart=100C C= Repetitive Pulse at TJstart=125C Conditions: VCC=13.5V Values are generated with RL=0 In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. VIN, IL Demagnetization Demagnetization Demagnetization
10
100
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VND830ASP
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35m, Copper areas: from minimum pad lay-out to 8cm2).
RTHj_amb (C/W)
55
Tj-Tamb=50C
50 45 40 35 30
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
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VND830ASP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
100
0.5 cm2 6 cm2
10
Z TH = R TH + Z THtp ( 1 )
where
= tp T
0.5 0.15 0.8 0.7 0.8 12 37 0.0006 2.10E-03 0.013 0.3 0.75 3 6
Thermal Parameter
Tj_1
Pd1 C1 C2 C1 C2 C3 C4 C5 C6
R1
R2
R3
R4
R5
R6
Tj_2
R1 Pd2
R2
T_amb
Area/island (cm2) R1 (C/W) R2 (C/W) R3( C/W) R4 (C/W) R5 (C/W) R6 (C/W) C1 (W.s/C) C2 (W.s/C) C3 (W.s/C) C4 (W.s/C) C5 (W.s/C) C6 (W.s/C)
22
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VND830ASP
mm. MIN. 3.35 3.4 0.00 0.40 0.37 0.35 0.23 9.40 7.40 9.30 7.20 7.30 5.90 5.90 1.27 1.25 1.20 13.80 13.85 0.50 1.20 0.80 0 2 1.80 1.10 8 8 0.047 0.031 0 2 1.35 1.40 14.40 14.35 0.049 0.047 0.543 0.545 TYP MAX. 3.65 3.6 0.10 0.60 0.53 0.55 0.32 9.60 7.60 9.50 7.60 7.50 6.10 6.30 MIN. 0.132 0.134 0.000 0.016 0.014 0.013 0.009 0.370 0.291 0.366 0.283 0.287 0.232 0.232
inch TYP. MAX. 0.144 0.142 0.004 0.024 0.021 0.022 0.0126 0.378 0.300 0.374 300 0.295 0.240 0.248 0.050 0.053 0.055 0.567 0.565 0.002 0.070 0.043 8 8
0.10 A B
10
E2
E4
SEATING PLANE e
0.25
DETAIL "A"
C D = D1 = = = SEATING PLANE
A F A1
A1
L DETAIL "A"
P095A
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VND830ASP
PowerSO-10 SUGGESTED PAD LAYOUT
14.6 - 14.9
B
10.8- 11 6.30
A A
9.5
All dimensions are in mm. Base Q.ty Bulk Q.ty Tube length ( 0.5) Casablanca Muar 50 50 1000 1000 532 532 A B C ( 0.1) 0.8 0.8
REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 24 4 24 1.5 1.5 11.5 6.5 2
End
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
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VND830ASP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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