HYBRID ARQ

Presented by:
Ajna Aslam
1

CONTENTS
ii. iii. iv.

Introduction
About basic ARQ Introducing Hybrid ARQ

Hybrid ARQ

Types of Hybrid ARQ

Type-I Hybrid ARQ Type-II Hybrid ARQ

v. vi. vii.

Co parison of Type-I ! Type-II sc"e es App#ications Conc#usion References

INTRODUCTION
About Basic ARQ
Hybrid ARQ

An error contro# trans ission %ses ac&no'#edg

et"od for data

ents and ti

eouts

Ac&no'#edg ent( )essage sent by t"e receiver to t"e trans itter to indicate t"at it "as correct#y received a data fra e or pac&et

INTRODUCTION

CONTINUED

Ti eout( A reasonab#e point in ti e after t"e sender sends t"e fra e+pac&et ,ra e+pac&et re-trans itted if ac&no'#edge ent not received before ti eout -rror-Detection.-D/ bits are added to t"e data to be trans itted

Hybrid ARQ

INTRODUCTION

CONTINUED

Hybrid ARQ

INTRODUCTION

CONTINUED

Introducing Hybrid ARQ

Hybrid ARQ

2ariation of t"e ARQ error contro# et"od ,or'ard--rror-Correction.,-C/ bits added to t"e e3isting -rror-Detection .-D/ bits 4erfor s better t"an ordinary ARQ in poor signa# conditions

INTRODUCTION

CONTINUED

6o'er t"roug"put in good signa# conditions 7or&s better be#o' certain cross-points Above t"ese cross-points8 basic ARQ is better

Hybrid ARQ

TYPES O HY!RID ARQ

T"ere are vi:.8
iii.Type-I

ain#y t'o types of Hybrid ARQ

Hybrid ARQ

Hybrid ARQ iv.Type-II Hybrid ARQ

TYPE"I HY!RID ARQ

,-C sc"e e used is capab#e of si u#taneous#y detecting and correcting t"e error

<

Hybrid ARQ

TYPE"I HY!RID ARQ CONTINUED

Decoder detects t"e error8 if any T"e detected error is corrected by t"e decoder 4ac&ets re-trans errors occur itted if uncorrectab#e

Hybrid ARQ

1=

TYPE"I HY!RID ARQ

CONTINUED

Re-trans itted code corrected for errors by t"e receiver 4ac&ets re-trans itted if furt"er uncorrectab#e errors occur 4rocess continues ti## t"e code'ord is successfu##y decoded

Hybrid ARQ

11

TYPE"I HY!RID ARQ

CONTINUED

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Hybrid ARQ

AD#ANTA$ES O TYPE"I SCHE%E

Hybrid ARQ

Advantageous at "ig" c"anne# error rates 4rovides "ig"er t"roug"put t"an basic ARQ sc"e e

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DISAD#ANTA$ES O TYPE"I SCHE%E

6o'er t"roug"put at #o' c"anne# error rates

Hybrid ARQ

Receiver ust be ab#e to detect and correct t"e received erroneous pac&ets )ore robust coding t"an si p#e ARQ

Increases t"e over"ead for eac" trans ission

10

TYPE"II HY!RID ARQ

,irst trans itted pac&et need not contain parity bits for error correction >ubse?uent re-trans issions contains t"e parity for error correction Referred to as Incremental Redundancy @n#y parity bits for error detection appended to t"e essage at first
11
Hybrid ARQ

TYPE"II HY!RID ARQ

CONTINUED

Detected error in t"e received 'ords if any8 is stored in receiver buffer

Hybrid ARQ

Re-trans ission re?uest is sent to t"e trans itter Re-trans ission is not t"e origina# code'ord but on#y a b#oc& of parity bits

Re-trans ission 'it" parity bits used to correct t"e previous erroneous#y received 15 code'ord

TYPE"II HY!RID ARQ

CONTINUED

Re-trans ission re?uest sent if trans ission fai#s Trans itter re-trans its t"e origina# code'ord or anot"er parity b#oc& 4rocess continues unti# origina# code'ord is successfu##y decoded

Hybrid ARQ

19

TYPE"II HY!RID ARQ

CONTINUED

1;

Hybrid ARQ

CO%PARISON O TYPE"I & TYPE"II SCHE%ES

Ty'e"I s()eme
Discards erroneous#y received code 'ord

Ty'e"II s()eme
>tores erroneous#y received code 'ord @pti a##y co bine 'it" re-trans itted code 'ord -3p#oits Incre enta# Redundancy concept >yste adapts to varying c"anne# conditions 6arger buffer si:e re?uired t"an Type-I8 but is very efficient
1<
Hybrid ARQ

Re-trans its unti# pac&et is correct#y received or unti# t"e pre-set nu ber of re-trans issions is ac"ieved

> a## buffer si:e re?uired8 but an inefficient sc"e e

APP*ICATIONS

%sed in H>D4A and H>%4A

t"ey

Hybrid ARQ

provide "ig" speed data trans ission on do'n#in& and up#in& for obi#e p"one net'or&s

%sed in

obi#e 7i)AA -vo#ution

$=

%sed in *B44 6ong Ter

CONC*USION

Hybrid ARQ sc"e es can adapt to c"anne# c"anging conditions and t"us avoid t"e need for very co p#e3 coding tec"ni?ues T"ey can ac"ieve very "ig" efficiency as t"ey use redundancy bits on#y '"en needed

Hybrid ARQ

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RE ERENCES

>o#Canin -.8 Hybrid ARQ in 7ire#ess Det'or&s8 presented at 7ire#ess >yste 6ab >e inar8 Te3as A!) %niversity8 Apri# $==*8 and DI)AC> 7or&s"op on Det'or& Infor ation T"eory8 )arc" $==*. R.A.Co roe and D.E.Coste##o. FARQ sc"e es for data trans ission in obi#e radio syste sF. I--- E. >e#ect. Areas Co un.8 $(09$-0;18 Eu#y 1<;0. B. Davida and >. Reddy. F,or'ard -rror Correction 'it" Decision ,eedbac&F8 Infor ation and Contro#8 2o# $18 1<9$.

Hybrid ARQ

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Hybrid ARQ