ECE1371 Advanced Analog Circuits Lecture 11

SWITCHING REGULATORS
Richard Schreier richard.schreier@analog.com Trevor Caldwell trevor.caldwell@utoronto.ca Many thanks to Jonathan Audy for the material from his 2008 ISSCC Tutorial on Power Management and to Prof. Aleks Prodic for his many helpful comments.

Course Goals
Deepen understanding of CMOS analog circuit design through a top-down study of a modern analog system
The lectures will focus on Delta-Sigma ADCs, but you may do your project on another analog system.

Develop circuit insight through brief peeks at some nifty little circuits
The circuit world is lled with many little gems that every competent designer ought to know.

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Date 2008-01-14 RS 2 2008-01-21 RS 3 2008-01-28 TC 4 2008-02-04 2008-02-11 RS 5 2008-02-18 2008-02-25 RS 6 2008-03-03 TC 7 2008-03-10 TC 8 2008-03-17 TC 9 2008-03-24 TC 10 2008-03-31 RS 11 2008-04-07 2008-04-14 TC 12

Lecture Example Design: Part 1 Example Design: Part 2 Pipeline and SAR ADCs ISSCC No Lecture Advanced Comparator & Flash ADC SC Circuits Amplier Design Amplier Design Noise in SC Circuits Switching Regulator

Ref S&T 2-3, A J&M 14 J&M 11, 13

Homework Matlab MOD2 Q-level sim Pipeline DNL

2008-01-07 RS 1 Introduction: MOD1 & MOD2

S&T 9.1, J&M 10 Switch-level sim

S&T 4, 6.6, 9.4, B Toolbox; Proj. J&M 7 J&M 10

Reading Week No Lecture

S&T C

Project Presentation Matching & MM-Shaping Project Report

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NLCOTD: High-Side Current Sensing

Vlarge
(100V)

Rsmall
(~ 0.1) + Vi Vsmall
(5V)

Vo=10Vi

Iload

(1mA-1A)

Want to amplify a small differential voltage which has a large common-mode component
The common-mode component is large because we dont want (or cant have) a resistor in the low-side (ground) path.
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NLCOTD: H-Bridge Application

1 2 2 1

The sense resistor is switched between the supply and ground, so it is not possible to sense the load current without also sensing a large common-mode component
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NLCOTD: Differential Amplier?

10k 100k

Vi

V o = 10 V i

10k 110V

100k
VCM = 100V

0V

Amplier sees high CM voltage CM current + resistor mismatch offset

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Highlights
(i.e. What you will learn today)
1 Basic Buck and Boost Topologies 2 Design Considerations 3 Inverting Buck-Boost, SEPIC and uk Topologies 4 Basic Control Strategies

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Review: A Switched Inductor

When a constant voltage is applied across an inductor, the current ramps up with a constant slope
At least until the core starts to saturate.

t=0

i (t ) =

V ---- dt L

Vt i (t ) = -----L

V t i = ---------L

t
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Review: Opening the Switch

t=0L i (t ) I i (t ) R i (0) = I v (t )

L = --R t

v (t ) t IR
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Inductor voltage goes negative

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The Power Converter Problem

Li-Ion Battery (3-4V) Power Converter Load (1V5%)

Battery voltage usually does not equal the desired load voltage
Often there are many loads and many voltage requirements. Even the voltage requirements of a single load can vary with time, e.g. a CPU or DSP with power-saving.

Battery voltage changes as the battery is charged/discharged

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Features & Specications

1 2 3 4 5 6 7 8 9 Input/Output Voltages and Currents Efciency Voltage ripple Line/load regulation; source/sink capability Dynamics: response to line/load step; overshoot Over-current and over-voltage protection Under-voltage lockout; thermal shutdown Soft startup; adjustability Frequency synchronization

Plus absolute reliability if a power converter behaves badly for even 1s, the entire system may be destroyed
When in comes to power, mistakes can be forever.
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Linear Regulator
Vi Ii Big FET Vref Vo Io

Just a high-power voltage follower Vo < Vi

The dropout voltage is the minimum V i V o required for proper regulator operation. PMOS FET used to make a low-dropout (LDO) reg.

Inefcient
E.g. if V i = 4 V and V o = 1 V , then max = 25% .
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Switching Regulator Buck Conguration

L C Energy is transferred from the battery to the inductor, capacitor and load when the switch is up Energy stored in the inductor is transferred to the capacitor and load when the switch is down + Ideally, energy is not dissipated in the regulator
Typically, > 90 % .
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Buck Waveforms Ideal

Vi iL I t1 vC V t
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i L( t )

v C (t )

Vo I I
V i V o I = t 1 ------------------ L Vo = t 2 ------- L V = Q C V o(1 D ) = -------------------------8 LC f 2
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t2

t V

Buck Formulae
V o = D V i , where D t 1 ( t 1 + t 2 ) is the duty cycle Ripple current is I 2 = ( t 2 V out ) ( 2 L )
Up to 40% of peak Io

Example: Vi = 4 V, Vo = 1 V, T = 1 s D = V o V i = 0.25 t 1 = 0.25 s, t 2 = 0.75 s Want Io = 1 A, and say I = 0.75 A t 2 V out 0.75 s 1 V - = 1 H L = ----------------- = --------------------------------0.75 A I Want V = 20 mV V o(1 D ) 1 V 0.75 C = -------------------------= ------------------------------------------------------------------------ = 5 F 2 2 8 1 H ( 1 MHz ) 20 mV 8 Lf V
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Boost Conguration
I Vi iL I t1 vC V t
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i L(t )

v C (t )

Vo Io I

V i I = t 1 ---- L V o V i = t 2 ------------------ L Vi V o = ------------1D V = t 1 I o C

t2

t V

Vi I o 1 ------ V o = --------------------------fC

Boost Converter with Diode

(Old-fashioned)

SPDT switch implemented by a FET and a diode

Diode automatically turns on when FET turns off. Schottky diode minimizes losses.

Can do the same in a Buck converter, but the efciency hit is usually unacceptable because Vfwd is a signicant compared to Vout Synchronous rectication is usually preferred
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Multi-Output Boost

Use a single inductor to provide multiple outputs

Tricky control problema good research topic!

Can do both buck and boost with more switches

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Inverting Buck/Boost
Vi iL I t1 vC Vo
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i L(t )

v C (t )

Vo Io I

V i I = t 1 ---- L Vo = t 2 ------- L Vo D ------- = ------------Vi 1D V = t 1 I o C

t2

t t V

Io = -----------------------------Vi fC 1 + ------ V o
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Loss Mechanisms
Switch on-resistance
10 m to 1 .

Switch capacitance
Cgs: 100 pF to 1 nF; Cd: 20 to 200 pF. Limit switching frequency to limit this loss.

Inductor resistance
5 m to 0.5 .

Capacitor resistance
Equivalent Series Resistance (ESR) Low ESR: 100 m for C = 10 F Ultra-low ESR: 10 m for C = 10 F
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Effect of ESR on Voltage Ripple

Vi iL I t1 vC V V V = ESR I I = 1 A, ESR = 100 m t V = 100 mV
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ESR

v C (t )

I t2 t

Multi-Phase Buck Converter

n synchronized switches drive n inductors in an interleaved manner + Reduces ripple voltage

Can achieve V ~ 10mV when driving 100A!
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Example Multi-phase Converter

1.5 V 60 A 3 for AMD Processor

http://upload.wikimedia.org/wikipedia/commons/b/bb/CPU_supply.jpg ECE1371 11-23

Improved Topologies
SEPIC: Single-Ended Primary Inductor Converter

+ Input current is continuous

Cuk:

+ Input and output currents are continuous Output voltage is negative

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SEPIC Operation
Vi V1 V2 Vo

V1 V1 = Vi V2 V2 = 0
1 D V o ------------ D
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Vi ------------1D

VL1 = VL2 means that they can share the same core.

t
Vo

V 1 = V 2 Vi 1 D ------------- = V o 1 + ------------ 1D D

D V o = V i ------------ 1 D
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http://www.national.com/an/AN/AN-1484.pdf

Cuk Operation
Vi V1 V2 Vo

V1 V1 = Vi V2 V2 = Vo
Vo ------D
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Vi ------------1D

VL1 = VL2 means that they can share the same core.

t t

V 1 = V 2 Vi Vo ------------- = ------1D D

D V o = V i ------------ 1 D
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Load Removal
Buck Converter
Vi I V

If the load current drops to zero, the inductors energy is dumped into the capacitor and the output voltage goes up 1 1 2 1 - C V 2 = -- C ( V + V )2 -- LI + -2 2 2 LI 2 LI 2 V --------------- ~ 10% for our ex. ------- = -----------+11 2 2 V 2C V CV Need to increase C to make V acceptable
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Exceptional Case Discontinuous Conduction Mode

Switching Regulators are about 20% basic concept, and 80% xes to problems with the basic concept [Audy, 2008 ISSCC] Discontinuous Conduction Mode (DCM) occurs in a diode-based switcher if the inductor current goes to zero
DCM does not occur if a diode is not used to make the switch, unless a zero-crossing detection circuit is added to the synchronous rectier

DCM improves at low Io

But since DCM dynamics differ from CCM dynamics, fancier control algorithms are needed.
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DCM in a Buck Converter

Vi i L( t ) iL iL = Io
iL hits zero if I = 2 I o t 2V o (1 D )V o ------------ = -------------------------- = 2I o L fL (1 D )D V i (V o V i )(1 V o V i )V i I o = -----------------------------= -------------------------------------------------------------2 fL 2 fL
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Io t1 t2

Vo

V o = DV i

Vo I = t 2 ------- L

Io

CCM DCM

Vi -------8 fL
1

0.5

Vo ------Vi
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DCM in a Buck Converter (contd)

iL t1
T = 1f

t2 t
I = ( V i V o ) t 1 L = ( V o t 2 ) L

iL = Io

t1 + t2 I = ---------------- ----- T 2

t1 - = D = ---T

2 f LV o I o ------------------------------V i (V i V o ) fV i ( V i V o ) 2 ) --------------------------------2 LV o

D now depends on lots of parameters

I o, min = ( t 1, min
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DCM in a Boost Converter

I Vi i L(t ) Io Vi V o = ------------1D I o = I (1 D )

iL I

t1

t2
V i I = t 1 ---- L

iL hits zero if I = 2 I

t 1V i DV i 2I o ----------- = ---------- = 2 I = ------------L fL 1D (1 D )D V i (V i V o )(1 V i V o )V i = -------------------------------------------------------------I o = -----------------------------2 fL 2 fL

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Io

CCM DCM

Vi -------8 fL
1

0.5

Vi ------Vo
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Control Strategies
[Audy 2008]
The control problem involves deciding when to open/close the switch

Control Strategy Want to achieve a specic Vo

Except if load current is too great, or if the input voltage is too low, or

SMPS control is a fertile research area

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Hysteretic Ripple Voltage Regulator

Vo

Vref
comparator with hysteresis

If V o < V ref , turn on the switch and keep it on until V o > V ref + V hyst + Simple; fast; stable Behavior depends on ESR: ill-controlled dynamics & excess ripple; Nothing limits ton
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Constant ton Hysteretic Regulator

Vo one-shot
Vref

ton is xed Need to add circuitry to ensure minimum toff

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Constant-Frequency Voltage-Mode
Vi Vo
S Q R

Voltage-toDuty-Cycle Vx Converter

Vref Integrator

+ Frequency is well-controlled (xed) Duty cycle is regulated to achieve desired Vo Loop is slow to respond to Vi changes
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Effectively a triple integration: Vi iL Vo Vx

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Other Control Schemes Ripple Current Control

In a Buck converter, regulating inductor ripple current D tracks Vi & Vo changes automatically Vi t iL + Fast! Still need a slow voltage loop to get desired Vo
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t
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Valley Current Control

Buck converter; Constant toff
Vi t Adjust ton to achieve target valley current

iL

toff

toff t

Average current control is automatic

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Digital Control
Controlling the switch with digital logic offers many advantages in exibility, programmability and adaptability, not to mention ease of design! Vi Vo

DSP

ADC

ADC only needs a few bits of resolution DSP needs a digitally-controlled delay in order to set the on/off times with ne resolution
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NLCOTD: High-Voltage Differential Amplier

R 90R

Resistive attenuator

+ Amplier sees low voltages Resistor trimming needed for low error
AD8206 uses resistors trimmed to 0.01% to get CMRR > 80 dB
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NLCOTD: Current-Sense Amplier

+ Very low CM current less sensitive to mismatch

AD8210 achieves CMRR ~ 100 dB

High-voltage amplier needed

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9R

What You Learned Today

1 Basic Buck and Boost Topologies 2 Design Considerations 3 Inverting Buck-Boost, SEPIC and uk Topologies 4 Basic Control Strategies

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