Material to Review for ECE352 Final Exam Spring 2004

Chapter 1: Digital Computers and Information (Omit 1-6) Number systems, base conversions, arithmetic operation, binary codes, decimal codes, parity bits, Gray codes, arithmetic operations Chapter 2: Combinational Logic Circuits Binary logic, logic gates, Boolean algebra, algebraic manipulations, complements of functions, sum of minterms, product of maxterms, standard forms (sum of products, product of sums), Karnaugh maps, systematic Boolean simplification using Karnaugh maps, don't cares, more systematic Boolean simplification examples, multiple-level circuit optimization, other gate types, exclusive-OR operator and gates, high-impedance outputs Chapter 3: Combinational Logic Design Design concepts and automation, digital design space, design procedure technology mapping, verification, programmable implementation technologies. Chapter 4: Combinational Functions and Circuits (Omit pages 168-176, and 4-7) Combinational circuits, rudimentary logic functions, decoders, encoders, multiplexors and demultiplexers, combinational function implementations, Verilog representations of combinational circuits Chapter 5: Arithmetic Functions and Circuits (Omit 5-7) Adders (half & full adders), ripple-carry adders, carry-lookahead adders), subtraction, complements, signed representations, signed arithmetic, overflow, binary multipliers, other arithmetic operations, Verilog behavioral descriptions of arithmetic circuits. Chapter 6: Sequential Circuits (Omit 6-7) Introduction to sequential circuits, latches, flip-flops, flip-flop timing, sequential circuit analysis, Mealy and Moore machines, state tables, state diagrams, sequential circuit timing, simulation. sequential circuit design, finding state diagrams and state tables, designing with D flip-flops and unused states, other flipflop types, Verilog representations for sequential circuits. Chapter 7: Registers, register transfers, microoperations, shift registers, ripple counters, synchronous binary counters, other counters, register cell design, mux-based and bus-based transfers, three-state buffers, serial transfers and microoperations, Verilog representations for shift registers and counters Chapter 8: Sequencing and Control (Omit 8-5 and 8-7) Control units, algorithmic state machines (ASMs) and ASM charts, binary multiplication, hardwired control, Verilog representations of the binary multiplier Chapter 9: Memory Basics Memory definitions, random-access memory (RAM), memory timing, static RAM (SRAM) integrated circuits, arrays of SRAM ICs, Dynamic RAM (DRAM), DRAM types, Arrays of DRAM ICs. Chapter 10: Computer Design Basics (Omit 10-9 and 10-10) Datapaths, ALU, shifter, datapath representation, datapath operations, control word, simple instruction computer, instruction set architecture, instruction formats, single cycle computers.

Supplement 1: More Optimizations Prime implicant selection algorithm, tabular methods, Supplement 2: Decimal Arithmetic Decimal arithmetic, BCD adder Supplement 3: Asynchronous Sequential Circuit Concepts Combinational circuit hazards and their prevention, synchronization, synchronous circuit pitfalls Homework Assignments: 1-9 Available from: http://courses.engr.wisc.edu/ecow/get/ece/352/michaelsch/homework/ Quizzes 1-4: Available from: http://courses.engr.wisc.edu/ecow/get/ece/352/michaelsch/exams Old Quizzes and Finals: Available from: http://courses.engr.wisc.edu/ecow/get/ece/352/1saluja/old-exams/ http://courses.engr.wisc.edu/ecow/get/ece/352/1saluja/quizesande/ Note: Some problems may not be appropriate for the material we covered this semester. Quiz and Final Exam Practice Problems: http://courses.engr.wisc.edu/ecow/get/ece/352/michaelsch/discussion/ Material from Course Lectures Design Knowledge Gained from Projects 1 and 2 Note: You are expected to be able understand Verilog code that is similar to the code presented in the book, lectures, or homework. However, you will not be asked to write Verilog code.