Buck - Converters For Portable Application

Magnetic Buck Converters for
Portable Applications
Frank De Stasi
Mathew Jacob
1
Outline
1. Why use Switching Regulators?

2. Common Device/Converter Specifications
3. Buck Converter Analysis
4. CCM/DCM modes
5. Selection of L and C
6. Synchronous Buck Converters
7. Conduction and Switching Losses
8. Efficiency improvement using PWM/PFM/LDO modes
9. Control Approaches
10. Current Mode Models and Compensation Guidelines
11. Transient Measurement Techniques
12. Layout Guidelines
© 2003 National Semiconductor Corporation

Efficiency
Ig Io
Power
supply +
µP/DSP
Vg + Vo core
–
_
output DC power Po Vo I o
η= = =
input DC power Pg Vg I g

Linear voltage regulator as
power supply
Series pass transistor
Iload
Q
+ Load
Vg + C Vo
–
+
Bandgap
- Vref
reference
• Simple, low noise, small footprint area

• Output voltage lower than the battery voltage
• High efficiency only if Vo is close to Vg
4

Linear regulator power model
Ig Rs Io
+
Vg + Vo
–
Bias current
IQ
–
I g = Io + IQ
Vo I o Vo I o
Efficiency: ?= =
Vg I g Vg ( I o + I Q )
Vo
Linear regulator efficiency cannot be greater ?<
than the ratio of the output and the input voltage Vg
5

SMPS efficiency as a function
of load
100
90
80 Buck regulator Example:

70
• Vg = 3.6 V
• Vo = 1.5 V
Efficiency [%]
60
50
• 0 < Io < 300 mA
40
.
30
Linear regulator
20
10
0
0.1 1 10 100 1000
Io [mA]

Buck (step-down) switching
power converter
Low-pass LC
Ig
1 filter L Io
+ +
2
Vg + vs (t) C v(t)
– Load
– –
vs(t)
Vg
fs = 1/Ts =
DTs D' Ts switching
0 frequency
0 DTs Ts t
Switch
D = switch
position: 1 2 1 duty cycle
7

Buck converter ideal static
characteristic
vs(t)
Vg
area = 〈vs〉 = DVg

DTsVg
0
0 DTs Ts t
V
Conversion ratio:
Vg
Vo
=D
Vg
0
0 1 D
8
switch duty cycle © 2003 National Semiconductor Corporation
Switch-Mode Power Supplies
• Step-up, step-down and inverting configurations

available
• Switching converters are ideally 100% efficient
• Real efficiency can be close to 100%; depends on
operating conditions and implementation
– Losses and efficiency will be discussed
• Converters generate switching noise
• Discrete filter components (L, C) are required
• Higher switching frequency => smaller L, C
– Component selection will be discussed
• Duty cycle is the control variable
• Closed-loop output voltage control is usually applied
– Dynamic models and control will be discussed

Impact of efficiency: a system
example
uP/DSP core mode Stand-by Wait Run1 Run2 FullRun

% of time in this mode 90.0 4.0 3.0 2.5 0.5
Load current Io [mA] 0.1 1.0 10.0 100.0 300.0
Linear regulator Efficiency [%] 34.7 40.9 41.6 41.7 41.7

Battery current Ig [mA] 0.12 1.02 10.02 100.02 300.02
Average Ig in this mode [mA] 0.11 0.04 0.30 2.50 1.50
Total linear reg average Ig [mA] 4.45
SMPS Efficiency [%] 29.1 78.4 93.7 93.0 87.7

Battery current Ig [mA] 0.14 0.53 4.45 44.82 142.60
Average Ig in this mode [mA] 0.13 0.02 0.13 1.12 0.71
Total SMPS average Ig [mA] 2.12
Example:
• Vg = 3.6 V
• Vo = 1.5 V
• 0 < Io < 300 mA
10

Advantages of using SMPS
over Linear regulators
• SMPS results in significantly lower average battery current
• High efficiency over a wide range of loads and output

voltages is achieved with a SMPS
• SMPS with low quiescent current modes provide longer

battery life for mobile systems that spend most of their
time in “stand-by”
11

Buck regulators in the system
Battery Charger
Power distribution: Vg = 2.8-5.5 V
PS PS PS Buck SMPS PS
regulators
3.6 V 2.5 V
1.5 V 1-3.6 V Antenna
Display
µP/DSP D/A PA
core LO
PS Audio
A/D LNA
2.7-5.5 V I/O
Baseband digital Analog/RF
Interface
2.5 V 2.5 V 2.5 V
PS PS PS
Buck regulators are often used as switch-mode power supplies for

baseband digital core and the RF power amplifier (PA)
12

Device/Converter
Specifications
• Static voltage regulation

– DC output voltage precision, i.e., % variation with
respect to the nominal value over:
• input voltage range (“line regulation”)
• output load range (“load regulation”)
• temperature
• Dynamic voltage regulation
– “Load transient response,” including peak output
voltage variation and settling time for a step load
transient
– “Line transient response,” including output voltage
variation and settling time for a step input voltage
transient
13

Device/Converter
Specifications
• Overvoltage protection
– prevents the output voltage from rising above a
specified limit
• Undervoltage shutdown
– turns the device off if the input (battery) voltage
drops below a specified threshold
• Current limiting (overload protection)
– limits the load current
• Thermal shutdown
– turns the device off if the temperature exceeds a
specified threshold
14

Device/Converter
Specifications
• Frequency synchronization
– allows synchronization of the switching
frequency to an external system clock
• Soft start
– controlled output voltage increase during start-
up
• Shut-down and operating-mode control
– enables a system controller to shut-down the
device, or to select an operating
mode(PWM,PFM,LDO)
• Adjustment of the output voltage using
– a resistive voltage divider,
– external analog control voltage, or
– digital (pin-select) control
15

Buck converter analysis
iL (t) L
1
+ vL (t) – +
iC(t)
2
Vg + C R v(t)
–
iL(t) L L
+ vL(t) – + + v L(t) – +
iC(t) iC(t)
Vg + C R v(t) Vg + iL(t) C R v(t)

– –
– –
Switch in position 1 Switch in position 2

16

Switch in position 1
iL (t) L
Inductor voltage: + vL(t) – +
iC(t)
vL = Vg − v(t ) Vg + C R v(t)
–
Small-ripple approximation:
–
vL ≈ Vg − V
diL
Knowing the voltage, we can solve for the current from: vL = L
dt
diL vL Vg − V
Solve for the slope: = ≈
dt L L
Therefore, the inductor current increases in time with an essentially
constant slope.
17

Switch in position 2
L
Inductor voltage: + vL (t) – +
iC(t)
vL = −v (t ) Vg + iL (t) C R v(t)
–
Small-ripple approximation:
–
vL ≈ −V
diL
Knowing the voltage, we can solve for the current from: vL = L
dt
diL vL V
Solve for the slope: = ≈−
dt L L
Therefore, the inductor current decreases in time with an essentially
constant slope.
18

Inductor voltage and current
waveforms
vL(t) Vg – V
DTs D'Ts
t
–V
Switch
position: 1 2 1
iL(t)
iL(DTs)
I ∆iL
iL(0)
0 DTs Ts t
19

Average voltage across
the inductor equals zero
vL(t)
Vg – V Total area λ
DTs t
–V
Ts
1
vL = ∫
Ts 0
vL dt = D (Vg − V ) + (1 − D )(−V ) = 0
V = DVg
The DC output voltage is directly proportional to the

input voltage and the switch duty cycle
20

Average inductor current
equals the output current
iL (t) L IO
1
+ vL(t) – +
i C(t)
2
Vg + C R v(t)
–
v (t ) V
iC (t ) = iL (t ) − ≈ iL (t ) − = iL (t ) − I o
R R
We know that the average capacitor current equals zero
Ts
1
iC = ∫ iC dt = iL − I o = 0 iL = I o
Ts 0
In steady state, the average inductor current equals the load current
21

Light-load operation: CCM and DCM
iL (t )
high I o
without
zero cross
detect low I o
t
Inductor current
reverses polarity
at light loads
iL (t )
with high I o
zero cross
detect
low I o
t
Inductor current drops to zero before the end of the
cycle: “Discontinuous conduction mode” (DCM)
22

Implementing Zero-cross
detect
S1 iL(t) L Io
+ vL(t) – +
iC(t)
Vg +
– C v(t)
S2
S2 is turned
OFF
S2
control
logic
S2
• With the zero-crossing comparator the switch S2 operates as a

diode, resulting in DCM and improved efficiency at light loads
• All switchers in the LM26XX family have this feature
23

CCM vs. DCM
• In DCM, the inductor current is always positive

• At light loads, in DCM, the duty cycle is significantly
lower than in CCM
• CCM operation at light loads is undesirable because
the reversal of the inductor current polarity
contributes to conduction losses, while it does not
contribute to the output load current
• With a diode rectifier, DCM operation occurs
automatically because of the diode characteristic
• With a synchronous rectifier, DCM operation at light
loads can be accomplished by turning off the NMOS
switch at the zero-crossing of the inductor current
24

DCM/CCM boundary
• Boundary between constant-frequency CCM and

constant-frequency DCM depends on the circuit
parameters and the load
• At the CCM/DCM boundary the inductor current ripple
equals the output load current:
Vg − V V
I o = ∆iL = = ICCM / DCM
2 Lf s Vg
• If Io > ICCM/DCM, the buck converter operates in CCM
• If Io < ICCM/DCM, the buck converter operates in DCM
25

Static characteristic in DCM
V D2 2 VL fs I o
= D=
Vg D 2 + 2 Lf s I o Vg (Vg − V )
Vg
• As the load Io in DCM decreases, the duty cycle D
must decrease to keep the output V in regulation
• Minimum possible on-time tp,min of the PMOS limits
the minimum load current Io,min in constant-
frequency PWM mode for which the output stays in
regulation: If the output load current is reduced
beyond Io,min the output voltage will start to rise and
over voltage protection will activate.
Vg − V Vg
I o ,min = t 2p ,min f s
V 2L
26

Determination of the inductor
current ripple magnitude
iL(t)
iL(DTs)
I ∆iL
iL(0)
0 DTs Ts t
Vg − V
(change in iL) = (slope)x(length of subinterval) 2∆iL = DTs
L
Current ripple magnitude Basic inductance selection eq.
Vg − V Vg − V
∆iL = D L= D
2 Lf s 2∆iL f s
27

Output capacitor voltage
ripple
1 Ts q = C ( 2∆v )
q = ∆iL
iC(t)
Total charge
q 2 2
∆iL
∆i Lt
0
T /2
s
( 2 ∆v ) ≈ (neglecting esr)
DTs D'T s
4Cf s
∆iL
vC(t) ( 2 ∆v ) ≈ [2D − 1 + 8ResrCf s ]
V
∆v 4Cf s
∆v (including esr)
t
The peak to peak output voltage ripple is the larger of the two values in the
equations above.The equations can be used as capacitance selection
equations if a target peak to peak output voltage ripple is known.
28

Practice problem: selection of
L and C
• LM2612 is used to generate the output voltage of V =

1.5V at the max. DC output current of Io = 300 mA
• The input voltage is between Vg = 2.8V and Vg = 5.5V
• Select L and C so that:
– the worst-case peak current ripple is ∆iL = 120
mA, and
– the worst-case peak-to-peak output voltage ripple
is 2∆v = 5 mV
29

Inductor selection
Vg − V Vg − V V V 1 V
L= D= = 1 − 
2∆iL f s 2∆iL f s Vg 2∆iL f s  Vg 
• LM2612 datasheet:
Switching frequency is between fsmin = 468 kHz and fsmax = 732 kHz
V 1  
L≥ 1 − V  = 9.7 µH
2∆iL f s min  V 
 g max 
A 10µH inductor is chosen in the datasheet
30

Output filter capacitor
selection
1 ∆iL
C=
4 f s ( 2 ∆v )
1 ∆iL max
C≥ = 12.8µF
4 f s min (2∆v)
A 22µF ceramic capacitor is chosen in the datasheet.
A 10µF capacitor can also be used with slightly higher
output ripple, in case the load transient requirements are
not demanding.
31

Input current waveform
iL (t) L
1
ig (t ) + vL (t) – +
iC(t)
2
Vg + C R v(t)
–
Cg
–
ig (t)
t
• Input current is pulsating, with large switching-noise component
• Input filter (“decoupling”) capacitor is mandatory
• to reduce the input voltage noise and ensure proper
operation of the device
• to prevent propagation of the switching noise to other
system components
32

Capacitor ripple currents
r2
2∆iL Irms Input Capacitor = IO D(1 − D + )
Ripple Current Ratio = =r 12
IO
(Vg − Vo) D r
r= Irms Output Capacitor = IO
L fs min IO 12
L = 10 µH Vg = 3.6 V Vo = 1.8 V fs min = 468 kHz
Io = 200 mA Io = 400 mA
r = 0.962 r = 0.481
Irms Input Capacitor = 107 mA Irms Input Capacitor = 204 mA
Irms Output Capacitor = 56 mA Irms Output Capacitor = 56 mA

33

Capacitors :
How small can I go ?
Output Capacitor
Input Capacitor
When reducing the value of output capacitors ensure proper gain and phase margins
and evaluate line/load transient performance and whether it meets requirements.
34

Switch realization with a synchronous rectifier
“Synchronous Buck”
NMOS: synchronous rectifier
PMOS ip(t) iL(t) L Io
PMOS: + + v (t) – +
main in(t) L iC(t)
vp
switch Vg +
– NMOS vsw(t) C v(t)
vn
– –
n
drivers
p
p Dead times are

Switch
used to prevent
control
n short-circuit current
signals
through PMOS/NMOS
td1 td2
“dead” times 35

Switch currents
Average and RMS values
i p (t ) I p = i p (t ) ≈ DI o
I p ,rms = i 2p (t ) ≈ D I o
t
in (t )
I n = in (t ) ≈ (1 − D) I o
t
I n,rms = in2 (t ) ≈ 1 − D I o
Switch on-resistance and forward voltage drops result in switch conduction losses
36

Conduction-loss models
_ vON +
vON _ body diode
+
body diode Ron,n
i n(t) i n(t)
Ron,p i p(t)
i p(t) _
_ vON
+ _ vGS +
+ vON
vn ON OFF
vSG +
_ vp ON OFF
PMOS: On-resistance Ron,p NMOS: On-resistance Ron,n

_ vON +
in(t) L iL(t)
VD
RD in(t) ideal
RL L i L(t)
_ vON + vL _
winding +
Diode: Forward voltage drop VD in resistance
series with on-resistance RD

Winding resistance RL
37

Buck circuit when the PMOS
is ON
ideal
Ron,p ip (t) RL L iL(t) Io
_ +
vON _ winding + vL
+
resistance
+ Vg V
–
v L = Vg − ( Ron , p + RL )iL − v ≈ Vg − ( Ron , p + RL ) I o − V
iL ≈ I o
38

Buck circuit when the NMOS
is ON
ideal
RL L iL (t) Io
vL _
winding +
resistance +
R on,n
+ Vg V
–
v L = −( Ron, n + RL )iL − v ≈ −( Ron , n + RL ) I o − V
ig = 0
39

Steady-state model with
conduction losses
Inductor volt-second balance: vL = 0
V = DVg − ( DRon , p + (1 − D )Ron , n + RL ) I o
Input current: I g = i g = DI o
V + Io ( Ron , n + RL )
Duty cycle considering losses D =
Vg + Io ( Ron , n − Ron , p )
Equivalent steady-state circuit model with conduction losses:
Ig DRon,p + (1-D)Ron,n + RL Io
+
Vg + DIo + DV R V
– g
–
–
40

Switching losses
• Switching losses are proportional to the

switching frequency
• Switching loss mechanisms:
– Charging/discharging of capacitance at
MOSFET gates and switch node
– Inductive switching transitions
– Body-diode reverse recovery
– Oscillator and other misc. controller losses
– Inductor eddy-current and core losses
41

Improving light-load efficiency
• In PWM mode, light-load efficiency is reduced

because a significant portion of switching losses
does not scale with load
• In PWM mode, the oscillator and the power
switches are always switching at high switching
frequency
• Low-power modes are based on the idea of
reducing the switching frequency in proportion to
the load
• If the switching frequency is proportional to load,
high efficiency can be maintained over a very wide
range of loads
42

Switching frequency in PFM
mode
LI peak
tp =
Ipeak Vg − Vo
iL LI peak
tn =
I o = iL Vo
tp tn
Ts
1
I o = I peak (t p + t n ) f s 2Vo I o  Vo 

fs = 2 1 −
2 LI peak  Vg 

In PFM, the switching frequency is directly proportional to the load current
43

Output voltage ripple in PFM
Ipeak
iL
I o = iL
tp tn
Ts
2
I peak LI peak Vg
( 2∆v ) ≈ (t p + t n ) =
2C 2C Vo (Vg − Vo )
The output voltage ripple is typically higher in

PFM than in constant-frequency PWM mode
44

PWM/PFM Combination
100%
90%
80%
70%
Efficiency
60%
50%
40%
30%
20%
Vin = 3.6V
10%
0%
0.1 1 10 100 1000
Iout in mA
LM2618 PFM LM2618 PWM
• High efficiency over very wide range of loads

• Low IQ 45

Discussion of Operating Modes
• Best efficiency at moderate to
heavy load
• Constant-frequency, low
switching noise
• Synchronization to external clock
PWM possible
• Relatively high IQ and poor light-
load efficiency
LDO PFM
• LDO: linear regulator

• High efficiency over very wide load range
• Low-noise
• Very low IQ
• Very low IQ
• Simple controller
• Simple controller
• Increased output voltage ripple
46

PWM/LDO Combination
Example: PWM
LM2608
LDO PFM
• High efficiency (moderate-to-heavy load)

• Low noise:
• Constant-frequency operation
• No switching noise at very light loads
(LDO)
• Very low IQ 47

PWM/PFM Combination
Examples:
PWM LM2612/LM2614
LDO PFM
• High efficiency over very wide range of loads

• Low IQ
48

Selection Guide
49

Control approaches in
constant-frequency PWM mode
• Voltage-mode control
– The switch duty cycle is controlled based on
output voltage sensing
• Current-mode control
– The switch duty cycle is controlled based on
output voltage and switch current sensing
50

Voltage-Mode Control
Architecture
Power
input iL(t) L Io Load
+ + vL(t) – +
iC(t)
vg (t) + vsw(t) C v(t)

–
– – Feedback
connection
Gate
drivers
p n
Dead-time Compensator
Pulse-width vc v
G c (s)
modulator
p(t) vc(t) Voltage

reference Vref
dTs Ts t t
Controller chip
51

Current-Mode Control
Architecture
Power
input ip(t) L iL(t) Io Load
+ vL(t) – +
iC(t)
+
vg(t) + C v(t)
– vsw(t)
– – Feedback
connection
Gate
drivers
p n
Dead-time Rsip (t)
Compensator
Current-mode vc v
Gc(s)
modulator
p(t) v c(t) Voltage

reference Vref
dTs Ts t t
Controller chip
52

Current-mode summary
• Advantages of current-mode control

– Simpler, approximately single-pole responses
– Inherent rejection of line disturbances
– Built-in over-current protection
• LM26XX family is based on current-mode

architecture
• LM2608/12/18 feature internal compensation

• LM2614/19 require external compensation
53

Important definitions
Cross-over frequency fc is the frequency where the magnitude

response of the loop gain drops to 1, i.e. 0 dB
T ( jwc ) = 1 → 0 dB
Phase margin PM is the difference between the phase of the

loop gain at the cross-over frequency and -180o
PM = phase [T ( jwc )] + 180o
Gain margin GM (in dB) is the negative of the loop-gain
magnitude response (in dB) at the frequency fm where the
phase of the loop gain equals -180o
GM = −20 log T ( jwm ) , phase [T ( jwm )] = −180o
54

Example of finding phase and
gain margins
1 10. 100. 1000. 10000.
100
50
0
GM
-50
-100
PM
-150
10. 100. 1000. 10000. 100000.
f c ≈ 10 KHz PM = 71o GM = 24 dB
55

Current Mode Power Stage
Model
L
V̂o
Ro ESR
R
gm
C
Vˆc
Vˆo gm ⋅ ( Ro // R ) ⋅ (1 + s ⋅ ESR ⋅ C )
≈
Vˆc (1 + s ⋅ ( Ro // R ) ⋅ C ) ⋅ (1 + s ⋅ L )
Ro
56

Closed Loop Regulator Model
L Vˆo
IF: R3 ⋅ C 4 ≈ ( Ro // R) ⋅ C
Ro ESR 1
R
≥ Fc
gm C 2 ⋅π ⋅ ESR ⋅ C
1
≥ Fc
V̂c L
Ao
Vref 2 ⋅π ⋅
+ Ro
-
Rp gm ⋅ R o // R
Fc ≈
R3 C4 2 ⋅ π ⋅ Rp ⋅ C 4
( g m ⋅ Ro // R ⋅ Ao) ⋅ (1 + s ⋅ ESR ⋅ C ) ⋅ (1 + s ⋅ R 3 ⋅ C 4 )
Loop Gain ≈
L
(1 + s ⋅ Ro // R ⋅ C ) ⋅ (1 + s ⋅ ) ⋅ (1 + s ⋅ Rp ⋅ C 4 ⋅ Ao)
Ro
57

Compensation Example
Objective: To compensate a LM2614 to get a stable system

1
R = 10 Ω Load resistance The load pole = = 4.8 kHz
2 ⋅ π ⋅ ( R // Ro) ⋅ C
C = 10 µF Output capacitor
ESR = 10 mΩ ESR of output capacitor The high frequency pole =
Ro
= 80 kHz
2 ⋅π ⋅ L
L = 10 µH Inductor
1
The ESR zero = = 1.6 MHz (high enough to ignore )
Ro = 5 Ω Small signal output resistance 2 ⋅ π ⋅ ESR ⋅ C
gm = 1 mho Transconductance of power stage
Rp = ( R1 // R2) + 5 kΩ R1,R2 are external feedback resistor dividers,5 kO is internal
Rp = 33 kΩ
Ao = 10000 Open loop gain of error amplifier
58

Compensation Example
We now need to choose the values of R3 and C4 to give a stable regulator response. If we set
the zero frequency of R3 and C4 equal to the load pole frequency, and we choose a loop gain
crossover frequency, Fc, much lower than the high frequency pole, then we can assume that
the loop gain has a first order response. By choosing Fc = 30 kHz, the 80 kHz pole will
contribute only 20 degrees of phase lag at Fc. This should give us a phase margin of about
90-tan-1(30/80) = 90-20 = 70 degrees.
gm ⋅ ( Ro // R )
C4 = = 536 pF ≈ 680 pF
2 ⋅ π ⋅ Fc ⋅ Rp
( Ro // R ) ⋅ C
R3 = = 49 k Ω ≈ 47 k Ω
C4
This should give a stable regulator. Of course the real circuit should be checked under all
conditions to ensure a stable system. This is only one of the methods to stabilize a regulator.
Any other small signal methods that apply to feedback systems, will work here as well.
59

Compensation guidelines
Typically we like to choose a crossover frequency as high as possible. This gives a

regulator with a fast transient response. However, if Fc is too close to the high frequency
pole, of the power stage, the phase margin will be degraded. If we chose a Fc in the
previous example of 75 kHz, then the phase margin would only be 47 degrees. Given
the fact that these equations are only approximate, the phase margin of the real circuit
will probably be smaller. This will give a “ringy” transient response. Lower crossover
frequencies give a slower regulator, but tend to be more stable, and more “on-the-safe-
side”.
The size of the output capacitor is also a compromise. Smaller gives more under/over-
shoot during a load transient and slightly higher output voltage ripple. However, with
regulators that are internally compensated, smaller values of output capacitor will tend to
increase Fc and therefore decrease phase margin. Large values of output capacitor will
give small under/over-shoot and ripple, but are physically larger. Parts such as the
LM2614, with external compensation, are much more flexible with regards to output
capacitor value. In any case, it is always best to stay within the range given in the
datasheet.
60

Line Transient Measurements
+15V 1000µ F
220pF(C)
10µ F
50KΩ 50KΩ
0.5µ H (L)
Pulse
LM12CL
Generator
30Ω DUT
Output
10µF
50Ω 1000µ F
-15V
Adjust L and C to minimise overshoots

600mV
30µ s
61

Load Transient Measurements
Pulse Load
Constant Load
DUT
IRF 510
Function
Generator
Output
50Ω
62

Layout guidelines
• Electrical guidelines
– component placement and length of traces
– width of traces
– curling of critical current loops
– routing of sensitive traces
– ground pins and ground plane
– voltage regulator placement on the system
board
• Mechanical guidelines
63

Critical current loops in a buck
regulator
Ig L Io
1
+ +
2
Vg + vs (t) C v(t)
– Load
– –
The critical current loops carry large currents with significant switching ripples
64

Component placement and length of
traces
Loop 1
Loop 2
• The two critical loops carry large switching currents

and act as antennas that radiate switching noise
• Place C1, chip, L, and C2 as close as possible, to
minimize the area of the two critical current loops
65

Routing of sensitive traces
Route noise sensitive traces,

such as the voltage feedback
path, away from the critical
current loops with noisy traces
between power components
66

Ground pins and ground plane
Connect the chip ground

pins and the filter capacitor
ground pins using a large
component-side fill
Connect this area to the

ground plane using several
vias
This approach prevents

large switching currents from
circulating through the
ground plane, and reduces
ground bounce to the chip
67

Voltage regulator placement
sensitive analog/RF
Place switching regulator away from

sensitive analog/RF subsystems
68

References and
Acknowledgements
• R.W.Erickson, D.Maksimovic, Fundamentals of Power

Electronics, 2nd Edition, Kluwer Academic Publishers, 2000,
ISBN 0-7923-7270-0
• LM26XX Data Sheets, National Semiconductor Corporation

– LM2608,LM2612,LM2614,LM2618,LM2619
• Dragan Maksimovic, Associate Professor, ECE Dept,

University of Colorado, Boulder, CO
69

70

Buck - Converters For Portable Application

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Magnetic Buck Converters for

1. Why use Switching Regulators?

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

• Simple, low noise, small footprint area

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

80 Buck regulator Example:

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

area = 〈vs〉 = DVg

• Step-up, step-down and inverting configurations

© 2003 National Semiconductor Corporation

uP/DSP core mode Stand-by Wait Run1 Run2 FullRun

Linear regulator Efficiency [%] 34.7 40.9 41.6 41.7 41.7

Total linear reg average Ig [mA] 4.45

SMPS Efficiency [%] 29.1 78.4 93.7 93.0 87.7

Total SMPS average Ig [mA] 2.12

© 2003 National Semiconductor Corporation

• SMPS results in significantly lower average battery current

• High efficiency over a wide range of loads and output

• SMPS with low quiescent current modes provide longer

© 2003 National Semiconductor Corporation

Buck regulators are often used as switch-mode power supplies for

© 2003 National Semiconductor Corporation

• Static voltage regulation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

Vg + C R v(t) Vg + iL(t) C R v(t)

Switch in position 1 Switch in position 2

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

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The DC output voltage is directly proportional to the

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

• With the zero-crossing comparator the switch S2 operates as a

© 2003 National Semiconductor Corporation

• In DCM, the inductor current is always positive

© 2003 National Semiconductor Corporation

• Boundary between constant-frequency CCM and

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

• LM2612 is used to generate the output voltage of V =

© 2003 National Semiconductor Corporation

A 10µH inductor is chosen in the datasheet

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

Irms Output Capacitor = 56 mA Irms Output Capacitor = 56 mA

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

p Dead times are

© 2003 National Semiconductor Corporation

© 2003 National Semiconductor Corporation

PMOS: On-resistance Ron,p NMOS: On-resistance Ron,n

series with on-resistance RD

© 2003 National Semiconductor Corporation