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169 RF
A rodb/dec /

ments we have performed have shown the true practicality of this single parameter control of w,,. It should be mentioned that there are some other biquadratic structures [16], [17] which also have the ability of varying f0 and Q independently with resistors, but they require three or more amplifiers and the position of the resistors is inconvenient.
REFERENCES [l] T. J. Rey, Automatic phase control: theory and design, Proc. IRE, vol. 48, pp. 1760-1771, Oct. 1960. [2] J. V. Murphy, Frequency measurement using the phase-controlled oscillator, Proc. IEEE, vol. 55, pp. 1144-l 153, July 1967. [3] C. J. Byrne, Properties and design of the phase-controlled oscillator with a sawtooth comparator, Bell Syst. Tech. J., vol. 41, pp. 559-602, Mar. 1952. 141 A. B. Grebene, The monolithic phase-locked loop--A versatile building bloc& IEEE @e&urn, vol. 8, pp. 3849, Mar. 1971. [5] Eeg. lCii!ta, Phase-locked loops, Proc. IEEE, vol. 63, pp. 291-306, [6] S. Sakaroff, Frequency-controlled oscillators, Communications, vol. 19, no. 50, pp. 7-9, 1939. [7] A. B. Grebene,, A high frequency voltage-controlled oscillator for integrated circuns, in Proc. Nar. Electron. Conf., vol. 24, Dec. 1968, [8] G. S. Moschytz, Miniaturized RC filters using phase-locked loop, Bell Syst. Tech. J., vol. 44, no. 5, pp. 823-870, May-June 1965. [9] A. K. Bandyopadhyay, New type of variable-frequency RC oscillator, Electron. Lett., vol. 10, no. 10, pp. 180-181, May 16, 1974. [lo] P. Williams, Nullor representation of variable-frequency RC oscillater, Electron. Lett., vol. 10, no. 15, p. 294, July 25, 1974. [ll] W. G. Howard and D. 0. Pederson, Integrated voltage-controlled oscillators, Proc. Nat. Electron. Conf., vol. 23, pp. 219-284, 1967. [12] W. J. Kerwin, Active RC Network Synthesis Using Voltage Amplifiers, in Active Filters: Lumped, Distributed, Integrated, Digital and Parametric, L. P. Huelsman, Ed. New York: McGraw-Hill, 1970, chapt. 2, pp. 5-89. [13] M. S. Ghausi, Electronic Circuits. New York: Van Nostrand Reinhold, 1971. [14] P. Richman, Characteristics and Operation of MOS Field-Effect Deoices. New York: McGraw-Hill, 1967. [15] G. S. Moschytz, Gain-sensitivity product-A figure of merit for hybrid-integrated filters using single operational amplifiers, IEEE J. Solid-State Circuits, vol. SC-6, no. 3, 1971, pp. 103-110. [16] L. C. Thomas, The Biquad: Part I-Some practical considerations, IEEE Trans. Circuit Theory, vol. CT-18, pp. 35O357, May, 1971. [17] W. Mikhael and B. B. Bhattacharyya? A practical design for insensitive RC-active filters, IEEE Trans. Cvcuits and Systems, vol. CAS-22, pp. 407415, May, 1975.

+A R2 a (a)

0 I+ (b)

Fig. 1. (a) Noninverting op-amp stage. (b) Open-loop frequency response.

If a given overall gain is required, the overall bandwidth can be optimized by using identical stages with individual stage gains of 1.65. It has also been shown that if overall bandwidth is the specified figure, overall gain can be maximized by setting individual stage bandwidths equal. This result holds for nonidentical stages as well as iterative stages so long as the stages are noninteracting 121. The goals of a practical design procedure are: 1) to determine if a given device can be used to satisfy the specifications of the amplifier in terms of gain, bandwidth, and impedance levels; 2) to minimize the number of stages required for the design; 3) to determine the individual stage gains and bandwidths required to meet the overall specifications. While the theory mentioned earlier is helpful in the first step of the design process, it is of little direct value in the remaining steps. The theory is most often directed toward the goal of achieving a required gain along with maximum bandwidth assuming no limitation on the total number of stages. Practical design, due to cost considerations, focuses on achieving the required gain and required bandwidth using the minimum possible number of stages.In the past, the primary method used to reduce stageswas trial and error. This is by no means a trivial task. When the number of stages is reduced from the number used to maximize overall bandwidth, the individual stage gains must be adjusted, the individual stage bandwidths will consequently change, and the factor relating overall bandwidth to individual stage bandwidth also changes. The design process based on trial and error methods is highly inefficient. This paper presents a concise design procedure for op-amp stages that requires little time to complete and meets the three goals listed above.

pp. 216-220.

Video Amplifier Design Based on Op Amps DAVID J. COMER

II. THE OP AMP The basic element in this procedure is the op amp compensated Abstract-A design procedure for video amplifiers is discussed that will 1) determine if a specific op amp can be used to satisfy the design, for unity gain which is shown in Fig. 1. These deviceswill exhibit 2) minimize the number of stages required, and 3) determine individual a 20-dB/decade rolloff in gain above the upper corner frequency stage gains required to satisfy the design. A figure of merit, based on and will allow gain and bandwidth to be exchanged directly device parameters and the specific amplifier requirements, is developed resulting in a constant gain-bandwidth product. This direct to aid the design procedure. exchange of gain and bandwidth is in effect for gains of unity The design procedure is directed toward practical application in that or higher. it minimizes component cost, eliminates trial and error methods, and is Not only do most commercial op amps satisfy these assumpdirectly applicable to worst-case design. tions, the input and output impedance levels of these devices lead to negligible interaction of stages when cascaded. Thus the gain and bandwidth of an individual stage can be adjusted I. INTR~DLJCTI~N >without affecting gains or bandwidth of adjacent amplifier stages. In the field of video, amplifier design there is a well-known _For the noninverting stage of Fig. l(a) the gain is given by method available for optimizing the overall gain or bandwidth of an amplifier consisting of several noninteracting stages [l]. A,, = 1 + RJR, (1)
Manuscript received June 5, 1975; revised October 16, 1975. D. J. Comer is with the Division of Engineering, California State University, Chico, CA 95929.

while the bandwidth can be found from

wsi = GBWIA,,.


170 III. MINIMIZINGTHE NUMBER OF STAGES A design procedure has been developed to minimize the number of transistor stages in a video amplifier [3], [4]. The following discussion indicates the modifications necessary in applying this theory to the op amp. The first step in the procedure consists of determining the minimum allowable gain-bandwidth product for the device to be used. If w,, is the Tequired overall bandwidth and A,, is the required overall voltage gain, ii can be shown [3] that the device gain-bandwidth must equal or exceed the minimum value
GBW,,, =




7. Asi
0.184 0.180 0.170 0.160 0.150 0.140 0.130 1.65 1.85 2.06 2.26 2.44 2.62 2.82

0.120 0.110 0.100 0.090 0.080 0.070 0.060

7. 0.050 il.040 0.035 0.030 0.b2.5 0.023

*si 5.98 6.98 i.62 8.42 9.24 10.0

3.05 3.29 3.56 3.88 4.25 4.70 5.26

2.8q,,Jh A,,.


If the device gain-bandwidth is smaller than this value, the amplifier specifications cannot be,met iegkdless of the number of stages used. If the device gain-bandwidth happens to equal the minimum value, the amplifier can be realized using an individual stage gain of 1.65 and n stages, where
ln A,, n = -

In 1.65

= 2 In A,,.


From a practical standpoint the m&t interesting case occurs when the device gain-bandwidth exceeds the minimum value. In this instance, the amplifier could be conskucted to equal or exceed both the overall gain and bandwidth requirements. Rather than allow excess gain or bandwidth, however, it is economically advantageous to reduce the number of stages to the minimum ntimber.required to achieve the overall specifications. In many cases,this results in a significant reduction in the number of stages and component cost of the amplifier. To calculate this minimum numb& of stages,it is first assumed that an individdal stage gain of 1.65 is used. Since an excess overall bandwidth results from this situation, stages can be removed if the proper adjustment is made in individual stage gain and bandwidths. The adjusted single stage gain must be
A,, = (1.65) = (A,$ (5)

Asi Fig. 2. Requiredvalueof Z asfunctionof single-stage gain. the specifications of a given high-frequency design problem. Equation (8) can be used to obtain the graph of Fig. 2 showing Z as a function of Asi. The maximum value of Z occurs when Asi = 1.65. For any value of gain, Z must be less than or equal to the value 0.184. If an op amp is selected that leads to a value of Z frdm (9) that exceeds 0.184, it is immediately known that the op amp cannot satisfy the overall amplifier specifications. If Z equals 0.184, then the interstage gain must equal 1.65 to achieve the desired overall gain and bandwidth. If Z is less than 0.184, the number of stages can be minimized as explained above.

IV. A DESIGN EXAMPLE A video amplifier is to be designed with an overail voltage q, = 1.2&o,,. (6) gain of 1000 and an overall bandwidtli of 8 MHz. Two types of op amps are available. Op-amp A has a Fain-bandwidth of The third equation necessary to find As*, Wsi, and m is given by 4 x IO rad/s while op-amp B has a gain-bandwidth of 5 x 10s rad/s. GB W = A,,w,,. ( 7) For op-amp A, the figure of merit is Z = 15.71 which exceeds The results of simultaneous solution show that the required the niaximum allowable vaiue of 0.184. For op-amp B, the value of A,; must satisfy value of Z is 0.100. From Table I, the required value bf individual stage gain is approximately 3.56. The required number of stages In Asi = ZAslz (8) from (10) is m = 5.44. Six stages would be used in this case. where This result can be compared to the number of stagesrequired to optimizethe overall bandwidth. In this case AsI = 1.65 and (9) n = 14 stages. A considerable combonent cost reduction results GBW * from using this procedure. For a given value of Z, (8) can be solved graphically, by leastIn practice a given op-ainp type will exhibit broad variations square-error polynomial approximation [4], or values of A,, of gain-bandwidth prdduct from one device to the next. This and Z cari be tabulated as shown in Table I. The range of gain procedure assumesequal values of GB W for all devicesand hence from 1.65 to 10 is sufficient for the practical video amplifier stage. requires some comment. Fdr practical design, the designer is Once the proper value of A,, is found from Table I, the often interested in worst-dase design methods. If several amminimum number of stages can be calculated from (5) and is plifiers are to be manufactured, each must meet minimu? specifications even for the possible combination of individual In A m=L. (10) stages that minimizes performance. With the method outlined ln 4, above, minimum performance occurs when individual stagevalues the constant Z, defined by (9) can be considered as a figure of GBW are,lowest. Thus, if the gain-bandwidth product used of merit to describe the effectiveness of an op amp in meeting to calculate Z from (9) is GBW,,, for the op amp used, the
z = 1.~or2 ln 4,

where m is the minimum number of stages. The adjusted single stage bandwidth must be



resulting amplifier is the worst-case design. Situations wherein worst-case design is not desired require measurement of op-amp gain-bandwidth product to select stages of nearly identical GB W values. V. CONCLUSIONS The figure of merit Z is a useful quantity in determining whether or not a particular op amp can be used in an amplifier design. Rather than use trial and error techniques, the minimum number of stagescan be readily found from (9), (lo), and Table I. This procedure often leads to considerable reduction of component cost in the practical case.
REFERENCES M. S. Ghausi, Principles and Design of Linear Active Circuits. New 111 York: McGraw-Hill, 1965. PI D. J. Comer and J. M. Griffith, Optimization of bandwidth in noniterative amplifiers, Proc. IEEE, vol. 116, p. 384, Mar. 1969. Calculating the minimum number of iterative stages in a wide[31 -, band amplifier, IEEE Trans. Circuit Theory (Corresp.), vol. CT-15, pp. 280-281, Sept. 1968. DesIgnable video amplifiers using base-compensated stages, [41 -, IEEE Trans. Circuit Theory, vol. (X-17, pp. 94-99, Feb. 1970. Fig. 1. (a) Generalized representation, valid for all reported four-terminal two-operational-amplifier gyrator circuits for realization of lossless grounded inductance. (b) Schematic of Fig. l(a), with voltage Vz applied to terminal 2. 1 r

Some New Operational-Amplifier Circuits for the Realization of the Lossless Floating Inductance

The usefulness of the complementary property of input and ground, in linear networks containing infinite-gain differential amplifiers, has been illustrated by Hilberman [l 1,who has shown how, from a knowledge of this property, active-RC notch and all-pass filters can be obtained from appropriately designed bandpass filters by the very simple expedient of interchanging the input and ground terminals. The purpose of this letter is to give further proof of the usefulness of this complementary property, by applying it to generalize existing two-operationalamplifier four-terminal gyrator circuits for lossless groundedinductance realization, such that they can simulate also the losslessfloating inductance. Consider the reported two-operational-amplifier four-terminal gyrator circuits [2]-151. Attention will be restricted here to the special case in which all four resistors used in the circuits are equal. With the ungrounded part terminated by a capacitor, each of these circuits can be viewed as an ideal voltage-controlled voltage source, with a voltage gain of (1 - I/SCR) between the groundei port, where the lossless grounded inductance is realized as the driving-point impedance, and the output of one of the operational amplifiers. A resistor is present between this output and the driving input terminal, and by means of this resistive feedback the desired inductance at the input is obtained. Viewing these gyrator circuits from this angle one can obtain the schematic of Fig. l(a) as a valid general representation of all of them. The resistor R, shown going to ground in Fig. I(a), is separated from the input-terminal 1 only by a nullator or a series connection of nullators. The input-voltage V, thus also appears across this resistor. Contained inside the black-box are the second operational amplifier, two resistors, and the capacitor C, which is transformed into a grounded inductance
Manuscript received December 26, 1974; revised October 16,. 1975. The author is with the Department of Electrical Engineermg, Indian Institute of Technology, Madras-600 036, India.

CR2 at the input terminal 1 of the circuit. There is no connection to ground inside the black-box, except for that of .the operational amplifier, through its dc supplies. Assume now that the terminal 2 of the schematic is disconnected from ground, and has a voltage V, applied to it, as shown in Fig. l(b). From the results of Hilberman [l] it follows that the voltage Y, which is equal to V,(l - l/SCR) in Fig. l(a), will now have the following value:

Hence the short-circuit admittance matrix of the arrangement of Fig. l(b), between ports l-3 and 2-3, will be -1 SCR

WI =
-I i

(2) 1 *

To convert this to the admittance matrix of a lossless floating inductance one thus has only to add a term (l/R - l/SCR) to Y,, and a term (-l/R + l/SCR) to Y,,. This necessitatesthe introduction of an additional operational amplifier and three resistors into the schematic of Fig. l(a). The result is shown in Fig. 2(a). The additional components are connected on external to the black-box, whose internal connections are in no way tampered with. Since the original operational amplifier external to the black-box now drives a unity-gain inverter, and since it is the output of the inverter that is now fed back to the terminal a3 of the black-box, the connections at a1 and a2 to the input of the first operational amplifier in this schematic are the exact opposite of the connections in the schematic of Fig. l(a). The schematic of Fig. 2(a) is a gyrator just like that of Fig. 1(a), except that an output V of value - V,(l - l/SCR), which does not exist in the schematic of Fig. l(a), has now been made available. On disconnecting terminal 2 of Fig. 2(a) from ground, and applying a voltage V, to it, one obtains the schematic of Fig. 2(b),