Birla Institute of Technology & Science, Pilani- KK Birla Goa Campus

I Semester 2012-2013
EEE/ CS/INSTRF 214 Digital Design
Test 1 (Closed Book)
Date: 16-09-2012
Max Marks: 40
Duration: 60 Mins
Q1. Using MEV 4-variable K-map reduce the given equation with E and F as the mapped variables.
The equation is F(A,B,C,D,E,F) = (0,2,4,6,8,10,12,14,16,18,20,22,32,40,48,56)
(13)
A

MEV
F

MEV

EF

(6)

EF

MEV

MEV
EF

EF

00

00

01

11

10

F
01

F
4

F
11

13

15

F
12

14

EF

EF
10

11

10

EF

EF

Y = ABF+ACF+ADEF (7)
Q2. Implement a circuit that does the following. The circuit is controlled by 5 input switches S1, S2,
S3, S4, and S5. The circuit works as following:

If S1 is closed (S1 1 when closed) The 4-bit output of this circuit O (O3O2O1O0) is the
sum/ difference of two set of data A(A3A2A1A0) & B(B3B2B1B0) . Whether Sum or
difference depends on the switch S5
o

If S1 & S5 =1 Then O = A B

If S1 =1 & S5 =0 Then O = A+B

If S2 is closed (S2=1) then Output O = Grey code equivalent of input A.

If S3 is closed(S3 =1) then Output O = Input A

If S4 is closed (S4 =1) then Output O = Input B

Only one of the four switches (S1, S2, S3,S4) are pressed at a time.

S5 is used only when S1 =1.

Design the circuit using only the chips given below.
Chip

Nos

Quad 2 x 1 Mux

4 to 2 priority encoder

4 bit Adder

2 input XOR chip (each 2

chip has 4 gates)

(22)

Q3. What will be the output of the D-FF given below? (Set-up Time = 50ns & Hold Time = 0ns; Input
Frequency 10 KHz).
(5)
D

Q
Output Always Low