1

RET670 LOW IMPEDANCE TEED PROTECTION CONFIG Three Winding, Single Breaker Work Sheet OVERVIEW
B

Description List of Content Analog Inputs for Current and Voltage Circuits Binary Inputs Binary Outputs Differential Protection Function Tripping Logic Measurement Function Disturbance Report Function Signals to the Microscada Appl Basic Config Functions
C B

ANALOG_INPUT V_BI V_BO DIFF_PROT TRIP_LOGIC MEAS DR

GOOSE_SEND COMMON

Main Application: OVERVIEW, Page: 1

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4
CT2_IL1

CT1_IL1 TRM_12I_31.CH1

TRM_12I_31.CH4

A
CT2_IL2 TRM_12I_31.CH5

CT1_IL2 TRM_12I_31.CH2

LINE_CT1_3ms SMAI1

CT2_IL3 TRM_12I_31.CH6

LINE_CT2_3ms SMAI2

CT1_IL3 TRM_12I_31.CH3

BLOCK DFTSPFC IL1 GRP1L1 IL2 GRP1L2 IL3 GRP1L3 IL4_IN_OPT GRP1N
O:1|T:3|I:1

SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN

CT1_I3P_3ms CT1_IL1_3ms CT1_IL2_3ms CT1_IL3_3ms CT1_IN_3ms

BLOCK IL1 GRP2L1 IL2 GRP2L2 IL3 GRP2L3 IL4_IN_OPT GRP2N

O:1|T:3|I:2

AI3P AI1 AI2 AI3 AI4 AIN

CT2_I3P_3ms CT2_IL1_3ms CT2_IL2_3ms CT2_IL3_3ms CT2_IN_3ms

LINE_CT1_1ms SMAI1
BLOCK DFTSPFC IL1 GRP1L1 IL2 GRP1L2 IL3 GRP1L3 IL4_IN_OPT GRP1N SPFCOUT AI3P AI1 AI2 AI3 AI4 AIN CT1_I3P_1ms CT1_IL1_1ms CT1_IL2_1ms CT1_IL3_1ms CT1_IN_1ms

LINE_CT2_1ms SMAI2
BLOCK IL1 GRP2L1 IL2 GRP2L2 IL3 GRP2L3 IL4_IN_OPT GRP2N
O:1|T:1|I:26

AI3P AI1 AI2 AI3 AI4 AIN

CT2_I3P_1ms CT2_IL1_1ms CT2_IL2_1ms CT2_IL3_1ms CT2_IN_1ms

C
TIE_CT_IL1 TRM_12I_31.CH7 TIE_CT_IL2 TRM_12I_31.CH8 TIE_CT_IL3 TRM_12I_31.CH9

O:1|T:1|I:25

TIE_CT_3ms SMAI3
BLOCK IL1 GRP3L1 IL2 GRP3L2 IL3 GRP3L3 IL4_IN_OPT GRP3N
O:1|T:3|I:3

AI3P AI1 AI2 AI3 AI4 AIN

TIE_CT_I3P_3ms TIE_CT_IL1_3ms TIE_CT_IL2_3ms TIE_CT_IL3_3ms TIE_CT_IN_3ms

TIE_CT_1ms SMAI3
BLOCK IL1 GRP3L1 IL2 GRP3L2 IL3 GRP3L3 IL4_IN_OPT GRP3N
O:1|T:1|I:27

AI3P AI1 AI2 AI3 AI4 AIN

TIE_CT_I3P_1ms TIE_CT_IL1_1ms TIE_CT_IL2_1ms TIE_CT_IL3_1ms TIE_CT_IN_1ms

Main Application: ANALOG_INPUT, Page: 1

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X31 SMBI
Not used VIn1 Not used VIn2 Not used VIn3 Not used VIn4 Not used VIn5 Not used VIn6 Not used VIn7 Not used VIn8 Not used VIn9 Not used VIn10
O:150|T:3|I:1

Not used BI1 Not used BI2 Not used BI3 Not used BI4 Not used BI5 Not used BI6 Not used BI7 Not used BI8 Not used BI9 Not used BI10

FUTURE_BIM1

X32 SMBI
Not used VIn1 Not used VIn2 Not used VIn3 Not used VIn4 Not used VIn5 Not used VIn6 Not used VIn7 Not used VIn8 Not used VIn9 Not used VIn10
O:151|T:3|I:2

Not used BI1 Not used BI2 Not used BI3 Not used BI4 Not used BI5 Not used BI6 Not used BI7 Not used BI8 Not used BI9 Not used BI10

FUTURE_BIM9

Main Application: V_BI, Page: 1

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TEEDOPTD_GRPA BOM_4.BO1 TEEDOPTD_GRPB BOM_4.BO3 TEEDOPTD_TIE BOM_4.BO5

TEED_OPTD BOM_4.BO7

X41 SMBO
GENERAL_TRIP FALSE GENERAL_TRIP FALSE GENERAL_TRIP FALSE BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 TEEDOPTD_GRPA BO1 Not used BO2 TEEDOPTD_GRPB BO3 Not used BO4 TEEDOPTD_TIE BO5 Not used BO6 Not used BO7 Not used BO8 Not used BO9 Not used BO10
O:4300|T:3|I:1

X42 SMBO
FALSE BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 Not used BO1 Not used BO2 Not used BO3 Not used BO4 Not used BO5 Not used BO6 Not used BO7 Not used BO8 Not used BO9 Not used BO10
O:4301|T:3|I:2

Main Application: V_BO, Page: 1

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FEEDBACK BOM_4.BO24

A
LED.RED1

LED.RED2

LED SMBO
GENERAL_TRIP 87TD_RPH_TRIP 87TD_YPH_TRIP 87TD_BPH_TRIP BO1 BO2 BO3 BO4 BO5 BO6 BO7 BO8 BO9 BO10 GENERAL_TRIP BO1 87TD_RPH_TRIP BO2 87TD_YPH_TRIP BO3 87TD_BPH_TRIP BO4 Not used BO5 Not used BO6 Not used BO7 Not used BO8 Not used BO9 Not used BO10
O:4302|T:3|I:3

LED.RED3

LED.RED4

Main Application: V_BO, Page: 2

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T3WPDIF
CT1_I3P_1ms GRP_OFF CT2_I3P_1ms GRP_OFF TIE_CT_I3P_1ms GRP_OFF TRIP TRIPRES TRIPUNRE TRNSUNR TRNSSENS START STL1 STL2 STL3 BLK2H BLK2HL1 BLK2HL2 BLK2HL3 BLK5H BLK5HL1 BLK5HL2 BLK5HL3 BLKWAV BLKWAVL1 BLKWAVL2 BLKWAVL3 IDALARM OPENCT OPENCTAL IDL1 IDL2 IDL3 IDL1MAG IDL2MAG IDL3MAG IBIAS IDNSMAG T3WPDIF_TRIP T3WPDIF_TRIPRES T3WPDIF_UNRE T3WPDIF_TRNSUNR T3WPDIF_TRNSSENS T3WPDIF_STL1 T3WPDIF_STL2 T3WPDIF_STL3 T3WPDIF_BLK2H T3WPDIF_BLK2HL1 T3WPDIF_BLK2HL2 T3WPDIF_BLK2HL3 T3WPDIF_BLKSH T3WPDIF_TRIP T3WPDIF_STL1 TRUE FALSE INPUT1 INPUT2 INPUT3 INPUT4N

AND
OUT NOUT 87TD_RPH_TRIP

O:205|T:3|I:1

TAPOLTC1 TAPOLTC2 OLTC1AL OLTC2AL BLOCK BLKRES BLKUNRES BLKNSUNR BLKNSSEN

B AND
T3WPDIF_TRIP T3WPDIF_STL2 TRUE FALSE INPUT1 INPUT2 INPUT3 INPUT4N
O:207|T:3|I:2

OUT NOUT

87TD_YPH_TRIP

T3WPDIF_IDALARM T3WPDIF_OPENCT T3WPDIF_OPENCTAL T3WPDIF_IDL1 T3WPDIF_IDL2 T3WPDIF_IDL3 T3WPDIF_IDL1MAG T3WPDIF_IDL2MAG T3WPDIF_IDL3MAG T3WPDIF_IBIAS T3WPDIF_IDNSMAG

AND
T3WPDIF_TRIP T3WPDIF_STL3 TRUE FALSE INPUT1 INPUT2 INPUT3 INPUT4N
O:209|T:3|I:3

OUT NOUT

87TD_BPH_TRIP

O:935|T:1|I:1

Main Application: DIFF_PROT, Page: 1

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SMPPTRC
BLOCK BLKLKOUT TRIN TRINL1 TRINL2 TRINL3 PSL1 PSL2 PSL3 1PTRZ 1PTREF P3PTR SETLKOUT RSTLKOUT
O:2800|T:3|I:1

T3WPDIF_TRIP 87TD_RPH_TRIP 87TD_YPH_TRIP 87TD_BPH_TRIP

TRIP TRL1 TRL2 TRL3 TR1P TR2P TR3P CLLKOUT

GENERAL_TRIP

Main Application: TRIP_LOGIC, Page: 1

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MEASUREMENTS
A A

CMMXU CMMXU
CT1_I3P_1ms IL1 IL1RANG IL1ANGL IL2 IL2RANG IL2ANGL IL3 IL3RANG IL3ANGL
O:551|T:100|I:1

CMMXU
CT2_I3P_1ms IL1 IL1RANG IL1ANGL IL2 IL2RANG IL2ANGL IL3 IL3RANG IL3ANGL
O:552|T:100|I:2

TIE_CT_I3P_1ms

IL1 IL1RANG IL1ANGL IL2 IL2RANG IL2ANGL IL3 IL3RANG IL3ANGL

O:553|T:100|I:3

CMSQI
3I0 3I0RANG 3I0ANGL I1 I1RANG I1ANGL I2 I2RANG I2ANGL O:2820|T:100|I:1

CMSQI
3I0 3I0RANG 3I0ANGL I1 I1RANG I1ANGL I2 I2RANG I2ANGL O:2821|T:100|I:2

CMSQI
3I0 3I0RANG 3I0ANGL I1 I1RANG I1ANGL I2 I2RANG I2ANGL O:2822|T:100|I:3

LINE_CT1

LINE_CT2

TIE_CT

Main Application: MEAS, Page: 1

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SP16GGIO
87TD_RPH_TRIP 87TD_YPH_TRIP 87TD_BPH_TRIP BLOCK MP#-INPUT1 IN1 MP#-INPUT2 IN2 MP#-INPUT3 IN3 MP#-INPUT4 IN4 MP#-INPUT5 IN5 MP#-INPUT6 IN6 MP#-INPUT7 IN7 MP#-INPUT8 IN8 MP#-INPUT9 IN9 MP#-INPUT10 IN10 MP#-INPUT11 IN11 MP#-INPUT12 IN12 MP#-INPUT13 IN13 MP#-INPUT14 IN14 MP#-INPUT15 IN15 MP#-INPUT16 IN16
O:3750|T:3|I:1

SP16GGIO
GENERAL_TRIP BLOCK GENERAL_TRIP IN1 MP#-INPUT2 IN2 MP#-INPUT3 IN3 MP#-INPUT4 IN4 MP#-INPUT5 IN5 MP#-INPUT6 IN6 MP#-INPUT7 IN7 MP#-INPUT8 IN8 MP#-INPUT9 IN9 MP#-INPUT10 IN10 MP#-INPUT11 IN11 MP#-INPUT12 IN12 MP#-INPUT13 IN13 MP#-INPUT14 IN14 MP#-INPUT15 IN15 MP#-INPUT16 IN16
O:3755|T:3|I:2

SP16GGIO
MEM_USED AGGR-SETCHGD TIME_TSYNCERR INT_FAIL BLOCK MEM_USED IN1 AGGR-SETCHGD IN2 TIME_TSYNCERR IN3 INT_FAIL IN4 MP#-INPUT5 IN5 MP#-INPUT6 IN6 MP#-INPUT7 IN7 MP#-INPUT8 IN8 MP#-INPUT9 IN9 MP#-INPUT10 IN10 MP#-INPUT11 IN11 MP#-INPUT12 IN12 MP#-INPUT13 IN13 MP#-INPUT14 IN14 MP#-INPUT15 IN15 MP#-INPUT16 IN16
O:3760|T:3|I:3

FUTURE_BIM1 FUTURE_BIM9

Main Application: GOOSE_SEND, Page: 1

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ANALOG DR
A A

A1RADR
CT1_IL1_3ms CT1_IL2_3ms CT1_IL3_3ms CT1_IN_3ms CT1_IL1 INPUT1 CT1_IL2 INPUT2 CT1_IL3 INPUT3 CT1_IN INPUT4 CT2_IL1 INPUT5 CT2_IL2 INPUT6 CT2_IL3 INPUT7 CT2_IN INPUT8 DRA#-INPUT9 INPUT9 DRA#-INPUT10 INPUT10
O:3702|T:3|I:1

CT2_IL1_3ms CT2_IL2_3ms CT2_IL3_3ms CT2_IN_3ms

RDRE
DRPOFF RECSTART RECMADE CLEARED MEMUSED O:1|T:-200|I:1

MEM_USED

A2RADR
TIE_CT_IL1_3ms TIE_CT_IL2_3ms TIE_CT_IL3_3ms TIE_CT_IN_3ms TIE_CT_IL1 INPUT11 TIE_CT_IL2 INPUT12 TIE_CT_IL3 INPUT13 TIE_CT_IN INPUT14 DRA#-INPUT15 INPUT15 DRA#-INPUT16 INPUT16 DRA#-INPUT17 INPUT17 DRA#-INPUT18 INPUT18 DRA#-INPUT19 INPUT19 DRA#-INPUT20 INPUT20
O:3703|T:3|I:2

Main Application: DR, Page: 1

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B1RBDR
T3WPDIF_BLK2H T3WPDIF_BLK2HL1 T3WPDIF_BLK2HL2 T3WPDIF_BLK2HL3 T3WPDIF_BLK2H INPUT1 T3WPDIF_BLK2H INPUT2 T3WPDIF_BLK2H INPUT3 T3WPDIF_BLK2H INPUT4 T3WPDIF_IDALA INPUT5 T3WPDIF_STL1 INPUT6 T3WPDIF_STL2 INPUT7 T3WPDIF_STL3 INPUT8 T3WPDIF_TRIPR INPUT9 T3WPDIF_TRNSS INPUT10 T3WPDIF_TRNSU INPUT11 T3WPDIF_UNRE INPUT12 DRB#-INPUT13 INPUT13 DRB#-INPUT14 INPUT14 DRB#-INPUT15 INPUT15 DRB#-INPUT16 INPUT16
O:3711|T:3|I:1

B2RBDR
87TD_RPH_TRIP 87TD_YPH_TRIP 87TD_BPH_TRIP GENERAL_TRIP 87TD_RPH_TRIP INPUT17 87TD_YPH_TRIP INPUT18 87TD_BPH_TRIP INPUT19 GENERAL_TRIP INPUT20 DRB#-INPUT21 INPUT21 DRB#-INPUT22 INPUT22 DRB#-INPUT23 INPUT23 DRB#-INPUT24 INPUT24 DRB#-INPUT25 INPUT25 DRB#-INPUT26 INPUT26 DRB#-INPUT27 INPUT27 DRB#-INPUT28 INPUT28 DRB#-INPUT29 INPUT29 DRB#-INPUT30 INPUT30 DRB#-INPUT31 INPUT31 DRB#-INPUT32 INPUT32
O:3712|T:3|I:2

B3RBDR
MEM_USED AGGR-SETCHGD TIME_TSYNCERR INT_FAIL MEM_USED INPUT33 AGGR-SETCHGD INPUT34 TIME_TSYNCERR INPUT35 INT_FAIL INPUT36 DRB#-INPUT37 INPUT37 DRB#-INPUT38 INPUT38 DRB#-INPUT39 INPUT39 DRB#-INPUT40 INPUT40 DRB#-INPUT41 INPUT41 DRB#-INPUT42 INPUT42 DRB#-INPUT43 INPUT43 DRB#-INPUT44 INPUT44 DRB#-INPUT45 INPUT45 DRB#-INPUT46 INPUT46 DRB#-INPUT47 INPUT47 DRB#-INPUT48 INPUT48
O:3713|T:3|I:3

T3WPDIF_IDALARM T3WPDIF_STL1 T3WPDIF_STL2 T3WPDIF_STL3 T3WPDIF_TRIPRES T3WPDIF_TRNSSENS T3WPDIF_TRNSUNR T3WPDIF_UNRE

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FXDSIGN B
OFF ON INTZERO INTONE REALZERO STRNULL ZEROSMPL GRP_OFF
O:30|T:1|I:1

FALSE TRUE INTZERO INTONE REALZERO STRNULL GRP_OFF

B INTERRSIG
FAIL WARNING CPUFAIL CPUWARN
O:16|T:1000|I:1

INT_FAIL INT_WARNING

ActiveGroup
ACTGRP1 ACTGRP2 ACTGRP3 ACTGRP4 ACTGRP5 ACTGRP6
O:10|T:8|I:1

D
AGGR-GRP1 AGGR-GRP2

GRP1 GRP2 GRP3 GRP4 GRP5 GRP6 SETCHGD

TIMEERR
TSYNCERR RTCERR AGGR-SETCHGD
O:15|T:1000|I:1

TIME_TSYNCERR TIME_RTCERR

Main Application: COMMON, Page: 1

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