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ARM Accredited Engineer Mock Test 2

www.arm.com/aae

Instructions
This mock test is designed to give prospective test-takers an opportunity to sample questions of a similar scope and level of difficulty to those included in the live AAE certification test. The test consists of 10 multiple choice questions and an accompanying document provides answers to these questions along with a rationale for each question and answer. We suggest that you allow yourself 10 minutes to complete this test, without the use of any reference materials or learning materials.

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ARM Accredited Engineer

Mock Test 2

Question 1
Thumb-2 technology is implemented in which of the following? A) B) C) D) All ARM processors All ARMv7 processors ARMv7-A processors only ARMv7-A and ARMv7-R but not ARMv7-M

Question 2
Which one of the following is a valid difference between bare metal and OS applications? A) OS applications never make use of shared resources; bare metal applications always do. B) OS applications have direct control over their memory configuration; bare metal applications never do. C) OS applications are scheduled by the OS; bare metal applications can run without a scheduler being present. D) Bare metal applications always have to call device drivers to access low level platform hardware; OS applications do not.

Question 3
Which assembly instruction would you use to load 4 words starting from the memory location 0x80000000 into the registers r0-r3? (Assume r9 contains the base address 0x80000000) A) B) C) D) LDMDB r9, {r0-r3} LDMIA r9, {r0-r3} LDMIB r9, {r0-r3} LDMDA r9, {r0-r3}

Question 4
A cache that supports dirty bits to manage the most recently written value to a given memory location in the memory hierarchy is referred to as a: A) B) C) D) write-back cache. write-through cache. set-associative cache. fully-associative cache.

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

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ARM Accredited Engineer

Mock Test 2

Question 5
The ARM processor registers R13, R14, and R15 are architecturally used for special purposes. Which is the correct respective sequence of special purpose registers? A) B) C) D) PC, LR, SP LR, PC, SP SP, LR, PC LR, SP, PC

Question 6
When building code for both ARM and Thumb states, which tool decides for each function call whether to use a BL or BLX instruction? A) B) C) D) The linker The archiver The compiler The assembler

Question 7
Optimizing for space will: A) B) C) D) produce an image which is decompressed at run-time. cause the compiler to unroll loops where possible. result in more functions being inlined by the compiler. produce smaller code, even if this results in slower execution.

Question 8
When building code for a processor without floating point hardware, how would the compiler deal with floating point calculations in the source code? A) The compiler will produce code that results in calculations with less accuracy B) The compiler will produce an error and not compile C) The compiler will use libraries to perform the floating point operations with integer instructions D) The compiler will warn the programmer that the code needs to be rewritten using fixedpoint arithmetic

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

Version 1.0

ARM Accredited Engineer

Mock Test 2

Question 9
What is the MINIMUM number of priority levels that a Generic Interrupt Controller (GIC) supports? A) B) C) D) 8 16 32 64

Question 10
What is the WFI instruction used for? A) B) C) D) To power down the interrupt controller when it is not required To signal an interrupt event to another processor in a multi-core system To enable interrupts temporarily while in the middle of an exception handler To place the processor in a low power mode while waiting for an interrupt

Copyright 2013 ARM Limited 110 Fulbourn Road, Cambridge, England CB1 9NJ. All rights reserved.

Version 1.0