IC Number 7400 741G00 7401 741G01 7402 741G02 7403 741G03 7404 741G04 7405 741G05 7406 741G06

7407 741G07 7408 741G08 7409 741G09 7410 7411 7412 7413 7414 741G14 7415 7416 7417 741G17 7418 7419 7420 7421 7422

7423 7424 7425 7426 7427 741G27 7428 7430 7431 7432 741G32 7433 7434 7435 7436 7437 7438 7439 7440 7441 7442 7443 7444 7445 7446 7447 7448 7449 7450 7451 7452 7453 7454 7455 7456 7457 7458

7459 7460 7461 7462 7463 7464 7465 7468 7469 7470 74H71 74L71 7472 7473 7474 7475 7476 7477 74H78 74L78 74Ls78 7479 741G79 7480 741G80 7481 7482 7483 7484 7485 7486 741G86 7487 7488 7489 7490 7491

7492 7493 7494 7495 7496 7497 741G97 7498 7499 74100 74101 74102 74103 74104 74105 74106 74107 74107a 74108 74109 74110 74111 74112 74113 74114 74116 74118 74119 74120 74121 74122 74123 741G123 74124 74125 741G125 74126

741G126 74128 74130 74131 74132 74133 74134 74135 74136 74137 74138 74139 74140 74141 74142 74143 74144 74145 74147 74148 74150 74151 74152 74153 74154 74155 74156 74157 74158 74159 74160 74161 74162 74163 74164 74165 74166

74167 74168 74169 74170 74171 74172 74173 74174 74175 74176 74177 74178 74179 74180 74181 74182 74183 74184 74185 74186 74187 74188 74189 74190 74191 74192 74193 74194 74195 74196 74197 74198 74199 74200 74201 74206 74209

74210 74219 74221 74222 74224 74225 74226 74227 74228 74230 74231 74232 74237 74238 74239 74240 74241 74242 74243 74244 74245 74246 74247 74248 74249 74250 74251 74253 74255 74256 74257 74258 74259 74260 74261 74264 74265

74266 74268 74270 74271 74273 74274 74275 74276 74278 74279 74280 74281 74282 74283 74284 74285 74286 74287 74288 74289 74290 74291 74292 74293 74294 74295 74297 74298 74299 74301 74309 74310 74314 74319 74320 74321 74322

74323 74324 74340 74341 74344 74347 74348 74350 74351 74352 74353 74354 74355 74356 74357 74361 74362 74363 74365 74366 74367 74368 74370 74371 74373 741G373 74374 741G374 74375 74376 74377 74378 74379 74380 74381 74382 74384

74385 74386 74387 74388 74390 74393 74395 74396 74398 74399 74405 74408 74412 74422 74423 74424 74425 74426 74428 74436 74437 74438 74440 74441 74442 74443 74444 74445 74446 74447 74448 74449 74450 74451 74452 74453 74453

74454 74455 74456 74460 74461 74462 74463 74465 74466 74467 74468 74470 74471 74472 74473 74474 74475 74481 74482 74484 74485 74490 74491 74498 74508 74518 74519 74520 74521 74522 74526 74527 74528 74531 74532 74533 74534

74535 74536 74537 74538 74539 74540 74541 74544 74558 74560 74561 74563 74564 74568 74569 74573 74574 74575 74576 74577 74580 74589 74590 74591 74592 74593 74594 74595 74596 74597 74598 74599 74600 74601 74602 74603 74604

74605 74606 74607 74608 74610 74611 74612 74613 74618 74619 74620 74621 74622 74623 74624 74625 74626 74627 74628 74629 74630 74631 74632 74633 74634 74635 74638 74639 74640 74641 74642 74643 74644 74645 74646 74647 74648

74649 74651 74652 74653 74654 74658 74659 74664 74665 74668 74669 74670 74671 74672 74673 74674 74677 74678 74679 74680 74681 74682 74683 74684 74685 74686 74687 74688 74689 74690 74691 74692 74693 74694 74695 74696 74697

74698 74699 74716 74718 74724 74740 74741 74744 74748 74779 74783 74790 74794 74795 74796 74797 74798 74804 74805 74808 74822 74832 74848 74873 74874 74876 74878 74879 74880 74881 74882 74888 74901 74902 74903 74904 74905

74906 74907 74908 74909 74910 74911 74912 74914 74915 74917 74918 74920 74921 74922 74923 74925 74926 74927 74928 74929 74930 74932 74933 74934 74935 74936 74937 74938 74941 74945 74947 74948 74949 74949 741005 741035 742960

742961 742962 742968 742969 742970 741G3208 744002 744015 744017 744020 744024 744028 744040 744046 744049 744050 744051 744052 744053 744059 744060 744066 744067 744075 744078 744094 744316 744511 744520 744538 747007 747266 7429841 7440103 7440105

IC Name quad 2-input NAND gate single 2-input NAND gate quad 2-input NAND gate with open collector outputs single 2-input NAND gate with open drain output quad 2-input NOR gate single 2-input NOR gate quad 2-input NAND gate with open collector outputs single 2-input NAND gate with open drain output hex inverter single inverter hex inverter with open collector outputs single inverter with open drain output hex inverter buffer/driver with 30 V open collector outputs single inverting buffer/driver with open drain output hex buffer/driver with 30 V open collector outputs single non-inverting buffer/driver with open drain output quad 2-input AND gate single 2-input AND gate quad 2-input AND gate with open collector outputs single 2-input AND gate with open drain output triple 3-input NAND gate triple 3-input AND gate triple 3-input NAND gate with open collector outputs dual Schmitt trigger 4-input NAND gate hex Schmitt trigger inverter single Schmitt trigger inverter triple 3-input AND gate with open collector outputs hex inverter buffer/driver with 15 V open collector outputs hex buffer/driver with 15 V open collector outputs single Schmitt-trigger buffer dual 4-input NAND gate with Schmitt trigger inputs hex Schmitt trigger inverter dual 4-input NAND gate dual 4-input AND gate dual 4-input NAND gate with open collector outputs

expandable dual 4-input NOR gate with strobe quad 2-input NAND gate gates with schmitt-trigger line-receiver inputs. dual 4-input NOR gate with strobe quad 2-input NAND gate with 15 V open collector outputs triple 3-input NOR gate single 3-input NOR gate quad 2-input NOR buffer 8-input NAND gate hex delay elements quad 2-input OR gate single 2-input OR gate quad 2-input NOR buffer with open collector outputs hex noninverters hex noninverters with open-collector outputs quad 2-input NOR gate (different pinout than 7402) quad 2-input NAND buffer quad 2-input 2-input NAND NAND buffer buffer with with open open collector collector outputs, outputs input and output terminals flipped, quad otherwise functionally identical to 7438 dual 4-input NAND buffer BCD to decimal decoder/Nixie tube driver BCD to decimal decoder excess-3 to decimal decoder excess-3-Gray code to decimal decoder BCD to decimal decoder/driver BCD to seven-segment display decoder/driver with 30 V open collector outputs BCD to 7-segment decoder/driver with 15 V open collector outputs BCD to 7-segment decoder/driver with Internal Pullups BCD to 7-segment decoder/driver with open collector outputs dual 2-wide 2-input AND-OR-invert gate (one gate expandable) dual 2-wide 2-input AND-OR-invert gate expandable 4-wide 2-input AND-OR gate expandable 4-wide 2-input AND-OR-invert gate 3-2-2-3-input AND-OR-invert gate 2-wide 4-input AND-OR-invert Gate (74H version is expandable) 50:1 frequency divider 60:1 frequency divider 2-input & 3-input AND-OR Gate

2-input & 3-input AND-OR-invert Gate dual 4-input expander triple 3-input expander 3-2-2-3-input AND-OR expander hex current sensing interface gates 4-2-3-2-input AND-OR-invert gate 4-2-3-2 input AND-OR-invert gate with open collector output dual 4 bit decade counters dual 4 bit binary counters AND-gated positive edge triggered J-K flip-flop with preset and clear AND-or-gated J-K master-slave flip-flop with preset AND-gated R-S master-slave flip-flop with preset and clear AND gated J-K master-slave flip-flop with preset and clear dual J-K flip-flop with clear dual D positive edge triggered flip-flop with preset and clear 4-bit bistable latch dual J-K flip-flop with preset and clear 4-bit bistable latch dual positive pulse triggered J-K flip-flop with preset, common clock, and common clear dual positive pulse triggered J-K flip-flop with preset, common clock, and common clear dual negative edge triggered J-K flip-flop with preset, common clock, and common clear dual D flip-flop single D-type flip-flop positive edge trigger non-inverting output gated full adder single D-type flip-flop positive edge trigger inverting output 16-bit random access memory 2-bit binary full adder 4-bit binary full adder 16-bit random access memory 4-bit magnitude comparator quad 2-input XOR gate single 2 input exclusive-OR gate 4-bit true/complement/zero/one element 256-bit read-only memory 64-bit random access memory decade counter (separate divide-by-2 and divide-by-5 sections) 8-bit shift register, serial In, serial out, gated input

divide-by-12 counter (separate divide-by-2 and divide-by-6 sections) 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) 4-bit shift register, dual asynchronous presets 4-bit shift register, parallel In, parallel out, serial input 5-bit parallel-In/parallel-out shift register, asynchronous preset synchronous 6-bit binary rate multiplier configurable multiple-function gate 4-bit data selector/storage register 4-bit bidirectional universal shift register dual 4-bit bistable latch AND-OR-gated J-K negative-edge-triggered flip-flop with preset AND-gated J-K negative-edge-triggered flip-flop with preset and clear dual J-K negative-edge-triggered flip-flop with clear J-K master-slave flip-flop J-K master-slave flip-flop dual J-K negative-edge-triggered flip-flop with preset and clear dual J-K flip-flop with clear dual J-K negative-edge-triggered flip-flop with clear dual J-K negative-edge-triggered flip-flop with preset, common clear, and common clock dual J-Not-K positive-edge-triggered flip-flop with clear and preset AND-gated J-K master-slave flip-flop with data lockout dual J-K master-slave flip-flop with data lockout dual J-K negative-edge-triggered flip-flop with clear and preset dual J-K negative-edge-triggered flip-flop with preset dual J-K negative-edge-triggered flip-flop with preset, common clock and clear dual 4-bit latch with clear hex set/reset latch hex set/reset latch dual pulse synchronizer/drivers monostable multivibrator retriggerable monostable multivibrator with clear dual retriggerable monostable multivibrator with clear single retriggerable monostable multivibrator with clear dual voltage-controlled oscillator quad bus buffer with three-state outputs, negative enable buffer/Line driver, three-state output with active low output enable quad bus buffer with three-state outputs, positive enable

buffer/line driver, three-state output with active high output enable quad 2-input NOR Line driver quad 2-input AND gate buffer with 30 V open collector outputs quad 2-input AND gate buffer with 15 V open collector outputs quad 2-input NAND schmitt trigger 13-input NAND gate 12-input NAND gate with three-state output quad exclusive-or/NOR gate quad 2-input XOR gate with open collector outputs 3 to 8-line decoder/demultiplexer with address latch 3 to 8-line decoder/demultiplexer dual 2 to 4-line decoder/demultiplexer dual 4-input NAND line driver BCD to decimal decoder/driver for cold-cathode indicator/Nixie tube decade counter/latch/decoder/driver for Nixie tubes decade counter/latch/decoder/7-segment driver, 15 ma constant current decade counter/latch/decoder/7-segment driver, 15 V open collector outputs BCD to decimal decoder/driver 10-line to 4-line priority encoder 8-line to 3-line priority encoder 16-line to 1-line data selector/multiplexer 8-line to 1-line data selector/multiplexer 8-line to 1-line data selector/multiplexer dual 4-line to 1-line data selector/multiplexer 4-line to 16-line decoder/demultiplexer dual 2-line to 4-line decoder/demultiplexer dual 2-line to 4-line decoder/demultiplexer with open collector outputs quad 2-line to 1-line data selector/multiplexer, noninverting quad 2-line to 1-line data selector/multiplexer, inverting 4-line to 16-line decoder/demultiplexer with open collector outputs synchronous 4-bit decade counter with asynchronous clear synchronous 4-bit binary counter with asynchronous clear synchronous 4-bit decade counter with synchronous clear synchronous 4-bit binary counter with synchronous clear 8-bit parallel-out serial shift register with asynchronous clear 8-bit serial shift register, parallel Load, complementary outputs parallel-Load 8-bit shift register

synchronous decade rate multiplier synchronous 4-bit up/down decade counter synchronous 4-bit up/down binary counter 4 by 4 register file with open collector outputs quad D-type flip-flops with clear 16-bit multiple port register file with three-state outputs quad d flip-flop with three-state outputs hex d flip-flop with common clear quad d edge-triggered flip-flop with complementary outputs and asynchronous clear presettable decade (bi-quinary) counter/latch presettable binary counter/latch 4-bit parallel-access shift register 4-bit parallel-access shift register with asynchronous clear and complementary Qd outputs 9-bit odd/even parity bit generator and checker 4-bit arithmetic logic unit and function generator lookahead carry generator dual carry-save full adder BCD to binary converter 6-bit binary to BCD converter 512-bit (64x8) read-only memory with open collector outputs 1024-bit (256x4) read only memory with open collector outputs 256-bit (32x8) programmable read-only memory with open collector outputs 64-bit (16x4) ram with inverting three-state outputs synchronous up/down decade counter synchronous up/down binary counter synchronous up/down decade counter with clear synchronous up/down binary counter with clear 4-bit bidirectional universal shift register 4-bit parallel-access shift register presettable decade counter/latch presettable binary counter/latch 8-bit bidirectional universal shift register 8-bit bidirectional universal shift register with J-Not-K serial inputs 256-bit ram with three-state outputs 256-bit (256x1) ram with three-state outputs 256-bit ram with open collector outputs 1024-bit (1024x1) ram with three-state output

octal buffer 64-bit (16x4) ram with noninverting three-state outputs dual monostable multivibrator with schmitt trigger input 16 by 4 synchronous FIFO memory with three-state outputs 16 by 4 synchronous FIFO memory with three-state outputs asynchronous 16x5 FIFO memory 4-bit parallel latched bus transceiver with three-state outputs 64-bit fifo memories 16x4 64-bit fifo memories 16x4 open-collector outputs octal buffer/driver with three-state outputs, true and complementary inputs octal buffer and line driver with three-state outputs, G and /G complementary inputs quad NOR Schmitt trigger 3-of-8 decoder/demultiplexer with address latch, active high outputs 3-of-8 decoder/demultiplexer, active high outputs dual 2-of-4 decoder/demultiplexer, active high outputs octal buffer with Inverted three-state outputs octal buffer with noninverted three-state outputs quad bus transceiver with Inverted three-state outputs quad bus transceiver with noninverted three-state outputs octal buffer with noninverted three-state outputs octal bus transceiver with noninverted three-state outputs BCD to 7-segment decoder/driver with 30 V open collector outputs BCD to 7-segment decoder/driver with 15 V open collector outputs BCD to 7-segment decoder/driver with Internal Pull-up outputs BCD to 7-segment decoder/driver with open collector outputs 1 of 16 data selectors/multiplexers 8-line to 1-line data selector/multiplexer with complementary three-state outputs dual 4-line to 1-line data selector/multiplexer with three-state outputs dual 4-bit addressable latch dual 4-bit addressable latch quad 2-line to 1-line data selector/multiplexer with noninverted three-state outputs quad 2-line to 1-line data selector/multiplexer with Inverted three-state outputs 8-bit addressable latch dual 5-input NOR gate 2-bit by 4-bit parallel binary multiplier look ahead carry generator quad complementary output elements

quad 2-input XNOR gate with open collector outputs hex d-type latches three-state outputs, common output control, common enable 2048-bit (512x4) read only memory with open collector outputs 2048-bit (256x8) read only memory with open collector outputs 8-bit register with reset 4-bit by 4-bit binary multiplier 7-bit slice Wallace tree quad J-Not-K edge-triggered Flip-Flops with separate clocks, common preset and clear 4-bit cascadeable priority registers with latched data inputs quad set-reset latch 9-bit odd/even Parity bit Generator/checker 4-bit parallel binary accumulator look-ahead carry generator with selectable carry inputs 4-bit binary Full adder 4-bit by 4-bit parallel binary multiplier (low order 4 bits of product) 4-bit by 4-bit parallel binary multiplier (high order 4 bits of product) 9-bit parity generator/checker with bus driver parity I/O port 1024-bit (256x4) programmable read-only memory with three-state outputs 256-bit (32x8) programmable read-only memory with three-state outputs 64-bit (16x4) RAM with open collector outputs decade counter (separate divide-by-2 and divide-by-5 sections) 4-bit universal shift register, binary up/down counter, synchronous programmable frequency divider/digital timer 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) programmable frequency divider/digital timer 4-bit bidirectional register with three-state outputs digital phase-locked-loop filter quad 2-input multiplexer with storage 8-bit bidirectional universal shift/storage register with three-state outputs 256-bit (256x1) random access memory with open collector output 1024-bit (1024x1) random access memory with open collector output octal buffer with Schmitt trigger inputs 1024-bit random access memory 64-bit random access memories 16x4 open collector outputs crystal controlled oscillator crystal-controlled oscillators with F/2 and F/4 count-down outputs 8-bit shift register with sign extend, three-state outputs

8-bit bidirectional universal shift/storage register with three-state outputs voltage controlled oscillator (or crystal controlled) octal buffer with Schmitt trigger inputs and three-state inverted outputs octal buffer with Schmitt trigger inputs and three-state noninverted outputs octal buffer with Schmitt trigger inputs and three-state noninverted outputs bcd to seven segment decoders/drivers open collector outputs, low voltage version of 7447 8 to 3-line priority encoder with three-state outputs 4-bit 8-line shifter with three-state outputs dual to 1-line data selectors/multiplexers with three-state outputs and 4 common data inputs dual 4-line to 1-line data selectors/multiplexers with inverting outputs dual 4-line to 1-line data selectors/multiplexers with inverting three-state outputs 8 to 1-line data selector/multiplexer with transparent latch, three-state outputs 8-line to 1-line data selector/multiplexer with transparent registers, open-collector outputs 8 to 1-line data selector/multiplexer with edge-triggered register, three-state outputs 8-line to 1-line data selectors/multiplexers/edge-triggered registers, open-collector outputs bubble memory function timing generator four-phase clock generator/driver octal three-state D-latches hex buffer with noninverted three-state outputs hex buffer with Inverted three-state outputs hex buffer with noninverted three-state outputs hex buffer with Inverted three-state outputs 2048-bit (512x4) read-only memory with three-state outputs 2048-bit (256x8) read-only memory with three-state outputs octal transparent latch with three-state outputs single transparent latch with three-state output octal register with three-state outputs single d-type flip-flop with three-state output quad bistable latch quad J-Not-K flip-flop with common clock and common clear 8-bit register with clock enable 6-bit register with clock enable 4-bit register with clock enable and complementary outputs 8-bit multifunction register 4-bit arithmetic logic unit/function generator with generate and propagate outputs 4-bit arithmetic logic unit/function generator with ripple carry and overflow outputs 8-bit by 1-bit two's complement multipliers

quad 4-bit adder/subtractor quad 2-input XOR gate 1024-bit (256x4) programmable read-only memory with open collector outputs 4-bit register with standard and three-state outputs dual 4-bit decade counter dual 4-bit binary counter 4-bit universal shift register with three-state outputs octal storage registers, parallel access quad 2-input multiplexers with storage and complementary outputs quad multiplexer with storage 1 to 82-input decoder, equivalent to Intel 8205, only found as UCY74S405 so might be non-TI number 8-bit parity tree multi-mode buffered 8-bit latches with three-state outputs and clear re-triggerable mono-stable multivibrators, two inputs dual retriggerable monostable multivibrator two-phase clock generator/driver quad gates with three-state outputs and active low enables quad gates with three-state outputs and active high enables system controller for 8080a line driver/memory driver circuits - mos memory interface, damping output resistor line driver/memory driver circuits - mos memory interface system controller for 8080a quad tridirectional bus transceiver with noninverted open collector outputs quad tridirectional bus transceiver with Inverted open collector outputs quad tridirectional bus transceiver with noninverted three-state outputs quad tridirectional bus transceiver with Inverted three-state outputs quad tridirectional bus transceiver with Inverted and noninverted three-state outputs bcd-to-decimal decoders/drivers quad bus transceivers with direction controls bcd-to-seven-segment decoders/drivers, low voltage version of 74247 quad tridirectional bus transceiver with Inverted and noninverted open collector outputs quad bus transceivers with direction controls, true outputs 16-to-1 multiplexer with complementary outputs dual 8-to-1 multiplexer dual decade counter, synchronous dual binary counter, synchronous quad 4-to-1 multiplexer

dual decade up/down counter, synchronous, preset input dual binary up/down counter, synchronous, preset input NBCD (Natural binary coded decimal) adder bus transfer switch 8-bit presettable binary counter with three-state outputs fiber-optic link transmitter fiber-optic link receiver octal buffer with three-state true outputs octal buffers with three-state inverted outputs octal buffers with three-state true outputs octal buffers with three-state inverted outputs 2048-bit (256x8) programmable read-only memory with open collector outputs 2048-bit (256x8) programmable read-only memory with three-state outputs programmable read-only memory with open collector outputs programmable read-only memory with three-state outputs programmable read-only memory with open collector outputs programmable read-only memory with three-state outputs 4-bit slice cascadable processor elements 4-bit slice expandable control elements BCD-to-binary converter binary-to-BCD converter dual decade counter 10-bit binary up/down counter with limited preset and three-state outputs 8-bit bidirectional shift register with parallel inputs and three-state outputs 8-bit multiplier/divider 8-bit comparator with open collector output, input pull-up resistor 8-bit comparator with open collector output 8-bit comparator with inverted totem-pole output, input pull-up resistor 8-bit comparator with inverted totem-pole output 8-bit comparator with inverted open-collector output, input pull-up resistor fuse programmable identity comparator, 16 bit fuse programmable identity comparator, 8 bit + 4 bit conventional Identity comparator fuse programmable Identity comparator, 12 bit octal transparent latch with 32 ma three-state outputs octal register with 32 ma three-state outputs octal transparent latch with inverting three-state outputs octal register with inverting three-state outputs

octal transparent latch with inverting three-state outputs octal register with inverting 32 ma three-state outputs BCD to decimal decoder with three-state outputs 1 of 8 decoder with three-state outputs dual 1 of 4 decoder with three-state outputs inverting octal buffer with three-state outputs non-inverting octal buffer with three-state outputs non-inverting octal registered transceiver with three-state outputs 8-bit by 8-bit multiplier with three-state outputs 4-bit decade counter with three-state outputs 4-bit binary counter with three-state outputs 8-bit d-type transparent latch with inverting three-state outputs 8-bit d-type edge-triggered register with inverting three-state outputs decade up/down counter with three-state outputs binary up/down counter with three-state outputs octal D-type transparent latch with three-state outputs octal D-type edge-triggered flip-flop with three-state outputs octal D-type flip-flop with synchronous clear, three-state outputs octal D-type flip-flop with inverting three-state outputs octal D-type flip-flop with synchronous clear, inverting three-state outputs octal transceiver/latch with inverting three-state outputs 8-bit shift register with input latch, three-state outputs 8-bit binary counter with output registers and three-state outputs 8-bit binary counters with output registers, open-collector outputs 8-bit binary counter with input registers 8-bit binary counter with input registers and three-state outputs 8-bit shift registers with output latches 8-bit shift registers with output latches, three-state parallel outputs 8-bit shift registers with output latches, open-collector parallel outputs 8-bit shift registers with input latches 8-bit shift register with input latches 8-bit shift registers with output latches, open-collector outputs dynamic memory refresh controller, transparent and burst modes, for 4K or 16K drams dynamic memory refresh controller, transparent and burst modes, for 64K drams dynamic memory refresh controller, cycle steal and burst modes, for 4K or 16K drams dynamic memory refresh controller, cycle steal and burst modes, for 64K drams octal 2-input multiplexer with latch, high-speed, with three-state outputs

latch, high-speed, with open collector outputs octal 2-input multiplexer with latch, glitch-free, with three-state outputs octal 2-input multiplexer with latch, glitch-free, with open collector outputs memory cycle controller memory mapper, latched, three-state outputs memory mapper, latched, open collector outputs memory mapper, three-state outputs memory mapper, open collector outputs Schmitt-trigger positive-nand gates with totem-pole outputs Schmitt-trigger inverters with totem-pole outputs octal bus transceiver, inverting, three-state outputs octal bus transceiver, noninverting, open collector outputs octal bus transceiver, inverting, open collector outputs octal bus transceiver, noninverting, three-state outputs voltage-controlled oscillator with enable control, range control, two-phase outputs dual voltage-controlled oscillator with two-phase outputs dual voltage-controlled oscillator with enable control, two-phase outputs dual voltage-controlled oscillator voltage-controlled oscillator with enable control, range control, external temperature compensation, and two-phase outputs dual voltage-controlled oscillator with enable control, range control 16-bit error detection and correction (EDAC) with three-state outputs 16-bit error detection and correction with open collector outputs 32-bit parallel error detection and correction, three-state outputs, byte-write 32-bit parallel error detection and correction, open-collector outputs, byte-write 32-bit parallel error detection and correction, three-state outputs 32-bit parallel error detection and correction, open-collector outputs octal bus transceiver with inverting three-state outputs octal bus transceiver with noninverting three-state outputs octal bus transceiver with inverting three-state outputs octal bus transceiver with noninverting open collector outputs octal bus transceiver with inverting open collector outputs octal bus transceiver with mix of inverting and noninverting three-state outputs octal bus transceiver with mix of inverting and noninverting open collector outputs octal bus transceiver octal bus transceiver/latch/multiplexer with noninverting three-state outputs octal bus transceiver/latch/multiplexer with noninverting open collector outputs octal bus transceiver/latch/multiplexer with inverting three-state outputs

octal bus transceiver/latch/multiplexer with inverting open collector outputs octal bus transceiver/register with inverting three-state outputs octal bus transceiver/register with noninverting three-state outputs octal bus transceiver/register with inverting three-state and open collector outputs octal bus transceiver/register with noninverting three-state and open collector outputs octal bus transceiver with Parity, inverting octal bus transceiver with Parity, noninverting octal bus transceiver with Parity, inverting octal bus transceiver with Parity, noninverting synchronous 4-bit decade Up/down counter synchronous 4-bit binary Up/down counter 4 by 4 register File with three-state outputs 4-bit bidirectional shift register/latch /multiplexer with three-state outputs 4-bit bidirectional shift register/latch/multiplexer with three-state outputs 16-bit serial-in serial-out shift register with output storage registers, three-state outputs 16-bit parallel-in serial-out shift register with three-state outputs 16-bit address comparator with enable 16-bit address comparator with latch 12-bit address comparator with latch 12-bit address comparator with enable 4-bit parallel binary accumulator 8-bit magnitude comparator 8-bit magnitude comparator with open collector outputs 8-bit magnitude comparator 8-bit magnitude comparator with open collector outputs 8-bit magnitude comparator with enable 8-bit magnitude comparator with enable 8-bit equality comparator 8-bit magnitude comparator with open collector outputs three-state outputs 4-bit binary counter/latch/multiplexer with asynchronous reset, three-state outputs 4-bit decimal counter/latch/multiplexer with synchronous reset, three-state outputs 4-bit decimal binary counter/latch/multiplexer with synchronous reset, three-state outputs 4-bit counter/latch/multiplexer with synchronous and asynchronous resets, threestate outputs 4-bit binary counter/latch/multiplexer with synchronous and asynchronous resets, threestate outputs 4-bit decimal counter/register/multiplexer with asynchronous reset, three-state outputs 4-bit binary counter/register/multiplexer with asynchronous reset, three-state outputs

4-bit decimal counter/register/multiplexer with synchronous reset, three-state outputs 4-bit binary counter/register/multiplexer with synchronous reset, three-state outputs programmable decade counter programmable binary counter voltage controlled multivibrator octal buffer/Line driver, inverting, three-state outputs octal buffer/Line driver, noninverting, three-state outputs, mixed enable polarity octal buffer/Line driver, noninverting, three-state outputs 8 to 3-line priority encoder 8-bit bidirectional binary counter (three-state) synchronous address multiplexer error detection and correction (EDAC) 8-bit register with readback octal buffer with three-state outputs octal buffer with three-state outputs octal buffer with three-state outputs octal buffer with three-state outputs hex 2-input NAND drivers hex 2-input NOR drivers hex 2-input AND drivers 10-bit bus interface flipflop with three-state outputs hex 2-input OR drivers 8 to 3-line priority encoder with three-state outputs octal transparent latch octal d-type flip-flop octal d-type flip-flop with inverting outputs dual 4-bit d-type flip-flop with synchronous clear, noninverting three-state outputs dual 4-bit d-type flip-flop with synchronous clear, inverting three-state outputs octal transparent latchwith inverting outputs arithmetic logic unit 32-bit lookahead carry generator 8-bit slice processor hex inverting TTL buffer hex non-inverting TTL buffer hex inverting CMOS buffer hex non-inverting CMOS buffer 12-Bit successive approximation register

hex open drain n-channel buffers hex open drain p-channel buffers dual CMOS 30 V relay driver quad voltage comparator 256x1 CMOS static RAM 4 digit expandable display controller 6 digit BCD display controller and driver hex schmitt trigger with extended input voltage seven segment to BCD decoder 6 digit Hex display controller and driver dual CMOS 30 V relay driver 256x4 CMOS static RAM 256x4 CMOS static RAM 16-key encoder 20-key encoder 4-digit counter/display driver 4-digit counter/display driver 4-digit counter/display driver 4-digit counter/display driver 1024x1 CMOS static RAM 1024x1 CMOS static RAM phase comparator address bus comparator ADC0829 ADC 3.5-digit digital voltmeter (DVM) support chip for multiplexed 7-segment displays 3.75-digit digital voltmeter (DVM) support chip for multiplexed 7-segment displays ADC3511 ADC ADC3711 ADC octal bus/line drivers/line receivers 4 digit up/down counter with decoder and driver 4 digit up/down counter with decoder and driver ADC0816 ADC ADC0808 ADC ADC0808 ADC hex inverting buffer with open-collector output hex noninverting buffers with open-collector outputs error detection and correction (EDAC)

edac bus buffer, inverting edac bus buffer, noninverting dynamic memory controller memory timing controller for use with EDAC memory timing controller for use without EDAC single 3 input OR-AND Gate; dual 4-input NOR gate dual 4-bit shift registers 5-stage 10 Johnson counter 14-stage binary counter 7 stage ripple carry binary counter BCD to decimal decoder 12-stage binary ripple counter phase-locked loop and voltage-controlled oscillator hex inverting buffer hex buffer/converter (non-inverting) high-speed CMOS 8-channel analog multiplexer/demultiplexer dual 4-channel analog multiplexer/demultiplexers triple 2-channel analog multiplexer/demultiplexers programmable divide-by-N counter 14-stage binary ripple counter with oscillator quad bilateral switches 16-channel analog multiplexer/demultiplexer triple 3-input OR gate 8-input OR/NOR gate 8-bit three-state shift register/latch quad analog switch BCD to 7-segment decoder dual 4-bit synchronous binary counter dual retriggerable precision monostable multivibrator hex buffer quad 2-input XNOR gate 10-bit bus-interface D-type latch with three-state outputs presettable 8-bit synchronous down counter 4-bit by 16-word FIFO register