Design and Fabrication of CMOS ISFET for pH Measurement

MSc viva voce presentation by: Chin Seng Fatt Supervised by: 1. Prof. Dr. Uda bin Hashim 2. En. Mohd Khairuddin bin Md Arshad

School of Microelectronic Engineering Universiti Malaysia Perlis

Presentation Outline
Introduction TCAD Simulation Mask Design Device Fabrication Device Packaging Device Characterization Conclusion Acknowledgments

What is pH?
The pH relation originated from Danish Chemist Sorenson in1909. pH is the unit of measurement for determining the acidity of alkalinity of a solution. The math definition of pH is the negative logarithm of the molar H+: pH = - log ([H+])

Source: wwww.emersonprocess.com

Importance of pH Measurement
Control a Chemical Reaction
Most inorganic reactions are pH neutralizations The rate of many reactions depend on the availability of H+ or OH- ions. Bacterial growth is pH dependent. Corrosion Control Water and Wastewater Treatment Raw Material and Product Quality Control
Source: wwww.emersonprocess.com

pH Measurement Methods
Litmus paper
Simple Quick measurement Color indication

Glass pH Electrode
Higher accuracy Better selectivity

Litmus paper Color indication 2 pH value limitation Preliminary measurement

Glass pH electrode Bulky, fragile High cost of Initial setup Routine maintenance

This This research research proposed proposed an an ISFET ISFET that that can can measures measures the the ionic ionic activity activity in in a a electrolyte electrolyte solution solution and and can can be be fabricated fabricated using using CMOS CMOS technology technology and and materials materials without withoutextra extraprocessing processingsteps steps The Theadvantages advantagesof ofthis thisproposed proposedISFET ISFETinclude: include:
Fast Fastand anddirect directin-situ in-situmonitoring monitoring Robust Robustand andsturdier sturdier Small Smallsize size

What is ISFET?
ISFET is Ion Sensitive Field Effect Transistor Known as chemical or ion sensor Sensing method based on potentiometric detection First developed by Prof. Bergveld in 1970 by using SiO2 as sensing layer Advantages: small size, robust, fast response Applications: medical, environment monitoring agriculture, food industry,

MOSFET and ISFET

Basically the structure of the ISFET is similar to MOSFET The physical difference in the ISFET is the replacement of the gate electrode of the MOSFET by the series combination of reference electrode, electrolyte and ion sensing layer MOSFET operation was controlled by the gate electrode while ISFET operation was controlled by ion concentration in the electrolyte
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Flowchart of How ISFET works

ISFET ISFET Gate Gate voltage voltage exceeds exceeds threshold threshold Inversion Inversion layer layer formed formedat at SiO 2/Si SiO /Si
2

Positive Positive voltage voltage applied appliedto to n+ n+drain drain

N+ N+drain drain make make electrons electrons flow flow

N+ N+source source supply supply electrons electrons

Electrons Electrons flow flowfrom fromS S to toD D

Gate Gatevoltage voltage controls controls electrons electronsand andId Id

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Objective of Research

Research Goals To design the ISFET To characterize the ISFET

To fabricate the ISFET

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Scope of Research
Reviewing and understanding the principles of ISFET Design and simulate the ISFET with TCAD Design and fabricate the ISFET masks Fabrication of the ISFET Testing of the ISFET

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TCAD Process Simulation

Synopsys TCAD is used to perform process and device simulation on ISFET. Process simulation models the fabrication steps of the ISFET. Simulation starts with definition of structure and finishes with a complete device The process simulator used is TSUPREM4
Si3N4 / SiO2 gate Virtual ISFET simulated by TSUPREM4 N N Source metal contact Gate metal contact Drain metal contact

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TCAD Device Simulation

Device simulation in TCAD is the simulation of the device electrical characteristics. The TUSPREM4 ISFET is simulated for its gate and drain characteristics. The characteristics of the ISFET are simulated by applying a set of voltage biases and sweep the biases from one point to another. Device simulator used is Medici.
I-V simulation by Medici
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Mask Design
Layout of ISFET similar to MOSFET: gate, source, drain, contacts. The extended source drain regions separates the metal contacts from gate region during immersion and for straightforward encapsulation. Mask making process is straightforward: CAD design and mask printing. CAD design of individual dies replicated on a wafer to create the wafer layout and then transferred to actual mask. A total of 6 masks created. Material used as the actual mask is transparency.
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Schematic design of the ISFET

Well Mask

(a)

(b)

(a) Schematic design of well (b) AutoCAD design of the Well mask (c) Photograph of the actual mask

(c)
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Source Drain Mask

(b)

(c) (a) Schematic design of source drain (b) AutoCAD design of the source drain masks (c) Photograph of the actual source drain masks 16

(a)

Gate Mask

(b)

(a)

(c)

(a) Schematic design of Gate (b) AutoCAD design of the Gate mask (b) Photograph of the actual Gate mask 17

Contact Mask

(b)

(a)

(c)

(a) Schematic design of Contact (b) AutoCAD design of Contact mask (b) Photograph of actual Contact mask

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Metal Mask

(a)

(b)

(a) Schematic design of metal contact (b) AutoCAD design of the Metal mask (c) Photograph of the actual Metal mask

(c)

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Fabrication of ISFET
ISFET is fabricated using CMOS technology without any post processing steps. All fabrication steps are performed in-house in Microfabrication Lab. The starting material is a 4 inch p-type Silicon wafer. The gate material of the ISFET is made of SiO2 and Si3N4, both CMOS compatible materials. Six masking steps: creation of n-well, n and p source drains, gate, contact and metal. The etching of Si3N4 and SiO2 is done using buffered oxide etch (BOE) solution.
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Equipment modules PECVD system PVD system Wet/dry oxidation furnace N/P diffusion furnace Mask aligner/exposure system Wet etch module Wafer spinner Hot plate

Consumables Silicon wafer 4 inch Buffered oxide etch (BOE) Acetone Positive photoresist DI water Aluminum foil Aluminum etchant SiH4 gas Purified oxygen gas Purified nitrogen gas
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Process Flow of ISFET Fabrication

1. 1. Starting Startingmaterial material Si, Si,p-type, p-type,<100> <100>

2. 2.Field Fieldoxidation oxidation Wet Wetoxidation, oxidation,1000C 1000C 95 95min min 5598 5598 Wet Wetoxidation oxidationfurnace furnace

3. 3.Well Wellcreation creation Well WellMask, Mask,positive positivephotoresist photoresist Resist Resistdevelopment: development:30s 30s Oxide Oxideetch: etch:30 30min min
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Process Flow of ISFET Fabrication

4. 4.Well Wellphosphorus phosphorusdiffusion diffusion Spin-on Spin-ondopant dopantphosphorus phosphorus Diffusion Diffusiondrive-in: drive-in:6 6hours hours N-diffusion N-diffusionfurnace furnace

5. 5.Phosphorus Phosphorussource sourcedrain drainformation formation Source SourceDrain DrainMask, Mask,Positive Positivephotoresist photoresist Spin Spinon ondopant dopant--phosphorus phosphorus N-Diffusion N-Diffusionfurnace: furnace:850C, 850C,25 25min min

6. 6.Boron Boronsource sourcedrain drainformation formation Source SourceDrain DrainMask, Mask,positive positivephotoresist photoresist Spin Spinon ondopant dopant--boron boron P-Diffusion P-Diffusionfurnace: furnace:900C, 900C,30 30min min
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Process Flow of ISFET Fabrication

7. 7.Gate Gateoxide oxideformation formation Gate GateMask Maskphotolithography photolithography Gate Gateoxidation oxidation Dry Dryoxidation oxidationfurnace furnace 1000C 1000C60 60min min 556 556

8. 8.Silicon Siliconnitride nitridePECVD PECVDdeposition deposition Deposition Depositionrate: rate:24.34nm/min 24.34nm/min Deposited thickness: Deposited thickness:486.7 486.7

9. 9.Contact ContactBOE BOEetch etchformation formation Oxide Oxide& &nitride nitrideetch etchwith withBOE BOE Etch Etchtime:30 time:30min min
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Process Flow of ISFET Fabrication

10. 10.PVD PVDcontact contactmetallization metallization PVD PVDmodule module Aluminum Aluminumthickness: thickness:1541 1541 Annealing 22gas Annealing450 450C, C,45 45min, min,N N gas Metal MetalMask, Mask,positive positivephotoresist photoresist Etch Etchrate rateAl: Al:308.2 308.2/min /min Etch Etchtime: time:5 5min minapprox. approx.

ISFET ISFET die die with with metal metal gate gate for for functionality functionality evaluation evaluation ISFET N 33 44 ISFET die die with with Si Si N gate gate will will be be packaged packaged and tested and tested in in pH pH solutions solutions

Photography Photographyof of the thecompleted completedISFET ISFETwafer wafer

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Packaging of ISFET
The packaging process of ISFET: wafer dicing, die mounting, wire bonding and encapsulation. The ISFET die is separated from the wafer and mounted on a PCB as a platform and contacts are wired from die to the PCB. Since the ISFET will work in electrolyte solution, an epoxy is used to encapsulate the edge of the ISFET die, the wire bonding and the PCB. The sensing gate is the only area which is exposed to the solution will not be covered. The type of epoxy used is silicone rubber.
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Packaging Flow of ISFET

1. 1.Diced DicedISFET ISFETfrom fromwafer wafer

2. 2.Mounting MountingISFET ISFETon onPCB PCB 3. 3.Wire Wirebonding bonding

4. 4.ISFET ISFETencapsulation encapsulation

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Characterization of ISFET
The operation of ISFET is analyzed from IdVd and IdVg curves. IdVd and IdVg measurements are done using Keithley 4200 Semiconductor Parameter Analyzer. Two tests are performed on ISFET: functionality test at wafer level and pH test. In functionality test, the ISFET with metal gate is under probes connected to the analyzer. In pH test, the ISFET is immersed in acidic, neutral and base solutions (pH 4, pH 7, pH 10). All solutions obtained from Orion. All measurements were done using Ag/AgCl reference electrode from Hanna Instruments.
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Functionality Test Setup

Schematic Schematicsetup setup

(a)

(a) Dark shielded box wafer probe station (b) Keithley 4200 Semiconductor Parameter Analyzer

(b)

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pH Test Setup

(a) (b) (c)

(d) (a) Keithley 4200 Semiconductor Parameter Analyzer (b) ISFET (c) Reference Electrode (d) pH buffer solutions
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Output characteristics of ISFET

I-V I-Vmeasurements measurementsof ofISFET ISFETperformed performedusing usingKeithley Keithley4200 4200SPA SPAthrough throughwafer waferprobe probestation station

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pH Response of n-ISFET

IdVd IdVdcurves curvesat atVg=5.0V Vg=5.0Vfor forn-ISFET n-ISFETwhen when measured measured in in three three levels levels of of pH pH buffer buffer solution solution

Sensitivity, Sensitivity,S S= = Vth Vth/ / pH pH = = Vg Vg/ / pH pH = 40.34 mV/pH = 40.34 mV/pH

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pH Response of p-ISFET

IdVd IdVd curves curves at at Vg=-5.0V Vg=-5.0V for for p-ISFET p-ISFET when when measured measured in in three three levels levels of of pH pH buffer buffer solution solution

Sensitivity, Sensitivity,S S= = Vth Vth/ / pH pH = = Vg Vg/ / pH pH = 34.83 mV/pH = 34.83 mV/pH

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Discussions
ISFET operates by accumulating H+ from solution at gate. The positive charge on gate is mirrored on the inner side of semiconductor where a channel of negative charge occurs. This makes ISFET conductive. The lower pH, more H+ accumulates, more current flow between source and drain.

Image Source: http://www.my.endress.com/

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Conclusions
A CMOS ISFET pH sensor has been successfully designed, fabricated and characterized. Simulation on ISFET is successfully achieved using TCAD. Mask layout successfully designed using AutoCAD and fabricated on transparency masks. Fabrication of ISFET using all in-house CMOS technology required no extra masking or post processing step. The ISFET successfully detected buffer solutions of different pH. Based on the results obtained, the CMOS ISFET showed a fairly good response as a pH sensor and has potential for commercialization. 35

Research Achievements
Research Publications
International Journal International Conference Regional Conference Local Conference 1 4 3 5

Award Medals
Gold Medal Silver Medal Bronze Medal 1 3 2

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Recommendation
SPICE simulation Simulation of pH response of ISFET Miniaturization of ISFET Sub-micron size device, chrome masks Lower cost of fabrication, mass production Packaging of the ISFET Precise wafer dicing by automation Proper encapsulation material and technique Sampling Experiments Larger samples of pH on both acidic and basic tests
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Acknowledgement
The financial support from UniMAP and Malaysian Ministry of Science, Technology and Innovation (MOSTI). Guidance and advices from supervisors Motivational supports from families, researchers, friends.

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