1.

LINEAR WAVE SHAPING

AIM: To understand linear wave shaping using RC high pass and Low pass circuits. APPARATUS:
1. Bread Board 2. Resistor- 1K-1No. 3. Regulated power suppl !. capacitors- "."1#$ % 1 No. &. Connecting wires. '. (unction )enerator. *. CR+ ,ro-es .. CR+

CIRCUIT DIAGRAM: i) High pass circui :

ii) L!" pass circui :

THE#R$:
The linear wave shaping circuits alter the shape o$ a wave$or/ - passing the/ though a process o$ di$$erentiation or integration. 0igh pass circuits allow high $re1uenc signals and attenuate low $re1uenc signals. 0igh pass circuits acts as a good di$$erentiator $or RC22T. Low pass circuits allows low $re1uenc signals and attenuates high $re1uenc signals. Low pass circuits acts as a good 3ntegrator $or RC44T.

PR#CEDURE: i) High pass RC circui :

1. Be$ore connection calculate the ti/e constant 5. 2. Connect high pass RC circuit as per the circuit shown in $igure. 3. Connect a s1uare wave generator to the input o$ the circuit. !. Connect the CR+ channel-3 to the input and channel-33 to the output o$ circuit. &. 6d7ust the s1uare wave a/plitude to &8 pea9 to pea9 : note down the input wave$or/. '. 6d7ust the $re1uenc o$ s1uare wave generator such that i; T22 5 ii; T< 5 iii; T44 5 *. +-serve and note down the output wave$or/s in each case. .. Now calculate = tilt $ro/ the output wave$or/ $or case T22 5 and chec9 whether it is e1ual to theoretical value or not.

i) L!" pass RC circui :

1. Be$ore connection calculate the ti/e constant 5. 2. Connect low pass RC circuit as per the circuit shown in $igure. 3. Connect a s1uare wave generator to the input o$ the circuit. !. Connect the CR+ channel-3 to the input and channel-33 to the output o$ circuit. &. 6d7ust the s1uare wave a/plitude to &8 pea9 to pea9 : note down the input wave$or/. '. 6d7ust the $re1uenc o$ s1uare wave generator such that i; T22 5 ii; T< 5 iii; T44 5 *. +-serve and note down the output wave$or/s in each case. .. Now calculate rise ti/e tr $ro/ output wave$or/s $or case T22 5 and veri$ whether it is e1ual to theoretical value or not.

E%PECTED WAVE&#RM: 3nput wave $or/>

+ut put wave $or/s> i; 0igh ,ass Circuit

ii; Low ,ass Circuit

THE#RITICAL CALCULATI#NS: 0igh pass circuit>

' i( ) *T+, RC) %1--

Low pass circuit>

Ris. i/. )
r

) ,., RC

RESULT:
Linear wave shaping using RC high pass and Low pass circuits is studied.

VIVA01UESTI#NS:
1; ?hat is the action o$ Capacitor $or ac and dc signals@ 2; ?hat is the action o$ 3nductor $or ac and dc signals@ 3; ?hat are 0igh pass and Low ,ass circuits@ !; 3n which conditions high pass and low pass circuits acts as a di$$erentiator and 3ntegrator@ &; ?hich circuits we have to use to get a triangular wave $or/ $ro/ A1uare wave input@

,. N#N LINEAR WAVE SHAPING CLIPPER CIRCUITS

AIM: To stud the diode clipper circuit using ordinar and Bener Ciodes. APPARATUS:
1. Bread Board 2. ,atch cards 3. CR+ ,ro-es !. CR+ &. Capacitor- ".1#$ '. Regulated power suppl *. 3N !""* diode-1No. .. Connecting wires. D. (unction )enerator.

THE#R$:
Clipping circuits are co//onl realiEed with diodes and resistor and do not contain an energ storing co/ponents. The $unction per$or/ed - the clipping circuits essentiall either li/iting or slicing. These circuits also e/plo devices such as diodesF Bener diodesF and transistors along with resistors. 6/plitude selectors and 6/plitude li/iters are the other na/es o$ the clipping circuits

PR#CEDURE:
1. Connect the circuits as per the circuit diagra/ 2. Connect the CR+ Ch-3 to input and Ch-233 to output o$ the circuit. 3. 6d7ust the input sine wave a/plitude to &8 ,-,. !. Connect the C.C.-atter wherever necessar . &. +-serve the wave $or/ in the CR+ channel 33 and not the wave$or/.

RESULT:
Ciode clipper circuit using ordinar and Bener Ciode are studied and o-served the wave$or/s.

VIVA01UESTI#NS:
1; ?hat is clipper@ ?hich active devices are used in clipper circuits@ 2; ?hat are the ideal characteristics o$ diode@ 3; ?hat is nonlinear wave shaping@ !; 0ow did ou get the trans$er characteristics in clipper circuits@ &; 0ow the transistor used as a clipper@

2. N#N LINEAR WAVE SHAPING CLAMPER

AIM: To stud the Cla/per circuits. APPARATUS:
1. Bread Board 2. ,atch cards 3. CR+ ,ro-es !. CR+ &. Resistor- 1K-1No. '. Regulated power suppl *. 3N !""* diode-1No. .. BBG'82 diode- 2 No. D. Connecting wires. 1". (unction )enerator.

CIRCUIT DIAGRAM:

N.ga i3. c(a/p.r

P!si i3. c(a/p.r

Biased Negative Cla/per

Biased ,ositive Cla/per

Biased Negative cla/per

Biased ,ositive Cla/per

THE#R$:
Cla/ping circuits do not /a9e an e$$ort to change the wave shape o$ an signal. Their /ain concern is to introduce a dc shi$t into a wave$or/ - altering its dc co/ponent. 3n RC coupling and capacitive couplingF the -loc9ing capacitor does not allow the dc co/ponent o$ the applied signal to pass through it. Aince all the sinusoidal co/ponents pass through the -loc9ing capacitorF the wave shape o$ the signal re/ains the sa/e a$ter trans/ission while its dc level is -rought down to Eero. Cla/ping circuits are essentiall used to restore this lost dc co/ponent.

PR#CEDURE:
1. Connect the circuits as per the circuit diagra/ 2. Connect the CR+ Ch-3 to input and Ch-233 to output o$ the circuit. 3. 6d7ust the input sine wave a/plitude to &8 ,-,. !. (or Bener diode clipperF increase the a/plitude o$ the input ?ave $or/ to 1&8 ,-, &. +-serve the wave $or/ in the CR+F with and without connecting the C.C.-atter Hi.e. -iasing; and note the wave $or/ $ro/ Ch-33 o$ CR+.

RESULT:
The cla/ping circuits are studied.

VIVA01UESTI#NS:
1; ?hat is cla/per and what is the /ain $unction o$ cla/per circuit@ 2; ?hat output signal we can eIpect i$ sinusoidal signal is applied to cla/per circuit@ 3; ?hat are the other na/es o$ cla/per circuits@ !; 3n a diode cla/ping circuit with resistor R across the diodeF the purpose o$ R is in Cla/per circuit@ &; ?hat is cla/ping circuit theore/@

4. N#N LINEAR WAVE SHAPING USING TRANSIST#R

AIM: To stud the non linear wave shaping using a transistor. APPARATUS:
1. Bread Board 2. ,atch cards 3. CR+ ,ro-es !. CR+ &. Resistors- 1""KF 2.2KF !*"F '."F ".1J( '. Regulated power suppl *. BC 1"* Transistor-1No. .. Capacitor 1"J( D. Connecting wires. 1". (unction )enerator.

CIRCUIT DIAGRAM:

THE#R$:

Cla/ping circuits do not /a9e an e$$ort to change the wave shape o$ an signal. Their /ain concern is to introduce a dc shi$t into a wave$or/ - altering its dc co/ponent. 3n RC coupling and capacitive couplingF the -loc9ing capacitor does not allow the dc co/ponent o$ the applied signal to pass through it. Aince all the sinusoidal co/ponents pass through the -loc9ing capacitorF the wave shape o$ the signal re/ains the sa/e a$ter trans/ission while its dc level is -rought down to Eero. Cla/ping circuits are essentiall used to restore this lost dc co/ponent.

PR#CEDURE:
1. Connect the circuits as per the circuit diagra/ 2. Connect the CR+ Ch-3 to input and Ch-233 to output o$ the circuit. 3. 6d7ust the input sine wave a/plitude to &8 ,-,. !. +-serve the wave $or/ in the CR+F with and without connecting the C.C.-atter Hi.e. -iasing; and note the wave $or/ $ro/ Ch-33 o$ CR+.

RESULT:
The cla/ping and clipper circuits using BKT is studied.

VIVA01UESTI#NS:
1; ?hat is cla/per and what is the /ain $unction o$ cla/per circuit@ 2; ?hat output signal we can eIpect i$ sinusoidal signal is applied to cla/per circuit@ 3; ?hat are the other na/es o$ cla/per circuits@ !; ?hat is cla/ping circuit theore/@ &;?hat is clipper@ ?hich active devices are used in clipper circuits@ ';0ow did ou get the trans$er characteristics in clipper circuits@ *; 0ow the transistor used as a clipper@

5.TRANSIST#R AS A SWITCH

AIM: To stud the $unction o$ transistor as a switch. APPARATUS:

1. Basic logic trainer 2. ,atch cards 3. Resistors- 33"F 19F 33KF !*K -1No each. '. Regulated power suppl *. BC 1"* npn transistor. .. Capacitor ".1#$ % 1 No. D. Connecting wires.

CIRCUIT DIAGRAM:

TRUTH TA6LE: A " 1 $ 1 "

THE#R$:
Transistor is operated in three di$$erent regions. i.e. active regionF saturation region F cuto$$ region. Transistor acts as an a/pli$ier in active region whereas it acts as a closed switch H+N switch; in saturation region and closed switch H+(( switch; in cuto$$ region.

PR#CEDURE:
1. Connect the circuits as per the circuit diagra/ 2. +-serve the changes in the output according to the changes in the input 3. (or/ the truth ta-le.

RESULT:
(unction o$ the transistor as a switch is veri$ied.

VIVA01UESTI#NS:
1; ?hat is the value o$ the $orward resistanceF Reverse resistance and Cutin voltage o$ 3deal diode@ 2; 3n which regions the transistor acts as a switch@ 3; Ce$ine settling ti/eF rise ti/e and return ti/e@ !; ?hat is the purpose o$ 8cc is applied in transistor switch circuit@ &; ?hich devices are used $or switching purpose@

7. STUD$ #& L#GIC GATES

AIM: To stud and veri$ the truth ta-le o$ 6NCF N+RF +RF N+TF N6NC )ate
HCiscrete version;

APPARATUS:
1. Bread Board 2. 3C trainer Kit ,atch cards 3. Ciodes 3N!""* !. Resistors H19F 1""F !.*9F 33"F 1"K; &. Capacitors H".1#$; !. Connecting wires.

CIRCUIT DIAGRAM:

THE#R$:
3n digital electronicsF the -inar digits " and 1 are represented - voltages L+? and 03)0. This -ranch o$ electronics is /athe/aticall supported - Boolean alge-ra. The -asic logic operations in this alge-ra are N+TF 6NC : +R. These logic operators are -inar as the wor9 on two operands to speci$ the output.

PR#CEDURE:
1. Connect the circuit as per the circuit diagra/. 2. )ive di$$erent co/-inations o$ inputs and o-serve the output. 3. Construct the truth ta-les $or each circuit considering the input and output levels o$ the circuit.

RESULT:
The truth ta-les o$ 6NCF +RF N+TF N+RF N6NC gates are veri$ied.

VIVA01UESTI#NS:
1; ?hat is logic gate and - using which devices we can realiEe the logic gates@ 2; ?hat is co/-ination circuit@ ?hat is truth ta-le@ 3; RealiEe the N6NC gate using 6NCF+R and N+T gates@ !; RealiEe logic gates using transistors@ &; ?hat is 3C and give so/e 3CLs na/e $or logic gates@

8. ASTA6LE MULTIVI6RAT#R
AIM: To stud an 6sta-le Multivi-rator to generate a s1uare wave using 6sta-le
/ultivi-rator.

APPARATUS:
1. C.C. Regulated power suppl 2. Cual Trace CR+ 3. Resistors !. CapacitorsNCecade capacitance -oI. &. Bread Board.

CIRCUIT DIAGRAM:

THE#R$:
Transistor /ultivi-rators /a9e use o$ all the three regions o$ operations> cut-o$$F saturationF as well as the active region. The wor9ing principle o$ transistor /ultivi-rators involves the cuto$$ and saturation regions. 6sta-le /ultivi-rator can also -e treated as a relaIation oscillator. The asta-le /ultivi-rator has two 1uasi-sta-le states. This circuit is co//onl used $or the generation o$ a rectangular wave$or/.

PR#CEDURE:
1. Connect the circuit diagra/ according to the given diagra/. 2. 6ppl C.C.power suppl to the circuit. 3. +-serve the -ase and collector voltages o$ O1 and O2 on CR+. !. Measure the ti/e period o$ the output wave$or/s and co/pare with theoretical 8alues. &. Repast the a-ove steps with di$$erent capacitance values $ro/ decade capacitance.

THE#RITICAL CALCULATI#NS:
T<".'DHRB1C1PRB2C2; 3$ RB1C1<RB2 < R : C1 < C2<C

T <1.3.RC RESULT:
The wor9ing o$ 6sta-le /ultivi-rator is studied and +-served the practical values and wave$or/s.

VIVA01UESTI#NS:
1; ?hat is /ultivi-rator@ )ive so/e na/es o$ the /ultivi-rators@ 2; ?hat are the applications o$ asta-le /ultivi-rator@ 3; ?hich /ultivi-rator is used as a voltage to $re1uenc converter@ !; 3n which /ultivi-rator we have to appl triggering pulses to change the states o$ transistor@ &; 0ow /an sta-le states are there in asta-le /ultivi-rator@

9. M#N#STA6LE MULTIVI6RAT#R

AIM: To stud Monosta-le Multivi-rator to generate a s1uare wave APPARATUS:

1. C.C. Regulated power suppl 2. Cual Trace CR+ 3. Resistors !. CapacitorsNCecade capacitance -oI. &. Bread Board.

CIRCUIT DIAGRAM:

THE#R$:

PR#CEDURE:
1. Connect the circuit diagra/ according to the given diagra/. 2. 6ppl C.C.power suppl to the circuit. 3. +-serve the -ase and collector voltages o$ O1 and O2 on CR+.

!. Measure the ti/e period o$ the output wave$or/s and co/pare with theoretical 8alues. &. Repeat the a-ove steps with di$$erent capacitance values $ro/ decade capacitance.

THE#RITICAL CALCULATI#NS:
T<".'DHRB1C1PRB2C2; 3$ RB1C1<RB2 < R : C1 < C2<C

T <1.3.RC RESULT:
The wor9ing o$ Mono sta-le /ultivi-rator is studied and +-served the practical values and wave$or/s.

:. 6I STA6LE MULTIVI6RAT#R

AIM: To stud Bista-le Multivi-rator to generate a s1uare wave APPARATUS:

1. C.C. Regulated power suppl 2. Cual Trace CR+ 3. Resistors !. CapacitorsNCecade capacitance -oI. &. Bread Board.

CIRCUIT DIAGRAM:

THE#R$:
The Bista-le Multivi-rator is another t pe o$ two state device si/ilar to the /onosta-le /ultivi-rator. 6is a;(. Mu( i3i;ra !rs have TW# sta-le states Hhence the na/e> QBiQ /eaning two; and /aintain a given output state inde$initel unless an eIternal trigger is applied. The -ista-le /ultivi-rator can -e switched over $ro/ one sta-le state to the other - the application o$ an eIternal trigger pulse thusF it re1uires two eIternal trigger pulses -e$ore it returns -ac9 to its original state. 6s -ista-le /ultivi-rators have two sta-le states the are /ore co//onl 9nown as Latches and (lip-$lops $or use in se1uential t pe circuits.

PR#CEDURE:
1. Connect the circuit diagra/ according to the given diagra/. 2. 6ppl C.C.power suppl to the circuit.

3.8eri$ the sta-le states - /easuring the voltages at two collectors - using /ulti/eter . !. +-serve the -ase and collector voltages o$ O1 and O2 on CR+. &. Measure the ti/e period o$ the output wave$or/s and co/pare with theoretical 8alues. '. Repeat the a-ove steps with di$$erent capacitance values $ro/ decade capacitance

RESULT:
The wor9ing o$ Bista-le /ultivi-rator is studied and +-served the practical values and wave$or/s.

VIVA01UESTI#NS:
1; ?hat is /ultivi-rator@ )ive so/e na/es o$ the /ultivi-rators@ 2; ?hat are the applications o$ -ista-le /ultivi-rator@ 3; ?hich /ultivi-rator is used as a voltage to $re1uenc converter@ !; 3s triggering re1uired $or a -ista-le /ultivi-rator@ &; 0ow /an sta-le states are there in -ista-le /ultivi-rator@

1-. SCHMITT TRIGGER

AIM: To design and stud the Ach/itt trigger circuit as the e/itter coupled Bista-le

/ultivi-rator.

APPARATUS:
1. 2. 3. !. &. '. *. Trainer 9it ,atch cords CR+ CR+ ,ro-e Regulated power suppl (unction generator

CIRCUIT DIAGRAM:

THE#R$:
There are no reactive co/ponents in the regenerative $eed-ac9 pathR there would not -e an transients in the circuit. 6s a result o$ these purel resistive connectionsF the Ach/itt trigger circuit has two sta-le states. This Ach/itt trigger has two sta-le states resulting $ro/ the presence o$ regenerative $eed-ac9 in the circuit. The circuit $unctions as a /ultivi-rator onl when the loop gain is greater than unit .

E<p.c .= Wa3.>!r/:

PR#CEDURE:
1. The power suppl is switched +N 2. The C.C input o$ the circuit is /easured which is used to $ind out the ST, and LT,. 3. The suppl is connected to the C.C input o$ the circuit. !. The C.C voltage is increased in steps o$ ".1v and the voltage at which the transition to higher level is /easured. &. The a-ove voltage is designated as ST,. '. The voltage is now decreased in steps o$ ".1v and the voltage at which the reverse transition ta9es place is noted . *. The a-ove voltage is designated as LT,. .. 6 sinewavwe o$ sa/e a/plitude sa v volts is applied to the 6.C o the input circuit. D. The output is o-served as s1uare wave. 1". The 0 sterisis loop is o-served in the CR+.

RESULT:
The Ach/itt Trigger is designed and studied.

VIVA01UESTI#NS:
1; The other na/e o$ Ach/itt trigger circuit. 2; 0ow did ou get the h sterisis voltage $ro/ Ach/itt Trigger@ 3; ?hen loop gain is oneF 0ow the Ach/itt trigger circuit acts@ !; Ce$ine ST, and LT,@ &; ?hat are the applications o$ Ach/itt trigger@

11. U?T RELA%ATI#N #SCILLAT#R

AIM: To stud the relaIation oscillator using uni 7unction transistor. APPARATUS:
1. 2. 3. !. Bread Board ,atch cords CR+ CR+ ,ro-es

CIRCUIT DIAGRAM:

E%PECTED WAVE&#RM:

THE#R$:
Sni 7unction transistor has onl one 7unction. 3t is used to generate saw tooth wave $or/s i.e. ti/e -ase signals. SKT is used as a relaIation oscillator. 6 relaIation oscillator is one which gives saw tooth wave$or/s without giving an input signal.

PR#CEDURE:
1. Connect the circuit as per the diagra/ 2. Awitch on the suppl and the capacitor is ta9en across the capacitor Ce. 3. +-serve the output wave$or/ and calculate the ti/e period.

RESULT:
The SKT relaIation oscillator is studied.

VIVA01UESTI#NS:
1; ?hat is an oscillator@ 2; ?hat is relaIation oscillator@ 3; ?hat are the di$$erent /ethods are used to generate ti/e -ase wave$or/s@ !; ?hat are the applications o$ relaIation oscillator@ &; ?hat are di$$erences -etween diode and SKT@

1,. 6##TSTRAP SWEEP GENERAT#R

63M> 1. To stud the wor9ing o$ Bootstrap sweep generator circuit.
2. To /easure the sweep and slope error o$ the sa/e.

APPARATUS:
1. 2. 3. !. Bootstrap sweep generator trainer 9it Cual trace cathode ra oscilloscope (unction )enerator CR+ ,ro-e and ,atch cords

CIRCUIT DIAGRAM:

THE#R$:
The techni1ue o$ directl connecting output ter/inal to the input o$ this circuit is ter/ed as -ootstrapping in electronic ter/inolog . 6nalogous to the /ove/ent o$ the actual -ootstrapsF the input and the output o$ the circuit rise and $all si/ultaneousl .

PR#CEDURE:
1. Awitch on eIperi/ental 9it 2. 8eri$ the s1uare wave generator output 3. Connect the s1uare wave generator output to the input o$ the -ootstrap !. +-serve the output o$ circuit on channel -2 &. Connect decade capacitance -oI across C '. 8ar the values o$ capacitor in steps $ro/ 1""p$ to 1#$ and see output ?ave $or/s. *. Co/pare the output and input wave$or/s with the wave $or/s shown in $igure.

RESULT:
The wor9ing procedure and output wave$or/s o$ a -ootstrap Aweep Circuits is veri$ied.

VIVA01UESTI#NS:
1; ?hich is used to i/prove the linearit o$ -ootstrap ti/e -ase generator@ 2; ?hat is the voltage gain o$ an a/pli$ier used with -ootstrap sweep theoreticall @ 3; ?hat is the principle involved in Miller and Boot strap circuits@ !; ?hat is relationship -etween esF ed and et @ &; ?hat is the /ain application o$ voltage ti/e -ase wave$or/s@