Galileo Schematic

8
REVISION HISTORY
ZONE
REV
DESCRIPTION
DATE
APPROVED
D
D
GALILEO
INTEL QUARK X1000
C
FAB D
PB: G87173-204
PBA:G87171-400
LB6V1
LB1
EMPTY
LB3
LABEL
LABEL
WEEE_LABEL_9X5MM
A
WEEE
1500X500_TARGET
SERIAL NUMBER
1375X250_TARGET
MAC ADDRESS LABEL
DRAWN BY
DATE
APPROVED BY
DATE
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE
GALILEO
DOCUMENT NUMBER
REV
G87171
1.0
SHEET 1 OF 27
8
Order Number: 329682-001US
TABLE OF CONTENTS
SHEET NUMBER
D
SHEET NAME
SHEET NUMBER
SHEET NAME
TITLE PAGE
TABLE OF CONTENTS
DISCLAIMER
SYSTEM BLOCK DIAGRAM
QUARK DDR3 & PCIE
QUARK GPIO
QUARK MISC
QUARK POWER
QUARK DECOUPLING
SDRAM 1
SDRAM 2
SDRAM TERMINATION
MINI PCIE CONNECTOR
MICRO SD CONNECTOR
USB CONNECTORS
UART 1
LAN
SPI: ADC&FLASH
I2CPROM & JTAG CONN
QUARK STRAPS
EXTERNAL IO MUXING
ANALOG CONNECTOR & MUXES
EXTERNAL IO CONNECTORS
VOLTAGE REGULATORS
VOLTAGE REGULATORS
VOLTAGE REGULATORS
POWER BUTTONS & MISC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
TABLE OF CONTENTS
REV:
1.0
G87171
SHEET 2 OF 27
1
Intel Galileo Design Document

This Intel Galileo design document is licensed by Intel under the terms of the Creative Commons Attribution Share-Alike License (ver. 3),
subject to the following terms and conditions.
The Intel Galileo design document IS PROVIDED "AS IS" AND "WITH ALL FAULTS." Intel DISCLAIMS ALL OTHER WARRANTIES,
EXPRESS OR IMPLIED REGARDING THE GALILEO DESIGN OR THIS GALILEO DESIGN DOCUMENT INCLUDING, BUT NOT LIMITED
TO, ANY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
Intel may make changes to the specifications, schematics and product descriptions at any time, without notice. The Customer must not rely
on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition
and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. ENJOY!
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
DISCLAIMER
REV:
1.0
G87171
SHEET 3 OF 27
1
D
D
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
SYSTEM BLOCK DIAGRAM
2
REV:
1.0
G87171
SHEET 4 OF 27
1
QUARK_X1000_R1P2
BGA393
U2A5
13D7<>
12C6<
11B6<
2
1
0
D
13A8<>
12B6< 11B6<
13B8<>
12B6< 11B6<
13A8<>
12B6< 11A6<
13D7<>
12C3< 11C3<>
M_CAS_N
M_RAS_N
M_WE_N
M_MA<15..0>
OUT
OUT
OUT
BI
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
C
13D4<
13C4<
12B6<
12B6<
11D2<
11D2<
11B6<
11B6<
12B6<
11B6<
BI
13A8<>
12B6<
11B6<
BI
12B6<
11B6<
BI
6A7>
6A7>
IN
IN
V1P5_S0
7A6>
7A6>
1
B
BI
13A8<>
13A8<>
M_CK<0>
BI
M_DQ<15..0>
DDR3
M_BS<2..0>
BI
AR13
AT26
AP26
DDR3_BS<2>
DDR3_BS<1>
DDR3_BS<0>
AN29
AR27
AP28
DDR3_CASB
DDR3_RASB
DDR3_WEB
AT14
AP14
AR29
AR15
AN15
AN24
AP16
AR17
AN17
AR20
AN20
AT21
AP21
AR22
AN22
AR24
DDR3_MA<15>
DDR3_MA<14>
DDR3_MA<13>
DDR3_MA<12>
DDR3_MA<11>
DDR3_MA<10>
DDR3_MA<9>
DDR3_MA<8>
DDR3_MA<7>
DDR3_MA<6>
DDR3_MA<5>
DDR3_MA<4>
DDR3_MA<3>
DDR3_MA<2>
DDR3_MA<1>
DDR3_MA<0>
AG30
AJ30
DDR3_CK<1>
DDR3_CK<0>
DDR3_DQ<15>
DDR3_DQ<14>
DDR3_DQ<13>
DDR3_DQ<12>
DDR3_DQ<11>
DDR3_DQ<10>
DDR3_DQ<9>
DDR3_DQ<8>
DDR3_DQ<7>
DDR3_DQ<6>
DDR3_DQ<5>
DDR3_DQ<4>
DDR3_DQ<3>
DDR3_DQ<2>
DDR3_DQ<1>
DDR3_DQ<0>
AR11
AT10
AN5
AT5
AP10
AR9
AP4
AT3
AK12
AH12
AJ6
AG6
AH15
AL15
AK11
AL11
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DDR3_DQS<1>
DDR3_DQS<0>
AN6
AK7
1
0
DDR3_DQSB<1>
DDR3_DQSB<0>
AR6
AH7
1
0
AL25
M_DRAMRST_N
AM29
AL19
AH23
AK23
DDR3_ODTPU
DDR3_DQPU
DDR3_CMDPU
AK19
AH19
M_CKE<0>
AP12
AN11
DDR3_CKE<1>
DDR3_CKE<0>
AT32
AT31
DDR3_ODT<1>
DDR3_ODT<0>
RESERVED
RESERVED
M_CS_N<0>
AP31
AN31
DDR3_CSB<1>
DDR3_CSB<0>
RESERVED
RESERVED
AK17
AL17
DDR_PWROK
DDR_ISYSPWRGOOD
AK25
AH25
DDR3_IDRAM_PWROK
DDR3_ISYSPWRGOOD
RESERVED
RESERVED
AT34
AR35
7.5K 1%
0402LF CH
12C3<>
BI
11A6<
274 1%
0402LF CH
R3L7
12B6<
34 1%
0402LF CH
R3L5
32.4 1%
0402LF CH
EMPTY
R3L9
RSVD_2
RSVD_3
EMPTY
V1P5_S0
R2B1
RSVD_4
10K 5%
0402LF CH
AJ1
R2A10
PCIE_RBIAS
INTERNAL REFCLK USED ON PCIE
AE2
AE4
PCIE_REFCLKP
PCIE_REFCLKN
ONLY 1 PCIE IS USED
AK2
AK4
PCIE_PERP_1
PCIE_PERN_1
PCIE_PETP_1
PCIE_PETN_1
AH4
AH2
ONLY 1 PCIE IS USED
AM2
AN1
PCIE_PERP_0
PCIE_PERN_0
PCIE_PETP_0
PCIE_PETN_0
AD3
AD1
PCIE0_TX0_P_C
PCIE0_TX0_N_C
IN
IN
11C3<>
OUT
OUT
AJ3
PCIE0_RX0_P
PCIE0_RX0_N
BI
12C3<
11C3<
PCIE_RBIAS
14B2<
14B2<
12C3<>
R3L8
RSVD_0
RSVD_1
PCIE
R2A8
11C3<>
R3L6
DDR3_DRAMRSTB
DDR3_VREF
DDR3_ODTPU
DDR3_DQPU
DDR3_CMDPU
BI
VREF
M_DQS_N<1..0>
DDR3_DM1
DDR3_DM0
DDR3_CKB<1>
DDR3_CKB<0>
M_ODT<0>
M_DQS<1..0>
AP7
AL12
AH29
AL30
12C3<>
DDR3_DM<1>
DDR3_DM<0>
M_CK_N<0>
11C3<>
BI
PCIE_IRCOMP
AE10
AA10
RESERVED
RESERVED
PCIE_IRCOMP
RSVD_5
RSVD_6
EMPTY
R3L10
R3L14
EMPTY
0
0
0402LF
7.5K 1%
0402LF CH
C3A4
PCIE0_TX0_P
OUT
14B2>
OUT
14B2>
0.1UF 10%
16V
X7R
0402LF
1 OF 5
C3A3
IC
PCIE0_TX0_N
0.1UF 10%
16V
X7R
0402LF
V1P5_S3
A
1 R4L2
1 R4L1
2 CH
2 CH
1K
1%
0402LF
1/16W
1K
1%
0402LF
1/16W
DDR_PWROK
DDR_ISYSPWRGOOD
OUT
6B7<
7A6>
OUT
6B7<
7A6>
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
QUARK DDR3 & PCIE
REV:
1.0
G87171
SHEET 5 OF 27
1
V3P3_S0
1 R3A13
R2B8
OUT
SPI0_SCK
33.2
R2B11 CH SPI0_SCK_R
OUT
IN
SPI1_MOSI
33.2
R2B9 CH SPI1_MOSI_R
22D4<>
OUT
SPI1_SCK
33.2
R3M6 CH SPI1_SCK_R
21D3>
SPI1_MISO
21A6>
DS3A1
R3A12
22C8>
14B7<
14B7<
22C3<
BI
BI
BI
BI
22B6>
BI
GP_LED
1K
1%
GREEN
LED
22D5<>
22D5<>
C2A6
CLN_IO3_PU_EN
CLN_IO2_PU_EN
GPIO_INT_IO3
GPIO_INT_IO2
INT_N_S0
XRES
22D8<
22D8<
22D4<>
22D4<>
22C5>
22A8<
BI
BI
BI
BI
BI
BI
22C4<>
OUT
SPI1_CS_N
19B5<
OUT
SPI0_CS_N
33.2
OUT
IN
OUT
OUT
R2M5 CH
R3M2 CH
LVL_OE_R
33.2
R3M1 CH
LVL_INT_S3_R
33.2
33.2
33.2
33.2
33.2
33.2
33.2
33.2
33.2
33.2
CLN_IO3_PU_EN_R
R2B21 CH
CLN_IO2_PU_EN_R
R2B20 CH
GPIO_INT_IO3_R
R3M14 CH
GPIO_INT_IO2_R
R3M10 CH
INT_S0_R
CH
R3M8
XRES_R
CH
R3M5
GPIO3_R
R3M13 EMPTY
SPI1_CS_N_R
R2B7 CH
R2B29 EMPTY GPIO1_R
R2B14 CH SPI0_CS_N_R
33.2
C3A10
18PF 5%
0402LF COG
VCCRTCEXT
1 R2A9
Y2A1
32.768KHZ
XTAL
10M
5%
2 CH
0402LF
1/16W
RTCX2
CAD NOTE:
TRACE TO CRYSTAL HAS
TO BE LENGTH MATCHED
28A4>
28C5>
IN
IN
28D7>
21A3>
14B8>
IN
IN
IN
AK32
AN35
AM33
AM35
LSPI_MOSI
LSPI_MISO
LSPI_SS_B
LSPI_SCK
J15
G15
E15
J12
E12
G11
GPIO_SUS<5>
GPIO_SUS<4>
GPIO_SUS<3>
GPIO_SUS<2>
GPIO_SUS<1>
GPIO_SUS<0>
W33
V34
V32
U33
T34
T32
R35
R33
N34
N32
GPIO<9>
GPIO<8>
GPIO<7>
GPIO<6>
GPIO<5>
GPIO<4>
GPIO<3>
GPIO<2>
GPIO<1>
GPIO<0>
G3
J2
RTCX2
RTCX1
J11
IVCCRTCEXT
J7
E11
A4
G7
RESET_N
EC_PWRBTN_N
WAKE_N
RTCRST_N
28B6<
10K 5%
0402LF CH
C3L8
1UF
10%
6.3V
X5R
0402LF
V3P3_RTC
27C6<
28C5<
C2L1
1UF
10%
6.3V
X5R
0402LF
D6
L2
A5
B4
RESET_BTN
PWR_BTN
WAKE_B
GPE_B
26B5<
26D5<
28A5>
OUT
OUT
IN
S3_1V5_EN
S3_3V3_EN
S3_PGOOD
K1
K3
J4
S3_1V5_EN
S3_3V3_EN
S3_PG
25B7<
26B3<
26D3<
25D3>
OUT
OUT
OUT
IN
S0_1V0_EN
S0_1V5_EN
S0_3V3_EN
PG_V1P0_S0
F4
F2
E4
D2
S0_1V0_EN
S0_1V5_EN
S0_3V3_EN
S0_1P0_PG
R2L9
RTCRST_B
RTC_EXT_CLK_EN_B
S0_PG
S5_PG
6B7<
6B7<
25A2<
25A2<
IN
IN
6A7>
6A7>
OUT
OUT
VNNSENSE
VSSSENSE
J30
H30
R3
T2
DDR_PWROK
DDR_ISYSPWRGOOD
B6
C7
TCK
TDI
TDO
TMS
TRST_B
M3
N4
R1
N2
L4
PRDY_B
PREQ_B
E7
B2
RESERVED
RESERVED
0402LF
1/16W
V3P3_S5
I2C_SDA
I2C_SCL
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
20A4>
20A5>
20A5<
20B4>
20A5>
IN
IN
OUT
IN
IN
TP1
AT2
AR1
OUT
TP0
TP1
XTAL_IN
XTAL_OUT
AA2
AB1
RESERVED
RESERVED
B1
A2
R3L2
TP2A1
T_POINT1
1M 5%
0402LF CH
1
TP
Y3L1
25.000MHZ
CLN_XTAL_IN
CLN_XTAL_OUT
R3A24
RSVD_7
RSVD_8
EMPTY
REF0_OUTCLK
REF0_OUTCLK_P
REF0_OUTCLK_N
M8
M6
REF1_OUTCLK_P
REF1_OUTCLK_N
J6
H6
CKSYS25OUT
W7
CKSYS25OUT
FLEX0_CLK
FLEX1_CLK
FLEX2_CLK
V4
V2
U3
FLEX0_CLK
FLEX1_CLK
FLEX2_CLK
RMII_REF_CLK_OUT
T4
RMII_REF_CLK_R
100MHZ
REFCLK0_P
REFCLK0_N
OUT
OUT
R3L11
REF1_P
REF1_N
110
CH
0: EXTERNAL CLOCK FROM RTCX1/RTXC2

1: INTERNAL CLOCK
XTAL
G91801-001
2
C3L6
18PF
5%
50V
COG
0402LF
R2A5
RMII_REF_CLK_OUT
18B8<
OUT
00
0402LF CH
OSC_COMP
W3
OSC_COMP
HPLL_REFCLK_P
HPLL_REFCLK_N
V7
V5
EXT_REFCLK_HPLL
AF11
AD11
RSVD_9
RSVD_10
R2A12
49.9
1%
CH
0402LF
1/16W
R3L3
R3L12
0
10K 5%
0402LF CH
EMPTY
R2A13
49.9
1%
CH
R2A14
49.9
1%
CH
AC4
2 OF 5
1 R2A11
7.5K
1%
2 CH
R2L11
10K
5%
CH
0402LF
0402LF
1/16W
A93548-194
2111 NE 25TH AVENUE

HILLSBORO OR 97124
TITLE:
R3L13
49.9
1%
CH
NOT USED
V1P5_S5
INTEL CORPORATION
25MHZ - NOT USED
IC
1K 1%
0402LF EMPTY
C3L5
18PF
5%
50V
COG
0402LF
14D5<
14D5<
R2L10
RTC_EXT_CLK_EN_B
TP2
PRDY_B
PREQ_B
TP
PAD_BYPASS_CLK
R2L21
49.9
1%
EMPTY
0402LF
CAD NOTE:
PLACE NEAR BGA
RESERVED
RESERVED
14B2<>
23A7<>
14B2< 23A7<>
BI
BI
T_POINT1
VNNSENSE
VSSSENSE
ODRAM_PWROK
OSYSPWRGOOD
I2C_DATA
I2C_CLK
2.2K
5%
2 CH
TP2A2
PWRMGMT
28A7<
SPI1_MOSI
SPI1_MISO
SPI1_SS_B
SPI1_SCK
GPE_N NOT USED (INTERNAL PU)
V3P3_RTC
RTC32K_CLK_SEL
S0_PGOOD
S5_PGOOD
AH32
AK34
AJ33
AH34
RTC
A0_N_R
RTCX1
18PF 5%
0402LF COG
C3L13
0.1UF
10%
16V
X7R
0402LF
LSPI_MOSI_R
LSPI_MISO
LSPI_CS_N_R
LSPI_SCK_R
SPI0_MOSI
SPI0_MISO
SPI0_SS_B
SPI0_SCK
GPIO
E16297-001
A0_N
GPIO_SUS4_W_DISABLE_N
GPIO_SUS3_PCIE_RESET_N
LVL_OE
GPIO_SUS1_STATUS_LED
INT_N_S3
19D6<
19C1>
19C6<
19C6<
AG35
AG33
AE34
AE32
SPI
19A4<
21D5>
22C4<>
21D4>
22D4<>
21B1>
CH SPI0_MOSI_R
I2C
OUT
IN
33.2
DFX
ON-BOARD ADC
SPI0_MOSI
SPI0_MISO
BGA393
CRU/PLL
U2A5
21D7>
19A4<
19A1>
1 R3A15
2.2K
5%
2 CH
0402LF
1/16W
QUARK_X1000_R1P2
DOCUMENT NUMBER:
GALILEO
QUARK GPIO
REV:
1.0
G87171
SHEET 6 OF 27
1
QUARK_X1000_R1P2
U2A5
R3L4
8.06K
1%
2 CH
0402LF
1/16W
NOT USED, LEAVE FLOATING
NOT USED (INTERNAL PU)
R3A20
10K
1%
CH
0402LF
CLK14
THRM_B
SMI_B
LEGACY
D9
B9
C10
PD_CLK14
RESERVED
RESERVED
TS_IREF_N
TS_TDA
TS_TDC
TS
AA4
W5
W9
AC7
AC5
TS_IREF_N
BGA393
USBH1_DP
USBH1_DN
P29 USBH1_DP
P30 USBH1_DN
USBH0_DP
USBH0_DN
V30 USBH0_DP
V29 USBH0_DN
USBD_DP
USBD_DN
M29 USBH2_DP
M31 USBH2_DN
USB_CLK96P
USB_CLK96N
USB
RESERVED
RESERVED
USB0_OC_B
USB1_OC_B
BI
BI
14B3<>
14B3<>
BI
BI
16C6<>
16C6<>
BI
BI
16B6<>
16A6<>
V3P3_S0
R3B4
10K
5%
CH
0402LF
1/16W
M35
M33
L34
L32 RSVD_12
EMPTY
G35 USB_OC0_N
J32 USB_OC1_N
IN
USBH0_PWR_EN
USBH1_PWR_EN
F34 USB_PWR_EN0
G33
IUSBCOMP_N18
OUSBCOMP_P18
K33 USBCOMP
J34
OUT
16C5>
16C8<
1 R2B2
15C6>
15A5<
3
2
1
0
BI
OUT
CLN_SD_CMD
CLN_SD_CLK
IN
OUT
CLN_SD_CD_N
SD_LED
17B8>
17B8<
17B8>
17B8<
IN
OUT
IN
OUT
IN
OUT
R2L4
CH CLN_SD_CLK_R
SD_CMD
SD_CLK
SD_WP
SD_CD_B
SD_LED
SD_PWR
UART0_RXD
UART0_TXD
AD29
AC27
AA32
W29
AD28
W30
AA34
W35
SIU0_CTS_B
SIU0_DCD_B
SIU0_DSR_B
SIU0_DTR_B
SIU0_RI_B
SIU0_RTS_B
SIU0_RXD
SIU0_TXD
UART1_CTS_N
UART1_RTS_N
UART1_RXD
UART1_TXD
AB33
AD33
AC34
AC32
SIU1_CTS_B
SIU1_RTS_B
SIU1_RXD
SIU1_TXD
MAC0_TXEN
MAC0_TXDATA<1>
MAC0_TXDATA<0>
MAC0_RXDV
MAC0_RXDATA<1>
MAC0_RXDATA<0>
MAC0_MDC
MAC0_MDIO
MAC1_TXEN
MAC1_TXDATA<1>
MAC1_TXDATA<0>
MAC1_RXDV
MAC1_RXDATA<1>
MAC1_RXDATA<0>
MAC1_MDC
MAC1_MDIO
C16 RMII_REFCLK
C21
D22
A21
C18
B20
D20
RMII_S0_TX_EN_R
RMII_S0_TXD1_R
RMII_S0_TXD0_R
RMII_S0_RX_DV
RMII_S0_RXD1
RMII_S0_RXD0
D17 RMII_S0_MDC_R
B17 RMII_S0_MDIO_R
C12
B15 RMII_S1_TXD1
D15 RMII_S1_TXD0
C14
B13
D13
IN
33.2
33.2
33.2
33.2
33.2
OUT
OUT
22.6
1%
18B5>
21B4>
21D1>
2 CH
R2M12
R2M14
R2M8
CH
CH
CH
RMII_S0_TX_EN
RMII_S0_TXD1
RMII_S0_TXD0
OUT 18C5<
OUT 18C5<
OUT 18C5<
IN 18C1>
IN 18C1>
IN 18C1>
R2M7
R2M11
CH
CH
RMII_S0_MDC
RMII_S0_MDIO
OUT
BI
0402LF
1/16W
21B7>
21B6>
18C5< 18C7>
18C2<>
18C6<>
ONLY USED FOR STRAPS

B
B11
D11
UART
22C4<>
22C4<>
33.2
B22
J19
G19
E19
E17
G17
SDIO
15C6<>
21A7> 15C6<
BI
SD_DATA<7>
SD_DATA<6>
SD_DATA<5>
SD_DATA<4>
SD_DATA<3>
SD_DATA<2>
SD_DATA<1>
SD_DATA<0>
ETHERNET
15C6<>
CLN_SD_DAT<3..0>
C28
B27
D27
A26
C26
B24
D24
C23
RMII_REF_CLK
TXD OUTPUT FROM QUARK

3 OF 5
A
IC
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
QUARK MISC
REV:
1.0
G87171
SHEET 7 OF 27
1
V1P0_S0
V1P0_S3_IVR
FB3L1
V3P3_S0
QUARK_X1000_R1P2
V1P0_S5_IVR
0.5A
C3L21
1UF
10%
6.3V
X5R
0402LF
10
AB14
AD14
AB13
P14
T13
V16
V14
AD13
Y14
T11
P11
V11
V1P0_S0_FLT
V1P5_S0
V1P5_S3
V1P5_S5
T18
V1P8_S3_IVR
V1P05_S0_IVR
V1P0_S5_IVR
V1P8_S5_IVR
V1P8_S0_IVR
1
2 V1P5_S3_LC
FB3M1 0.5A
BGA393
U2A5
C3L14
1UF
10%
6.3V
X5R
0402LF
10
R26
T24
V13
R10
AD31
AD5
AT28
VCCFSOC_1P05
VCCFHVSOC_1P05
VCCAICLKSSC1_1P0
VCCAICLKSFR_1P5
VCCSFRPLLDDR_1P5
VCC1P5_S0
VCCCLKDDR_1P5
VCCAUSB_1P8_S3
VCCAA_1P8
VCCAUSB_1P8
VCC1P8_S0
VCC1P8_S0
VCC1P8_S3
VCC1P8_S5
VCC3P3_S3
VCC3P3_S5
K14
P5
VCC3P3_S0
VCC3P3_S0
VCC3P3_S0
AA26
AB24
AD24
VCCRTC3P3
E1
VCCAICLKSE_3P3
VCC3P3_A
VCC3P3_USB_S3
VCCAVISA_1P0
VCCDDR_1P5
VCCDDR_1P5
VCCDDR_1P5
VCCDDR_1P5
K20
K22
P22
P20
T20
K18
K13
V3P3_S5
VCCADDR_1P0
VCCADLLDDR_1P0
VCCACLKDDR_1P0
VCC1P0_S3
VCC1P0_S5
VCC1P0_S0
VCC1P0_S0
VCCPLLDDR_1P0
VCCAPCIE_1P0
VCCAICLKCB_1P0
VCCDICLKDIG_1P0
VCCAICLKDBUFF_1P0
AT12
AT16
AT18
AT23
V3P3_S3
VNN
VNN
VNN
VNN
VNN
VNN
VNN
V3P3_RTC
P7
F30
K16
AB18
AB20
Y18
V18
Y20
Y16
V20
OVOUT_1P05_S0
OVOUT_1P0_S3
OVOUT_1P0_S5
P24
M14
T14
OVOUT_1P8_S0
OVOUT_1P8_S3
OVOUT_1P8_S5
P18
M18
K11
OVOUT_1P8_SLDO
K24
VSSA_USB
P16
V1P0_S0
V1P05_S0_IVR
C
V1P0_S3_IVR
V1P8_S0_IVR
V1P8_S3_IVR
V1P0_S5_IVR
V1P8_S5_IVR
V1P8_SLDO_IVR
4 OF 5
IC
C3M3
1UF
10%
6.3V
X5R
0402LF
CAD NOTE
PLACE AS CLOSE AS POSSIBLE TO SIGNAL VIAS
STITCHING CAPS FOR SPLIT PLANES
STITCHING CAPS FOR SIGNAL REFERENCE TRANSITION

V1P5_S5
V3P3_S5
V3P3_S5
V3P3_S3
V3P3_S0
V1P0_S0
C2A10
V3P3_S3
C1L3
0.1UF
10%
16V
X7R
0402LF
V3P3_S0
C4B7
0.1UF
10%
16V
X7R
0402LF
0.1UF 10%
16V
X7R
0402LF
C1M13
0.1UF
10%
16V
X7R
0402LF
V3P3_S5
C1M14
0.1UF
10%
16V
X7R
0402LF
VBUS1
C3A22
0.1UF
10%
16V
X7R
0402LF
V3P3_S0
V5_ALW_ON
C3M12
0.1UF
10%
16V
X7R
0402LF
C2M10
0.1UF
10%
16V
X7R
0402LF
C3B18
0.1UF
10%
16V
X7R
0402LF
C4A3
0.1UF
10%
16V
X7R
0402LF
C3M13
0.1UF
10%
16V
X7R
0402LF
V1P5_S3
V1P5_S5
C1B1
0.1UF
10%
16V
X7R
0402LF
C2A8
0.1UF
10%
16V
X7R
0402LF
C2A7
0.01UF
10%
50V
X7R
0402LF
C2A9
0.1UF
10%
16V
X7R
0402LF
C3A23
0.1UF
10%
16V
X7R
0402LF
C3A20
0.01UF
10%
50V
X7R
0402LF
C3A21
0.01UF
10%
50V
X7R
0402LF
C3B16
0.01UF
10%
50V
X7R
0402LF
C4B6
0.01UF
10%
50V
X7R
0402LF
C2B13
0.01UF
10%
50V
X7R
0402LF
C2B12
0.01UF
10%
50V
X7R
0402LF
C3B17
0.01UF
10%
50V
X7R
0402LF
C3A24
0.1UF
10%
16V
X7R
0402LF
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
QUARK POWER
REV:
1.0
G87171
SHEET 8 OF 27
1
V3P3_S0
QUARK_X1000_R1P2
V3P3_S3
U2A5
D
1
2
C3M1
1000PF
10%
50V
X7R
0402LF
A36096-046
1
2
C3M2
1000PF
10%
50V
X7R
0402LF
C3L30
1000PF
10%
50V
X7R
0402LF
C3M8
1000PF
10%
50V
X7R
0402LF
C3M7
1000PF
10%
50V
X7R
0402LF
C3M6
1000PF
10%
50V
X7R
0402LF
C3M5
1000PF
10%
50V
X7R
0402LF
C3L19
0.01UF
10%
50V
X7R
0402LF
V3P3_S5
1
2
C3L9
1UF
10%
6.3V
X5R
0402LF
1
2
C3L10
1UF
10%
6.3V
X5R
0402LF
V1P8_S3_IVR
V1P5_S5
V1P5_S3
1
1
2
C3L23
2.2UF
10%
6.3V
X5R
0603LF
1
2
C3M4
2.2UF
10%
6.3V
X5R
0603LF
1
2
C3L16
2.2UF
10%
6.3V
X5R
0603LF
C3L25
1000PF
10%
50V
X7R
0402LF
A36096-046
C3L12
2.2UF
10%
6.3V
X5R
0603LF
C3L27
1000PF
10%
50V
X7R
0402LF
C3L11
1UF
10%
6.3V
X5R
0402LF
V1P0_S0
B
1
2
C3B10
22UF
20%
6.3V
X5R
0603LF
602433-081
1
2
C2B2
22UF
20%
6.3V
X5R
0603LF
C3L17
1UF
20%
4V
X5R
0201LF
C3L22
10UF
20%
4V
X5R
0402LF
A36096-108
C3L15
1UF
20%
4V
X5R
0201LF
C3L18
1UF
20%
4V
X5R
0201LF
C3L20
1UF
20%
4V
X5R
0201LF
C3L26
1UF
20%
4V
X5R
0201LF
C3L29
1UF
20%
4V
X5R
0201LF
C83410-012
C3L24
1UF
20%
4V
X5R
0201LF
C3L28
1UF
20%
4V
X5R
0201LF
BGA393
A7
A10
A12
A14
A16
A18
A23
A31
AB3
AB11
AB16
AD35
AB35
AC2
AC9
AC29
AC30
AD18
AD6
AD8
AD16
AN13
AE26
AF13
AF22
AF24
AG1
AG3
AH11
AH17
AK15
AJ35
AK29
AF20
AL6
AL23
AM1
AM4
AM7
AM32
AN9
E32
D33
D31
D29
F32
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AP23
AP33
AT7
AN27
AP18
F6
H17
B33
D5
U1
V27
G1
G12
J25
K35
M1
M11
M5
M16
M13
M22
M28
P9
AD20
P13
P27
Y22
T16
T22
U35
V9
V22
W1
W27
Y11
Y13
AP2
C1
A28
A34
B29
C35
E35
B31
B35
A32
M26
E25
J23
M24
Y24
G25
AF16
G23
M20
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
AD22
AF14
AB22
V24
E23
G29
AF18
J29
E29
5 OF 5
IC
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
QUARK DECOUPLING
REV:
1.0
G87171
SHEET 9 OF 27
1
V1P5_S3
V1P5_S3
13D4<
12B6<
11B6<
6C7<>
IN
M_CK<0>
CAD NOTE:
PLACE 0.1UF DECOUPLING AS CLOSE AS POSSIBLE TO DRAM POWER PINS
1
D
C1A19
22UF
20%
6.3V
X5R
0805LF
1
2
1
2
V1P5_S3
C1A15
0.1UF
10%
16V
X7R
0402LF
VREF
C4M4
0.1UF
10%
16V
X7R
0402LF
C1A23
0.1UF
10%
16V
X7R
0402LF
VREF
C1A22
0.1UF
10%
16V
X7R
0402LF
13C4<
C4M3
0.1UF
10%
16V
X7R
0402LF
C1A25
0.1UF
10%
16V
X7R
0402LF
U1B5
MT41K128M8
B9
C1
E2
E9
VDDQ
VDDQ
VDDQ
VDDQ
A2
A9
D7
G2
G8
K1
K9
M1
M9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
J8
VREFCA
E1
VREFDQ
J3
K8
J2
BA<2>
BA<1>
BA<0>
M_BS<2..0>
12C6< 6D7<>
13D7<>
IN
13A8<>
12B6<
6C7<>
IN
M_ODT<0>
G1
ODT
13A8<>
12B6<
6C7<>
IN
M_CKE<0>
G9
CKE
H8
ZQ
F7
CK
G7
CK_N
M_CS_N<0>
H2
CS_N
M_CAS_N
G3
CAS_N
B
13D4<
12B6<
11D2<
6C7<>
13C4<
12B6<
11D2<
6C7<>
2
1
0
R4M1
IN
M_CK<0>
IN
M_CK_N<0>
240 1%
0402LF CH
ZQ_1
13A8<>
12B6<
6B7<>
13A8<>
12B6<
6D7>
IN
13B8<>
12B6<
6D7>
IN
M_RAS_N
F3
RAS_N
IN
M_WE_N
H3
WE_N
IN
M_DRAMRST_N
N2
RESET_N
13A8<>
12B6<
12B6<
6D7>
6C3<>
IN
A3
F1
F9
H1
H9
J7
N7
NC_A3
NC_F1
NC_F9
NC_H1
NC_H9
NC_J7
NC_N7
12B6<
11B6<
6C7<>
IN
C4M1
1PF
.25PF
25V
COG
0402LF
M_CK_N<0>
C1A24
2.2UF
10%
6.3V
X5R
0603LF
DM/TDQS
NF/TDQS_N
B7
A7
DDR3_DM0
IN
DQS
DQS_N
C3
D3
M_DQS<0>
M_DQS_N<0>
M_DQ<7:0>
DQ<7>
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<2>
DQ<1>
DQ<0>
E7
D2
E8
E3
C8
C2
C7
B3
BI
BI
BI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_N
A13
K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
B8
C9
D9
D1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
7
6
5
4
3
2
1
0
M_MA<15:0>
BI
6C3>
6C3<>
6C3<>
6D3<>
6D7<>
12C3<
13D7<>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DESIGN NOTE:
A14, A15 ALLOW FOOTPRINT COMPATIBILITY WITH
2GBIT(256MBIT X 8) AND 4GBIT (512MBIT X8) DEVICES
IC
G83568-001
SDRAM 1
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
SDRAM 1
REV:
1.0
G87171
SHEET 10 OF 27
1
V1P5_S3
CAD:
PLACE 0.1UF DECOUPLING AS CLOSE AS POSSIBLE TO DRAM PINS
D
D
V1P5_S3
1
2
VREF
2
C1A16
0.1UF
10%
16V
X7R
0402LF
C4M2
0.1UF
10%
16V
X7R
0402LF
C1A14
2.2UF
10%
6.3V
X5R
0603LF
C4L3
0.1UF
10%
16V
X7R
0402LF
C1A21
0.1UF
10%
16V
X7R
0402LF
U1A1
VREF
C1A20
0.1UF
10%
16V
X7R
0402LF
C1A13
0.1UF
10%
16V
X7R
0402LF
13D7<>
11B6<
6D7<>
B9
C1
E2
E9
VDDQ
VDDQ
VDDQ
VDDQ
A2
A9
D7
G2
G8
K1
K9
M1
M9
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
J8
VREFCA
E1
VREFDQ
J3
K8
J2
BA<2>
BA<1>
BA<0>
G1
ODT
G9
CKE
H8
ZQ
F7
CK
M_BS<2..0>
IN
2
1
0
13A8<>
11B6<
6C7<>
IN
M_ODT<0>
13A8<>
11B6<
6C7<>
IN
M_CKE<0>
R4L19
ZQ_2
240 1%
0402LF CH
13D4<
11D2<
11B6<
6C7<>
IN
M_CK<0>
13C4<
11D2<
11B6<
6C7<>
IN
M_CK_N<0>
G7
CK_N
13A8<>
11B6<
6B7<>
IN
M_CS_N<0>
H2
CS_N
6D7>
IN
13A8<>
11B6<
13B8<>
11B6<
6D7>
13A8<>
11A6<
6D7>
11A6<
6C3<>
MT41K128M8
M_CAS_N
G3
CAS_N
IN
M_RAS_N
F3
RAS_N
IN
M_WE_N
H3
WE_N
M_DRAMRST_N
N2
RESET_N
A3
F1
F9
H1
H9
J7
N7
NC_A3
NC_F1
NC_F9
NC_H1
NC_H9
NC_J7
NC_N7
IN
DM/TDQS
NF/TDQS_N
B7
A7
DQS
DQS_N
C3
D3
DQ<7>
DQ<6>
DQ<5>
DQ<4>
DQ<3>
DQ<2>
DQ<1>
DQ<0>
E7
D2
E8
E3
C8
C2
C7
B3
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC_N
A13
K3
L7
L3
K2
L8
L2
M8
M2
N8
M3
H7
M7
K7
N3
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
B2
B8
C9
D9
D1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A1
A8
B1
D8
F2
F8
J1
J9
L1
L9
N1
N9
DDR3_DM1
M_DQS<1>
M_DQS_N<1>
M_DQ<15:8>
15
14
13
12
11
10
9
8
IN
BI
BI
BI
6C3>
6C3<>
6C3<>
6D3<>
M_MA<15:0>
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
IN
6D7<>
11C3<>
13D7<>
DESIGN NOTE:
A14, A15 ALLOW FOOTPRINT COMPATIBILITY WITH
2GBIT(256MBIT X 8) AND 4GBIT (512MBIT X8) DEVICES
IC
G83568-001
SDRAM 2
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
SDRAM 2
REV:
1.0
G87171
SHEET 11 OF 27
1
VTT
12C6<
11B6<
6D7<>
BI
VTT
M_BS<2:0>
36.5 R4L23
36.5 R4L22
36.5
0402LF
12C3<
11C3<>
6D7<>
BI
C1A5
0.1UF
10%
16V
X7R
0402LF
R1A20
1%
CH
VTT
M_MA<15..0>
15
36.5
R1A19
14
36.5
R4L7
13
36.5
R1A18
12
36.5
11
36.5
10
36.5
R4L14
36.5
R4L8
36.5
R4L18
36.5
R1A2
36.5
R1A3
36.5
R4L17
36.5
R1A5
36.5
R1A4
36.5
R4L6
36.5
R4L5
36.5
R4L16
12B6<
12B6<
11D2<
11D2<
11B6<
11B6<
6C7<>
6C7<>
IN
M_CK<0>
IN
M_CK_N<0>
R4L11
30.1
0402LF
M_CK_CAP
C4L2
0.1UF
10%
16V
X7R
0402LF
1%
CH
R4L10
30.1
0402LF
1%
CH
R4L21
R4L20
VTT
C
C1A7
0.1UF
10%
16V
X7R
0402LF
C1A8
0.1UF
10%
16V
X7R
0402LF
C1A10
0.1UF
10%
16V
X7R
0402LF
C1A6
0.1UF
10%
16V
X7R
0402LF
C1A9
0.1UF
10%
16V
X7R
0402LF
CAD:
DITRIBUTE DECOUPLING AMONG
TERMINATION RESISTORS
1%
G73524-001
12B6<
11B6<
6D7>
12B6<
11B6<
6D7>
12B6<
11A6<
6D7>
BI
M_RAS_N
36.5
R4L12
BI
M_CAS_N
36.5
R4L13
BI
M_WE_N
36.5
R4L15
36.5
R4L3
12B6<
11B6<
6C7<>
BI
M_CKE<0>
12B6<
11B6<
6B7<>
BI
M_CS_N<0>
36.5
R4L4
12B6<
11B6<
6C7<>
BI
M_ODT<0>
36.5
R1A6
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
SDRAM TERMINATION
REV:
1.0
G87171
SHEET 12 OF 27
1
MH1
MH3
MTG_HOLE_4V
MTG_HOLE_4V
1
3
4
5
6
1
3
4
5
6
7B2>
7B2>
IN
IN
REFCLK0_N
REFCLK0_P
D
CONN
CONN
MH2
MH4
MTG_HOLE_4V
MTG_HOLE_4V
1
3
4
5
6
1
3
4
5
6
CONN
V1P5_S0
PCIE SLOT 0
CONN
C3A25
0.1UF
10%
16V
X7R
0402LF
V3P3_S3
C3A26
0.1UF
10%
16V
X7R
0402LF
C3A1
22UF
20%
6.3V
X5R
0805LF
C3A2
0.1UF
10%
16V
X7R
0402LF
C3A7
0.1UF
10%
16V
X7R
0402LF
A36096-030
R2A1
1K
1%
CH
0402LF
1/16W
V3P3_S3
7B6<
OUT
B
7C7<>
7C7<>
+1.5V
+3.3VAUX
WAKE_N
CLKREQ_N
3
5
COEX1
COEX2
FULL_MINI_CARD
V3P3_S3
REFCLK+
REFCLK-
13
11
UIM_DATA
UIM_CLK
UIM_RESET
UIM_PWR
UIM_VPP
10
12
14
8
16
GND
GND
GND
4
9
15
KEY
WAKE_N
R3A5
1K
1%
CH
0402LF
1/16W
MPCIE_52P_LATCH_KIT
J2L1
R3A8
1K
1%
CH
0402LF
1/16W
28
48
+1.5V
+1.5V
PETP0
PETN0
33
31
PCIE0_TX0_P
PCIE0_TX0_N
24
39
41
52
+3.3VAUX
+3.3VAUX
+3.3VAUX
+3.3VAUX
PERP0
PERN0
25
23
PCIE0_RX0_P
PCIE0_RX0_N
LED_WPAN_N
LED_WLAN_N
LED_WWAN_N
46
44
42
IN
GPIO_SUS4_W_DISABLE_N
20
W_DISABLE_N
IN
GPIO_SUS3_PCIE_RESET_N
22
PERST_N
USB_D+
USB_DSMB_DATA
SMB_CLK
RESERVED PINS, NO CONNECT
17
19
45
47
49
51
RESERVED/UIM_C8
RESERVED/UIM_C4
RESERVED
RESERVED
RESERVED
RESERVED
MP1
MP2
MP1
MP2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
18
21
26
27
29
34
35
37
40
43
50
6B2>
6A2>
IN
IN
6B7<
6B7<
38 USBH1_DP
36 USBH1_DN
32
30
OUT
OUT
SLT0_SDA
SLT0_SCL
R3A4
BI
BI
8D3<>
8D3<>
2
R3A3 I2C_SDA
1
2 I2C_SCL
0
0402LF EMPTY
0
0402LF EMPTY
BI
IN
7D2<> 23A7<>
7D2<> 23A7<>
KIT_PARTS=(LATCH: QTY=1)
C59768-003
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
MINI PCIE CONNECTOR
2
REV:
1.0
G87171
SHEET 13 OF 27
1
V3P3_S0
U1L1
CM1230_02
D
B2
VP
A2
CH1
D
CH2
B1
VN
A1
CH2
B1
VN
A1
IC
U1L2
CM1230_02
B2
VP
A2
CH1
MICRO SD CONNECTOR
IC
V3P3_S0
CONN_SDCARD_8P_PP
J4A2
21A7>
1
2
C1L1
1UF
10%
6.3V
X5R
0402LF
C1L2
1UF
10%
6.3V
X5R
0402LF
33.2
33.2
33.2
R2L13 CH
R2L6 CH
R2L12 CH
CLN_SD_DAT2_R
CLN_SD_DAT3_R
CLN_SD_CMD_R
CLN_SD_DAT<0>
CLN_SD_DAT<1>
33.2
33.2
R2L7 CH
R2L8 CH
CLN_SD_DAT0_R
CLN_SD_DAT1_R
CLN_SD_CD_N
33.2
R2L5 CH
CLN_SD_CD_N_R
8B7<>
8B7<>
8B8<>
BI
BI
BI
CLN_SD_DAT<2>
CLN_SD_DAT<3>
CLN_SD_CMD
8B8>
IN
CLN_SD_CLK
8B7<>
8B7<>
BI
BI
8B8<
OUT
V3P3_S0
1
2
3
4
5
6
7
8
U1L3
CM1230_02
B2
VP
A2
CH1
CH2
B1
VN
A1
DAT2
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DAT1
9
10
CARD_DET_SW
CARD_DET_SW
G1
G2
G3
G4
G1
G2
G3
G4
CONN
G46739-001
B
V3P3_S0
IC
U1L4
CM1230_02
B2
VP
A2
CH1
CH2
B1
VN
A1
IC
8B8>
IN
SD_LED
DS4A2
2
R1L10
LED_SD
1K 1%
0402LF CH
GREEN
E16297-001
CAD NOTE:
PLACE SD LED CLOSE TO THE SDIO CONN
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
MICRO SD CONNECTOR
REV:
1.0
G87171
SHEET 14 OF 27
1
CAD NOTE:
PLACE C2B11 AS CLOSE AS
POSSIBLE TO U3B1 PIN5
VBUS1
V5_ALW_ON
V3P3_S0
LED_VBUS1
1
2
1 R2B15
C2B11
0.1UF
10%
16V
X7R
0402LF
1%
CH
C2M7
100UF
20%
6.3V
X5R
1210LF
DS3B1
GREEN
LED
10K
5%
2 CH
0402LF
1/16W
SOT23LF
U3B1
USB HOST
R3B12
1K
0402LF
C3M11
47UF
20%
6.3V
X5R
0805LF
1
2
C3B14
470PF
10%
50V
X7R
0603LF
8C3>
IN
USB_PWR_EN0
4
R3B3 1
10K
5%
CH 2
0402LF
1/16W
IN
EN
OUT
OC_N
GND
J2B3
MICRO_USB_5P_SMT
TPS2051BDBVR
NOTE:
TYPE AB CONN
USB_OC0_N
OUT
CAD NOTE:
PLACE CHOKE AND DIODES CLOSE TO USB CONN
8C3<
USBH0_DN_CH
USBH0_DP_CH
L3M2
90OHM
CHOKE_4P
8D3<>
BI
USBH0_DN
8D3<>
BI
USBH0_DP
IC
E58210-001
VCC
2
3
DD+
ID
GND
MT
MT
MT
MT
MT
MT
MT1
MT2
MT3
MT4
MT5
MT6
HDR
E77884-001
C
IND
E53905-001
V5_ALW_ON U2B2
CM1230_02
B2
VP
A2
CH1
CH2
B1
VN
A1
IC
D30400-001
USB CLIENT
VBUS_IN
NOTE:
TYPE B CONN
L3M1
90OHM
J3B2
CHOKE_4P
8C3<>
8C3<>
BI
BI
USBH2_DP
USBH2_DN
3
IND
E53905-001
CAD NOTE:
PLACE CHOKE AND DIODES CLOSE TO USB CONN
MICRO_USB_5P_SMT
USBH2_DN_CH
USBH2_DP_CH
V5_ALW_ON
U2B3
B2
VP
A2
CH1
VCC
2
3
DD+
ID
GND
MT
MT
MT
MT
MT
MT
MT1
MT2
MT3
MT4
MT5
MT6
HDR
G58911-001
CM1230_02
CH2
B1
VN
A1
IC
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
USB CONNECTORS
REV:
1.0
G87171
SHEET 15 OF 27
1
D
D
V3P3_S0
C2M4
C2B6
MAX3232_C1_PLUS
C2B9
0.1UF 10%
16V
X7R
0402LF
MAX3232_C2_PLUS
MAX3232_C1_MIN
MAX3232_C2_MIN
16
1
3
C1+
C1-
4
5
C2+
C2-
11
T1IN
VCC
MAX3232
V+
V-
0.1UF 10%
0402LF 16V
X7R
U3B2
0.1UF 10%
16V
X7R
0402LF
2
6
C2B7
MAX3232_VPLUS
0.1UF 10%
0402LF 16V
X7R
C2M2
MAX3232_VMINUS
0.1UF 10%
0402LF 16V
X7R
J3B1
AUDIOJACK_1PORT_3P
8A7>
IN
8A7>
IN
8A7<
OUT
8A7<
OUT
UART1_RTS_N
T1OUT
UART1_TXD
10
T2IN
UART1_RXD
12
R1OUT
R2OUT
UART1_CTS_N
14
CLN OUTPUT
SERIAL1_TXD
1
2
R1IN
13
SERIAL1_RXD
R2IN
T2OUT
15
CLN INPUT
GND
1
2
PIN 1 SLEEVE GND

PIN 2 RING RXD
PIN 3 TIP TXD
IC
2
C2M9
220PF
5%
50V
C0G
0402LF
CONN
G76363-001
C2M8
220PF
5%
50V
C0G
0402LF
TX/RX RS-232 UTILIZING 3.5MM AUDIO CONNECTOR

NOTE: THIS IS NOT AUDIO
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
UART 1
REV:
1.0
G87171
SHEET 16 OF 27
1
V3P3_S0
V3P3_S0
1 R4B2
1 R4B3
2 CH
2 CH
2 CH
4.7K
5%
1.5K
1%
0402LF
1/16W
R1M3 1 R1M5 1 R1M4

2.2K
2.2K
2.2K
5%
5%
5%
2 CH
2 CH
CH
0402LF
0402LF
0402LF
1/16W
1/16W
1/16W
1.5K
1%
0402LF
1/16W
0402LF
1/16W
RMII_S0_RST_N
RMII_S0_MDIO
RMII_S0_MDC
C1M7
0.1UF
10%
2 X7R
0402LF
V3P3_S0
RMII_S0_RSV2
RMII_S0_RSV1
RMII_S0_RX_DV_R
OUT
BI
18C5<
8B2<>
OUT
8B2>
BI
BI
OUT
1 C1M6
1UF
10%
2 X5R
0402LF
18B2<>
18B2<>
18C2<
18C2<>
18C7>
8B2>
IN
R1M9
49.9
1%
CH
0402LF
C1M9
0.1UF
10%
2 X7R
0402LF
2
R1M7
49.9
1%
CH
0402LF
C1M1
0.1UF
10%
2 X7R
0402LF
R1M8
49.9
1%
CH
0402LF
RMII_S0_RDN
RMII_S0_RDP
RMII_S0_TDN
18A3<>
BI
BI
18A3<>
BI
18A3<>
C1M3
C1M5
0.1UF
0.1UF
10%
10%
X7R 2 2 X7R
0402LF
0402LF
18C2<>
BI
18A3<>
18C2<>
3
4
5
6
TXD_0
TXD_1
TXD_2
TXD_3/SNI_MODE
4.87K 1%
0402LF CH
18C7>
IN
RMII_S0_RST_N
7A2>
IN
RMII_I_X1
R3A6
RMII_REF_CLK_OUT
R3A7
2
RMII_REFCLK
24
RBIAS
18
37
PFBIN1
PFBIN2
29
7
22.6 1%
0402LF
MDC
RMII_S0_TXD0
RMII_S0_TXD1
18C2<>
AVDD33
31
IN
IN
CAD NOTE:
RMII_S0_TDP
22
8B2>
8C2>
18C2<>
PLACE RESISTOR AND

CAPAS CLOSE TO RMII PHY
IOVDD331
IOVDD332
TX_EN
TX_CLK
SNI_MODE
FB1M1
2
FB
3 LED SIGNALS BELOW HAVE INTERNALL PU PER DATASHEET

32
48
2
1
R4B4
2
1 PHY_RBIAS
V3P3_S0_A
DP83848I
AGND_VCC
RMII_S0_TX_EN
RMII_S0_PFB
IN
U4B1
IN
00
0402LF CH
18C1>
1 C1M8
1UF
10%
2 X5R
0402LF
8C2>
R1M12
2
1
RMII_S0_MDC
PLACE CAPACITORS C1M3 & C1M5 CLOSE TO PFBIN(PIN18&37)

21B6>
21B7>
R1M10
49.9
1%
CH
0402LF
C1M10
C1M2
0.1UF
0.1UF
10%
10%
2 X7R
2 X7R
0402LF
0402LF
18C5<
CAD NOTE:
V3P3_S0
V3P3_S0_A
V3P3_S0_A
1 R4B1
LED_LINK/AN_0
LED_SPEED/AN_1
LED_ACT/COL/AN_EN
28
27
26
LED_LINK
LED_SPEED
LED_ACT
MDIO
30
RMII_S0_MDIO
RX_CLK
RX_DV/MII_MODE
RX_ER/MDIX_EN
38
39
41
RMII_S0_RX_DV_R
33.2
R2M9 CH
RMII_S0_RX_DV
OUT
8B2<
RXD_0/PHYAD1
RXD_1/PHYAD2
RXD_2/PHYAD3
RXD_3/PHYAD4
43
44
45
46
RMII_S0_RXD0_R
RMII_S0_RXD1_R
33.2
33.2
R2M13 CH
R2M10 CH
RMII_S0_RXD0
RMII_S0_RXD1
OUT
OUT
8B2<
8B2<
CRS/CRS_DV/LED_CFG
COL/PHYAD0
40
42
ETH_BLINK
8
12
10
9
11
TCK
TDI
TMS
TDO
TRST_N
34
33
X1
X2
25
25MHZ_OUT
R1
C
2.2K 5%
0402LF CH
OUT
TDP
TDN
17
16
RMII_S0_TDP
RMII_S0_TDN
RDP
RDN
14
13
RESERVED1
RESERVED2
20
21
IOGND1
IOGND2
35
47
DGND
36
AGND1
AGND2
15
19
PWR_DOWN_INT
18C6<>
23 RMII_S0_PFB
PFBOUT
RESET_N
8B2<>
18D6>
BI
IN
BI
BI
18A3<>
18A3<>
18B8<>
18B7<>
RMII_S0_RDP
RMII_S0_RDN
BI
BI
18A3<>
18A3<>
18B7<>
18C7<>
RMII_S0_RSV1
RMII_S0_RSV2
BI
BI
18D6<>
18D6<>
8C3<
22.6 1%
1 C4B5
10UF
10%
16V
2 TANT
0805LF
G63888-001
C1M4
0.1UF
10%
2 X7R
0402LF
CAD NOTE:
PLACE CAPACITORS CLOSE TO PFBOUT(PIN23)
1
R1M6
00
0603LF CH
IC
OUT
18C6<
RMII PHY
AGND_VCC
V3P3_S0
AGND_VCC
CAD NOTE:
LENGHT MATCH CLOCK SPLIT. TRACE BETWEEN PIN 1 OF RESISTORS SHOULD BE SHORT
J4B1
C1M12
0.1UF
10%
2 X7R
0402LF
R1M11
4.7K
5%
CH
0402LF
1/16W
C1M11
0.1UF
10%
2 X7R
0402LF
RJ45_GBE_L8291J
18C2<>
18B8<>
18C2<>
18B7<>
18C2<>
18B7<>
18C7<>
18C2<>
BI
BI
BI
BI
V3P3_S0
RMII_S0_TDP
RMII_S0_CT1
RMII_S0_TDN
11
12
10
D1+
CT1
D1-
75
RMII_S0_RDP
RMII_S0_CT2
RMII_S0_RDN
4
6
5
D2+
CT2
D2-
75
3
1
2
D3+
CT3
D3-
75
8
7
9
J2
J3
13
14
R1M1
LED_RJ45_C1
110
0402LF
J6
1%
CH
A
J4
COMMON
J5
D4+
CT4
D4-
J1
YELLOW
R2M15
4.7K
5%
CH
0402LF
1/16W
75
R1M2
16 LED_RJ45_C2
110
0402LF
J7
J8
1000PF
GRN
ORN
17
15
MH1
MH2
MH1
MH2
1%
CH
2KV
RJ45 CONNECTOR
CONN
C98527-001
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
LAN
REV:
1.0
G87171
SHEET 17 OF 27
1
V3P3_S0
CR3M1
2
3
C4M5
0.1UF
10%
16V
X7R
0402LF
VCC_DEDIPROG
VCC_FLASH
C4M6
4.7UF
10%
6.3V
X5R
0603LF
BAT54C
SOT23C
DIO
J1B2
2X4HDR7
1
3
5
21B1>
2
4
6
8
7C6>
IN
LSPI_MOSI_R
1
R3M15
4.7K
5%
CH
0402LF
R4M2
4.7K
5%
CH
0402LF
U2B4
W25Q64FV_8P
R2B5
33.2 1%
0402LF CH
7C6>
HDR
A91836-079
IN
LSPI_CS_N_R
R2B6
33.2 1%
0402LF CH
LSPI_CS_N HAS INTERNAL 20K PU IN QUARK

C
21A6>
7C6>
IN
VCC
AT25_WP_N
WP_N
LSPI_CS_N
CS_N
LSPI_MOSI
DI
LSPI_SCK
CLK
AT25_HOLD_N
HOLD_N
DO
R2B10
LSPI_MISO_R
LSPI_MISO
7C6<
OUT
33.2 1%
0402LF CH
GND
R2B18
LSPI_SCK_R
IC
H10285-001
33.2 1%
0402LF CH
FLASH
BIOS STORAGE
V3P3_S0
V3P3_S0
CAD NOTE:
PLACE DECOUPLING CAPACITORS AS CLOSE AS POSSIBLE TO U2B1
C2B1
0.1UF
10%
16V
X7R
0402LF
1
R2B30
10K
5%
CH
0402LF
C2B3
1UF
10%
6.3V
X5R
0402LF
23D8>
23D8>
23C8>
23C8>
23B8>
23B8>
AVIN0_R
AVIN1_R
AVIN2_R
AVIN3_R
AVIN4_R
AVIN5_R
IN
IN
IN
IN
IN
IN
4.99K
4.99K
4.99K
4.99K
4.99K
4.99K
0402LF
R1A11
R1A16
R1A13
R1A10
R1A1
R1A7
CH
1%
C2B4
10UF
20%
6.3V
X5R
0603LF
7B7>
7D7>
21D7>
7D7>
R2B22
10K
1%
CH
0402LF
C1A4
0.15UF R1A8
4.99K
10%
1%
10V
X5R
CH
C1A3
0.15UF R1A12
4.99K
10%
1%
10V
X5R
CH
C1A11
0.15UF R1A15
4.99K
10%
1%
10V
X5R
CH
C1A17
0.15UF R1A17
4.99K
10%
1%
10V
X5R
CH
VDRIVE
DCAP
VREF
SPI0_CS_N
11
CS_N
IN
SPI0_SCK
15
SCLK
IN
SPI0_MOSI
13
DIN
18
19
20
1
2
3
4
5
VIN0
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
17
PD_N/RST_N
V3P3_S0
R1A9
4.99K
1%
CH
VDD
16
VREF_INTERNAL
AVIN6
AVIN7
R2B24
4.99K
1%
CH
10
AVIN0
AVIN1
AVIN2
AVIN3
AVIN4
AVIN5
R2B25
4.99K
1%
CH
0402LF
AD7298
DCAP
IN
21D5>
U2B1
C3M10
0.1UF
10%
16V
X7R
0402LF
C3M9
10UF
20%
6.3V
X5R
0603LF
C1A12
0.15UF
10%
10V
X5R
C1A18
0.15UF R1A14
4.99K
10%
1%
10V
X5R
CH
DOUT
14
TSENSE_BUSY
12
GND1
GND
EXPAD
SPI0_MISO_R
R3M11
33.2
CH
SPI0_MISO
7D7<
OUT
21
IC
G83474-001
ADC_RST_M
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
SPI: ADC&FLASH
REV:
1.0
G87171
SHEET 18 OF 27
1
D
D
V3P3_S5
B
R2L1
1K
1%
EMPTY
0402LF
1/16W
V3P3_S5
R1L1
1K
1%
EMPTY
0402LF
1/16W
R1L3
1K
1%
CH
0402LF
1/16W
J4A1
R1L5
33.2 1%
JTAG_TMS
OUT
7C2<
R1L7
33.2 1%
JTAG_TCK
OUT
7C2<
2X5HDR
1
2
A
C4A1
0.1UF
10%
16V
X7R
0402LF
1
3
5
7
9
2
4
6
8
10
JTAG_TMS_R
JTAG_TCK_R
JTAG_TDO
JTAG_TDI
JTAG_TRST_N
7C2>
IN
OUT 7C2<
OUT 7C2<
HDR
G84017-001
SHROUDED CONNECTOR
SHF-105-01-L-D-TH
R1L2
1K
1%
EMPTY
0402LF
1/16W
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
I2CPROM & JTAG CONN
2
REV:
1.0
G87171
SHEET 19 OF 27
1
V3P3_S0
V3P3_S0
V3P3_S0
R3M9
10K
1%
EMPTY
0402LF
1/16W
R2B16
10K
1%
CH
0402LF
1/16W
R2B12
10K
1%
CH
0402LF
1/16W
SPI0_SCK
SPI0_MOSI
7D7>
OUT
OUT
19A4<
7D7>
SPI1_MOSI
19A4<
OUT
7D7>
22C4<>
R2B17
10K
1%
EMPTY
0402LF
1/16W
R2B19
10K
1%
CH
0402LF
1/16W
(HIGH) X8 DDR SDRAM
OUT
7C7>
RMII_S1_TXD0
22D4<>
01 - 1GBIT SDRAM
8B4>
OUT
R3A17
10K
1%
CH
0402LF
1/16W
R3M7
10K
1%
EMPTY
0402LF
1/16W
BIT0
BIT1
SPI1_SCK
(LOW) MEMORY DOWN CONFIG
(LOW) PUNIT BASE ADDRESS
V3P3_S0
C
R4B8
10K
1%
CH
0402LF
RMII_S0_TXD1
OUT
8C2>
RMII_S0_TXD0
18C5<
R4B6
100K
1%
CH
0402LF
1/16W
OUT
8B2>
RMII_S1_TXD1
18C5<
R4B5
100K
1%
EMPTY
0402LF
1/16W
OUT
LSPI_MOSI_R
8B4>
R3A14
10K
1%
CH
0402LF
1/16W
7C6>
19D6<
R2B4
10K
1%
CH
0402LF
1/16W
BIT2
OUT
BIT0
(LOW) SINGLE RANK DDR3 SDRAM
CLN_SD_CLK
OUT
8B8>
LSPI_SCK_R
15C6<
EC_PWRBTN_N
OUT
7C6>
19C6<
A
R1L11
10K
1%
CH
0402LF
1/16W
7B6<
OUT
R3A10
10K
1%
CH
0402LF
1/16W
R2B13
10K
1%
CH
0402LF
1/16W
(LOW) POWER BUTTON NOT USED
BIT1
BIT0
00 - REMOVABLE CARD SLOT FOR SDIO
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
QUARK STRAPS
REV:
1.0
G87171
SHEET 20 OF 27
1
V3P3_S0
VSHLD_S5
R4
10K
5%
CH
0402LF
1/16W
R3
10K
5%
CH
0402LF
1/16W
D
7C7<>
7C7<>
C12
0.1UF
10%
16V
X7R
0402LF
TS5A23159
8
1
2
9
CLN_IO2_PU_EN
IN
5
4
7
CLN_IO3_PU_EN
IN
V3P3_S5
U10
IC
V3P3_S3
VP
IN1
NO1
NC1
IN2
NO2
NC2
10
COM2
GND
G63512-001
GPIO_INT_IO2
7C7<>
GPIO_INT_IO3
7C7<>
0.1UF
10%
16V
X7R
0402LF
22D4<>
22D5<>
7C7<>
22D5<>
7C7<>
21D3> 7C7>
7C7<
21D4> 7D7>
7B7>
8B7>
8B7<
22D4<>
VSHLD_S5
R7
10K
5%
CH
0402LF
1/16W
7C7<>
OUT
A0_N
Q1
FET
1
2
3
OUT
22B3<>
BI
BI
BI
BI
BI
BI
BI
24B3<>
22B3<>
24C3<>
24B3<>
24B3<>
23B6<>
24A4<>
24A4<>
BI
24A4<>
23B6<>
23B6<>
23A5<>
23A5<>
BI
BI
22C7<
22B5<
7B7<>
BI
BI
BI
BI
BI
BI
BI
IO10_GPIO_PWM
IO5_GPIO_PWM
IO3_PWM
IO9_GPIO_PWM
A5_MUX
A4_MUX
A3_MUX
A2_MUX
1
2
3
4
5
6
7
8
IO6_GPIO_PWM
IO11_GPIO_PWM
IO8_GPIO
IO7_GPIO
IO4_GPIO
I2C_MUX
IO3_MUX
IO2_MUX
47
46
45
44
43
42
41
40
IO2_INTC
28
27
25
22
LVL_I2C_SDA
LVL_I2C_SCL
21
20
SEL_A0
23
22B4<
INT
26
IN
XRES
35
INT_N_S3
OUT
Q4
FET
INT
22A8<>
INT
22A8<>
A8
A7
A6
A5
A4
A3
A2
A1
B8
B7
B6
B5
B4
B3
B2
B1
12
13
14
15
16
17
18
20
LVL_IO2
LVL_GPIO_INT_IO3
LVL_SPI1_SCK
LVL_SPI1_MISO
LVL_SPI1_MOSI
LVL_SPI1_CS_N
LVL_TXD
LVL_RXD
10
OE
GND
11
THPAD
21
24A4<>
24A4>
22A3<>
BI
BI
BI
BI
22A3<>
22B3<>
22B3<>
24B6<
24C6>
H18588-001
C
C3
0.1UF
10%
16V
X7R
0402LF
22B5<
22B4<
U1
IC
TS5A23159
8
22A4<>
22B7<>
22C1<>
IO10_MUX
IO10_GPIO_PWM
LVL_SPI1_CS_N
1
2
9
22A4<>
22A7<>
22C1<>
IO11_MUX
IO11_GPIO_PWM
LVL_SPI1_MOSI
5
4
7
CY8C9540A
VDD
GPORT0_BIT0_PWM7
GPORT3_BIT0_PWM7
GPORT0_BIT1_PWM5
GPORT3_BIT1_PWM5
GPORT0_BIT2_PWM3
GPORT3_BIT2_PWM3
GPORT0_BIT3_PWM1
GPORT3_BIT3_PWM1
GPORT0_BIT4_PWM7
GPORT3_BIT4_PWM7
GPORT0_BIT5_PWM5
GPORT3_BIT5_PWM5
GPORT0_BIT6_PWM3
GPORT3_BIT6_PWM3
GPORT0_BIT7_PWM1
GPORT3_BIT7_PWM1
GPORT1_BIT0_PWM6
GPORT4_BIT0_PWM6
GPORT1_BIT1_PWM4
GPORT4_BIT1_PWM4
GPORT1_BIT2_PWM2
GPORT4_BIT2_PWM2
GPORT1_BIT3_PWM0
GPORT4_BIT3_PWM0
GPORT1_BIT4_PWM6
GPORT4_BIT4_PWM6
GPORT1_BIT5_PWM4_A6
GPORT4_BIT5_PWM4
GPORT1_BIT6_PWM2_A5
GPORT4_BIT6_PWM2
GPORT1_BIT7_PWM0_A4
GPORT4_BIT7_PWM0
GPORT2_BIT0_PWM6_A3
GPORT5_BIT0_PWM2
GPORT2_BIT1_PWM4_A2
GPORT5_BIT1_PWM0
GPORT2_BIT2_PWM0_WD
GPORT5_BIT2_PWM3
GPORT2_BIT3_PWM3_A1
GPORT5_BIT3_PWM1
I2C_SERIAL_DATA
I2C_SERIAL_CLOCK
A0
INT
VSS<1>
XRES
VSS<0>
9
10
11
12
14
15
16
17
A1_MUX
A0_MUX
IO12_GPIO
IO13_GPIO
IO0_MUX
IO1_MUX
IO10_MUX
IO11_MUX
39
38
37
36
34
33
32
31
A0_GPIO
A1_GPIO
A2_GPIO
A3_GPIO
A4_GPIO
A5_GPIO
IO0_GPIO
IO1_GPIO
30
29
18
19
BI
BI
22A3<>
24C6<>
24C6<>
22B3<>
22B3<>
BI
BI
BI
BI
BI
BI
BI
BI
SW_RESET_N_SHLD
IO12_MUX
22A3<>
IO13_MUX
22A3<>
23D8<>
23D8<>
23C8<>
23C8<>
23B8<>
23B8<>
24C6<>
24C6<>
RESET_N_SHLD
0
R12
5%
0402LF
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
IO10
BI
24D3<>
COM2
IO11
BI
24A5>
24D3<>
GND
G63512-001
BI
24A8<>
24D7<>
U3
IC
C4
0.1UF
10%
16V
X7R
0402LF
22A4<>
22B4<>
22D1<>
IO12_MUX
IO12_GPIO
LVL_SPI1_MISO
1
2
9
22A4<>
22B4<>
22D1<>
IO13_MUX
IO13_GPIO
LVL_SPI1_SCK
5
4
7
TS5A23159
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
IO12
COM2
IO13
GND
G63512-001
BI
BI
24A8<>
24D3<>
24A8<>
24D3<>
24
13
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
VSHLD_S5
23D8<>
23D8<>
22A3<>
TITLE:
9
8
7
6
5
4
3
1
R2
10K
5%
CH
0402LF
H18589-001
19
TXS0108E
U8
IC
48
24B3<>
24A4<>
24D3<>
23B8<>
23B8<>
23C8<>
23C8<>
VCCA VCCB
INT_N_S0
R10
10K
5%
CH
0402LF
1/16W
Q2
FET
VSHLD_S5
C11
0.1UF
10%
16V
X7R
0402LF
VSHLD_S5
7C7<>
7C7<>
C10
0.1UF
10%
16V
X7R
0402LF
LVL_OE
C5
R3M22
10K
5%
CH
0402LF
0.1UF
10%
16V
X7R
0402LF
V3P3_S3
HDR
R9
330
5%
CH
0402LF
1/16W
IN
R11
10K
5%
CH
0402LF
1/16W
J2
1X3HDR
SEL_A0
22A8<>
7C7<>
V3P3_S0
R8
330
5%
CH
0402LF
1/16W
GPIO_INT_IO2
GPIO_INT_IO3
SPI1_SCK
SPI1_MISO
SPI1_MOSI
SPI1_CS_N
UART0_TXD
UART0_RXD
BI
BI
BI
BI
BI
BI
BI
BI
EU1
IC
C2
COM1
VSHLD_S5
DOCUMENT NUMBER:
GALILEO
EXTERNAL IO MUXING
REV:
1.0
G87171
SHEET 21 OF 27
1
VSHLD_S5
U4
IC
C6
0.1UF
10%
16V
X7R
0402LF
TS5A23159
8
22B4<>
22A4<>
19A8<
BI
BI
OUT
A0_MUX
A0_GPIO
AVIN0_R
1
2
9
22B4<>
22A4<>
19A8<
BI
BI
OUT
A1_MUX
A1_GPIO
AVIN1_R
5
4
7
VSHLD_S5
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
ANALOG_A0
23C5<
COM2
ANALOG_A1
23C5<
GND
G63512-001
THLF
J1A5
1X6RCPT
U5
IC
C7
0.1UF
10%
16V
X7R
0402LF
TS5A23159
8
22A8<>
22A4<>
19A8<
BI
BI
OUT
A2_MUX
A2_GPIO
AVIN2_R
1
2
9
22A8<>
22A4<>
19A8<
BI
BI
OUT
A3_MUX
A3_GPIO
AVIN3_R
5
4
7
VSHLD_S5
24D3<>
24D3<>
COM1
10
ANALOG_A2
23C5<
COM2
ANALOG_A3
23C5<
GND
G63512-001
VSHLD_S5
22A8<>
22A4<>
19A8<
BI
BI
OUT
A4_MUX
A4_GPIO
AVIN4_R
1
2
9
22B8<>
22A4<>
19A8<
BI
BI
OUT
A5_MUX
A5_GPIO
AVIN5_R
5
4
7
VP
IN1
NO1
NC1
IN2
NO2
NC2
U7
IC
C9
0.1UF
10%
16V
X7R
0402LF
TS5A23159
8
COM1
10
22A8<>
A4_ADC_GPIO
23A5<>
COM2
BI
22A8<>
TS5A23159
8
LVL_I2C_SDA
1
2
9
LVL_I2C_SCL
5
4
7
I2C_MUX
A5_ADC_GPIO
23A5<>
GND
G63512-001
CONN
G79672-001
U6
IC
C8
0.1UF
10%
16V
X7R
0402LF
VP
IN1
NO1
NC1
IN2
NO2
NC2
1
2
3
4
5
6
ANALOG_A0
ANALOG_A1
ANALOG_A2
ANALOG_A3
ANALOG_A4
ANALOG_A5
23D6<>
23D6<>
23C6<>
23C6<>
23B3<>
23B3<>
22A8<>
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
ANALOG_A4
BI
23C5<
24D3<>
COM2
ANALOG_A5
BI
23C5<
24D3<>
GND
G63512-001
VSHLD_S5
R5
2.2K
5%
CH
0402LF
1/16W
14B2<
7D2<>
BI
14B2<>
7D2<>
BI
I2C_SCL
R6
2.2K
5%
CH
0402LF
1/16W
LVL_I2C_SCL
Q1L2
FET
I2C_SDA
LVL_I2C_SDA
Q1L1
FET
BI
22A8<>
23B6<>
BI
22A8<>
23B6<>
V3P3_S0
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
ANALOG CONNECTOR & MUXES
2
REV:
1.0
G87171
SHEET 22 OF 27
1
V5_ALW_ON
J1A6
1X3HDR
1
2
3
VSHLD_S5
V3P3_S5
HDR
J2B1
THLF
V5_ALW_ON
1X10RCPT
J2A1
THLF
1X8RCPT
1 PIN1:OPEN
2 PIN2:IO REF
3
RESET_N_SHLD
4
5
6
7
8
DEFAULT:
BI
22A4<>
J1A4
VIN
23B3<>
23B3<>
BI
BI
ANALOG_A5
ANALOG_A4
24A8<>
24A8<>
24A5>
22A1<>
22A1<>
22B1<>
22B1<>
22B8<>
22A8<>
BI
BI
BI
BI
BI
BI
IO13
IO12
IO11
IO10
IO9_GPIO_PWM
IO8_GPIO
24A8<>
33.2
33.2
33.2
33.2
33.2
33.2
R3M16
R3M17
R3M18
R3M19
R3M20
R3M21
IO13_R
IO12_R
IO11_R
IO10_R
IO9_GPIO_PWM_R
IO8_GPIO_R
10
9
AREF 8
7
6
5
4
3
2
1
C2B5
0.1UF
10%
16V
X7R
0402LF
V3P3_S5
VSHLD_S5
JUMPER INSTALLED
CONN
G79625-001
23C5<
23C5<
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
13
12
11
10
9
8
CONN
G79666-001
V5_ALW_ON
1X2HDR
1
2
U2
IC
C1
0.1UF
10%
16V
X7R
0402LF
HDR
CAD NOTE:
PLACE J1A4 HDR OUTSIDE EXT IO CONNECTOR AREA
INSTALLED ON A PER SHIELD BASIS
22B4<>
22A4<>
22C1<>
BI
BI
OUT
IO0_MUX
IO0_GPIO
LVL_RXD
22A4<>
22A4<>
22C1<>
BI
BI
IN
IO1_MUX
IO1_GPIO
LVL_TXD
CAD NOTE:
PLACE AT LED AREA
TS5A23159
8
1
2
9
5
4
7
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
IO0
24B3<
COM2
IO1
24B3<
GND
G63512-001
DS2A1
GREEN
EMPTY
R2A3
1K
1%
EMPTY
0402LF
1/16W
Q3
EMPTY
J1B1
1X8RCPT
22A8<>
22A8<>
22B8<>
22A8<>
BI
BI
BI
BI
24A2<>
24A2<>
24C4<>
24C4<>
VSHLD_S5
R1A21
100K
1%
CH
0402LF
1/16W
33.2
33.2
33.2
33.2
33.2
33.2
33.2
33.2
IO7_GPIO
IO6_GPIO_PWM
IO5_GPIO_PWM
IO4_GPIO
IO3
IO2
IO1
IO0
R1B1
R1B2
R4M12
R4M11
R4M10
R4M9
R4M8
R4M7
IO7_GPIO_R
IO6_GPIO_PWM_R
IO5_GPIO_PWM_R
IO4_GPIO_R
IO3_R
IO2_R
IO1_R
IO0_R
V5_ALW_ON
8
7
6
5
4
3
2
1
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
DIGITAL
7
6
5
4
3
2
1
0
CONN
CAD NOTE: PLACE RESISTORS CLOSE TO CONNECTOR.
VSHLD_S5
J1
CONN
CONN6_H18587001
24D3<>
24D3<>
24D7<>
22A1<>
22A1<>
22A4<>
BI
BI
BI
IO12
33.2
IO13
33.2
RESET_N_SHLD
IO12_ICSP_R
IO13_ICSP_R
R13
R14
1
3
5
2
4
6
IO11_ICSP_R
33.2
R15 IO11
OUT
22B1<>
C14
0.1UF
10%
16V
X7R
0402LF
24D3<>
H18587-001
22A8<>
22B8<>
22D1<>
SILK=ICSP HDR
S1
SILK=RESET
1
SWSPSTPB
22A8<>
22A8<>
22D1<>
SW
D90553-001
U9
IC
TS5A23159
8
BI
BI
OUT
IO3_MUX
IO3_PWM
LVL_GPIO_INT_IO3
1
2
9
BI
BI
BI
IO2_MUX
IO2_INTC
LVL_IO2
5
4
7
VP
IN1
NO1
NC1
IN2
NO2
NC2
COM1
10
IO3
24B3<
COM2
GND
G63512-001
IO2
24B3<
C13
1UF
10%
6.3V
X5R
0402LF
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
EXTERNAL IO CONNECTORS
2
REV:
1.0
G87171
SHEET 23 OF 27
1
V3P3_S5
V5_ALW_ON
V3P3_S5
1
R2M2
2.2K
5%
CH
0402LF
VIH_EN = 2.18V
2
EN_V1P5_S5
R2L17
10K
5%
CH
0402LF
VIH_EN = 2.18V
EN_V3P3_S5
PLACE CLOSE TO
INPUT PINS
R2M3
10K
5%
CH
0402LF
C2M5
0.1UF
10%
16V
X7R
0402LF
D
R4A2
1K
1%
CH
0402LF
R2L16
10K
5%
CH
0402LF
C2L7
0.1UF
10%
16V
X7R
0402LF
C3B4
V3V
1
U3A1
1
2
C
C2L9
10UF
10%
16V
X5R
0805LF
1
2
C2L12
10UF
10%
16V
X5R
0805LF
25C3<>
BST_V3P3_S5
.047UF 10%
16V
X7R
0603LF
1
2
1
2
B
C3B6
4700PF
10%
50V
X7R
0402LF
C3A14
4700PF
10%
50V
X7R
0402LF
C3A15
4700PF
10%
50V
X7R
0402LF
25B3<>
VR1_FB1
VIN2
SS2
RLIM2
EN2
BST2
FB2
COMP2
LX2_1
LX2_2
VR1_FB2
18
22
21
20
19
24
38
2
VIN3
SS3
RLIM3
EN3
BST3
FB3
BST1_2
25B3<
.047UF 10%
16V
X7R
0603LF
7A6>
25B3<>
IN
BST_V1P0_S0
147K
1%
2 0402LF
40
39
4
BST1_3
R3A19
1
R2L3
10K
1%
CH
0402LF
1 R3B2
180K
1%
2 0402LF
CURRENT LIMIT
V3P3_S5 @ 2.45A DC
V1P5_S5 @ 1.80A DC
V1P0_S0 @ 2.50A DC
.047UF 10%
16V
X7R
0603LF
1 R3A21
NOTE:
SS1_3
RLIM1_3
S0_1V0_EN
C4A2
8
14
15
COMP1
LX1_1
LX1_2
SS1_2
RLIM1_2
C3A19
BST_V1P5_S5
29
28
27
VIN1
SS1
RLIM1
EN1
BST1
FB1
BST1_1
25C3<
V3V
V7V
PGOOD
13
9
10
11
12
7
SS1_1
RLIM1_1
C3A18
28C5<
MAX LOAD: 2.0A
ROSC_VR
F_PWM
25
180K 1%
0402LF R2M1
0
0402LF
23
16
17
10UF 10%
16V
0805LF
VR1_COMP1
IND
A32422-019
25A8<
ROSC
F_PWM
0
CH
UC
UC
UC
UC
UC
UC
UC
UC
5
26
30
31
32
33
34
35
POWERPAD
41
147K
A93548-479
1%
2 0402LF
25A7<
VR1_COMP2
R3A22
2 VR1_COMP1_R
25C4>
R3B1
2 VR1_COMP2_R
24.9K 1%
0402LF CH
1 C3A12
1000PF
10%
2 X7R
0402LF
1 R2M4
40.2K
1%
2 CH
0402LF
1/16W
25B7<
25A6<
C2M6
4700PF
10%
50V
X7R
0402LF
C3B7
22UF
20%
6.3V
X5R
0805LF
MAX LOAD: 2.1A

V1P0_S0
L4B1
2.2UH
C3B1
22UF
20%
6.3V
X5R
0805LF
R2M6
45.3K 1%
0402LF CH
2
IND
BST_V1P0_S0
25B7<
1 R2L14
C2L14
4700PF
10%
50V
EMPTY
0402LF
40.2K
1%
2 CH
0402LF
1/16W
1
2
C2L3
4700PF
10%
50V
X7R
0402LF
1 C3B2
10PF
5%
2 COG
0402LF
VR1_COMP3
C3B9
22UF
20%
6.3V
X5R
0805LF
C3B11
22UF
20%
6.3V
X5R
0805LF
25B4>
VSSSENSE
C2L2
0.01UF
10%
X7R
0402LF
1000PF
10%
2 X7R
0402LF
1 C3A17
10PF
5%
2 COG
0402LF
IN
7A6<
CAD NOTE:
PLACE C2L2 CLOSE TO PIN 4 OF VR
158K 1%
0402LF EMPTY
2 VR1_COMP3_R
CAD NOTE:
THIS COMPONENT SHARES
ONE PAD WITH R2L15
ONE PAD WITH C2L2
24.9K 1%
0402LF CH
1 C3B8
7A6<
R2L15
158K 1%
0402LF CH
R3A23
IN
1 C3A13
1000PF
10%
2 X7R
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
0402LF
TITLE:
MAX LOAD: 1.3A
R2L20
10PF
5%
2 COG
0402LF
V1P5_S5
25B6< VR1_FB2
EMPTY 40.2K SHARES 1 PAD WITH INSTALLED 40.2K

EMPTY 4700PF SHARED 1 PAD WITH INSTALLD 4700PF
1 C3A16
C2L4
22UF
20%
6.3V
X5R
0805LF
C97875-001
V1P0_S0
VR1_FB3
24.9K 1%
0402LF CH
C2L11
22UF
20%
6.3V
X5R
0805LF
IC
G43225-001
25C4>
2
R3A18
1 R4A7
R2L19
40.2K
1%
EMPTY
0402LF
C2L6
22UF
20%
6.3V
2
X5R
0805LF
L2M1
2.2UH
VNNSENSE
VR1_COMP1
C3A11
4700PF
10%
50V
X7R
0402LF
12.7K 1%
0402LF CH
IND
VR1_COMP3
40.2K
1%
2 CH
0402LF
1/16W
25C7<
BST_V1P5_S5
3
36
37
1 R3A16
VR1_FB1
25C6<
VR1
COMP3
LX3_1
LX3_2
BST_V3P3_S5
VR1_COMP2
V3P3_S5
L3A1
2.2UH
10UF 10%
C3B3
1
2
V7V
TPS652510
C2L8
10UF
10%
16V
X5R
0805LF
7A6<
OUT
IHLP2525CZER2R2M01
V5_ALW_ON
VO = (R1/R2)*0.8 + 0.8
PG_V1P0_S0
DOCUMENT NUMBER:
GALILEO
VOLTAGE REGULATORS
REV:
1.0
G87171
SHEET 24 OF 27
1
V3P3_S5
V3P3_S0
V3P3_S5
V3P3_S3
U2L1
U2M1
TPS22920
C2L10
1UF
10%
6.3V
X5R
0402LF
V3P3_S5 IS GENERATED W ON-BRD REGULATOR

7A6>
IN
S3_3V3_EN
TPS22920
A2
VIN1
VOUT1
A1
B2
VIN2
VOUT2
B1
C2
VIN3
VOUT3
C1
D2
ON
GND
D1
R2L2
10K
5%
CH
0402LF
C2L13
1UF
10%
6.3V
X5R
0402LF
C2L5
1UF
10%
6.3V
X5R
0402LF
7A6>
IN
S0_3V3_EN
IC
A2
VIN1
VOUT1
A1
B2
VIN2
VOUT2
B1
C2
VIN3
VOUT3
C1
D2
ON
GND
D1
IC
R2L18
10K
5%
CH
0402LF
V1P5_S3
C3B5
1UF
10%
6.3V
X5R
0402LF
V1P5_S5
V1P5_S5
V1P5_S0
C
TPS22920
C2A4
1UF
10%
6.3V
X5R
0402LF

28A7<
7A6>
IN
S3_1V5_EN
U2A2
U2A4
A2
VIN1
VOUT1
A1
B2
VIN2
VOUT2
B1
C2
VIN3
VOUT3
C1
D2
ON
GND
D1
28B6<
TPS22920
C2A2
1UF
10%
6.3V
X5R
0402LF
C2A5
1UF
10%
6.3V
X5R
0402LF
27C6<
7A6>
IN
S0_1V5_EN
A2
VIN1
VOUT1
A1
B2
VIN2
VOUT2
B1
C2
VIN3
VOUT3
C1
D2
ON
GND
D1
C2A1
1UF
10%
6.3V
X5R
0402LF
1
R2A7
10K
5%
CH
0402LF
IC
2
R2A6
10K
5%
CH
0402LF
IC
CAD NOTE:
PLACE DECOUPLING CAPS AS CLOSE AS POSSIBLE TO SWITCH PINS
V1P0_S5 IS GENERATED INTERNALLY
V1P0_S3 IS GENERATED INTERNALLY
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
VOLTAGE REGULATORS
REV:
1.0
G87171
SHEET 25 OF 27
1
V1P5_S0
V3P3_S5
V3P3_S5
VTT
D
1 1
C1A2
10UF
10%
6.3V
X7R
0805LF
V1P5_S3
2 2
1
C1A1
10UF
10%
6.3V
X7R
0805LF
C3L2
4.7UF
10%
6.3V
X5R
0603LF
U2A3
TPS51200
2
10
R4L9
10K
1%
CH
0402LF
2 A93548-034
VIN
REFIN_VTT_REG
28B6<
C3L1
1000PF
10%
50V
X7R
0402LF
A36096-046
26B3<
7A6>
S0_1V5_EN
IN
PGOOD
VO
VOSNS
REFOUT
GND
PGND
8
4
VLDOIN
REFIN
EN
1
R3L1
10K
1%
CH
0402LF
R2A4
10K
5%
CH
0402LF
THP
D
C3L4
10UF
10%
6.3V
X7R
0805LF
PG_3P3_S5_NU
1 1
2 2
C3L3
10UF
10%
6.3V
2
X7R
0805LF
C3L7
10UF
10%
6.3V
X7R
0805LF
VREF
REFOUT IS INDEPENDENT OF ENABLE PIN

1
11
C2A3
0.1UF
10%
16V
X7R
0402LF
IC
E17764-001
RECOMMENDED POWER SUPPLY:

V5_ALW_ON
F4B1
VBUS_IN
PWR_JACK
2.5A
1
1
3
2
V5_PWR_JACK
FUSE
G89151-001
OPTION TO POWER FROM USB
X = TYPE OF BLADE. REFER TO DATASHEET

EMSA050300X P5P-SZ
J4A3
R4A6
10K
5%
CH
0402LF
C4B4
0.1UF
10%
16V
X7R
0402LF
CAD NOTE:
PLACE NEAR Q3B2
1
3
2
C3B15
1UF
10%
6.3V
X5R
0402LF
CONN
D33700-002
NORMALLY CLOSED
C4B3
1UF
10%
6.3V
X5R
0402LF
GATE_V5_USB
V5_ALW_ON
Q3B2
FDN306P
MOSFET
PFET
V5_ALW_ON
2
1
CAD NOTE:
PLACE CAP NEAR Q3B2
C3B13
1UF
10%
6.3V
X5R
0402LF
C4B1
47UF
20%
6.3V
X5R
0805LF
1
2
C4B2
47UF
20%
6.3V
X5R
0805LF
PWR BRICK IN
PWR BRICK OUT
CONNECTOR TRUTH TABLE

PIN2&PIN3 DISCONNECTED
PIN3=PU TO 5V
V5_ALW_ON=BRICK PWR
PIN2&PIN3 SHORTED
PIN3=GND
V5_ALW_ON=VBUS_IN
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
VOLTAGE REGULATORS
REV:
1.0
G87171
SHEET 26 OF 27
1
NOTE: RESET_N HAS AN INTERNAL PU TO V3P3_S3

D
SS:
REBOOT
S1A1
SWSPSTPB
SW
D90553-001
1
2
RESET_N
OUT
7B6<
25D3>
7A6<
IN
PG_V1P0_S0
C4L1
1UF
10%
6.3V
X5R
0402LF
VOH:2.25V
VOL:0.15V
R4A9
330
5%
CH
0402LF
1/16W
CAD NOTE:
PLACE AT LED AREA
V3P3_S5
PG_V1P0_S0_LED
DS4A1
2
GREEN
LED
V3P3_S5
R3B11
4.7K
5%
CH
0402LF
S5_PGOOD
V1P5_S5
R3B10
10K
5%
CH
0402LF
C3B12
1UF
10%
6.3V
X5R
0402LF
3
S5_PG_N
Q3B1
MBT3904DW1T1
XSTR
R3B6
1K
1%
CH
0402LF
7B6<
OUT
V3P3_S5
V3P3_RTC
PG DELAY
B
R3A9
Q3B1
MON_V1P5_S5
0
0402LF
MBT3904DW1T1
XSTR
0
EMPTY
1
27C6<
R3B5
1.5K
1%
CH
0402LF
26B3<
7A6>
IN
S0_1V5_EN
CR3A1
R3A1
24.9K
1%
CH
0402LF
3
BAT_DIO
S0_PGOOD
26B5<
7A6>
S3_1V5_EN
IN
S3_PGOOD
OUT
7A6<
7B6<
OUT
R3A11
1K
1%
CH
0402LF
1/16W
C3A5
0.1UF
10%
16V
X7R
0402LF
R3A2
24.9K
1%
CH
0402LF
C52251-001
DIO
BAT54C
C3A8
.1UF
10%
16V
EMPTY
0402LF
SOT23C
C3A9
.1UF SS:
10%
16V
EMPTY
0402LF
COIN
J3A1
PG DELAY
C3A6
0.1UF
10%
16V
X7R
0402LF
BAT_POS
1X2HDR
1
2
HDR
CAD NOTE:
LABEL "+" AND "-" TERMINALS ON 2 PIN HDR
OFF-BOARD BATTERY
PG DELAY
INTEL CORPORATION
2111 NE 25TH AVENUE
HILLSBORO OR 97124
TITLE:
DOCUMENT NUMBER:
GALILEO
POWER BUTTONS & MISC
2
REV:
1.0
G87171
SHEET 27 OF 27
1

Galileo Schematic

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Galileo Schematic

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8

Order Number: 329682-001US

Order Number: 329682-001US

Intel Galileo Design Document

Order Number: 329682-001US

Order Number: 329682-001US

INTERNAL REFCLK USED ON PCIE

ONLY 1 PCIE IS USED

ONLY 1 PCIE IS USED

Order Number: 329682-001US

0: EXTERNAL CLOCK FROM RTCX1/RTXC2

2111 NE 25TH AVENUE

25MHZ - NOT USED

GPE_N NOT USED (INTERNAL PU)

Order Number: 329682-001US

NOT USED, LEAVE FLOATING

NOT USED (INTERNAL PU)

ONLY USED FOR STRAPS

TXD OUTPUT FROM QUARK

Order Number: 329682-001US

STITCHING CAPS FOR SPLIT PLANES

STITCHING CAPS FOR SIGNAL REFERENCE TRANSITION

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

RESERVED PINS, NO CONNECT

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

PIN 1 SLEEVE GND

TX/RX RS-232 UTILIZING 3.5MM AUDIO CONNECTOR

Order Number: 329682-001US

R1M3 1 R1M5 1 R1M4

PLACE RESISTOR AND

3 LED SIGNALS BELOW HAVE INTERNALL PU PER DATASHEET

PLACE CAPACITORS C1M3 & C1M5 CLOSE TO PFBIN(PIN18&37)

Order Number: 329682-001US

LSPI_CS_N HAS INTERNAL 20K PU IN QUARK

Order Number: 329682-001US

Order Number: 329682-001US

(HIGH) X8 DDR SDRAM

(LOW) MEMORY DOWN CONFIG

(LOW) PUNIT BASE ADDRESS

(LOW) POWER BUTTON NOT USED

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

Order Number: 329682-001US

MAX LOAD: 2.0A

MAX LOAD: 2.1A

MAX LOAD: 1.3A

EMPTY 40.2K SHARES 1 PAD WITH INSTALLED 40.2K

Order Number: 329682-001US

V3P3_S5 IS GENERATED W ON-BRD REGULATOR

V1P5_S5 IS GENERATED W ON-BRD REGULATOR

V1P0_S5 IS GENERATED INTERNALLY

V1P0_S3 IS GENERATED INTERNALLY

V1P0_S0 IS GENERATED W ON-BRD REGULATOR

Order Number: 329682-001US

REFOUT IS INDEPENDENT OF ENABLE PIN

RECOMMENDED POWER SUPPLY: