Lecture Set 02

Chapter 2
Instructions: Language of the Computer
[Some slides adapted from A. Sprintson, M. Irwin, D. Paterson and others]
The Instruction Set Architecture (ISA) software

instruction set architecture
hardware
The interface description separating the software and hardware

2
How Do the Pieces Fit Together?

A!!"ications O!erating System om!i"er Instruction Set Architecture #emory system Firmware I/O system networ%
Processor Data!ath $ ontro" Digita" Design ircuit Design
Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation
3
The #IPS ISA
Instruction Categories
G G G G
G
&egisters &' ( &)*
Load/Store Computational Jump and ranch !loating "oint

coprocessor
G G
#emory #anagement Special
P HI +O
) Instruction Formats- a"" ). /its wide OP OP OP rs rs rt rt rd sa funct
immediate
,um! target
Assem/"y +anguage Instructions
The language of the machine

G
$ant an IS% that ma&es it easy to 'uild the hardware and the compiler while ma(imi)ing performance and minimi)ing cost Instructions are stored in memory *as is the data, similar to other IS%s developed since the /0123s
Stored program *von +eumann, concept

G
-ur target. the #I"S IS%

G
Design goals: maximize performance, minimize cost, reduce design time (time-to-market), minimize memory space (embedded systems), minimize power 5 consumption (mobile systems)
&IS ( &educed Instruction Set om!uter
4ISC philosophy
G G G G
fi(ed instruction lengths load5store instruction sets limited num'er of addressing modes limited num'er of operations
#I"S, %4#, Sun S"%4C, I # "ower"C 6 Instruction sets are measured 'y how well compilers use them as opposed to how well assem'ly language programmers use them
CISC *C 6
for comple(,, e7g7, Intel (18
The Four Design Princi!"es
/7 97 :7 ;7
Simplicity favors regularity7 Smaller is faster7 #a&e the common case fast7 <ood design demands good compromises7
The #IPS ISA
Instruction Categories
G G G G
G
&egisters &' ( &)*

coprocessor
G G
P HI +O
#IPS &egisters
Unli&e =LL li&e C or Java, assem'ly cannot use varia'les

G
$hy not> ?eep =ardware Simple limited num'er of special locations 'uilt directly into the hardware operations can only 'e performed on these@
%ssem'ly -perands are registers

G G
enefit. Since registers are implemented directly in hardware, they are very fast *faster than / 'illionth of a second,
#IPS &egisters
Draw'ac&. Since registers are in hardware, there are a predetermined num'er of them
G
Solution. #I"S code must 'e very carefully put together to efficiently use registers $hy :9> Large for the time, easier compiling Small now *'ut we are stuc& with it, <roups of :9 'its called a word in #I"S
:9 registers in #I"S
G G G
Aach #I"S register is :9 'its wide

G
10
:aming on2entions for &egisters

' * . ) 4 5 6 7 8 999 *5 0t7 01ero constant ' (Hdware) 0at reser2ed for assem/"er 02' e3!ression e2a"uation $ 02* function resu"ts 0a' arguments 0a* 0a. 0a) 0t' tem!orary- ca""er sa2es (ca""ee can c"o//er) *6 0s' ca""ee sa2es 999 .) 0s7 .4 0t8 tem!orary (cont;d) .5 0t< .6 0%' reser2ed for OS %erne" .7 0%* .8 0g! !ointer to g"o/a" area .< 0s! stac% !ointer )' 0f! frame !ointer )* 0ra return address (Hdware) (ca""er can c"o//er)
11
#IPS Arithmetic Instruction
#I"S assem'ly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Aach arithmetic instruction performs only one operation Aach arithmetic instruction specifies e(actly three operands
destination source/
G
op
source9
-perand order is fi(ed *the destination is specified first,
The operands are contained in the datapathBs register file *$t0, $s1, $s2,
12
#IPS Arithmetic Instruction
#I"S assem'ly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Aach arithmetic instruction performs only one operation Aach arithmetic instruction specifies e(actly three operands
destination source/
G
op
source9
-perand order is fi(ed *the destination is specified first,
The operands are contained in the datapathBs register file *$t0, $s1, $s2,
13
om!i"ing #ore om!"e3 Statements
%ssuming varia'le ' is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to 'e left in $s0, what is the assem'ler eCuivalent to the C statement h = (b - c) + d
14
%ssuming varia'le ' is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to 'e left in $s0, what is the assem'ler eCuivalent to the C statement h = (b - c) + d
sub add
$t0, $s1, $s2 $s0, $t0, $s3
15

-ne particular immediate, the num'er )ero *2,, appears very often in code7 So we define register )ero ($0 or $zero, to always have the value 2D eg
add $s0,$s1,$zero *in #I"S, f = g *in C, where #I"S registers $s0,$s1 are associated with C varia'les f, g
defined in hardware, so an instruction

add $zero,$zero,$s0
will not do anything@

16
#achine +anguage ( Arithmetic Instruction
Instructions, li&e registers and words of data, are also :9 'its long
G
A(ample. add $t0, $s1, $s2 registers have num'ers $t0=$8,$s1=$17,$s2=$18
Instruction !ormat.
op
rs
rt
rd
shamt
funct
Can you guess what the field names stand for?

17
222222 /222/
/22/2
2/222
22222
/22222
#achine +anguage ( Arithmetic Instruction
Instructions, li&e registers and words of data, are also :9 'its long
G
A(ample. add $t0, $s1, $s2 registers have num'ers $t0=$8,$s1=$17,$s2=$18
Instruction !ormat.
op
rs
rt
rd
shamt
funct
Can you guess what the field names stand for?

18
222222 /222/
/22/2
2/222
22222
/22222
&(format =3am!"e
op
6 bits
rs
5 bits
rt
5 bits
rd
5 bits
shamt
5 bits
funct
6 bits
add $t0, $s1, $s2

special 0 $s1 17 $s2 18 $t0 8 0 0 add 32
000000 10001 10010 01000 00000 100000
000000100011001001000000001000002 = 0232402016
19
#IPS Instruction Fie"ds

op
8 'its
rs
E 'its
rt
E 'its
rd
E 'its
shamt
E 'its
funct
8 'its F :9 'its
op rs rt rd shamt funct
20
#IPS Instruction Fie"ds

op
8 'its
rs
E 'its
rt
E 'its
rd
E 'its
shamt
E 'its
funct
8 'its F :9 'its
o!code indicating operation to 'e performed address of the first register source operand address of the second register source operand the register destination address shift amount *for shift instructions, function code that selects the specific variant of the operation specified in the opcode field
21
Dea"ing with onstants
Small constants are used Cuite freCuently *E2G of operands in many common programs,
e7g7, % F % H ED F H /D C F C 5 /1D
Solutions> $hy not>

G G
"ut Itypical constantsJ in memory and load them Create hard5wired registers *li&e K)ero, for constants li&e /, 9, ;, /2, 6
=ow do we ma&e this wor&>
=ow do we #a&e the common case fast @

22
onstant (or Immediate) O!erands
Include constants inside arithmetic instructions

G
#uch faster than if they have to 'e loaded from memory *they come in from memory with the instruction itself,
#I"S immediate instructions addi $s3, $s3, 4 #$s3 = $s3 + 4
There is no subi instruction, can you guess why not>
23
#achine +anguage > Immediate Instructions
$hat instruction format is used for the addi > addi $s3, $s3, 4 #$s3 = $s3 + 4 #achine format.
24
$hat instruction format is used for the addi > addi $s3, $s3, 4 #$s3 = $s3 + 4 #achine format.
op 1 rs /0 rt /0 /8 'it immediate ;
I format
The constant is &ept inside the instruction itself@

G G
So must use the I format L Immediate format Limits immediate values to the range H9/EL/ to 59/E
25
<iven the following lines in #I"S %ssem'ly Language
%ssem'le the #I"S o'Mect code for these four lines.
26
Cut point777
27
"rocessor L #emory Interconnections

#emory is a large, single5dimensional array %n address acts as the inde( into the memory array
#emory read addr/ :9 write addr Processor read data :9
:9write data /2 /2/ / 1 ; 2
The word address of the data
> locations 9:9 ytes*;< , 9:2 $ords*/<$,
28
The data stored in the memory
:9 'its
F ; ytes F / $ord
Consider memory to 'e a single huge array.

G G G
Aach cell of the array has an address associated with it7 Aach cell also stores some value7 Do you thin& they use signed or unsigned num'ers> +egative address>@
DonBt confuse the address referring to a memory location with the value stored in that location7
...
101 102 103 104 10 ...
23
42
...
29

%n address refers to a particular memory location7 In other words, it points to a memory location7 "ointer. % varia'le that contains the address of a varia'le7
#o$ation %address&
...
name
101 102 103 104 10 ...
23
42
104
...
"
30
=ow to create a pointer.

operator. get address of a varia'le
int *p, x; ! = 3" # = !"
p p p
? ?
x x x
? 3 3
N operator. Idereference operatorJ get value pointed to printf(p points to %d\n,*p);
31
=ow to change a varia'le pointed to>

G
Use dereference $ operator on left of =
*p = 5;
32
Cut "oint777
33
%ccessing #emory
MIPS has two basic data transfer instructions for accessing memory (assume $s3 holds 2410 lw $t0! 4($s3 "load word from memory sw $t0! #($s3 "store word to memory $he data transfer instruction must s%ecify G where in memory to read from (load or write to (store & memory address G where in the register file to write to (load or read from (store & register destination (source $he memory address is formed by summing the constant %ortion of the instruction and the contents of the second register
34
%ccessing #emory
#I"S has two 'asic data transfer instructions for accessing memory *assume Ks: holds 9;/2, lw Kt2, ;*Ks:, Oload word from memory sw Kt2, 1*Ks:, Ostore word to memory
91/2 :9/2
The data transfer instruction must specify G where in memory to read from *load, or write to *store, L memory address G where in the register file to write to *load, or read from *store, L register destination *source, The memory address is formed 'y summing the constant portion of the instruction and the contents of the second register
35
#IPS #emory Addressing
The memory address is formed 'y summing the constant portion of the instruction and the contents of the second *'ase, register $s3 holds 1
#emory 7772//2 7772/2/ 777//22 777222/ 77722/2 777/222 7772/22 Data 9; 92 /8 /9 1 ; 2 $ord %ddress
%& $t0, 4($s3) #&hat is %oaded i'to $t0 s& $t0, 8($s3) #$t0 is stored &here(
36
#IPS #emory Addressing
The memory address is formed 'y summing the constant portion of the instruction and the contents of the second *'ase, register
#emory 7772//2 7772/2/ 777//22 777222/ 77722/2 777/222 7772/22 :9 'it Data 9; 92 /8 /9 1 ; 2 $ord %ddress
$s3 holds 1
7 7 7 222/
%& s&
$t0, 4($s3) #&hat( is %oaded i'to $t0 $t0, 8($s3) #$t0 is stored &here( 37
7 7 7 222/
in location /8
om!i"ing with +oads and Stores
%ssuming varia'le b is stored in $s2 and that the 'ase address of array % is in $s3, what is the #I"S assem'ly code for the C statement )*8+ = )*2+ - b
777 %P:Q %P9Q %P/Q %P2Q 777 $s3H/9 $s3H1 $s3H; $s3
38
om!i"ing with +oads and Stores
%ssuming varia'le b is stored in $s2 and that the 'ase address of array % is in $s3, what is the #I"S assem'ly code for the C statement )*8+ = )*2+ - b
lw $t0, 8($s3) sub $t0, $t0, $s sw $t0, 3 ($s3)
39
om!i"ing with a ?aria/"e Array Inde3

%ssuming that the 'ase address of array % is in register $s4, and varia'les ', c, and i are in $s1, $s2, and $s3, respectively, what is the #I"S assem'ly code for the C statement c = )*i+ - b
add add
$t1, $s3, $s3 $t1, $t1, $t1
#arra, i'de! i is i' $s3 #te-# reg $t1 ho%ds 4$i
40
om!i"ing with a ?aria/"e Array Inde3

%ssuming that the 'ase address of array % is in register $s4, and varia'les ', c, and i are in $s1, $s2, and $s3, respectively, what is the #I"S assem'ly code for the C statement c = )*i+ - b
add add add sub
$t1, $s3, $s3 $t1, $t1, $t1 $t1, $t1, $s4 $s2, $t0, $s1
#arra, i'de! i is i' $s3 #te-# reg $t1 ho%ds 4$i #addr of )*i+ 'o& i' $t1
%& $t0, 0($t1)
41
&e2iew- #IPS Instructions@ so far

ategory Instr O! ode =3am!"e #eaning
%rithmetic add su'tract %rithmetic add immediate Data transfer load word store word
2R :9 2R :; 1 :E ;:
add Ks/, Ks9, Ks: Ks/ F Ks9 H Ks: su' Ks/, Ks9, Ks: Ks/ F Ks9 5 Ks: addi Ks/, Ks9, ; lw Ks/, /22*Ks9, sw Ks/, /22*Ks9, Ks/ F Ks9 H ; Ks/ F #emory*Ks9H/22, #emory*Ks9H/22, F Ks/
42
Cut point7777
43
&e2iew- Ansigned Binary &e!resentation

=e( 2(22222222 2(2222222/ 2(22222229 2(2222222: 2(2222222; 2(2222222E 2(22222228 2(2222222S 2(22222221 2(22222220 2(!!!!!!!C 2(!!!!!!!D 2(!!!!!!!A 2(!!!!!!!! inary 262222 26222/ 2622/2 2622// 262/22 262/2/ 262//2 262/// 26/222 26/22/ 6 /6//22 /6//2/ /6///2 /6//// Decimal 2 / 9 : ; E 8 S 1 0
9:/ 9:2 990 :/ :2 90 777 777 9 : 99 9/ : 9 / 92 2 'it weight 'it position
* * *
999
* * * *
/it
* ' ' '
999
' ' ' '
9:9 5 ; 9:9 5 : 9:9 5 9 9:9 5 /
.). ( *
44
&e2iew- Signed Binary 59 F &e!resentation

:
5*9: 5 /, F
9Bsc 'inary /222 /22/ /2/2 /2// //22 //2/ ///2 //// 2222 222/ 22/2 22// 2/22 2/2/ 2//2 2///
decimal 51 5S 58 5E 5; 5: 59 5/ 2 / 9 : ; E 8 S
complement all the 'its 2/2/ and add a / 2//2 /2// and add a / /2/2 complement all the 'its
45
9: 5 / F
#achine +anguage ( +oad Instruction
Consider the load5word and store5word instrBs

G
$hat would the regularity principle have us do>
ut 7 7 7 <ood design demands compromise Introduce a new type of instruction format

G
G
I5type for data transfer instructions *previous format was 45type for register,
A(ample. %& $t0, 24($s2)

op 9:he( /222// rs /1 /22/2 2/222 rt 1 /8 'it num'er 9; 22222222222//222
46
#achine +anguage ( +oad Instruction

Consider the load5word and store5word instrBs

G
$hat would the regularity principle have us do>
ut 7 7 7 <ood design demands compromise Introduce a new type of instruction format

G
I5type for data transfer instructions *previous format was 45type for register,
A(ample. %& $t0, 24($s2)

op 9:he( /222// rs /1 /22/2 2/222 rt 1 /8 'it num'er 9; 22222222222//222
47
#emory Address +ocation
A(ample.
%& $t0, 24($s2)

#emory 2(f f f f f f f f
2410 + $s2 =
2(22222229 2(/922;20;
$s2
+ote that the offset can 'e positive or negative

48
data
2(2222222c 2(22222221 2(2222222; 2(22222222 word address *he(,
#emory Address +ocation
A(ample.
%& $t0, 24($s2)

#emory 2(f f f f f f f f
2410 + $s2 =
$t0
2(22222229 2(/922;2ac 2(/922;20;
7 7 7 /22/ 2/22 H 7 7 7 222/ /222 7 7 7 /2/2 //22 F 2(/922;2ac
$s2
+ote that the offset can 'e positive or negative

49
data
2(2222222c 2(22222221 2(2222222; 2(22222222 word address *he(,
#achine +anguage ( Store Instruction
A(ample. s& $t0, 24($s2)

op rs rt /8 'it num'er
;:
/1
9;
/2/2//
/22/2
2/222
22222222222//222
% /85'it offset means access is limited to memory locations within a range of 9/: F 1,/09 words *9/E F :9,S81 'ytes, of the address in the 'ase register $s2
G
9Bs complement */ sign 'it H /E magnitude 'its,
50
#achine +anguage ( Store Instruction
A(ample. s& $t0, 24($s2)

;:
/1
9;
/2/2//
/22/2
2/222
22222222222//222
% /85'it offset means access is limited to memory locations within a range of H9/:5/ to 59/: *T1,/09, words *H9/E5/ to 59/E *T:9,S81, 'ytes, of the address in the 'ase register $s2
G
9Bs complement */ sign 'it H /E magnitude 'its,
51
Instruction Format =ncoding
Can reduce the comple(ity with multiple formats 'y &eeping them as similar as possi'le
G
!irst three fields are the same in 45type and I5type
Aach format has a distinct set of values in the op field

Instr Frmt o! rs rt rd shamt funct address
add sub addi %& s&
4 4 I I I
2 2 1ten :Eten ;:ten
reg reg reg reg reg
reg reg reg reg reg
reg reg +% +% +%
2 2 +% +% +%
:9ten :;ten +% +% +%
+% +% constant address address
OP OP
rs rs
rt rt
rd
sa
funct
52
immediate
Cut "oint
53
#IPS Data Ty!es

Bit- 2, / Bit String- seCuence of 'its of a particular length ; 'its is a ni''le 1 'its is a 'yte /8 'its is a half5word :9 'its is a word 8; 'its is a dou'le5word haracter%SCII S 'it code Decima"digits 250 encoded as 22229 thru /22/9 two decimal digits pac&ed per 1 'it 'yte Integers- 9Us complement F"oating Point
54
Beyond :um/ers
AS II 2 / 9 : ; E 8 S 1 0 /2 // '&sp ta' L! %C? A-T
#ost computers use 15'it 'ytes to represent characters with the %merican Std Code for Info Interchange *%SCII,
har
+ull AS II :9 :: :; :E :8 :S :1 :0 ;2 ;/ ;9 ;: !! ;;
har
space @ I O K G R 3 * , N H ,
AS II ;1 ;0 E2 E/ E9 E: E; EE E8 ES E1 E0 82
har
2 / 9 : ; E 8 S 1 0 . D Y
AS II 8; 8E 88 8S 81 80 S2 S/ S9 S: S; SE S8
har
V %
AS II 08 0S 01
har
W a ' c d e f g h i M & l
AS II //9 //: //; //E //8 //S //1 //0 /92 /9/ /99 /9: /9;
har
p C r s t u v w ( y ) X Z
C D A ! < = I J ? L
00 /22 /2/ /29 /2: /2; /2E /28 /2S /21
/9
So, we need instructions to move 'ytes around

55 ;S
/ 8: > S0 ///
/E
/9S
DAL
Byte Addresses

Since 15'it 'ytes are so useful, most architectures address individual 'ytes in memory Therefore, the memory address of a word must 'e a multiple of ; *alignment restriction, ig Andian. address
leftmost *most significant, 'yte is word
I # :82/:S2, #otorola 81&, #I"S, Sparc, =" "%
Little Andian. rightmost *least significant, 'yte is word address
Intel 12(18, DAC [a(, DAC %lpha *$indows +T,
56
=ndianess

ig Andian. leftmost 'yte is word address Little Andian. rightmost 'yte is word address
"itt"e endian
ms/ "s/
/ig endian
57
=ndianess

A(ample. consider the num'er 2(;2/ stored in a ;5'yte integer In 'inary 22222222 22222222 22222/22 2222222/
00
'i( )ndian #ittle )ndian
01
02
03
00000000 00000000 00000100 00000001 00000001 00000100 00000000 00000000
58
+oading and Storing Bytes
#I"S provides special instructions to move 'ytes %b $t0, 1($s3) #%oad b,te fro- -e-or, sb $t0, .($s3) #store b,te to -e-or,
$hat 1 'its get loaded and stored>

G
load 'yte places the 'yte from memory in the rightmost 1 'its of the destination register store 'yte ta&es the 'yte from the rightmost 1 'its of a register and writes it to the 'yte in memory leaving the other 'ytes in the memory word unchanged
$hat happens to the other 'its in the register>

G
59
=3am!"e of +oading and Storing Bytes
<iven following code seCuence and memory state what is the state of the memory after e(ecuting the code> add $s3, $zero, $zero %b $t0, 1($s3) sb $t0, .($s3)
#emory 2( 2 2 2 2 2 2 2 2 2( 2 2 2 2 2 2 2 2 2( 2 2 2 2 2 2 2 2 2( / 2 2 2 2 2 / 2 2( 2 / 2 2 2 ; 2 9 2( ! ! ! ! ! ! ! ! 2( 2 2 0 2 / 9 % 2
Data
9; 92 /8 /9 1 ; 2
$hat value is left in Kt2> $hat word is changed in #emory and to what> $hat if the machine was little Andian>
60
$ord %ddress *Decimal,
=3am!"e of +oading and Storing Bytes
<iven following code seCuence and memory state what is the state of the memory after e(ecuting the code> add $s3, $zero, $zero %b $t0, 1($s3) sb $t0, .($s3)
#emory 2( 2 2 2 2 2 2 2 2 2( 2 2 2 2 2 2 2 2 2( 2 2 2 2 2 2 2 2 2( / 2 2 2 2 2 / 2 2( 2 / 2 2 2 ; 2 9 2( ! ! ! ! ! ! ! ! 2( 2 2 0 2 / 9 % 2
Data
$hat value is left in Kt2> Kt2 F 2(22222202
9; 92 /8 /9 1
$hat word is changed in #emory and to what> mem*;, F 2(!!!!02!!
61
$hat if the machine was little ; Andian> Kt2 F 2(222222/9 2 $ord mem*;, F 2(!!/9!!!! %ddress *Decimal,
A"ignment
2 ligned / 9 :
!ot ligned
Ali(nment restri$tion* re+,ires that o-.e$ts fall on address that is a m,ltiple of their si/e.
62
#i!s and A"ignment

#I"S supports 'yte addressa'ility.

G
% 'yte is the smallest unit with its addressD
#I"S restricts memory accesses to 'e aligned as follows.

G
:95'it word has to start at 'yte address that is multiple of ;D Thus, :95'it word at address ;n includes four 'ytes with addresses. ;n, ;nH/, ;nH9, and ;nH:7 /85'it half word has to start at 'yte address that is multiple of 9D Thus, /85'it word at address 9n includes two 'ytes with addresses. 9n and 9nH/7 %n address is given as :95'it unsigned integerD
#I"S supports :95'it addresses.

G
63
Cut point777
64
Instructions for #a%ing Decisions
Decision ma&ing instructions

G G
alter the control flow i7e7, change the \ne(t\ instruction to 'e e(ecuted
#I"S conditional 'ranch instructions. b'e $s0, $s1, /b% be0 $s0, $s1, /b% #go to /b% if $s0$s1 #go to /b% if $s0=$s1
A(ample. if (i==1) h = i + 1"
b'e $s0, $s1, /b%1 add $s3, $s0, $s1 /b%12 333
65
S!ecifying Branch Destinations

The
instructions from the *instruction after the, 'ranch

'ut most 'ranches are local
'ranch distance is limited to 59/E to H9/E5/
45 b'e $s0,$s1,/b%1 add $s3,$s0,$s1 /b%12 333
66
Another Instruction for hanging F"ow
#I"S also has an unconditional 'ranch instruction or Mump instruction. 1 /b% #go to /b% if (i6=1) h=i+1" e%se h=i-1" be0 $s0, $s1, 7%se add $s3, $s0, $s1 1 7!it sub $s3, $s0, $s1 333
A(ample.
7%se2 7!it2
67
om!i"ing Chi"e +oo!s
Compile the assem'ly code for the C &hi%e loop where i is in $s0, 1 is in $s1, and 8 is in $s2 &hi%e (i6=8) i=i+1" /oo#2 be0 $s0, $s2, 7!it add $s0, $s0, $s1 1 /oo# 7!it2 3 3 3
asic 'loc& L % seCuence of instructions without 'ranches *e(cept at the end, and without 'ranch targets *e(cept at the 'eginning,
68
Branching Far Away
$hat if the 'ranch destination is further away than can 'e captured in /8 'its>
The
assem'ler comes to the rescue L it inserts an unconditional Mump to the 'ranch target and inverts the condition
be0 $s0, $s1, /1
'ecomes
b'e $s0, $s1, /2 1 /1 /22
69
Cut "oint
70

ategory Instr O! d =3am!"e #eaning
%rithmetic add su'tract add immediate Data transfer Cond7 'ranch load word store word 'r on eCual 'r on not eCual
2 R 92 add Ks/, Ks9, Ks: Ks/ F Ks9 H Ks: 2 R 99 su' Ks/, Ks9, Ks: Ks/ F Ks9 5 Ks: 1 9: 9' ; E addi Ks/, Ks9, ; lw Ks/ F Ks9 H ; Ks/, /22*Ks9, Ks/ F #emory*Ks9H/22, if *Ks/FFKs9, go to L if *Ks/ @FKs9, go to L
sw Ks/, /22*Ks9, #emory*Ks9H/22, F Ks/ 'eC Ks/, Ks9, L 'ne Ks/, Ks9, L
71
&e2iew- Instruction Format =ncoding

Instr Frmt o! rs rt rd shamt funct address
add sub addi %& s&
4 4 I I I
2 2 1ten :Eten ;:ten
reg reg reg reg reg
reg reg reg reg reg
reg reg +% +% +%
2 2 +% +% +%
:9ten :;ten +% +% +%
+% +% constant address address
72
Assem/"ing Branches
Instructions.
b'e $s0, $s1, /b% be0 $s0, $s1, /b% #go to /b% if $s0$s1 #go to /b% if $s0=$s1
#achine !ormats.
I format
E ;
/8 /8
/S /S
>>>> >>>>
=ow is the 'ranch destination address specified>
73
S!ecifying Branch Destinations Could specify the memory address 'ut that would reCuire a :9 'it field
Could use a I'aseJ register and add to it the /85'it offset G which register> G Instruction %ddress 4egister *"C F program counter, 5 its use is automatically implied 'y 'ranch
G
45 b'e $s0,$s1,/b%1 add $s3,$s0,$s1 /b%12 333
"C gets updated *"CH;, during the fetch cycle so that it holds the address of the ne(t instruction limits the 'ranch distance to 59/E to H9/E5/ instrBs from the *instruction after the, 'ranch 'ut most 'ranches are local anyway
74
Disassem/"ing Branch Destinations
The contents of the updated "C *"CH;, is added to the /8 'it 'ranch offset which is converted into a :9 'it value 'y
G
concatenating two low5order )eros to ma&e it a word address and then sign5e(tending those /1 'its
The result is written into the "C if the 'ranch condition is true 5 'efore the ne(t !etch cycle
from the low order /8 'its of the 'ranch instruction
/8
sign5e(tend
offset
22 :9 :9 %dd :9 ; :9 %dd :9
"C
:9
:9
'ranch dst address >
75
Offset Tradeoffs
$hy not Must store the 'yte offset in the low order /8 'its> Then the two low order )eros wouldnBt have to 'e concatenated, it would 'e less confusing, 6
ut that would limit the 'ranch distance to 59/: to H9/:5/ instrBs from the *instruction after the, 'ranch %nd concatenating the two )ero 'its costs us very little in additional hardware and has no impact on the cloc& cycle time
76
Assem/"ing Branches =3am!"e

%ssem'ly code b'e $s0, $s1, /b%1 add $s3, $s0, $s1 /b%12 333 #achine !ormat of b'e.
op rs rt /8 'it offset
I format
/8
/S
4emem'er
%fter
the b'e instruction is fetched, the "C is updated so that it is addressing the add instruction *"C F "C H ;,7 The offset *plus 9 low5order )eros, is sign5e(tended and added to the *updated, "C 77
Assem/"ing Branches =3am!"e

%ssem'ly code b'e $s0, $s1, /b%1 add $s3, $s0, $s1 /b%12 333 #achine !ormat of b'e.
op rs rt /8 'it offset
I format
/8
/S
2(222/
4emem'er
%fter
the b'e instruction is fetched, the "C is updated so that it is addressing the add instruction *"C F "C H ;,7 The offset *plus 9 low5order )eros, is sign5e(tended and added to the *updated, "C 78
Assem/"ing Dum!s
Instruction. 1 /b% #achine !ormat.

op 9
#go to /b%
985'it address >>>>
J format
=ow is the Mump destination address specified>

G
G
%s an a'solute address formed 'y

concatenating 22 as the 9 low5order 'its to ma&e it a word address concatenating the upper ; 'its of the current "C *now "CH;,
79
Disassem/"ing Dum! Destinations
The low order 98 'its of the Mump instr converted into a :9 'it Mump destination address 'y
G
concatenating two low5order )eros to create an 91 'it *word, address and then concatenating the upper ; 'its of the current "C *now "CH;, to create a :9 'it *word, address
that is put into the "C prior to the ne(t !etch cycle
from the low order 98 'its of the Mump instruction

98
22 :9 ;
"C
:9
80
Assem/"ing Branches and Dum!s

%ssem'le the #I"S machine code *in decimal is fine, for the following code seCuence7 %ssume that the addr of the be0 instr is 2(22;22292he( be0 $s0, $s1, 7%se add $s3, $s0, $s1 1 7!it 7%se2 sub $s3, $s0, $s1 7!it2 333
81
Assem/"ing Branches and Dum!s

%ssem'le the #I"S machine code *in decimal is fine, for the following code seCuence7 %ssume that the addr of the be0 instr is 2(22;22292he( be0 $s0, $s1, 7%se add $s3, $s0, $s1 1 7!it 7%se2 sub $s3, $s0, $s1 7!it2 333
0!00400020 0!00400024 0!00400028
4 0 2
1. 17
1. 17 19 0 0!20 0000 0100 0 333 0 0011 002

1-# dst = (0!0) 0!040003 002(002) = 0!00400030
0!0040002c 0!00400030
0 333
1. 17 19 0
0!22
82
Cut "oint
83
#ore Instructions for #a%ing Decisions

$e have be0, b'e, 'ut what a'out 'ranch5if5less5than> +ew instruction. s%t $t0, $s0, $s1 # if $s0 : $s1 # the' # $t0 = 1 # e%se # $t0 = 0 #achine format.
op
rs
rt
rd
funct
4 format
/8
/S
;9 F 2(9a 9
84
Eet #ore Instructions for #a%ing Decisions
Since constant operands are popular in comparisons, also have s%ti +ew instruction. s%ti $t0, $s0, 10 # if $s0 : 10 # the' # $t0 = 1 # e%se # $t0 = 0 #achine format.
I format
/8
2(222a 9
85
Other Branch Instructions
Can use s%t, be0, b'e, and the fi(ed value of 2 in $zero to create all relative conditions
G
less than
b%t $s1, $s2, /b%
G G G
less than or eCual to greater than great than or eCual to
b%e $s1, $s2, /b% bge $s1, $s2, /b%
bgt $s1, $s2, /b%
%s pseudo instructions they are recogni)ed *and e(panded, 'y the assem'ler The assem'ler needs a reserved register * $at,
so there are policy of use conventions for registers
86
Other Branch Instructions
Can use s%t, be0, b'e, and the fi(ed value of 2 in $zero to create all relative conditions
G
less than s%t b'e greater than
b%t $s1, $s2, /b% $at, $s1, $s2 #$at set to 1 if $at, $zero, /b% # $s1 : $s2 b%e $s1, $s2, /b% bge $s1, $s2, /b% bgt $s1, $s2, /b%
G G G
less than or eCual to great than or eCual to
%s pseudo instructions they are recogni)ed *and e(panded, 'y the assem'ler The assem'ler needs a reserved register * $at,
so there are policy of use conventions for registers
87
-ther "seudo5instructions
88
Cut "oint
89
#IPS Organi1ation

%rithmetic instructions L to/from the register file Load/store instructions 5 to/from memory
Processor
4egister !ile src/ addr src9 addr dst addr write data E E E :9 :9 'its :9 %LU :9 :9 registers *K)ero 5 Kra, src/ data :9
#emory
/6//22
read/write addr
:9
9:2 words
:9
src9 :9 data
read data write data

:9 ; 2 'yte address *'ig Andian, E / 8 9 S :
:9
26//22 26/222 262/22 262222

word address *'inary,
:9 'its
90
#IPS &egister Fi"e
-perands of arithmetic instructions must 'e from a limited num'er of special locations contained in the datapathBs register file
G
Thirty5two :95'it registers
G G
Two read ports -ne write port

src/ addr src9 addr dst addr write data 4egister !ile
E E E :9 :9 'its :9 locations :9 src9 :9 src/
data
data
91
#IPS &egister Fi"e
4egisters are
G
!ast
G
G
Smaller is faster R #a&e the common case fast

Aasy for a compiler to use
e7g7, *%N , L *CND, L *AN!, can do multiplies in any order

Improves code density
Since registers are named with fewer 'its than a memory location
4egister addresses are indicated 'y using K
92
Two Fey Princi!"es of #achine Design

/7 97
Instructions are represented as num'ers "rograms are stored in memory to 'e read or written, Must li&e num'ers
#emory
Stored5program
G "rograms
concept
can 'e shipped as files of 'inary num'ers L 'inary compati'ility G Computers can inherit ready5made software provided they are compati'le with an e(isting IS% L leads industry to align around a small num'er of IS%s
93
%ccounting prg *machine code, C compiler *machine code, "ayroll data Source code in C for %cct prg
Programming Sty"es
"rocedures
G
*su'routines, functions, allow the programmer to structure programs ma&ing them

easier to understand and de'ug and G allowing code to 'e reused
"rocedures
G
allow the programmer to concentrate on one portion of the code at a time

parameters act as 'arriers 'etween the procedure and the rest of the program and data, allowing the procedure to 'e passed values *arguments, and to return values *results,
94
Si3 Ste!s in =3ecution of a Procedure

#ain
G
routine *caller, places parameters in a place where the procedure *callee, can access them
$a0 5 $a3. four argument registers
Caller
transfers control to the callee Callee acCuires the storage resources needed Callee performs the desired tas& Callee places the result value in a place where the caller can access it
G
$;0 5 $;1. two value registers for result values
Callee
G
returns control to the caller
$ra. one return address register to return to the point of origin 95
Instruction for a""ing a Procedure #I"S procedure call instruction. 1a% 4roc)ddress #1u-# a'd %i'8 Saves "CH; in register $ra as the lin& to the following instruction to set up the procedure return #achine format.
op : 98 'it address >>>>
J format
Then
procedure can return with Must 1r$ra #retur'

96
Basic Procedure F"ow

!or
a procedure that computes the <CD of two values i *in $t0, and 1 *in $t1, gcd(i,1)" caller puts the i and 1 *the parameters values, in $a0 and $a1 and issues a 1a% gcd #1u-# to routi'e gcd
The
The
callee computes the <CD, puts the result in $;0, and returns control to the caller using gcd2 3 3 3 #code to co-#ute gcd 1r $ra #retur'
97
Cut "oint
98
S!i""ing &egisters
$hat
G it
high addr
if the callee needs to use more registers than allocated to argument and return values>
uses a stac& L a last5in5first5out Cueue
to# of stac8
$s#
-ne of the general registers, $s# *$29,, is used to address the stac& *which IgrowsJ from high address to low address,
G
add data onto the stac& L push

G
$s# F $s# L ; data on stac& at new Ksp
remove data from the stac& L pop

G
%o& addr
data from stac& at Ksp $s# F $s# H ;
99
om!i"ing a +eaf Procedure Leaf procedures are ones that do not call other procedures7 <ive the #I"S assem'ler code for
where g, h, i, and 1 are in $a0, $a1, $a2, $a3
i't %eaf<e! (i't g, i't h, i't i, i't 1)= i't f" f = (g+h) > (i+1)" retur' f" ? (assu-e the $s registers are u'a;ai%ab%e)
100
om!i"ing a +eaf Procedure Leaf procedures are ones that do not call other procedures7 <ive the #I"S assem'ler code for
where g, h, i, and 1 are in $a0, $a1, $a2, $a3

%eaf<e!2 addi s& s& add add sub %& %& addi 1r $s#,$s#,-8 $s1,4($s#) $s0,0($s#) $s0,$a0,$a1 $s1,$a2,$a3 $;0,$s0,$s1 $s0,0($s#) $s1,4($s#) $s#,$s#,8 $ra #-a8e stac8 roo#sa;e $s1 o' stac8 #sa;e $s0 o' stac8
i't %eaf<e! (i't g, i't h, i't i, i't 1)= i't f" f = (g+h) > (i+1)" retur' f" ?
#restore $s0 #restore $s1 #ad1ust stac8 #tr
101
=3am!"e
<iven the following C code i't -ai'() (i't g, i't h, i't i, i't 1) = i't ," 333 ,=diffofsu-s(2,3,4,@)" 333 ? i't diffofsu-s(i't f, i't g, i't h, i't i) = i't resu%t" resu%t = (f+g)-(h+i)" retur' resu%t" ? !ill in the 'lan&s in the following translation of this C code into #I"S (registers $s0, $s1, and $s2 must be sa ed and restored). # $s0=, -ai'2
diffofsu-s2
!!! addi $a0,$0,2 addi $a1,$0,3 addi $a2,$0,4 addi $a3,$0,< 1a% <<<<<<<< !!! # $s0=resu%t
# agru-e't0= # agru-e't1=3 # agru-e't2=" # agru-e't3=5 #ca%% #rocedure
#ddi $sp, $sp, $$$$% s& $s0, <<<<< # s& $s1, <<<<< # s& $s2, <<<<< # #dd $$$, $$$, $$$ % #dd $$$, $$$, $$$ % sub $$$, $$$, $$$ % #dd $$$, $$$, $$$ % l& $s2, $$$$$ # l& $s1, <<<<< # l& $s0, <<<<< # #ddi $sp,$sp, $$ % 0r $$ %
&#'( sp#)( on st#)' to stor( t*r(( r(+ist(rs sa;e $s0 o' stac8 sa;e $s1 o' stac8 sa;e $s2 o' stac8 $t0=f,+ $t-=*,i r(sult = (f,+).(*,i) put r(turn /#lu( in $/0 restore $s2 fro- stac8 restore $s1 fro- stac8 restore $s0 fro- stac8 d(.#llo)#t( st#)' sp#)( r(turn to )#ll(r
102
=3am!"e
<iven the following C code i't -ai'() (i't g, i't h, i't i, i't 1) = i't ," 333 ,=diffofsu-s(2,3,4,@)" 333 ? i't diffofsu-s(i't f, i't g, i't h, i't i) = i't resu%t" resu%t = (f+g)-(h+i)" retur' resu%t" ? !ill in the 'lan&s in the following translation of this C code into #I"S *registers $s0, $s1, and $s2 must be sa ed and restored).
# $s0=, -ai'2
diffofsu-s2
!!! addi $a0,$0,2 addi $a1,$0,3 addi $a2,$0,4 addi $a3,$0,@ 1a% diffofsu-s !!! # $s0=resu%t #ddi $sp, $sp, .s& $s0, 8(s#) s& $s1, 4(s#) s& $s2, 0(s#) #dd $s-, $#0, $##dd $s , $# , $#3 sub $s0, $s-, $s #dd $/0, $s0, $0 l& $s2, 0(s#) l& $s1, 4(s#) l& $s0, 8(s#) #ddi $sp,$sp, 0r $r#
# agru-e't0= # agru-e't1=3 # agru-e't2=" # agru-e't3=5 #ca%% #rocedure
103
% # # # % % % % # # # % %
&#'( sp#)( on st#)' to stor( t*r(( r(+ist(rs sa;e $s0 o' stac8 sa;e $s1 o' stac8 sa;e $s2 o' stac8 $s-=f,+ $s =*,i r(sult = (f,+).(*,i) put r(turn /#lu( in $/0 restore $s2 fro- stac8 restore $s1 fro- stac8 restore $s0 fro- stac8 d(.#llo)#t( st#)' sp#)( r(turn to )#ll(r
Cut "oint
104
:ested Procedures
$hat
happens to return addresses with nested procedures> i't rt<1 (i't i) = if (i == 0) retur' 0" e%se retur' rt<2(i-1)" ?
ca%%er2 1a% 'e!t2 3 3 3 rt<1
rt<12 b'e $a0, $zero, to<2 add $;0, $zero, $zero 1r $ra to<22 addi $a0, $a0, -1 1a% rt<2 1r $ra rt<22 3 3 3 105
:ested Procedures Outcome

ca%%er2 1a% rt<1 'e!t2 3 3 3 rt<12 b'e $a0, $zero, to<2 add $;0, $zero, $zero 1r $ra to<22 addi $a0, $a0, -1 1a% rt<2 1r $ra rt<22 3 3 3
-n the call to rt<1, the return address *'e!t in the caller routine, gets stored in $ra7 $hat happens to the value in $ra *when i 6= 0, when rt<1 ma&es a call to rt<2>
106
Sa2ing the &eturn Address@ Part *
high addr
+ested procedures *i passed in $a0, return value in $;0,

rt<12 b'e add 1r to<22 addi s& s& addi 1a% b8<22 %& %& addi 1r $a0, $zero, to<2 $;0, $zero, $zero $ra $s#, $s#, -8 $ra, 4($s#) $a0, 0($s#) $a0, $a0, -1 rt<2 $a0, 0($s#) $ra, 4($s#) $s#, $s#, 8 $ra
o%d ABC
$s#
%o& addr
$ra
Save the return address *and arguments, on the stac&
107
high addr

o%d ABC
$s#
%o& addr ca%%er rt addr $ra
108
high addr

o%d ABC ca%%er rt addr o%d $a0
$s# $s#
%o& addr ca%%er rt addr $ra
109
high addr

$s# $s#
%o& addr ca%%er b8<2 rt addr $ra
110
Sa2ing the &eturn Address@ Part .
high addr

$s#
%o& addr
b8<2 ca%%er rt addr $ra
111
Sa2ing the &eturn Address@ Part .
high addr

$s#
$s#
%o& addr
b8<2 ca%%er rt addr $ra
112
#IPS &egister on2ention

:ame K)ero Kv2 5 Kv/ Ka2 5 Ka: Kt2 5 KtS Ks2 5 KsS Kt1 5 Kt0 Kgp Ksp Kfp Kra 113 &egister :um/er 2 95: ;5S 15/E /859: 9;59E 91 90 :2 :/ Asage the constant 2 returned values arguments temporaries saved values temporaries glo'al pointer stac& pointer frame pointer return address Preser2e on ca""? n7a7 no ]esN no yes no yes yes yes yes
0he $on1ention ,sed in the -oo2 does not preser1e 3a043a3
Chat is and what is not !reser2ed across a !rocedure ca""9
114
A""ocating S!ace on the Stac%

The
high addr Ca;ed argu-e't regs (if a',) Ca;ed retur' addr Ca;ed %oca% regs (if a',) /oca% arra,s structures (if a',) %o& addr
G
$f#
segment of the stac& containing a procedureBs saved registers and local varia'les is its procedure frame *a&a activation record,
G The
$s#
frame pointer *$f#, points to the first word of the frame of a procedure L providing a sta'le I'aseJ register for the procedure
$f# is initiali)ed using $s# on a call and $s# is restored using $f# on a return
115
A""ocating S!ace on the Hea!

Static
data segment for constants and other static varia'les *e7g7, arrays, Dynamic data segment *a&a heap, for structures that grow and shrin& *e7g7, lin&ed lists,
G
Ksp
#emory Stac%
2( Sf f f f f f c
Kgp
Dynamic data (hea!) Static data Te3t (Eour code)

2( /222 1222 2( /222 2222
%llocate space on the heap with -a%%oc() and free it with free() 116
"C
&eser2ed
2( 22;2 2222 2( 2222 2222
om!i"ing a &ecursi2e Procedure
% procedure for calculating factorial

i't fact (i't ') = if (' : 1) retur' 1" e%se retur' (' $ fact ('-1))" ?
% recursive procedure *one that calls itself@,
fact *2, F / fact */, F / N / F / fact *9, F 9 N / N / F 9 fact *:, F : N 9 N / N / F 8 fact *;, F ; N : N 9 N / N / F 9; 777
%ssume ' is passed in $a0D result returned in $;0 117
om!i"ing a &ecursi2e Procedure

fact2 addi $s#, $s#, -8 #ad1ust stac8 #oi'ter s& $ra, 4($s#) #sa;e retur' address s& $a0, 0($s#) #sa;e argu-e't ' s%ti $t0, $a0, 1 #test for ' : 1 be0 $t0, $zero, /1 #if ' D=1, go to /1 addi $;0, $zero, 1 #e%se retur' 1 i' $;0 addi $s#, $s#, 8 #ad1ust stac8 #oi'ter 1r $ra #retur' to ca%%er /12 addi $a0, $a0, 1a% fact #this is &here b8<f2 %& $a0, 0($s#) %& $ra, 4($s#) addi $s#, $s#, -u% $;0, $a0, 1r $ra 118 #' D=1, so decre-e't ' #ca%% fact &ith ('-1) fact retur's #restore argu-e't ' #restore retur' address 8 #ad1ust stac8 #oi'ter $;0 #$;0 = ' $ fact('-1) #retur' to ca%%er -1
A +oo% at the Stac% for 0a' G .@ Part *

o%d ABC
$s#
Stac& state after e(ecution of first encounter with the 1a% instruction *second call to fact routine with $a0 now holding /,
G
$ra $a0 G
save return address to caller routine *i7e7, location in the main routine where first call to fact is made, on the stac& save original value of $a0 on the stac&
119
$;0

o%d ABC $s#
G
ca%%er rt addr 2
$ra $a0 $;0 G
saved return address to caller routine *i7e7, location in the main routine where first call to fact is made, on the stac& saved original value of $a0 on the stac&
120

o%d ABC $s# ca%%er rt addr $s# $a0 = 2
G
ca%%er rt addr 2
$ra $a0 $;0 G
121

o%d ABC $s# ca%%er rt addr $s# $a0 = 2
G
ca%%er b8<f rt addr 1 2
$ra $a0 $;0 G
122
A +oo% at the Stac% for 0a' G .@ Part .

o%d ABC ca%%er rt addr $s# $a0 = 2 b8<f $a0 = 1 $s#
Stac& state after e(ecution of second encounter with the 1a% instruction *third call to fact routine with $a0 now holding 2,
G
b8<f 1
$ra $a0 $;0
saved return address of instruction in caller routine *instruction after 1a%, on the stac& saved previous value of $a0 on the stac&
123
A +oo% at the Stac% for 0a' G .@ Part .

o%d ABC ca%%er rt addr $s# $a0 = 2 b8<f $a0 = 1 $s#
Stac& state after e(ecution of second encounter with the 1a% instruction *third call to fact routine with $a0 now holding 2,
G
b8<f 0 1
$ra $a0 $;0
saved return address of instruction in caller routine *instruction after 1a%, on the stac& saved previous value of $a0 on the stac&
124
A +oo% at the Stac% for 0a' G .@ Part )

o%d ABC ca%%er rt addr $a0 = 2 b8<f $a0 = 1 b8<f $a0 = 0 $s#
Stac& state after e(ecution of first encounter with the first 1r instruction *$;0 initiali)ed to /,
G
stac& pointer updated to point to third call to fact
b8<f 0
$ra $a0 $;0
125

G
b8<f 0 1
$ra $a0 $;0
126

G
b8<f 0 1
$ra $a0 $;0
127

o%d ABC ca%%er rt addr $a0 = 2 b8<f $a0 = 1 $s# $s# b8<f $a0 = 0 $s#
G
b8<f 0 1
$ra $a0 $;0
128
A +oo% at the Stac% for 0a' G .@ Part 4

o%d ABC ca%%er rt addr $a0 = 2 b8<f $a0 = 1 $s# b8<f $a0 = 0
Stac& state after e(ecution of first encounter with the second 1r instruction *return from fact routine after updating $;0 to / N /,
G
b8<f 0 1 1
$ra $a0 $;0
G G
return address to caller routine *b8<f in fact routine, restored to $ra from the stac& previous value of $a0 restored from the stac& stac& pointer updated to point to second call to fact
129

o%d ABC ca%%er rt addr $a0 = 2 $s# b8<f $a0 = 1 $s# b8<f $a0 = 0
G
b8<f 0 1 1
$ra $a0 $;0
G G
130

o%d ABC ca%%er rt addr $a0 = 2 $s# b8<f $a0 = 1 $s# b8<f $a0 = 0
G
b8<f 0 1 1 $ 11
$ra $a0 $;0
G G
131

o%d ABC ca%%er rt addr $a0 = 2 $s# b8<f $a0 = 1 b8<f $a0 = 0
Stac& state after e(ecution of second encounter with the second 1r instruction *return from fact routine after updating $;0 to 9 N / N /,
G
ca%%er b8<f rt addr 1 2 1 $ 1
$ra $a0
G G
132
$;0
return address to caller routine *main routine, restored to $ra from the stac& original value of $a0 restored from the stac& stac& pointer updated to point to first call to fact

o%d ABC $s# ca%%er rt addr $a0 = 2 $s# b8<f $a0 = 1 b8<f $a0 = 0
G
ca%%er b8<f rt addr 1 2 1 $ 1
$ra $a0
G G
133
$;0

o%d ABC $s# ca%%er rt addr $a0 = 2 $s# b8<f $a0 = 1 b8<f $a0 = 0
G
ca%%er b8<f rt addr 1 2 2 1 $ $ 1 1 $ 1
$ra $a0
G G
134
$;0
Cut "oint
135
How A/out +arger onstants?

$eUd
also li&e to 'e a'le to load a :95'it constant into a register #ust use two instructions, new \load upper immediate\ instruction %ui $t0, 0!aaaa
/8 2 1 /2/2/2/2/2/2/2/2
Then
must get the lower order 'its right, i7e7, ori $t0, $t0, 0!aaaa
/2/2/2/2/2/2/2/2 2222222222222222 2222222222222222 /2/2/2/2/2/2/2/2
136
How A/out +arger onstants?

$eUd
also li&e to 'e a'le to load a :95'it constant into a register #ust use two instructions, new \load upper immediate\ instruction %ui $t0, 0!aaaa
f 2 1 /2/2/2/2/2/2/2/2
Then
must get the lower order 'its right, i7e7, ori $t0, $t0, 0!aaaa
/2/2/2/2/2/2/2/2 2222222222222222 /2/2/2/2/2/2/2/2 137 2222222222222222 /2/2/2/2/2/2/2/2 /2/2/2/2/2/2/2/2
Shift O!erations
+eed
operations to pac& and unpac& 15'it characters into :95'it words Shifts move all the 'its in a word left or right
s%% $t2, $s0, 8 sr% $t2, $s0, 8
op rs rt
#$t2 = $s0 :: 8 bits #$t2 = $s0 DD 8 bits

rd shamt funct
4 format
/8
/2
2(22
Such
shifts are called logical 'ecause they fill with )eros

G +otice
that a E5'it shamt field is enough to shift a :95'it value 9E L / or :/ 'it positions 138
#ore Shift O!erations

%n
arithmetic shift *sra, maintain the arithmetic correctness of the shifted value *i7e7, a num'er shifted right one 'it should 'e ^ of its original valueD a num'er shifted left should 'e 9 times its original value,
uses the most significant 'it *sign 'it, as the 'it shifted in G s%% wor&s for arithmetic left shifts for 9Bs compl7 *so there is no need for a s%a, sra $t2, $s0, 8 #$t2 = $s0 DD 8 bits
G sra
4 format
139
/8
/2
2(2:
om!i"ing Another Chi"e +oo!

Compile
the assem'ly code for the C &hi%e loop where i is in $s3, 8 is in $s@, and the 'ase address of the array sa;e is in $s. &hi%e (sa;e*i+ == 8) i += 1"
140
om!i"ing Another Chi"e +oo!

Compile
the assem'ly code for the C &hi%e loop where i is in $s3, 8 is in $s@, and the 'ase address of the array sa;e is in $s. &hi%e (sa;e*i+ == 8) i += 1"
/oo#2 s%% $t1, $s3, 2 add $t1, $t1, $s. %& $t0, 0($t1) b'e $t0, $s@, 7!it addi $s3, $s3, 1 1 /oo# 7!it2 3 3 3
141
Cut "oint
142

ategory Instr O! =3am!"e #eaning
%rithmetic *4 R I format,
add su'tract add immediate shift left logical shift right logical shift right arithmetic and or nor and immediate or immediate load upper immediate
2 R 92 2 R 99 1 2 R 22 2 R 29 2 R 2: 2 R 9; 2 R 9E 2 R 9S c d f
add Ks/, Ks9, Ks: su' Ks/, Ks9, Ks: addi Ks/, Ks9, ; sll srl Ks/, Ks9, ; Ks/, Ks9, ;
Ks/ F Ks9 H Ks: Ks/ F Ks9 5 Ks: Ks/ F Ks9 H ; Ks/ F Ks9 YY ; Ks/ F Ks9 __ ; *fill with )eros, Ks/ F Ks9 __ ; *fill with sign 'it, Ks/ F Ks9 R Ks: Ks/ F Ks9 Z Ks: Ks/ F not *Ks9 Z Ks:, Ks/ F Ks9 R 2(ff22 Ks/ F Ks9 Z 2(ff22
Ks/ F 2(ffff2222
sra Ks/, Ks9, ; and Ks/, Ks9, Ks: or Ks/, Ks9, Ks: nor Ks/, Ks9, Ks: and Ks/, Ks9, ff22 or Ks/, Ks9, ff22
lui Ks/, 2(ffff
143

ategory
Data transfer *I format,
Instr
O!
=3am!"e
#eaning
load word store word load 'yte store 'yte load half store half
9: 9' 92 91 9/ 90 ; E a 2 R 9a 9 2 R 21
lw l' lh
Ks/, /22*Ks9, Ks/, /2/*Ks9, Ks/, /2/*Ks9,
Ks/ F #emory*Ks9H/22, #emory*Ks9H/22, F Ks/ Ks/ F #emory*Ks9H/2/, #emory*Ks9H/2/, F Ks/ Ks/ F #emory*Ks9H/29, #emory*Ks9H/29, F Ks/ if *Ks/FFKs9, go to L if *Ks/ @FKs9, go to L if *Ks9Y/22, Ks/F/D Ks/F2 else
sw Ks/, /22*Ks9, s' Ks/, /2/*Ks9, sh Ks/, /2/*Ks9, 'eC Ks/, Ks9, L 'ne Ks/, Ks9, L slti Ks/, Ks9, /22 slt Ks/, Ks9, Ks: M Mr 9E22 Kt/
Cond7 'ranch *I R 4 format,
'r on eCual 'r on not eCual set on less than immediate set on less than
if *Ks9YKs:, Ks/F/D else Ks/F2 go to /2222 go to Kt/
Uncond7 Mump
Mump Mump register
144
&e2iew- #IPS &)''' ISA

Instruction
G G G G
G
Categories
&egisters

coprocessor
&' ( &)*
G G

E 'its rs rs E 'its rt rt E 'its rd E 'its shamt
P HI +O
Instruction !ormats. all :9 'its wide

8 'its -" -" -" 8 'its funct
4 format I format J format
/8 'it num'er 98 'it Mump target
145
#IPS Organi1ation
Processor
4egister !ile src/ addr src9 addr dst addr write data E E E :9 :9 'its 'r offset :9 "C ; :9 %dd :9 :9 %LU :9 :9 %dd :9 :9 registers *K)ero 5 Kra, src/ :9 data
#emory
/6//22
src9 data :9
read/write addr
:9
9:2 words
read data
:9 :9
!etch "C F "CH; A(ec
write data
:9 :9 ; 2 E / 8 9 S :
Decode
:9 'its 'yte address *'ig Andian,
26//22 26/222 262/22 262222 word address *'inary,
146
#IPS Addressing #odes

4egister
addressing L operand is in a register ase *displacement, addressing L operand is at the memory location whose address is the sum of a register and a /85'it constant contained within the instruction Immediate addressing L operand is a /85'it constant contained within the instruction "C5relative addressing Linstruction address is the sum of the "C and a /85'it constant contained within the instruction "seudo5direct addressing L instruction address is the 985'it constant contained within the instruction concatenated with the upper ; 'its of the "C
147
/7 4egister addressing
op rs rt rd
Addressing #odes I""ustrated

funct
4egister
word operand
97 ase addressing
op rs rt offset
#emory
word or 'yte operand
'ase register
:7 Immediate addressing
op op rs rs rt rt operand offset
;7 "C5relative addressing #emory

'ranch destination instruction "rogram Counter *"C,
E7 "seudo5direct addressing
op Mump address ZZ "rogram Counter *"C, 148
#emory
Mump destination instruction

Lecture Set 02

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Lecture Set 02

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Chapter 2

Instructions: Language of the Computer

[Some slides adapted from A. Sprintson, M. Irwin, D. Paterson and others]

The Instruction Set Architecture (ISA) software

The interface description separating the software and hardware

How Do the Pieces Fit Together?

Processor Data!ath $ ontro" Digita" Design ircuit Design

The #IPS ISA

&egisters &' ( &)*

Load/Store Computational Jump and ranch !loating "oint

#emory #anagement Special

) Instruction Formats- a"" ). /its wide OP OP OP rs rs rt rt rd sa funct

Assem/"y +anguage Instructions

The language of the machine

Stored program *von +eumann, concept

-ur target. the #I"S IS%

&IS ( &educed Instruction Set om!uter

for comple(,, e7g7, Intel (18

The Four Design Princi!"es

The #IPS ISA

&egisters &' ( &)*

Load/Store Computational Jump and ranch !loating "oint

#emory #anagement Special

Unli&e =LL li&e C or Java, assem'ly cannot use varia'les

%ssem'ly -perands are registers

Aach #I"S register is :9 'its wide

:aming on2entions for &egisters

#IPS Arithmetic Instruction

-perand order is fi(ed *the destination is specified first,

#IPS Arithmetic Instruction

-perand order is fi(ed *the destination is specified first,

om!i"ing #ore om!"e3 Statements

om!i"ing #ore om!"e3 Statements

$t0, $s1, $s2 $s0, $t0, $s3

om!i"ing #ore om!"e3 Statements

defined in hardware, so an instruction

will not do anything@

#achine +anguage ( Arithmetic Instruction

A(ample. add $t0, $s1, $s2 registers have num'ers $t0=$8,$s1=$17,$s2=$18

Can you guess what the field names stand for?

#achine +anguage ( Arithmetic Instruction

A(ample. add $t0, $s1, $s2 registers have num'ers $t0=$8,$s1=$17,$s2=$18

Can you guess what the field names stand for?

add $t0, $s1, $s2

000000 10001 10010 01000 00000 100000

#IPS Instruction Fie"ds

#IPS Instruction Fie"ds

Dea"ing with onstants

Solutions> $hy not>

=ow do we ma&e this wor&>

=ow do we #a&e the common case fast @

onstant (or Immediate) O!erands

Include constants inside arithmetic instructions

#I"S immediate instructions addi $s3, $s3, 4 #$s3 = $s3 + 4

There is no subi instruction, can you guess why not>

#achine +anguage > Immediate Instructions

#achine +anguage > Immediate Instructions

The constant is &ept inside the instruction itself@

#achine +anguage > Immediate Instructions

<iven the following lines in #I"S %ssem'ly Language

%ssem'le the #I"S o'Mect code for these four lines.

"rocessor L #emory Interconnections

The word address of the data

> locations 9:9 ytes*;< , 9:2 $ords*/<$,

> locations 9:9 ytes;< , 9:2 $ords/<$,