Marks Obtained

XX

Bangladesh University of Engineering and Technology Department of Electrical and Electronic Engineering EEE 315 Microprocessor and Interfacing

SET: A

Class Test #1, Total Marks: 20, Time: 20 min, Date: November 30, 2013, Term: November 2013 Name: TEACHERS SOLUTION Student ID: 2009060 X X

Question #1. Write an assembly language code using the instruction set of SAP-1 computer to perform the following operation7 128 16 59 20 45 ?

Include provision for output and program termination. Also show the machine code corresponding to the Assembly language code. What is the actual result of this operation? What value will be shown in output register after the execution of your program? [Fill up the necessary RAM addresses only] [15] Solution: Address Assembly Code Machine Code 0H LDA FH 0000 1111 1H ADD EH 0001 1110 2H SUB DH 0010 1101 3H SUB CH 0010 1100 4H SUB BH 0010 1011 5H SUB AH 0010 1010 6H OUT 1110 XXXX 7H HLT 1111 XXXX AH 2DH 0010 1101 BH 14H 0001 0100 CH 3BH 0011 1011 DH 10H 0001 0000 EH 80H 1000 0000 FH F9H 1111 1001 Actual result is 275. But 13 will be shown in the output register. [F9 + 80 10 3B 14 2D = ED whose 2s complement is 13. Note that results are to be truncated whenever 8 bit size limit is exceeded.]

Question #2. For the program in Question #1, calculate the time required to complete the program execution considering [5] 1. Using fixed machine cycle. 2. Using variable machine cycle. 3. Also compare the results. Solution: There are in total 8 instructions in the above program. We know, the clock frequency of SAP-1 is 1 kHz. Therefore 1 T-state consumes 1 ms of time. 1. In fixed machine cycle scheme, 7 instructions will use 6 T-states each and HLT will use 3 Tstates. So, there will require 7 6 + 3 = 45 T-states. So, in fixed machine cycle scheme, the above program will require 45 ms to complete the execution. 2. On the other hand, in variable machine cycle scheme, 5 instructions will use 6 T-states each, LDA, OUT and HLT will use 5, 4 and 3 T-states respectively. So, there will require 5 6 + 5 + 4 + 3 = 42 T-states. So, in variable machine cycle scheme, the above program will require 42 ms to complete the execution. 3. Using variable machine cycle scheme reduces 6.67% of computation time.

Marks Obtained

XX

Bangladesh University of Engineering and Technology Department of Electrical and Electronic Engineering EEE 315 Microprocessor and Interfacing

SET: B

Class Test #1, Total Marks: 20, Time: 20 min, Date: November 30, 2013, Term: November 2013 Name: TEACHERS SOLUTION Student ID: 2009060 X X

Question #1. Write the necessary assembly code snippet for the following operation using SAP -1 instruction set. (Note that C and D are variables) [5] Assembly Code Solution: OUT = C 3 D LDA FH SUB EH SUB EH SUB EH OUT FH = address of C variable EH = address of D variable Question #2. Suppose that a new instruction LDB [address] (with opcode 0011) is to be included in the instruction set of SAP-1. Consider fixed machine cycle then answer the following questions [15] a. Define fetch and execution cycles for this operation. b. How many T states are actually required for this operation? c. Write microinstructions for each T state of this operation. The control word of SAP-1 is given as reference. CON C p EP LM CE LI EI LA E A SU EU LB LO d. Modify SAP-1 address ROM and Control ROM to accommodate the new instruction (Original SAP-1 address ROM and control ROM are given below) Address ROM Address Content 0H 0011B 1H 0110B 2H 1001B 3H 4H 5H 6H 7H 8H 9H AH BH CH DH EH 1100B FH Solution: 1. Operation: T1: PC MAR; Ep, LM active T2: PC = PC + 1; Cp active T3: RAM IR; CE, LI active T4: IR MAR; EI, LM active T5: RAM B ; CE, LB active T6: NOP 2. Actually 5 T-states are effective. 3. Microinstructions: T1: 5E3H, T2: BE3H; T3: 263H; T4: 1A3H; T5: 2E1H; T6: 3E3H 4. Modified Address ROM and Control ROM: Control ROM Content 5E3H BE3H 263H 1A3H 2C3H 3E3H 1A3H 2E1H 3C7H 1A3H 2E1H 3CFH 3F2H 3E3H 3E3H

Address 0H 1H 2H 3H 4H 5H 6H 7H 8H 9H AH BH CH DH EH FH

Instruction Fetch

LDA

ADD

SUB

OUT

Marks Obtained

XX

Bangladesh University of Engineering and Technology Department of Electrical and Electronic Engineering EEE 315 Microprocessor and Interfacing

SET: B

Class Test #1, Total Marks: 20, Time: 20 min, Date: November 30, 2013, Term: November 2013 Name: TEACHERS SOLUTION Student ID: 2009060 X X

Address ROM Address Content 0H 0011B 1H 0110B 2H 1001B 3H 1111B 4H 5H 6H 7H 8H 9H AH BH CH DH EH 1100B FH

Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H

Control ROM Content 5E3H BE3H 263H 1A3H 2C3H 3E3H 1A3H 2E1H 3C7H 1A3H 2E1H 3CFH 3F2H 3E3H 3E3H 1A3H 2E1H 3E3H

Instruction Fetch

LDA

ADD

SUB

OUT

LDB

Department of Electrical and Electronic Engineering Bangladesh University of Engineering and Technology Mark sheet of Class tests Course: EEE 315 Microprocessor and Interfacing Level: 3 Term: II Section : A Total Number of Registered Students: 65 Student ID Name CT #1 (20) 13 17 19 15 20 17 11 6 15 17 10 10 14 12 12 5 15 4 3 10 19 8 13 17 11 14 15 12 Absent 15 20 20 16

200906001 200906002 200906003 200906004 200906005 200906006 200906007 200906008 200906009 200906010 200906011 200906012 200906013 200906014 200906015 200906016 200906017 200906018 200906019 200906020 200906021 200906022 200906023 200906024 200906025 200906026 200906027 200906028 200906029 200906030 200906031 200906032 200906033

Anik Saha Jewel Mohajan Farhad Mohsin Anupam Golder Sarah Al-Hussaini Md. Emroz Khan Md. Azim Ullah Forsad Al Hossain A.R.M. Abdullah Md. Mukhlasur Rahman Tanvir Md. Rifat Kaisar Rachi Asif Iqbal Tanmoy Kumar Paul Ahammad Sifat Farhan Sadique Tahmid Sami Rahman Krisna Gopal Das Suman Azad Kazi Shafiul Alam Ashrarul Haq Sifat Md. Ayaz Masud Musbiha Binte Wali Md. Faridur Reza Samira Shamsir Mohammad Bin Monjil Md. Kishwar Mashooq Riddhiman Adib Shiekh Zia Uddin S.M.G. Tawab Ullas Md. Nafiz Amin Nazia Afroz Choudhury Ihteyaz Aqaeed Avash Syeda Lammim Ahad

200906034 200906035 200906036 200906037 200906038 200906040 200906041 200906042 200906043 200906044 200906045 200906046 200906047 200906048 200906049 200906050 200906051 200906052 200906053 200906054 200906055 200906056 200906057 200906058 200906059 200906060 200906061 200906062 200906063 200906064 200906065

Partha Protim Nath Bil Maruf Bin Barik Khandker Akif Aabrar Anik Mallick Md. Ashikuzzaman Md. Musabbir Adnan Muhammad Nahid Hasan Tahsin Reasat Navid Ibtehaj Nizam Hasan Monir Kazi Taimur Reza Fariha Tasnim Khan Md. Abul Hayat Khandoker Asif Faruque Baishakhi Rani Biswas Ratul Das Naqib Sad Pathan Md. Nazmul Kabir Sikder Md.Shafiqul Islam Nibirh Jawad Shahnewaz Karim Sakib Abir Saha Zahid Hasan Aquib Ahmed Nowshad Zaman Muhammad Rashedul Haq Rashed Shah Mahdi Hasan Md. Toky Foysal Talukdar Md. Asif Chowdhury Md. Shifat-E-Rabbi Md. Saiful Islam

6 19 12 Absent 0 20 14 2 20 20 10 11 8 15 17 16 18 6 18 20 8 8 12 10 17 Absent 3 12 10 15 5