Beruflich Dokumente
Kultur Dokumente
Computing Support
John Scafidi (scafidi@ece.rutgers.edu)
Course will have large project emphasis 1/3 of the course grade is based on projects: Largest single grade component Information will be updated on the class Sakai
Check the site regularly for updates, homework, projects, etc. I encourage students to participate on the discussion boards, I will try to answer questions on the boards regularly.
9/1/2011
332:463
9/1/2011
332:463
Grading/Assignments
Homework (5%)
Assigned weekly on Monday, due in class following Tuesday (Check Sakai) More for you than the me
Transistor Timeline
Vacuum Tube 1906 (DeForest) Transistor 1947 (Shockly, Bardeen and Brittain) Modern Discrete Packaged Transistors
Integrated Circuit 1958 (Jack Kilby and Robert Noyce) 9/1/2011 332:463
Moores Law
Number of printed transistors doubles every 1.5 years Founded Fairchild and Intel 9/1/2011 332:463
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Newest generation grows transistor vertically Restore more control to the transistor gate gate is now 3D
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Semiconductor Market/Economics
Moores Law leads to increased integration More sales of electronic devices as integration drives price down Growing penetration into large Asian/Pacific market still fueling growth 9/1/2011 332:463
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Why CMOS?
CMOS Device Speed (fT) Noise Transconductance (gm) Intrinsic Gain (Av) Si BJT SiGe HBT
CMOS has low gain and high noise: Question why use it?
Possibility for integration with digital circuits Scaling increases speedcan correct for other problems with fast digital circuits. Costscaling reduces cost of a transistor to almost nothing. SiGe BiCMOS(and other exotics) tend to be expensive.
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Bipolar advantage: Bipolar disadvantage: Lower process variation Lower density High voltage Higher cost Higher gain (gmro) Higher fT for same feature size
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9/1/2011
A.J. Joseph, et al., "Status and Direction of Communication Technologies - SiGe BiCMOS and RFCMOS," Proceedings of the IEEE, vol.93, pp.1539-1558, September 2005.
CMOS is cheaper for a given lithography, but more costly for the same speedmake up for it with transistor density.
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Must minimize # transistors Devices dont match well no differential circuits Rs and Cs can be large
C~1pF10F
9/1/2011
Unlimited # transistors Good device matching differential circuits Rs and Cs must be small
~100k and 50pF
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