Low Level Languages

- Low level computer languages are machine codes or close to it. Computer cannot understand instructions given in high level languages or in English. It can only understand and execute instructions given in the form of machine language i.e. language of 0 and 1. There are two types of low level languages: Machine Language. ssem!ly Language Machine Language It is the lowest and most elementary level of "rogramming language and was the first type of programming language to !e developed. Machine Language is !asically the only language which computer can understand. Computer was design to o!ey #ust one Language$ its machine code$ which is represented inside the computer !y a %tring of !inary digits &!its' 0 and 1. t h i s i s m y l a n g u a g e ()-*+-*,--.-/0-*,--.-/0-*0-(,-/0-*C-*1-*E-*(-(--*1-*(-*-

Advantages of Machine Language 1. It ma1es fast and efficient use of the computer. /. It re2uires no translator to translate the code$ i.e. directly understood !y the computer Disadvantages of Machine Language: 1. ll operation codes have to !e remem!ered /. ll memory addresses have to !e remem!ered .. It is hard to amend or find errors in a program written In the machine language ). 3hese languages are machine dependent i.e. a particular Machine language can !e used on only one type of computer Assembly Language 3his is another low level !ut a very important language in which operation codes and operands are given in the form of alphanumeric sym!ols instead of 04s and l4s. 3hese alphanumeric sym!ols will !e 1nown as mnemonic codes and can have maximum up to - letter com!ination e.g. 00 for addition$ %56 for su!traction$ %3 73$L 6EL etc. 6ecause of this feature it is also 1nown as 8%ym!olic "rogramming Language4. 3his language is also very difficult and needs a lot of practice to master it. is a sym!olic representation of a processor9s native code. 5sing machine code allows the programmer to control precisely what the processor does. Advantages of Assembly Language 1. It is easier to understand and use as compared to machine language. /. It is easy to locate and correct errors. .. It is modified easily Disadvantages of Assembly Language 1. Li1e machine language it is also machine dependent. /. %ince it is machine dependent therefore programmer should have the 1nowledge of the hardware also.

Number System
Binary Numbers !ase-/ num!er system which made up of only 0s and 1s. Ex. 11111111$ 00000000$ 11001110$ 10000110 e!adecimal number :exadecimal descri!es a !ase-1* num!er system. 3hat is$ it descri!es a num!ering system containing 1* se2uential num!ers as !ase units &including 0'. "LL#ST$AT"%N: 0 ) + 1/ - C 1 , 1. - 0 / * 10 ; 1) - E . ( 11 - 6 1- ; < Nibble four &)' !inary digits ex. 1111$ 0000$ 1010$ 0011

Number System &onversion

Binary to e!adecimal 'shortcut method( 1 1 1 1 0 1 1 0 1 0 1 0 +=)=/=1 > 1- - < 0=)=/=0 > * - * +=0=/=0 > 10 ; e!adecimal to Binary 'shortcut method( < < / 1 E 1111 1111 0010 0001 1110 0101 &haracter)encoding character encoding system consists of a code that pairs each character from a given repertoire with something else$ such as a se2uence of natural num!ers$ octets or electrical pulses$ in order to facilitate the transmission of data &generally num!ers and?or text' through telecommunication networ1s or storage of text in computers. American Standard &ode for "nformation "nterchange 'AS&""( Is a (-!it character-encoding scheme !ased on the ordering of the English alpha!et. %CII codes represent text in computers$ communications e2uipment$ and other devices that use text. 1/+ characters *!tended)American Standard &ode for "nformation "nterchange Is a +-!it character-encoding scheme. /-* characters

$egisters or "nternal $egisters

"nternal $egisters microprocessor internal 7 M 7egisters are +-$1*-$./-$or *)-!it memory locations !ut not addressed li1e external memory. Instead$ each of these registers has an explicit uni2ue name that can !e used in the machine language instruction. +our types of registers o Data $egisters or ,eneral purpose registers ; are used in any manner that the programmer wishes. Each general purpose register is addressa!le as a 1*-!it register & @$ 6@$ C@$ and 0@'$./-!it register &E @$ E6@$ EC@$ and E0@'$ or *)-!it registers &7 @$ 76@$ 7C@$ and 70@'. ccumulator & @' ; the main register used to perform arithmetic operations. Aften used to hold the temporary result after an arithmetic and logic operation.

6ase&6@'- Aften used to hold the !ase address of data located in the memory and also the !ase address of a ta!le of data referenced !y the translate instruction &@L 3'. Count&C@'- the count for certain instructions such as shift count &CL' for shifts and rotates$ the num!er of !ytes &C@' operated upon !y the repeated string operations$ and a counter &C@' with the LAA" instruction. 0ata&0@'- a general purpose register that also holds the most significant part of the product after a *-!it multiplication$ the most significant part of the dividend !efore a division$ and the I?A port num!er for a varia!le I?A instruction. ILL5%37 3IABC& ccumulator'

: @

E @ 7 @ "ointer and Index 7egisters ; lthough the pointer and index registers are also general purpose in nature$ they are more often used to index or point to the memory location holding the operand data for many instructions. %tac1 "ointer &%"'- used to address data in a LI<A &last-in$ first-out' stac1 memory. 3his occurs most often when the "5%: and "A" instructions are executed or when a su!routine is C LLed or 7E3urned from in a program. 6ase "ointer &6"'- a general purpose pointer often used to address an array of data in the stac1 memory. %ource Index &%I'- used to address source data indirectly for use with the string instructions. 0estination Index &0I'- normally used to address destination data indirectly for use with the string instructions. Instruction "ointer &I"' ; always used to address the next instruction executed !y the +0+*?+0++. 3he actual location of the next instruction is formed !y adding the contents of I" to C% x 10:. BoteC 0ata are often indirectly addressed through four of these five 1*-!it registers$ !ut never !y an instruction pointer.

%egment 7egisters ; are uni2ue to the +0+*?+0++ microprocessor and its advanced family mem!ers. 3hey were designed to solve a pro!lem peculiar to this family. 6ecause all index and pointer registers are 1* !its wide$ and the memory in the +0+*?+0++ is 1M6yte$ which re2uires a /0-!it address$ the index and pointer registers are not wide enough to directly address any memory location. Code %egment &C%'- a *)D-6yte section of the memory that contains the program or code. 3his register is changed most often !y a #ump$ call$ or return instruction. 3he address of the next instruction executed !y the +0+*?+0++ is generated !y adding the contents of the instruction pointer &I"' offset address to the contents of C% @ 10: 0ata %egment &0%'- a *)D-6yte section of the memory that contains data referenced !y almost all instructions and many addressing modes. 0ata are almost always moved into or out of the memory via the data segment. 3he effective address of the data is generated !y adding the contents of one of the index or pointer registers &6@$ %I$ or 0I' to the contents of 0% x 10:. %tac1 %egment &%%'- a *)D-6yte section of the memory used for the LI<A stac1. 3he effective stac1 address is a com!ination of the contents of the stac1 pointer &%"' plus %% x 10:. <or example$ if %% contains a 100: and %" contains a 000:$ then the stac1 address is located at 10000:. 10000: is also written as 1000C0000 ; that is$ a segment address of 1000: and an offset address of 0000:. 0ata referenced with the !ase pointer &6"' a re normally found in the stac1 segment. Extra %egment &E%'- a special segment register that is normally used only for string instructions. Ehen a string instruction is executed$ the destination location is addressed !y the destination index register &0I' plus E% x 10:$ and the source data are addressed !y the source index register &%I' plus 0% x 10:. %egment of Memory ; is a !loc1 of *)D!ytes of memory addressed !y a special register called a segment registers. <lags 7egister ; also called a status register or program status word$ is a 1*-!it register that contains +0+--li1e flags and also four new +0+*?+0++ flags. ILL5%37 3IABC 1- 1) 1. 1/ 11 10 , + ( * ) . / 1 0 !it num!er B3 IA "L A< 0< I< 3< %< I< < "< C<

6it 0C the Carry <lag &C<' ; is 1 if an addition produces a carry or a su!traction produces a !orrowF otherwise$ it is 0. C< also holds the value of a !it that has !een shifted or rotated out of a register or memory location$ and reflects the result of a compare operation. <inally$ C< also acts as a result indicator for multiplication. 6it /C the "arity <lag &"<' ; is 1 if the result of an operation has an even num!er of 1 !itsF otherwise$ it is 0. "< is used primarily in data communications. 6it )C the uxiliary Carry <lag & <' ; is similar to the C< !it$ except < reflects the presence of a carry or !orrow out of !it .. C< is useful for operating on Gpac1edH decimal num!ers. 6it *C the Iero <lag &I<' ; is 1 if the result of an operation is JeroF a nonJero result clears I< to 0. 6it (C the %ign <lags&%<' ; is meaningful only during operations on signed num!ers. %< is 1 if an arithmetic$ logical$ shift$ or rotate operation produces a negative resultF otherwise$ it is 0. In other words$ %< reflects the most-significant &sign' !it of the result$ regardless of whether the result is + or 1* !its long. 6it +C the 3rap <lag &3<' ; ma1es the +0/+* Gsingle-stepH through a program for de!ugging purposes. 6it ,C the Interrupt Ena!le <lag &I<' ; allows the +0/+* decrement &0<>1' or increment &0<>0' the index register&s' after executing a string instruction. If 0< is 0$ the /+*

progresses forward through a string &toward higher addresses$ or Gleft to rightH'. If 0< is 1$ it progresses !ac1ward &toward lower addresses$ or Gright to leftH'. 6it 11C the Averflow <lag &A<' ; is primarily an error indicator during operations on signed num!ers. A< is 1 if adding two li1e-signed num!ers or su!tracting two oppositesigned num!ers produces a result that the operand can4t holdF otherwise$ it is 0. Af is also 1 if the most-significant &sign' !it of the operand changed during an arithmetic shift operationF otherwise$ it is 0. 3he A< flag$ in com!ination with the C< flag$ also indicates the length of a multiplication result. If the upper half of the product is nonJero$ A< and C< are 1F otherwise$ !oth flags are 0. <inally A< is 1 if a divide operation produces a 2uotient that overflows the result register. 6it 1/ through 1) ; are used when the /+* is operating in the protected mode. %implified C"5 6LACD 0I K7 MC 1. Main registers /. %egment registers and I" .. ddress adder ). Internal ddress !us -. Instruction Lueue *. Control 5nit (. 6us Interface +. Internal data !us ,. L5 10. ddress 6us --M 11. 0ata 6us M- %ystem 6us 1/. Control 6us --M

Basic System &omponent

- 3he !asic operational design of a computer system is called its architecture. Nohn Oon Beumann$ a pioneer in computer design$ is given credit for the architecture of most computers in use today. <or example$ the +0x+* family uses the Von Neumann architecture &OB '. typical Oon Beumann system has three ma#or componentsC 1. the central processing unit &or CPU' 2. memory .. input/output &or I/O'.

Bus !us is a collection of wires on which electrical signals pass !etween components in the system. System bus - connects the various components of a OB machine. 3he +0x+* family has three ma#or !ussesC 1. a ress !us /. ata !us .. control !us ddress !us - is a computer !us &a series of lines connecting two or more devices' that is used to specify a physical address. - transports memory addresses which the processor wants to access in order to read or write data. It is a unidirectional !us. Ehen the software wants to access some particular memory location or I?A device$ it places the corresponding address on the address !us.

+0++ /0 +0+* /0 +0/+* /) +0.+*sx /) +0.+*dx ./ +0)+* ./ +0-+* ? "entium &"ro' ./ 0ata !us - transfers actual data

"rocessor

-.!-/ +amily Address Bus Si0es ddress 6us %iJe Max ddressa!le Memory
1$0)+$-(* 1$0)+$-(* 1*$((($/1* 1*$((($/1* )$/,)$,(*$/,* )$/,)$,(*$/,* )$/,)$,(*$/,*

Ane Mega!yte Ane Mega!yte %ixteen Mega!ytes %ixteen Mega!ytes <our Kiga!ytes <our Kiga!ytes <our Kiga!ytes

In EnglishP

"rocessor

Control !us - transports orders and synchroniJation signals coming from the control unit and traveling to all other hardware components. It is a !idirectional !us$ as it also transmits response signals from the hardware.

-.!-/ 1rocessor Data Bus Si0es 0ata 6us %iJe +0++ + +01++ + +0+* 1* +01+* 1* +0/+* 1* +0.+*sx 1* +0.+*dx ./ +0)+* ./ +0-+* class? "entium &"ro' *)

Memory Subsystem
typical +0x+* processor addresses a maximum of /!!n different memory locations$ where n is the num!er of !its on the address !us. s you9ve seen already$ +0x+* processors have /0$ /)$ and ./ !it address !usses &with )+ !its on the way'. Af course$ the first 2uestion you should as1 is$ QEhat exactly is a memory locationRQ 3he +0x+* supports byte a ressable memory. 3herefore$ the !asic memory unit is a !yte. %o with /0$ /)$ and ./ address lines$ the +0x+* processors can address one mega!yte$ 1* mega!ytes$ and four giga!ytes of memory$ respectively. 3hin1 of memory as a linear array of !ytes. 3he address of the first !yte is Jero and the address of the last !yte is &/SSn'-1. <or an +0++ with a /0 !it address !us$ the following pseudo-"ascal array declaration is a good approximation of memoryC MemoryC array T0..10)+-(-U of !yteF To execute the equivalent of the Pascal statement "Memory [125] := 0 " the !P" #laces the value $ero on the %ata &us' the a%%ress 125 on the a%%ress &us' an% asserts the (rite line )since the !P" is (ritin* %ata to memory:

To execute the equivalent of "!P" := Memory [125] " the !P" #laces the a%%ress 125 on the a%%ress &us' asserts the rea% line )since the !P" is rea%in* %ata from memory+' an% then rea%s the resultin* %ata from the %ata &us: 3o execute the e2uivalent of QC"5 C> Memory T1/-UFQ the C"5 places the address 1/- on the address !us$ asserts the read line &since the C"5 is reading data from memory'$ and then reads the

resulting data from the data !usC

3he a!ove discussion applies only when accessing a single !yte in memory. %o what happens when the processor accesses a word or a dou!le wordR %ince memory consists of an array of !ytes$ how can we possi!ly deal with values larger than eight !itsR "i##erent computer systems ha$e i##erent solutions to this problem. %he &'(&) #amily eals *ith this problem by storing the +.O. byte o# a *or at the a ress speci#ie an the ,.O. byte at the ne(t location. %here#ore- a *or consumes t*o consecuti$e memory a resses .as you *oul e(pect- since a *or consists o# t*o bytes/. Similarly- a ouble *or consumes #our consecuti$e memory locations. %he a ress #or the ouble *or is the a ress o# its +.O. byte. %he remaining three bytes #ollo* this +.O. byte- *ith the ,.O. byte appearing at the a ress o# the ouble *or plus three0 6ytes$ words$ and dou!le words may !egin at any valid address in memory. Ee will soon see$ however$ that starting larger o!#ects at an ar!itrary address is not a good idea. Bote that it is 2uite possi!le for !yte$ word$ and dou!le word values to overlap in memory. <or example$ in the figure !elow you could have a word varia!le !eginning at address 1,.$ a !yte varia!le at address 1,)$ and a dou!le word value !eginning at address 1,/. 3hese varia!les would all overlap. 3he +0++ and +01++ microprocessors have an eight !it data !us. 3his means that the C"5 can transfer eight !its of data at a time. %ince each memory address corresponds to an eight !it !yte$ this turns out to !e the most convenient arrangement &from the hardware perspective'$ see <igure ..-$ !elowC