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CHAPTER 1
INTRODUCTION

1.1 GENERAL DESCRIPTION The need of power consumers increasing rapidly meanwhile the renewable and Non-renewable power generation are insufficient and the power wastage also swelling highly in the absence of people. According to recent technology the research about energy consumptions are increasing year by year, if effective energy saving policies will not be adopted, then in 2030 they will double with respect to 1980 survey level and will increase by 28% on 2006 survey level. The generation of the energy from the available resources is not modest one because of the changes in environmental conditions. So we are responsible for utilizing the power in efficient way to avoid the wastage of power. To reduce these unwanted power wastage my proposed system will provide the solution by an automated monitoring system.

The power wastages are most commonly occurs in organizations like Institutions, Industries due to lack of awareness about power demands. In the existing system PIR, LDR, temperature sensor are used to sense the human being, intensity of light , temperature respectively as per the reference, the author use ARM Processor and never used timetable. The proposed system can be designed based on FPGA. A field programmable gate array (FPGA) contains a matrix of reconfigurable gate array logic circuitry that, when configured, is connected in a way that creates a hardware implementation of a software application. FPGAs use dedicated hardware for processing logic and do not have an operating system. Because the processing paths are parallel, different operations do not have to compete for the same processing resources. That means speeds can be very fast, and multiple control loops can run on a single FPGA device at different rates. The embedded processors are using sequential processing. Due to this, the system can able to monitoring only one section at particular time period. But the FPGA operates at parallel processing. It can able to control over all process at particular time period. And also the memory level in FPGA is high, when compare to other processors.

The timetable can be used many places like college, company and industries to using standardize working hour. The proposed system considers the timetable of class room since students are present only for 75% of the working hours. In the remaining hours they move to other places like libraries, laboratories. The following table discusses the major situation where power is wasted if students forget to switch OFF the electrical appliances.

Purpose for which students moving from classroom

Time for which the electricity is to be wasted

Laboratories

3 Hours

Break hours( Normally 3 Breaks per day)

1 Hours 15 Hours (till next day morning)

Moving to home at the end of day

Table 1. Summarization of Power loss in an institutions So I propose an automated system that can control the usage of electricity in the classroom environment where maximum electricity is wasted.

1.2 BLOCK DIAGRAM The classroom Automated Monitoring System is controlled by FPGA (SPARTAN 6) as shown in below.

Passive Infra-Red Sensors (To detect the human presence) RELAY 1 LIGHT

LDR SENSOR (To measure the light intensity)

FPGA (SPARTAN 6)

RELAY 2

FAN

LM35 (To measure the room temperature)

CONTROL CIRCUIT

KEYBOARD (To enter the Time table)

Figure 1. Block Diagram of Automated Power Controlling System

Initially timetable is set as primary in this system. Time table of class for all days are written in VHDL and fed into the Spartan-6 FPGA. There is possible to select the timetable as per our requirement using keyboard and it will display in Character 16x2 LCD. A real time clock will be displayed in 7segment for checking whether the time table operates for proper time. Then the PIR sensor continuously senses the temperature level at particular area and produces the output and fed into FPGA. When students entering into the

monitored area, the temperature level measured by PIR will vary and PIR sensor output made high. In accordance with class timetable and PIR output (high) then LDR sensor checks the room lightening, if the light is insufficient, the LDR acts as a resistor with high resistance (in Mega Ohms), so the output low. The FPGA detects low output and switch ON the light. LM35 sensor senses the room temperature and produces the output. It will produce 10mV/C. The temperature sensor output fed into FPGA using ADC and the speed of the fan varies according to the temperature level. 1.3 HARDWARE DESCRIPTION 1.3.1 Spartan6 Xc6slx25t FPGA Field-Programmable Gate Arrays (FPGAs) are pre-fabricated silicon devices that can be electrically programmed to become almost any kind of digital circuit or system. They provide a number of compelling advantages over fixed-function Application Specific Integrated Circuit (ASIC) technologies such as standard cells [62]: ASICs typically take months to fabricate and cost hundreds of thousands to millions of dollars to obtain the first device; FPGAs are configured in less than a second (and can often be reconfigured if a mistake is made) and cost anywhere from a few dollars to a few thousand dollars. The flexible nature of an FPGA comes at a significant cost in area, delay, and power consumption: an FPGA requires approximately 20 to 35 times more area than a standard cell ASIC, has a speed performance roughly 3 to 4 times slower than an ASIC and consumes roughly 10 times as much dynamic power [120]. These disadvantages arise largely from an FPGAs programmable routing fabric which trades area, speed, and power in return for instant fabrication.FPGA architecture has a dramatic effect on the quality of the final devices speed performance, area efficiency, and power consumption.

Spartan-6 FPGA delivers an optimal balance of low risk, low cost, and low power for cost-sensitive applications, now with 42% less power consumption and 12% increased performance over previous generation devices. Spartan-6 FPGAs offer advanced power management technology, up to 150K logic cells, integrated PCI Express blocks, advanced memory support, 250MHz DSP slices, and 3.2Gbps low-power transceivers. Spartan-6 FPGA Family Benefits are intelligent mix of hard IP and programmability for greater integration, Differentiate products through efficient power management, easily meet system-level requirements.

1.3.2 PIR Motion Detector Infrared sensors can be classified as active infrared sensors and passive infrared sensors. Both of them use the same infrared rays the only difference between them is, active infrared sensors employ infrared source (an active element) in addition to infrared detector. Active infrared sensors operate by transmitting energy from either a light emitting diode (LED) or a laser diode. A LED is used for a non-imaging active IR detector, and a laser diode is used for an imaging active IR detector. In both types of these, the LED or laser diode illuminates the target, and the reflected energy is focused onto a detector consisting of a pixel or an array of pixels. Photoelectric cells, Photodiode or phototransistors are generally used as detectors. Passive Infrared sensors does not contain any source of infrared radiation, they simply detect IR radiations. They totally rely on the three governing laws explained earlier. A passive infrared system detects energy emitted by objects in the field of view it does not emit any energy of its own for the purposes of detection.

Human at normal body temperature radiate quite strongly in the infrared region at a wavelength around 10 m. Passive infrared sensors convert the infrared signal to current or voltage. Its presence is hard to detect which is not the case with active infrared sensors, ultrasonic detectors. Passive Infra-Red Sensors were originally being used for military and Scientific applications.

Figure 2. PIR Sensor PIR sensor is made of ceramic material that generates surface charge when exposed to infrared radiations. As the amount of radiation increase, the generations of surface charge also increase. A FET is used to buffer this signal. As the sensor is sensitive to a

wide range of radiations, a filter is used which limits the infrared rays falling on the sensor from 8um-14um range. Thus the output of an IR sensor is a function of infrared radiation. The field of view of these sensors is the area or zone where changes in the infra-red radiation can be sensed or detected. Typically, to enhance the range and field of view, the field of view is divided into number of zones (both vertically as well as horizontally) with the help of Fresnel lens. A Fresnel lens is a Plano convex lens that is collapsed itself to form a flat lens which retains its optical properties, but it is thinner and less absorption loss. Multi Element Fresnel Lens focuses the infra-red radiation emitted by an infrared source onto the PIR detector. After the light falls on the PIR sensor, it generates an electrical signal corresponding to infrared radiations which is amplified/ processed and in turn may energize a relay. In most of the applications, passive infrared sensors look for the change in the environment. The sensors are sensitive to changes in infrared energy rather than absolute levels. Typical construction of PIR is shown in figure 3.

Figure 3. Construction of a PIR Sensor

The sensor first sets up equilibrium with the background conditions. If the state equilibrium is disturbed due to some intrusion or by some other mechanism, it perceives it as a change. This change is fundamental to the operation of PIR sensors. By dividing the region into a number of zones, numbers of separated zones are created. A person while walking through the area will appear in one zone, then disappear and then reappear in the next zone and so on. By doing so, he modulates the reference equilibrium conditions; the process is referred to as chopping. The signal produced is proportional to the temperature difference between the intruder and the background.

A PIR detector is a motion detector that senses the heat emitted by living body. These are often fitted to security light so that they will switch on automatically if a person approaches the monitored area. The senor is passive because, instead of emitting a beam of light or microwave energy that must be interrupted by a passing person in order to sense that person. The PIR sensor itself has two slots in it, each slot is made of a special material that is sensitive to IR. When the sensor is idle, both slots detect the same amount of IR, the ambient amount radiated from the room or walls or outdoors. . The operation schematic of PIR is shown in figure 4.

Figure 4. Operation of PIR

When the human passes the monitored area, it first intercepts one half of the PIR sensor, which causes a positive differential change between the two halves. When the human leaves the sensing area, the reverse happens, whereby the sensor generates a negative differential change. These change pulses are what is detected. The PIR itself is housed in a hermetically sealed metal can to improve noise/temperature/humidity immunity. There is a window made of IR-trans missive material (typically coated silicon since that is very easy to come by) that protects the sensing element. Behind the window are the two balanced sensors. The technical parameter of PIR is shown in table 2.

Power Supply Transmission Current Frequency Detective Speed Detective Distance Detective Range Working Condition

DC9V 20Ma 433MHZ 0.3 3m/s 5 12M Horizontal 110, Vertical 60 Temperature 10 to + 40

Table 2. Technical Parameters of PIR

1.3.3 LDR ( Light Dependent Resistors ) LDRs or Light Dependent Resistors are very useful especially in light/dark sensor circuits. Normally the resistance of an LDR is very high, sometimes as high as 1000000 ohms, but when they are illuminated with light resistance drops dramatically. LDR are made by depositing a film of cadmium sulphide or cadmium selenide on a substrate of ceramic containing very few free electrons when not illuminated. When light falls on the strip, the resistance decreases. In the absence of light the resistance can be in the order of 10K ohm to 15K ohm and is called the dark resistance. Depending on the exposure of light the resistance can fall down to value of 500 ohms. The device consists of a pair of metal film contacts separated by cadmium sulphide film, designed to provide the maximum possible contact area with the two metal films. It has a peak sensitivity wavelength ( p) of about 560nm to 600nm in the visible spectral. Schematic of LDR shown in figure 5. When an LDR is brought from a certain illuminating level into total darkness, the resistance does not increase immediately to the dark value. The recovery rate is specified in k ohm/second and for current LDR types it is more than 200 k ohm/second. The recovery rate is much greater in the reverse direction, e.g. going from darkness to illumination level of 300 lux, it takes less than 10ms to reach a resistance which corresponds with a light level of 400 lux. Darkness: Maximum resistance, about 1M ohm.Very bright light: Minimum resistance, about 100 ohms.

Figure 5. Structure of LDR 1.3.3.1 Sensitivity The sensitivity of a photo detector is the relationship between the light falling on the device and the resulting output signal. In the case of a photocell, one is dealing with the relationship between the incident light and the corresponding resistance of the cell. The resistance functions as a illumination shown in figure 6.

Figure 6. Resistance Function as Illumination

1.3.4 LM35 Temperature Sensor The LM35 is an integrated circuit sensor that can be used to measure temperature with an electrical output proportional to the temperature (oC). It can measure temperature more accurately than a using a thermistor. The sensor circuitry is sealed and not subject to oxidation, etc. The LM35 generates a higher output voltage than thermocouples and may not require that the output voltage be amplified. It has an output voltage that is

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proportional to the Celsius temperature. The scale factor is .01V/oC The LM35 does not require any external calibration or trimming and maintains an accuracy of +/-0.4 oC at room temperature and +/- 0.8 oC over a range of 0 oC to +100oC. Another important characteristic of the LM35DZ is that it draws only 60 micro amps from its supply and possesses a low self-heating capability. The sensor self-heating causes less than 0.1 oC temperature rise in still air.

Figure 7. LM35 Temperature Sensor 1.3.5 LCD Display LCD is a type of display used in digital watches and many portable computers. When an electric current passed through the liquid causes the crystals to align so that light cannot pass through them. LCD has two line displays each can represent 20 characters per line. The liquid crystals can be manipulated through an applied electric voltage so that light is allowed to pass or is blocked. By carefully controlling the density of light passed through LCD which is also used to display images. A backlight provides LCD monitors brightness.

Figure 8. Pin Diagram of LCD

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The Liquid Crystal Display (LCD) is a low power device. The power requirement is typically in the order of microwatts for the LCD. However, an LCD requires an external or internal light source. LCD is used to display the PIR mode and room temperature. A 14-pin access is provided having eight data lines, three control lines and three power lines. 1.3.6 Power Supply 1.3.6.1 12Vac Step down Transformer

Figure 9. 230Vac TO 5Vdc CONVERTER The Voltage Transformer can be thought of as an electrical component rather than an electronic component. The main purpose of a voltage transformer is to transfer electrical power between different circuits by converting one AC voltage source into another AC voltage at the same frequency. Transformers are basically mechanical devices that consist of one or more coil(s) of wire wrapped around a common ferromagnetic laminated core. These coils are usually not electrically connected together however, they are connected magnetically through the common magnetic flux Qm confined to a central core. Voltage transformers work on Faradays principal of electromagnetic induction. When a current flows through a coil, a magnetic flux () is produced around the coil. If we now place a second similar coil next to the first so that this magnetic flux cuts the second

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coil of wire, an e.m.f. voltage will be induced in the second coil. This effect is known as mutual induction and is the basic operation principal of voltage transformers. The value of the induced e.m.f in the second coil is proportional to the number of turns and to the rate of change of magnetic flux. In a voltage transformer these two coils known as the primary and secondary windings are tightly wrapped around a single core material such as steel or iron which improves the magnetic coupling between these two coils. Therefore, each coil has the same number of volts per turn in it producing two different voltages that are proportional to each other. The frequency of the secondary waveform will be in-phase with the frequency of the primary waveform then the cos term cancels out on both sides of the above equation. We now know that the output voltage from the secondary winding is directly proportional to the number of turns of wire in the secondary coil. If we increase or decrease this number of turns, a larger or smaller voltage will be induced into the secondary winding. Then we can define the Turns Ratio as the number of windings of the primary coil (Np) divided by number of windings of the secondary coil (Ns). Then the ratio of the primary and secondary voltages is the same as the ratio of the number of turns in each winding. This ratio is known commonly as the transformation Ratio and is presented as Np:Ns (no units as it is a ratio). Then voltage transformers are all about ratios, that is the ratio of windings called the turns ratio to the ratio of the voltage called the voltage ratio.

If this turns ratio is equal to one (unity) that is the number of secondary turns equals the number of primary turns giving a turns ratio of 1:1, the secondary voltage will be of the same value as the primary voltage producing an isolation transformer. However, if the ratio is greater than unity, and Vs is greater than Vp, this produces a step up transformer. Likewise, if the ratio is less than unity, and Vs is less than Vp, this produces a step down transformer.

Then we can define the operation of a voltage transformer as: Step down Voltage Transformer Number of primary turns > Number of secondary turns Primary voltage > Secondary voltage

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Step up Voltage Transformer Number of primary turns < Number of secondary turns Primary voltage < Secondary voltage Transformers do not change power they transfer the same amount of power (assumes ideal transformer) from the primary side to the secondary side. As electrical power is the product of volts x amps, if the voltage changes then the current must change to maintain the same amount of power. That is the current changes opposite to the voltage change and if one goes up, the other goes down. So if the secondary voltage is greater than the primary voltage then the secondary current is less than the primary current. If the secondary voltage is less than the primary voltage then the secondary current is greater than the primary current. This is called the current ratio and is opposite to the previous voltage and turns ratios. Then transformers are all about ratios, the ratio of the input (primary) turns, volts and amps to the output (secondary) turns, volts and amps. 1.3.6.2 Bridge Rectifier When four diodes are connected as shown in figure, the circuit is called a BRIDGE RECTIFIER. The input to the circuit is applied to the diagonally opposite corners of the network, and the output is taken from the remaining two corners. One complete cycle of operation will be discussed to help you understand how this circuit works. We have discussed transformers in previous modules in the NEETS series and will not go into their characteristics at this time. Let us assume the transformer is working properly and there is a positive potential at point A and a negative potential at point B. The positive potential at point A will forward bias D3 and reverse bias D4. The negative potential at point B will forward bias D1 and reverse bias D2. At this time D3 and D1 are forward biased and will allow current flow to pass through them; D4 and D2 are reverse biased and will block current flow.

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Figure 10. Operation of Bridge Rectifier The path for current flow is from point B through D1, up through RL, through D3, through the secondary of the transformer back to point B. This path is indicated by the solid arrows. Waveforms (1) and (2) can be observed across D1 and D3. One-half cycle later the polarity across the secondary of the transformer reverses, forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be from point A through D4, up through RL, through D2, through the secondary of T1, and back to point A. This path is indicated by the broken arrows. Waveforms (3) and (4) can be observed across D2 and D4. You should have noted that the current flow through RL is always in the same direction. In flowing through RL this current develops a voltage corresponding to that shown in waveform (5). Since current flows through the load (R L) during both half cycles of the applied voltage, this bridge rectifier is a full-wave rectifier. One advantage of a bridge rectifier over a conventional full-wave rectifier is that with a given transformer the bridge rectifier produces a voltage output that is nearly twice that of the conventional full-wave circuit. This may be shown by assigning values to some

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of the components shown in views A and B. Assume that the same transformer is used in both circuits. The peak voltage developed between points X and Y is 1000 volts in both circuits. In the conventional full-wave circuit shown in view A, the peak voltage from the center tap to either X or Y is 500 volts. Since only one diode can conduct at any instant, the maximum voltage that can be rectified at any instant is 500 volts. Therefore, the maximum voltage that appears across the load resistor is nearly - but never exceeds - 500 volts, as a result of the small voltage drop across the diode. In the bridge rectifier shown in view B, the maximum voltage that can be rectified is the full secondary voltage, which is 1000 volts. Therefore, the peak output voltage across the load resistor is nearly 1000 volts. With both circuits using the same transformer, the bridge rectifier circuit produces a higher output voltage than the conventional full-wave rectifier circuit. 1.3.6.3 IC 7805 Voltage Regulator 7805 is a voltage regulator integrated circuit. It is a member of 78xx series of fixed linear voltage regulator ICs. The voltage source in a circuit may have fluctuations and would not give the fixed voltage output. The voltage regulator IC maintains the output voltage at a constant value. The xx in 78xx indicates the fixed output voltage it is designed to provide. 7805 provides +5V regulated power supply. Capacitors of suitable values can be connected at input and output pins depending upon the respective voltage levels.

Figure 11. IC7805 Pin Description: Pin No 1 2 3 Function Input voltage (5V-18V) Ground (0V) Regulated output; 5V (4.8V-5.2V) Name Input Ground Output

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1.3.7 UTLP Kit Unified Learning Kit is based on Texas Instruments OMAP3530 application processor & Spartan-6 FPGA.

The OMAP3530 processor supports interfaces such as Mobile DDR, Nand

Flash, Audio in & out, TV out, Touch screen LCD, VGA out, Ethernet, Keypad, USB OTG, 2 SD cards & external interface connectors such as Control sensor header, I/O expansion connector, I2C Header for GPS, Bluetooth & Modem Connector, Simple Digital Interface connector (SDI), Camera Connector & LCD connector.

The Spartan-6 FPGA supports interfaces such as DDR2 SDRAM, Ethernet,

ADC, DAC, character LCD & external interfaces such as 70-pin IO expansion connector & 20-pin IO header. The ULK board and its block diagram are shown in figure 12 respectively. The software can be used for designing the board is Eclipse and Xilinx and the code used for programming is based on the basic C language and HDL. The board input voltage is about 2V. The output can be processed in Minicom or in the ULK Control Panel. The Minicom is operated in lab mode and the control panel is operated in normal mode. The output voltages can be obtained from external interfaces such as Simple Digital Interface (5V). The advantage of this kit is modest for connecting external interfaces, programming is simple and using these features various applications can be designed based on the requirements of the user. 1.3.7.1 OMAP 3530 Processor TIs OMAP3530 application processor with CUS package TIs TPS65930 Power management IC NAND Flash Memory of 128Mbytes Mobile DDR SDRAM of 128Mbytes Ethernet controller with 10/100Mbps PHY and RJ45 LAN connector USB2.0 OTG interface 2 no.s of SD interface RS232 Console using UART1&3 Real Time Clock CMOS sensor interface 24 bit RGB LCD interface

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Mic in and speaker out Touch panel controller through SPI interface 3.5inch LCD interface I2C EEPROM of 256Kbits IrDA support using UART3 Bluetooth & modem connector (3.3V compatible) 16x2 Character LCD using I2C to I/O bus expander

Figure 12. Block Diagram of ULK JTAG interface 6x6 Keypad interface (Using PMIC)

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Simple digital interface with 5V compatible Control sensor connector with 5v compatible I/O Expansion connector as same as beagle board through level translators (1.8 to 3.3V/5V) for 3.3V & 5V compatible One I2C,SPI & GPIO signals between processor and FPGA GPMC bus between processor and FPGA Reset device and manual reset button

1.3.7.2 Spartan-6 FPGA Xilinx XC6SLX25T FPGA SPI PROM from Atmel (2Mbyte) I2C EEPROM of 256Kbits 10/100Mbps Ethernet PHY and RJ45 LAN connector 14 pin connector UART transceiver 4x4 Keypad interface 16x2 character LCD through parallel interface 10bit ADC with parallel interface 7 segment LEDs 70-pin I/O expansion connector

1.3.7.2.1 ADC Interface The 10-bit, 20MSPS sampling analog to digital converter AD9200 from Analog devices is used to interface with FPGA through 10 bit parallel interface. The AD9200 is configured Top/Bottom mode by connecting mode pin to AVDD and analog input level is set by using REFTS, REFBS signals. The internal reference voltage (Vref) is configured in 2V mode. The FPGA-ADC interface shown in figure 13.

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Figure 13. FPGA-ADC Interface

1.3.7.2.2 Character LCD Interface The 8-bit parallel interface logic will be developed inside the FPGA to configure the HD44780 based dot matrix LCD controller for the character LCD support. Since the LCD's consume less power, they are compatible with low power electronic circuits. Changing the display size or the layout size is relatively simple which makes the LCD's more customer friendly. The FPGA-Character LCD interface shown in figure 14.

Figure 14. FPGA-Character LCD Interface 1.3.7.2.3 DAC interface The 12-bit, 10MSPS sampling digital to analog converter DAC7821 from TI is used to interface with FPGA through 12 bit parallel interface. It provides single channel

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current output. The bidirectional bus is controlled with CS# and R/W# signal to read/write into/from DAC. The control signals will be generated from FPGA. Op Amp OPA348 is used to convert the current output of DAC to voltage output.

Figure 15. FPGA-DAC Interface 1.3.7.2.4. 20-Pin FPGA IO header Level Translators are used to convert the 1.8V FPGA signals to 5V compatible signals.

Figure 16. FPGA-20-Pin IO Header

1.3.7.2.5. FPGA Keypad interface To support 4rows x 4columns keypad interface, keypad scanning and debouncing logic is developed inside the FPGA. The I/O signals of FPGA will be used and signals are taken out to the 12pin 2.54mm pitch header.

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Figure 17. FPGA Keypad Interface

1.3.7.2.6 7 Segment LED interface To display 4 digit 7 segment LEDs, LTC-4627JR device is used from LiteOn electronics. LTC-4627JR is a common anode device. FPGA I/O's are used to drive the cathodes and common anodes of the 7 segment LED display.

Figure 18. FPGA 7 Segment Display

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1.4 SOFTWARE DESCRIPTION 1.4.1 XILINX 12.1 Xilinx ISE (Integrated Software Environment) is a software tool produced by Xilinx for synthesis and analysis of HDL designs, enabling the developer to synthesize their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. HDL can be classified as two parts. They are VHDL (Very High Speed Integrated Circuit Hardware Description Language) Verilog HDL

Design Verification Design Entry Behavioural Simulation Design Synthesis

Functional Simulation Design implementation Back Annotation Static Timing Analysis Timing Simulation

Xilinx Device Programming

In-Circuit Verification

Figure 19. Xilinx 12.1 Work Flow

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1.4.2 ULK Control Panel ULK Control Panel is a software which is used for implementing the Xilinx Sector Vector File (XSVF) into the UTLP kit. After synthesis process, the Xilinx would create the xsvf file in generate programming process. An Ethernet cable used for interfacing the UTLP kit with computer. After the xsvf file creation, it would be transferred through Ethernet from computer to UTLP kit. By using ULK control panel the designer can able to interface more number of UTLP kits with computer. For each UTLP kit we have to assign separate IP address. The UTLP Kit only supports for ubuntu 10.10. So the ULK control panel and Xilinx 12.1 software designed for only supporting Ubuntu platform.

1.5 IEEE FLOATING POINT ALGORITHM IEEE 754 floating point is the most common representation today for real numbers on computers. There are several ways to represent real numbers on computers. Fixed point places a radix point somewhere in the middle of the digits, and is equivalent to using integers that represent portions of some unit. For example, one might represent 1/100ths of a unit. If you have four decimal digits, you could represent 10.82, or 00.01. Floating-point representation basically represents reals in scientific notation. Scientific notation represents numbers as a base number and an exponent. For example, 123.456 could be represented as 1.23456 x 102. In hexadecimal, the number 123.abc might be represented as 1.23abc x 162.

Floating-point solves a number of representation problems. Fixed-point has a fixed window of representation, which limits it from representing very large or very small numbers. Also, fixed-point is prone to a loss of precision when two large numbers are divided. On the other hand, floating-point employs a sort of "sliding window" of precision appropriate to the scale of the number. This allows it to represent numbers from 1,000,000,000,000 to 0.0000000000000001 with ease. IEEE floating point number have three basic components: the sign, the exponent, and the mantissa. The mantissa is composed of the fraction and an implicit leading digit. The exponent base (2) is implicit and need not be stored.

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There are two basic number formats in IEE754, single precision, and double precision. In addition there are two extended formats, which are only used as intermediate results while calculating. The following table shows the formats for single and double precision floating-point values. The number of bits for each filed are shown (bit ranges are in square brackets):

Single precision Double precision

Sign 1[31] 1[63]

Exponent 8[30-23] 11[62-52]

Fraction 23[22-0] 52[51-0]

Table 3. IEEE Floating point formats precision In sign bit 0 denotes a positive number; 1 denotes a negative number. Flipping the value of this bit flips the sign of the number.

The exponent field needs t represent both positive and negative exponents. To do this, a bias is added to the actual exponent in order to get the stored exponent. For IEEE single-precision floats, this value is 127. For double precision, the exponent field is 11 bits, and has a bias 1023.

For example, an exponent of zero in single precision means that 127 is stored in the exponent field. A stored value of 250 indicates an exponent of (200-127), or 123.

The significant, represents the precision bits of the number. It is composed of an implicit leading bit and the fraction bits. In order to maximize the quantity of representable numbers, floating-point numbers are typically stored in normalized form. This basically puts the radix point after the first non-zero digit. An optimization is available in base two, since the only possible non-zero digit is 1. Thus we can just assume a leading digit of 1, and dont need to represent it explicitly. As a result, the mantissa has effectively 24 bits of resolution, by way of 23 fraction bits. To sum up, 1. The sign bit is 0 for positive, 1 for negative.

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2. The exponents base is 2. 3. The exponent field contains 127 plus the true exponent for single-precision, or 1023 plus the true exponent for double precision. 4. The first bit of the mantissa (hidden bit) is typically assumed to be 1. IEEE reserves exponent field values of all 0s and all 1s to denote special values in floating-point scheme. Zero is not directly representable in te straight format, due to the assumption of a leading 1. Zero is a special value denoted with an exponent field of zero and a fraction field of zero. If the exponent is all 0s, but the fraction is non-zero, then the value is a demoralized number, which does not have an assumed leading 1 before the binary point. Thus, for single precision, this represents a number (-1) s x 0.f x 2-126, where s is the sign bit and f is the fraction. Example Now, lets see some examples. 1. Convert 145.84375 to binary floating point numbers in IEEE single precision. Step 1: convert 145.84357 to binary. 145 = 10010011 & .84375 = .11111 145.84375 = 10010011.11111 Step 2: normalize and note sign 145.84375 = (-1)0 1.001001111111 X 27 Step 3: calculate excess 127 code for exponent e = 7 + 127 = 134 = 10000110 Step 4: Assemble 0 10000110 00100111111100000000000

2. Convert the IEEE 0 1 0 0 0 0 1 1 0 1 0 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 to decimal number. 0 10000110 10111010000000000000000

Step 1: calculate exponent to decimal 10000110 = 134

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Step 2: rewrite IEEE to (-1) sign 1.significand X 2EXP-127 format (-1)0 1.1011101 X 2134-127 Step 3: normalize and convert to decimal (-1)0 1.1011101 X 27 = + 1.1011101 X 27 = +11011101 = 22110 1.6 LITERATURE SURVEY Chinnam Sujana, Adanki Puma Ramesh, P.Gopala Reddy, Automatic Detection Human and Energy Saving Based Zigbee Communication, International journal on computer science and engineering, volume 6, 2011 This magazine publisher, that automatically switches on the light and fan by detection of human being. Depends upon the lightening the system can automatically adjust the light intensity and based on the temperature it can switch ON/OFF the Fan. This paper proposes automatic detection of human and Energy saving room architecture to reduce standby power consumption and to make the room easily controllable with an IR remote control of a home appliance. To realize the proposed room architecture, we proposed and designed the Zigbee communication. Zigbee is a low-cost, low-power, wireless mesh networking. The low cost allows the technology to be widely deployed in wireless control and monitoring applications, the low power-usage allows longer life with smaller batteries, and the mesh networking provides high reliability and larger range. The proposed auto detection of human done using the IR sensor to indicate the entering or exit of the persons. Microcontroller continuously monitors the infrared receiver. When any object pass through the IR receiver then the IR rays falling on the receiver are obstructed, this obstruction is sensed by the microcontroller (LPC2148-ARM7) also PIR sensor will check the presence of human beings with the help of radiations emitted by human beings. Then microcontroller will check the input coming from these two sensors and simultaneously if somebody is present then automatically checks for the light intensity and the temperature. And then if the room is found dark it switches ON the lights and if the temperature is more it switches ON the fans. And if nobody is present then all the lights will be switched off automatically.

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Bharathi Navaneethakrishnan, NeelamegamP. FPGA-Based Temperature Monitoring and Control System for Infant Incubator, Vol. 143, No. 8, August 2012, pp. 88-97. The incubator plays a key role in taking care of premature infants in hospitals. Preterm babies who receive incubator care after birth are two to three times less likely to suffer depression as adults. In this work, an efficient FPGA-based temperature monitoring and control system is designed and implemented using LM35D sensor and associated peripherals to measure and control the temperature of incubator. This paper proposed an experimental framework and Verilog implementation of, protocol for reading temperature by FPGA from 12-bit ADC which is connected with sensor, the control algorithm at FPGA, passing control signals to electronic relay for controlling the temperature of the incubator and displaying the temperature in the LCD display. The performance of the developed system is analysed and it consumes very low power compared to conventional system. It also shows 5 times increase in computation speed over the traditional embedded temperature monitoring system. Y.Nandhini, Asst.Prof. D. Muralidharan. FPGA Based 3D Motion Sensor, Vol. 143, No. 8, August 2012, pp. 88-97. The main objective of this paper is to explain the functioning of a device, designed to sense the real time motion changes of an object. This motion sensing device Digital Accelerometer can be used to sense any change in the position of an object with respect to its original position, all along the three axes. This Digital accelerometer is to be put into its function controlled by a Field Programmable Gate Array (FPGA). The above motion sensing device connected with the FPGA will also be useful in reducing complexity factors such as area consumption, cost, etc in installing the objects and at the same time, the device could also be introduced in an easier way. This paper is mainly to deal with the experimental procedure in detecting such changes using this motion sensing device Digital Accelerometer.