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Design Kit

Class D Audio Amplifier Using IRS2092


1

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Contents
Slide #
1. Specification...........................................................................................................................................
Efficiency...........................................................................................................................................
THD...................................................................................................................................................
Frequency Response........................................................................................................................
Note: Po[W] vs. Vin[VPEAK] ...............................................................................................................
2. Waveforms Evaluations..........................................................................................................................
3. Simulated vs. Measured Waveforms......................................................................................................
4. Voltage Gain GV...............................................................................................................................
5. Self Oscillation Frequency......................................................................................................................
6. Dead time...............................................................................................................................................
7. Turn on transient....................................................................................................................................
8. Components stress.................................................................................................................................
9. Power loss in the MOSFETs...................................................................................................................
Standard Model.................................................................................................................................
Professional Model............................................................................................................................
Standard vs. Professional Model.......................................................................................................
10. Short circuit vs. switching output shutdown............................................................................................
11. Short Circuit Response...........................................................................................................................
12. Capacitor Models........................................................................................... ........................................
13. Simulated Performance of the circuit with different FETs......... ..............................................................
14. Simulation Index ....................................................................................................................................

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

3
4-5
6-7
8-9
10
11
12-14
15-16
17-18
19-21
22-25
26-27
28
29-30
31-33
34-35
36-38
39-41
42-44
45-47
48

1. Specifications
General Test Conditions

Simulation folder

Supply Voltage

Load Impedance

8-4

Self-Oscillating
Frequency
Gain Setting

15V

400kHz
24dB

Electrical Data
Output Power

25W

(1kHz, 4)

Efficiency

93%

(25W, 4)

[Efficiency]

Audio Performance
Distortion
Frequency
Response :
20Hz~20kHz

Less than 0.015%THD


+

1dB

(1kHz, 4, 10W)

[THD]

(20 ~ 20000 Hz,


4, 2V Output)

[FrqRsp]

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Specifications : Efficiency Evaluation Circuit


+B
15V

R3
VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
R4
220

V1

IN
R1
100k

0
VOFF = 0
VAMPL = {1.4142*SQRT(Po*RL)/Gv }
FREQ = {f in}

C2
10u
IC = 7

C1
+

IC1

75
VR1

VAA

C4
1nF IN-

R2

C5
3k
EKMG500ELL100ME11D1nF
C6
AMZ0050J102
C3
C7
C8
RPER11H103K2K1A01B
10u
10u
IC = 10
IC = 7

COMP

VSS

R6 8.2k OCSET

TEST CONDITION:

R7
1.2k

PARAMETERS:
Po = 25W

CSH

GND

VB

IN-

HO

COMP

CSD

VREF

VAA

CSD
VSS
VREF
OCSET
IRS2092

VS
VCC
LO

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

R18
10

20nH
Ls3

0
10

LOAD
{RL}

C13
MMC400K104

DT

R21
8.2k

0
1

Ls5
20nH

20nH
Ls4
1

C17
RPER11H104K2K1A01B

R5

FET2
IRFIZ24N

RL = 4

820

R19
2.2k

C12
MMC250K474

Gv = 15.85
f in = 1kHz

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

-B

0
C18
EKMG500ELL222MLP1S

-B
-15V

Condition :
Po = 25[W], 4 Load

Analysis
Time Domain (Transient)
Run to time: 3ms
Start saving data after: 1ms
Maximum step size: 100n
Skip the initial transient bias point calculation (SKIPBP)

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Specifications : Efficiency Simulation Result


%Efficiency

PSUPPLY [W]
PO [W]

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Specifications : THD Evaluation Circuit


R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k

C2
10u
IC = 7

IN

V1

R1
100k

C1 10u

U5

75
VR1

R4
220

VAA

C4
1nF IN-

R2
C5
1nF

3k
C6
1n

C3
10u
IC = 14

C8
10u
IC = 7

COMP
CSD

C7
10u
IC = 10

VSS
VREF

VOFF = 0
VAMPL = {1.4142*SQRT(Po*RL)/Gv }
FREQ = 1k

R6 8.2k OCSET
R7
1.2k

TEST CONDITION:
PARAMETERS:

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

R18
10

20nH
Ls3

0
10

LOAD
{RL}

C13
MMC400K104

DT

R21
8.2k

FET2
IRFIZ24N

1
Ls5
20nH

-B

20nH
Ls4

R5

f in = 1k

C17
RPER11H104K2K1A01B

Gv = 15.85

820

R19
2.2k

C12
MMC250K474

Po = 10
RL = 4

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

0
C18
EKMG500ELL222MLP1S

-B
-15V

Condition :
fin = 1kHz, Po = 10[W],
4 Load

Analysis
Time Domain (Transient)
Run to time: 3ms
Start saving data after: 0s
Maximum step size: 100n
Skip the initial transient bias point calculation (SKIPBP)
Output File Options...
Perform Fourier Analysis
Center Frequency: 1khz
Output Variables: V(OUT)

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Specifications : THD Simulation Result


HARMONIC

FREQUENCY

FOURIER

NORMALIZED

PHASE

NORMALIZED

NO

(HZ)

COMPONENT

COMPONENT

(DEG)

PHASE

1.00E+03

8.81E+00

1.00E+00

1.79E+02

0.00E+00

2.00E+03

4.62E-04

5.25E-05

4.18E+01 -3.15E+02

3.00E+03

2.78E-04

3.16E-05

8.49E+01 -4.51E+02

4.00E+03

3.23E-04

3.67E-05

6.91E+01 -6.45E+02

5.00E+03

3.73E-04

4.23E-05

8.66E+01 -8.06E+02

6.00E+03

6.69E-04

7.60E-05

6.10E+01 -1.01E+03

7.00E+03

2.85E-04

3.24E-05

8.09E+01 -1.17E+03

8.00E+03

4.32E-04

4.91E-05

7.17E+01 -1.36E+03

9.00E+03

5.95E-04

6.76E-05

2.70E+01 -1.58E+03

VOUT 0.0144%THD

TOTAL HARMONIC DISTORTION =

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

1.438206E-02 PERCENT

Specifications : Frequency Response Evaluation Circuit


R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
75
VR1

R4
220

V1

IN
R1
100k

0
VOFF = 0
VAMPL = { 1.4142*VOUT/Gv }
FREQ = {f in}

U5
VAA

VAA

C1
EKMG500ELL100ME11D
C4
+
C2
R2
1nF IN10u
3k
C5
COMP
IC = 7
1nF
C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
C8
IC = 9.8
VREF
10u
IC = 7
R6 8.2k OCSET
R7
1.2k

TEST CONDITION:
PARAMETERS:

GND

VB

IN-

HO

COMP
CSD
VSS
VREF
OCSET
IRS2092

VS
VCC
LO

VB
HO

R11
10k

R12
10k

C9
22u
IC = 8.499

VS

MUR120RLG
D1

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

VCC
10

LO
R20
3.3k

COM
DT

D2
MUR120RLG

CSH

0
C14
MMH250K684

C10 22u
IC = 15.11

R18
10

20nH
Ls3

R15

R19
2.2k

C12
MMC250K474

10

LOAD
{RL}

C13
MMC400K104

DT

R21
8.2k

FET2
IRFIZ24N

20nH
Ls4

R5
1
820

RPER11H104K2K1A01B
C17

1
Ls5
20nH

-B

f in = 20k
RL = 8
Gv = 15.85
VOUT = 2

CSH

R17
1

0
C18
EKMG500ELL222MLP1S

-B
-15V

Condition :
20 ~ 20000 Hz, 4
Load, 2V Output

Analysis
Time Domain (Transient)
Run to time: 2ms
Start saving data after: 0ms
Maximum step size: 100n
Skip the initial transient bias point calculation (SKIPBP)
Parametric Sweep
Global parameter
Parameter name: RL
Value list: 4, 8

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Specifications : Frequency Response Simulation Result

VOUT+1dB (8 Load @ 20kHz)

VOUT - 0.4dB (4 Load @ 20kHz)

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Note : PO [W] vs. VIN [VPEAK]

10

1.4142
[] =

Po [W] = power output


Rload [] = Load resistance
GV = Amplifier voltage gain

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

2. Waveforms Evaluation
Class D amplifier circuit are simulated and compared with measured waveforms from oscilloscope
(Tektronix: TDS3054B)

+B
15V

R3
VS
47k

R8

+B

C16
C15
EKMG500ELL222MLP1S
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
R4
220

IN

V1

R1
V
100k

0
VOFF = 0
VAMPL = { 1.4142*VOUT/Gv }
FREQ = {f in}

VAA

VAA

CSH

C1
GND
VB
EKMG500ELL100ME11D
C4
+
1nF INR2
C2
INHO
C5
3k
10u
COMP
1nF
IC = 7
COMP
VS
C6
AMZ0050J102
CSD
C3
V CSD
VCC
C7
RPER11H103K2K1A01B
VSS
10u
VSS
LO
IC = 10
C8
VREF
10u
VREF
COM
IC = 7
R6 8.2k OCSET
OCSET
DT

PARAMETERS:

R7
1.2k

VOUT = 2
Gv = 15.85
f in = 1k

D2
MUR120RLG

IC1

75
VR1

IRS2092

CSH
VB
HO
VS

R11
10k
V

R12
10k

C9
22u
IC = 12.85

MUR120RLG
D1

R16
10

R20
3.3k
V

C10 22u
IC = 15

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

R18
10

R15

20nH
Ls3

R21
8.2k

FET2
IRFIZ24N

C17
RPER11H104K2K1A01B

0
1

Ls5
20nH

-B

-B
-15V

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

20nH
Ls4

SPEAKER
F120A
C13
MMC400K104

DT

11

R19V
2.2k

C12
MMC250K474

10

R5

820

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

VCC
LO

0
C14
MMH250K684

R13
10
R14
4.7

R17
1

0
C18
EKMG500ELL222MLP1S

3. Simulated vs. Measured Waveform (1/3)


Simulated

Measured

OUT

VS

12

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

3. Simulated vs. Measured Waveform (2/3)


Simulated

Measured

HO

LO

13

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

3. Simulated vs. Measured Waveform (3/3)


Simulated

Measured

COMP

14

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

4. Voltage gain of the amplifier GV


+B
15V

R3
VS
47k

R8

IN
R1
100k

0
VOFF = 0
VAMPL = 0.14142
FREQ = {Freq}

820

RFB =47k

RIN =2.4 ,3k


R4
220

C2
10u
IC = 7

VAA

C1
EKMG500ELL100ME11D
R2
+

{RIN}

C5
1nF

C4
1nF INCOMP

C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
IC = 10
C8
VREF
10u
IC = 7
R6 8.2k OCSET
R7
1.2k

20nH
Ls1
R9
4.7k

IC1

75
VR1

PARAMETERS:

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

Freq = 1k
RIN = 3k

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

R16

20nH
Ls2

10

LO
R20
3.3k

C10 22u
IC = 15

OUT

R15

R18
10

20nH
Ls3

R19
2.2k

10

R21
8.2k

C13
MMC400K104

FET2
IRFIZ24N

0
1

Ls5
20nH

-B

-B
-15V

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

RPER11H104K2K1A01B
C17

SPEAKER
F120A

C12
MMC250K474

DT

820

Sweep variable
Global parameter: RIN
Value list: 2.4k, 3k

L1
7G14N-220-RB

2
1

20nH
Ls4

Analysis
Time Domain (Transient)
Run to time: 1ms
Start saving data after: 100n
Maximum step size: 100n
Skip the initial transient bias point calculation (SKIPBP)

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

R5

15

0
C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B
+

V1

+B
2

0
C18
EKMG500ELL222MLP1S

4. Voltage gain of the amplifier GV

GV = 26dB

GV = 24dB

16

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

5. Self-Oscillating Frequency
Self oscillating frequency is design by setting the following items

Integration capacitors.

Integration resistor.

R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820

Integration resistor:
R4+VR1
VR1
75

R4
220

V1

IN
R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

IC1
VAA

C1
C4
EKMG500ELL100ME11D
+
C2
R2
1nF IN10u
C5
3k
COMP
IC = 7
1nF
C6
CSD
AMZ0050J102
C3
C7
RPER11H103K2K1A01B
VSS
10u
C8
IC = 10
VREF
10u
IC = 7
R6 8.2k OCSET
R7
1.2k

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET

VB
HO

IRS2092

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

10

LO
R20
3.3k

C10 22u
IC = 15

OUT
R18
10

20nH
Ls3

R15

0
1

DT

R21
8.2k

FET2
IRFIZ24N

1
Ls5
20nH

-B

-B
-15V

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

.Options
RELTOL: 0.001
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

RPER11H104K2K1A01B
C17

SPEAKER
F120A
C13
MMC400K104

20nH
Ls4

Analysis
Time Domain (Transient)
Run to time: 1ms
Start saving data after: 0.5m
Maximum step size: 40n
Skip the initial transient bias point calculation (SKIPBP)

R19
2.2k

C12
MMC250K474

10

17

L1
7G14N-220-RB

2
1

R5

820

0
C14
MMH250K684

VCC

COM
DT

R9
4.7k

D2
MUR120RLG

CSH

R17
1

20nH
Ls1

Integration capacitors:
C4=C5

0
C18
EKMG500ELL222MLP1S

5. Self-Oscillating Frequency
Simulated

Measured

VS

VS

OUT

OUT

Self-oscillation frequency
= 400kHz (Simulated)

18

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Self-oscillation frequency
= 400kHz (Measured)

6. Dead-time
Dead-time Mode

R20

R21

Analysis
Time Domain (Transient)
Run to time: 1ms
Start saving data after: 0.5m
Maximum step size: 40n
Skip the initial transient bias point calculation (SKIPBP)

DT1 (25ns)

3.3k

8.2k

DT2 (40ns)

5.6k

4.7k

DT3 (65ns)

8.2k

3.3k

DT4 (105ns)

< 10k
R3

+B
15V

VS
47k

R8

+B

0 C16

EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
75
VR1

R4
220

V1

IN
R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

IC1
VAA

C1
C4
EKMG500ELL100ME11D
+
C2
R2
1nF IN10u
C5
3k
COMP
IC = 7
1nF
C6
CSD
AMZ0050J102
C3
C7
RPER11H103K2K1A01B
VSS
10u
C8
IC = 10
VREF
10u
IC = 7
R6 8.2k OCSET
R7
1.2k

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

D1
MUR120RLG

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R18
10

20nH
Ls3

R15

0
10
1

R21
8.2k

FET2
IRFIZ24N

C17
RPER11H104K2K1A01B
20nH
Ls4

V(DT) Voltage Divider

0
1

Ls5
20nH

-B

-B
-15V

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

SPEAKER
F120A
C13
MMC400K104

DT

1
820

R19
2.2k

C12
MMC250K474

R5

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

19

.Options
RELTOL: 0.001
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

0
C18
EKMG500ELL222MLP1S

Dead-time DT1(25ns)

Spike voltage

DT1(25ns)

DT1(25ns)

20

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Dead-time DT3(65ns)

Spike voltages
(Decrease for longer dead time)

DT3(65ns)

DT3(65ns)

21

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

7. Turn-on transient
Start-up sequencing is achieved through the charging of the CSD voltage (C7). Simulation will
show how capacitors are charged to complete the sequence for each capacitance value.

+B
15V

R3
VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1

C7: 10u, 5u,


and 3.3u F
R4
220

IN

V1

R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

R9
4.7k
IC1

75
VR1

VAA

C1
EKMG500ELL100ME11D
C4
+
1nF INC2
R2
22u
C5
3k
COMP
IC = 0
1nF
C3
RPER11H103K2K1A01B
C6
AMZ0050J102
CSD
C8
C7
VSS
22u
10u
IC = 0
IC = 0
VREF
R6 8.2k OCSET
R7
1.2k

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

R10
0.01m
CSH
VB
HO

R11
10k

R12
10k

C9
22u
IC = 0

VS

MUR120RLG
D1

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

LO

8.2k
R21

10
C10
22u
IC = 0

R15

R18
10

20nH
Ls3

0
10

SPEAKER
F120A
C13
MMC400K104

DT
3.3k
R20

FET2
IRFIZ24N

0
1

Ls5
20nH

-B

C17
RPER11H104K2K1A01B
20nH
Ls4

R5

0
C18
EKMG500ELL222MLP1S

-B
-15V

Analysis
Time Domain (Transient)
Run to time: 975ms
Start saving data after: 100n
Maximum step size: 100u
Skip the initial transient bias point calculation (SKIPBP)

22

R19
2.2k

C12
MMC250K474

820

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

R17
1

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Turn-on transient: C7 = 10uF


V(VCC,COM)
V(VB,VS)

V(HO)
V(LO)

V(VAA)
Vth2___
V(CSD)

Vth1___

V(VSS)

Class D Startup
@ 0.976second.

23

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Turn-on transient: C7 = 5uF


V(VCC,COM)

V(VB,VS)

V(HO)
V(LO)

V(VAA)
Vth2

V(CSD)

Vth1

V(VSS)

Class D Startup
@ 0.488second.

24

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Turn-on transient: C7 = 3.3uF


V(VCC,COM)
V(VB,VS)

V(HO)
V(LO)

V(VAA)
Vth2

V(CSD)

Vth1

V(VSS)

Class D Startup
@ 0.320second.

25

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

8. Components stress
This simulation shows how voltage and current are applied to each components at the maximum
load condition (25W,4ohm).

R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
R4
220

IC1

75
VR1

VAA

C1
EKMG500ELL100ME11D
C4
+
1nF INC2
R2
IN
10u
C5
V1
3k
COMP
IC = 7
1nF
R1
100k
C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
0
IC = 9.81
C8
VREF
10u
VOFF = 0
IC = 7
VAMPL = {1.4142*SQRT(Po*RL)/Gv }
R6 8.2k OCSET
FREQ = 1k
R7
1.2k

PARAMETERS:
Po = 25

VAA

CSH

GND

VB

IN-

HO

COMP
CSD
VSS
VREF
OCSET
IRS2092

VS
VCC
LO

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.5

VS

MUR120RLG
D1

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15.5

R15

R18
10

20nH
Ls3

0
10

C13
MMC400K104

DT

R21
8.2k

FET2
IRFIZ24N

0
1

Ls5
20nH

-B

-B
-15V

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

20nH
Ls4

R5

C17
RPER11H104K2K1A01B

RL = 4

26

R19
2.2k

C12
MMC250K474

Gv = 15.85

820

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

0
C18
EKMG500ELL222MLP1S

LOAD
{RL}

Components Stress Simulated Result for


Diodes, FETs, Inductor, and 4Load
D1

D2

FET1

FET2

L1

4Load

27

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

9. Power losses in the MOSFETs


The total power loss in MOSFET are given by:

PTOTAL = PSW+Pcond+Pgd

+B
15V

R3
VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
R17
1

20nH
Ls1
R9
4.7k
R4
220

IN

V1

R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

IC1

75
VR1

VAA

C1
EKMG500ELL100ME11D
C4
+
1nF INR2
C2
10u
C5
3k
COMP
IC = 7
1nF
C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
IC = 10
C8
VREF
10u
IC = 7
R6 8.2k OCSET
R7
1.2k

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

R18
10

20nH
Ls3

R21
8.2k

FET2
IRFIZ24N

C17
RPER11H104K2K1A01B

1
Ls5
20nH

-B

-B
-15V

Analysis
Time Domain (Transient)
Run to time: 500us
Start saving data after: 100n
Maximum step size: 2n
Skip the initial transient bias point calculation (SKIPBP)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

20nH
Ls4

SPEAKER
F120A
C13
MMC400K104

DT

28

R19
2.2k

C12
MMC250K474

10

R5

820

VCC

COM
DT

D2
MUR120RLG

CSH

0
C14
MMH250K684

0
C18
EKMG500ELL222MLP1S

.Options
RELTOL: 0.003
VNTOL: 1.0m
ABSTOL: 100n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 20

Power losses FET1(Standard Model)


FET1: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms

PSW ,Pcond ,and Pgd are calculated by PSpice.

Power loss (VDS*ID)

Pgd

PSW

Pcond

ID
ID

-VDS
-VDS
VDS, ID (Simulated)

29

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

VDS, ID (Measured)

Power losses FET2(Standard Model)


FET2: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms

PSW ,Pcond ,and Pgd are calculated by PSpice.

Power loss (VDS*ID)

Pgd

Pcond

PSW
VDS
ID

VDS
ID

VDS, ID (Simulated)

30

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

VDS, ID (Measured)

Power losses in the MOSFETs (Professional model)


The total power loss in MOSFET are given by:

PTOTAL = PSW+Pcond+Pgd
R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k

75
VR1

IN

V1

R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

IC1
VAA

C1
EKMG500ELL100ME11D
C4
+
R2
1nF INC5
3k
COMP
1nF
C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
C8
IC = 10
VREF
10u
IC = 7
R6 8.2k OCSET
C2
10u
IC = 7

R7
1.2k

VAA

CSH

GND

VB

INCOMP

HO
VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

C11
RPER11H104K2K1A01B

MUR120RLG
D1

D3
DIRFIZ24N
2

R13
10
R14
4.7

R16

20nH
Ls2

10

LO
R20
3.3k

C10 22u
IC = 15

OUT
R18
10

20nH
Ls3

R15

R21
8.2k

FET2
MIRFIZ24N_P

D4
DIRFIZ24N

C17
RPER11H104K2K1A01B

1
Ls5
20nH

-B

-B
-15V

Analysis
Time Domain (Transient)
Run to time: 500us
Start saving data after: 100n
Maximum step size: 2n
Skip the initial transient bias point calculation (SKIPBP)

20nH
Ls4

SPEAKER
F120A
C13
MMC400K104

DT

31

R19
2.2k

C12
MMC250K474

10

R5

820

L1
7G14N-220-RB

2
1

VCC

COM
DT

D2
MUR120RLG

CSH

0
C14
MMH250K684

FET1
MIRFIZ24N_P
R4
220

R17
1

0
C18
EKMG500ELL222MLP1S

.Options
RELTOL: 0.001
VNTOL: 1.0m
ABSTOL: 100n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Power losses FET1(Professional Model)


FET1: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms

PSW ,Pcond ,and Pgd are calculated by PSpice.

Power loss (VDS*ID)

Pgd

PSW

Pcond

ID
ID

-VDS
-VDS
VDS, ID (Simulated)

32

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

VDS, ID (Measured)

Power losses FET2(Professional Model)


FET2: ID and VDS are simulated and compared with scope (Tektronix: TDS3054B) waveforms

PSW ,Pcond ,and Pgd are calculated by PSpice.

Power loss (VDS*ID)

Pgd

Pcond

PSW
VDS
ID

VDS
ID

VDS, ID (Simulated)

33

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

VDS, ID (Measured)

FET: IRFIZ24N Qg Standard vs. Professional Model


Gate charge characteristics in Professional model has more accurate results than standard model.

IRFIZ24N
(Standard)

VDD=44V,ID=10A
,VGS=10V
Standard Model: Qg(nc)
Professional Model: Qg(nc)

34

IRFIZ24N
(Professional)

Measurement

Simulation

13.400
13.400

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

12.543
13.409

Error (%)
-6.396
0.067

FET: IRFIZ24N Pgd Standard vs. Professional Model


Simulated Pgd ,Standard model compared to Professional model ,shows some different result
caused by different Qg characteristics of the models.

IRFIZ24N
(Standard)

IRFIZ24N
(Professional)

Professional model requires more simulation time and might cause some convergence error.

35

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

10. Short circuit vs. switching output shutdown


This simulation will show how the IRS2092 responds to a short circuit condition.

R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
75
VR1

R4
220

IC1
VAA

C1
EKMG500ELL100ME11D
C4
+
C2
R2
1nF ININ
10u
C5
V1
3k
COMP
IC = 7
R1
1nF
C6
100k
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
0
C8
IC = 14
VREF
VOFF = 0
10u
VAMPL = {1.4142*SQRT(Po*RL)/Gv }
IC = 7
R6 8.2k OCSET
FREQ = 1k
R7
1.2k

PARAMETERS:
Po = 12.5

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

20nH
Ls3

R15

C12
MMC250K474

10

R21
8.2k

FET2
IRFIZ24N

1
Ls5
20nH

-B

20nH
Ls4

R5

C17
RPER11H104K2K1A01B

+
-

SPEAKER
F120A

Analysis
Time Domain (Transient)
Run to time: 4ms
Start saving data after: 100n
Maximum step size: 100n
Skip the initial transient bias point calculation (SKIPBP)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

V2

V1 = 0
V2 = 5
TD = {tshrt}
TR = 10n
TF = 10n
PW = 1
PER = 100

C18
EKMG500ELL222MLP1S

-B
-15V

Short circuit at 2.25ms.

36

S
VOFF = 0.0V
VON = 1.0V

C13
MMC400K104

R19
2.2k

DT

RL = 8

820

S1
R18
10

Gv = 15.85
tshrt = 2.25m

Short circuit

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Short Circuit vs. Switching Output Shutdown (Positive Side)

V(Speaker)

CSD pin

VS pin
Load (Speaker) current

Delay between short circuit and


switching output shutdown

37

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Short Circuit vs. Switching Output Shutdown (Negative Side)

V(Speaker)

CSD pin

VS pin
Load (Speaker) current

Delay between short circuit and


switching output shutdown

38

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

11. Short Circuit Response


This simulation will show how the IRS2092 responds to a short circuit condition.

+B
15V

R3
VS
47k

R8

+B

C16
C15
EKMG500ELL222MLP1S
RPER11H104K2K1A01B

820

C7: 10u
and 3.3u F

20nH
Ls1
R9
4.7k

R4
220

V1

IN
R1
100k

C2
10u
IC = 7

VAA

C1
EKMG500ELL100ME11D
R2
+

3k

C5
1nF

C4
1nF INCOMP

C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
0
IC = 14
C8
VREF
10u
VOFF = 0
IC = 7
VAMPL = {1.4142*SQRT(Po*RL)/Gv }
R6 8.2k OCSET
FREQ = 1k
R7
1.2k

PARAMETERS:
Po = 12.5

D2
MUR120RLG

IC1

75
VR1

VAA

CSH

GND

VB

INCOMP

HO
VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

CSH
VB
HO

R12
10k

C9
22u
IC = 12.85

VS
R16

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

C12
MMC250K474

10

C13
MMC400K104

DT

R21
8.2k

FET2
IRFIZ24N

0
1

Ls5
20nH

-B

R19
2.2k

Analysis
Time Domain (Transient)
Run to time: 1.25s
Start saving data after: 100n
Maximum step size: 100u
Skip the initial transient bias point calculation (SKIPBP)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

C18
EKMG500ELL222MLP1S

-15V

+
-

SPEAKER
F120A
S
VOFF = 0.0V
VON = 1.0V
V1 = 0
V2
V2 = 5
0
TD = {tshrt}
TR = 10n
TF = 10n
PW = 4
PER = 400

-B

Short circuit at 1.75ms.

39

20nH
Ls4
1

C17
RPER11H104K2K1A01B

R5

S1
R18
10

20nH
Ls3

RL = 8

820

Short circuit

Gv = 15.85
tshrt = 1.75m

C11
RPER11H104K2K1A01B
FET1
IRFIZ24N

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

R11
10k

MUR120RLG
D1

R17
1

.Options
RELTOL: 0.01
VNTOL: 1.0u
ABSTOL: 1n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Short Circuit Response: C7 = 10uF

CSD pin

Load (Speaker) current

VS pin

40

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Short Circuit Response: C7 = 3.3uF

CSD pin

Load (Speaker) current

VS pin

41

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

12. Capacitor models

Capacitor models are needed for the simulation to include spike voltage.
R3

+B
15V

VS
47k

R8

+B

2
820
20nH
Ls1
R9
4.7k
R4
220

VR1
75

IC1
VAA

C1
10u
V1

C2
10u
IC = 7

IN
R1
100k

VOFF = 0
VAMPL = 0
FREQ = 1k

C5
1nF

3k
C6
0.001u

C3
10n

C4
1nF IN-

R2

C8
10u
IC = 7

COMP
CSD

C7
10u
IC = 10

VSS
VREF

R6 8.2k OCSET
R7
1.2k

VAA

CSH

GND

VB

IN-

HO

COMP

VS

CSD

VCC

VSS

LO

VREF
OCSET
IRS2092

VB
HO

R11
10k

R12
10k

C9
22u
IC = 12.85

VS

MUR120RLG
D1

1
C11
0.1u
FET1
IRFIZ24N

R16

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

R18
10

20nH
Ls3

C12
0.47u

10
1

R19
2.2k

R21
8.2k

FET2
IRFIZ24N

2
20nH
Ls4

C170
0.1u

1
Ls5
20nH

-B

-B
-15V

Analysis
Time Domain (Transient)
Run to time: 1ms
Start saving data after: 0.5m
Maximum step size: 40n
Skip the initial transient bias point calculation (SKIPBP)
All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

SPEAKER
F120A
C13
0.1u

DT

42

0
C14
0.68u

20nH
Ls2

R5

820

C16
2200u

R13
10
R14
4.7

R17
1

VCC

COM
DT

D2
MUR120RLG

CSH

C15
0.1u

0
C18
2200u

.Options
RELTOL: 0.001
VNTOL: 1.0u
ABSTOL: 1.0n
CHGTOL: 0.01p
GMIN: 1.0E-12
ITL1: 500
ITL2: 200
ITL4: 10

Simulation Result (without Capacitor Model)


Simulated (without output capacitor models)

Measured

VS

VS

OUT

OUT

Self-oscillation frequency
= 400kHz (Simulated)

43

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Self-oscillation frequency
= 400kHz (Measured)

Simulation Result (with Capacitor Model)


Simulated (with output capacitor models)
VS

Measured
VS

OUT

OUT

Self-oscillation frequency
= 400kHz (Simulated)

44

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

Self-oscillation frequency
= 400kHz (Measured)

13. Simulated Performance of the circuit with different FETs

IRFIZ24N Key Parameters

IRFI4024H-117P Key Parameters

VDS

55

VDS

55

ID

14

ID

11

RDS(ON) typ. @ 10V

70

RDS(ON) typ. @ 10V

48

Qg typ.

13.4

nC

Qg typ.

8.9

nC

tON typ.

38.9

ns

tON typ.

7.9

ns

tOFF typ.

46

ns

tOFF typ.

16.4

ns

Qrr typ.

120

nC

Qrr typ.

11

nC

45

Simulated Performance of the circuit with different FETs


R3

+B
15V

VS
47k

R8

+B

C16
EKMG500ELL222MLP1S
C15
RPER11H104K2K1A01B

820
20nH
Ls1
R9
4.7k
R4
220

V1

IN
R1
100k

0
VOFF = 0
VAMPL = 0
FREQ = 1k

IC1

75
VR1

VAA

C1
EKMG500ELL100ME11D
C4
+
1nF INR2
C5
3k
COMP
1nF
C6
AMZ0050J102
CSD
C3
C7
RPER11H103K2K1A01B
VSS
10u
IC = 10
C8
VREF
10u
IC = 7
R6 8.2k OCSET
C2
10u
IC = 7

R7
1.2k

VAA

CSH

GND

VB

INCOMP

HO
VS

CSD

VCC

VSS

LO

VREF
OCSET

VB
HO

R11
10k

R12
10k

MUR120RLG
D1

C9
22u
IC = 12.85

VS
R16

FET1
IRFI4024H-117P

20nH
Ls2

L1
7G14N-220-RB
OUT

2
1

10

LO
R20
3.3k

C10 22u
IC = 15

R15

R18
10

20nH
Ls3

0
1

DT

IRS2092

0
R21
8.2k

FET2
IRFI4024H-117P

0
1

Ls5
20nH

-B

-B
-15V

46

IRFIZ24N

IRFI4024H-117P

93.505%

94.578%

0.0144 %THD

0.0201 %THD

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009

C17
RPER11H104K2K1A01B

20nH
Ls4

SPEAKER
F120A
C13
MMC400K104

820

Distortion (@ 1kHz, 4, 10W)

R19
2.2k

C12
MMC250K474

10

R5

Efficiency (@ 25W, 4)

C11
RPER11H104K2K1A01B

R13
10
R14
4.7

0
C14
MMH250K684

VCC

COM
DT

D2
MUR120RLG

CSH

R17
1

0
C18
EKMG500ELL222MLP1S

Simulated Performance of the circuit with different FETs


IRFIZ24N

IRFI4024H-117P
Power loss (VDS*ID)

Pgd

FET1

PSW

Pcond

ID

Power loss (VDS*ID)

Pgd

PSW

Pcond

ID

-VDS

-VDS

Power loss (VDS*ID)

Pgd

Pcond

VDS

Power loss (VDS*ID)

PSW

Pgd

Pcond

VDS

FET2
ID

47

ID

PSW

Simulations Index
Simulation

48

Folder Name

1. Efficiency Evaluation............................................................

Efficiency

2. THD Evaluation....................................................................

THD

3. Frequency Response Evaluation..........................................

FrqRsp

4. Waveforms Evaluation..........................................................

Waveforms

5. Voltage gain of the amplifier GV ........................................

Gv

6. Self-Oscillating Frequency....................................................

OSC

7. Dead-time Evaluation...........................................................

DT

8. Turn-on transient..................................................................

StartUp

9. Component stresses.............................................................

Stress

10. Power losses in the MOSFETs (Standard model) ................

FET(STD)

11. Power loss in the MOSFETs (Professional Model) ..............

FET(PRO)

12. Short Circuit vs. Switching Output Shutdown.......................

Short

13. Short Circuit Response.........................................................

ShrtRsp

All Rights Reserved Copyright (c) Bee Technologies Inc. 2009