Steps Of Instruction Execution Cycle In 32- Bit

Bus Interface Unit: (BIU)

It access memory & provide input & output.

Code pre-fetch unit:

it receives machine instruction from the BIU & inserts into the pre-fetch queue. Instruction decode unit: It decodes the machine instruction from the pre-fetch queue and translates into micro codes. Execution unit: It executes the micro code instructions produce by instruction decode unit. Segment Unit: It translates logical address to physical address and perform protection checks. Paging unit: It translates linear address in to physical address and also performs page protection checks Intel 16/32 bit microprocessor architecture: Registers Flags Bus architecture Machine & instruction execution cycle Memory mapping & addressing technique Signed Numbers: A variable that contains positive as well as negative values is knows signed variables e.g : +3, -3, -32, +767 Unsigned Numbers: A variable that contains just positive is known as unsigned Variable Registers: Registers are 8, 16, 32 bits high speed storage location directly inside the CPU They are specially designed to access at much higher speed, then conventional memory

CPU

Memory

Hard Disk

Types of Registers: 1. General purpose Registers AX= Accumulator Register BX= Base Register CX= Counter Register DX= Data Register They are specially designed for arithmetic instruction and data movement. This is also called registers 2. Index Register: Index registers contain the offset address of data and instructions. The term offset refer to the distance of a variable, label as instruction from its base segment.

BP= Base pointer SI = Source Index DI= Destination Index SP= Stack Pointer 3. Segment Register: They contain the base location of instruction data and stack. CS = code segment DS= Data Segment ES= Extra Segment SS= Stack Segment 4. Status and control Registers: It represents the status of a CPU IP= Instruction Registers Flag= Flag General Purpose Registers; AX (Accumulator Register) It favors the CPU to perform arithmetic operative. Others are slightly more efficient when performed using AX. Data movement Swaping BX (Base Register) It holds the address of procedure or variable it can also perform arithmetic operative and data movement. Variables Procedure (functions) CX (Counter Register)

It acts as a counter for looping instructions. These instruction automatically repeat increment and decrement CX. DX (Data Register) It has a special role in multiply and divide operaion. Segment Registers: CS (code segment) It holds the base location of all executable instruction (code) in a program. DS (data segment) The DS registers hold the base location of variables ES (Extra Segment) The ES register is an additional base location for memory variables. SS (stack segment) The SS register contain the base location of the stack.

Index Registers: 1. BP (Base pointer) Base pointer contains an assumed offset from the SS register. The BP register is also used by a sub-routine to locate the variables (procedures) 2. SP (Stack pointer) The Sp contains the offset of the top of the stack. SP and SS registers combine to form the complete address of stack. 3. SI (Source Index) SI registers is used in string movement instruction. It acts as the source for string movement instruction 4. SI ( Destination Index) The Di register acts as the destination for string movement instruction E.g Mov destination, source

Status control Register: IP: The ip register always contain the offset of next instruction to be executed within the current code segment Cs and IP registers are combine to form complete address of next instruction. FLAG: It shows the status of the CPU on its individuals bits. 1. DF ( Direction Flag) It is used in string movement instructions like movs, scas, lods, (mov string, scan string, load string) 0 = down 1 = up 2. IP (Interrupt Flag)

It represents whether system interrupt occur or not 0= disable 1 = enable Interrupt is an operating system function call, The IVT ( interrupt vector table) contain the list of all interrupt. e.g int 21h i/o interrupt int 10h video interrupt 3. TF (trap flag) It represents whether the CPU is haulted or not after each instruction 0 = off 1= on 4. OF ( over flow Flag) It represents the carry value is signed (+,-) 5. CF ( Carry Flag) It represent the carry value in (+) unsigned numbers. 6. SF (Signal Flag) It represent the value of 1 when we perform signed numbers calculation. 7. ZF (Zero Flag) It represents the value 1 when the result of arithmetic operation will be zero 8. PF (Parity Flag) It represents whether the arithmetic calculation using parity (even (1)/ odd (0)) or not. 9. AF ( Auxillary Flag) It is an additional bit to hold the carry value in unsigned numbers.

Bus Architecture: It is a collection of wires that is used to transmit or receive signals from device to another Data bus (16 bit) Address bus (20 bit) Control bus (16 bit) Data Bus: It is used to carry data signals from one device to another. Address Bus It is used to hold the address of different devices. Control Bus It is used to hold the control information of different devices.