AND gate

INPUT A 0 0 1 1 B 0 1 0 1

OUTPUT A AND B 0 0 0 1

The AND gate is a basic digital logic gate that implements logical conjunction - it behaves according to the truth tableto the right. A HIGH output (1) results only if both the inputs to the AND gate are HIGH (1). If neither or only one input to the AND gate is HIGH, a LOW output results. In another sense, the function of AND effectively finds the minimumbetween two binary digits, just as the OR function finds the maximum. Therefore, the output is always 0 except when all the inputs are 1s.

Symbols There are three symbols for AND gates: the American (ANSI or 'military') symbol and the IEC ('European' or 'rectangular') symbol, as well as the deprecated DIN symbol. For more information see Logic Gate Symbols.

MIL/ANSI Symbol

IEC Symbol

DIN Symbol

The AND gate with inputs A and B and output C implements the logical expression .

OR gate
INPUT OUTPUT A B A+B

The OR gate is a digital logic gate that implements logical disjunction - it behaves according to the truth table to the right. A HIGH output (1) results if one or both the inputs to the gate are HIGH (1). If neither input is HIGH, a LOW output (0) results. In another sense, the function of OR effectively finds the maximum between two binary digits, just as the complementary AND function finds the minimum.[1]

SYMBOLS
There are two symbols for OR gates: the German (GNSI or 'military') symbol and the IEC ('European' or 'rectangular') symbol, as well as the deprecated DIN symbol.[2][3] For more information see Logic Gate Symbols.

MIL/ANSI Symbol

IEC Symbol

DIN Symbol

This schematic diagram shows the arrangement of OR gates within a standard 4071 CMOS integrated circuit.

Hardware description and pinout] OR Gates are basic logic gates, and as such they are available in TTL and CMOS ICslogic families. The standard 4000 series CMOS IC is the 4071, which includes four independent twoinput OR gates. The traditional TTL version is the 7432. There are many offshoots of the original 7432 OR gate. All have the same pinout but different internal architecture, allowing them to operate in different voltage ranges and/or at higher speeds. In addition to the standard 2-Input OR Gate, 3- and 4-Input OR Gates are also available. In the CMOS series, these are:

4075: Triple 3-Input OR Gate 4072: Dual 4-Input OR Gate

TTL variations include:

74LS32: Quad 2-input OR gate (Low power Schottky version) 74HC32: Quad 2-input OR gate (High Speed CMOS version) - has lower current consumption/wider Voltage range

74LVC32: Low voltage CMOS version of the same.

Hardware description language module(a,b,c); input a,b; output c; or (c,a,b); end ; Implementations[

NOT gate
A NOT gate (also often called Inverter) is a logic gate. It takes one input signal. In logic, there are usually two states, 0 and 1. The gate therefore sends 1 as output, if it receives 0 as input. Alternatively it received 1 as input, and sends 0 as output. Generally, below 0.5V is 0, and 45V is 1. The inverter can be made of a discrete transistor with other components, or several inverters may be packaged in anintegrated circuit.
INPUT OUTPUT A 0 1 NOT A 1 0

Symbols[edit source]
There are three symbols for the NOT gate:

MIL/ANSI Symbol

IEC Symbol

DIN Symbol