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(s)
_
in(s)=0
=
v
in
R(1+CR
csr
s)
LC(R+R
csr
)s
2
+|L+CR
csr
R
L
+CR(R
csr
+R
L
)]s+R+R
L
=
v
in
R(1+CR
csr
s)
LCRs
2
+|L+CR(R
L
+R
csr
)]s+R+R
L
0
d(s)
=
i
L(s)
d
(s)
_
in(s)=0
=
v
in
|1+C(R
csr
+R)s]
LC(R+R
csr
)s
2
+(L+CR
csr
R
L
+CR(R
csr
+R
L
))s+R+R
L
=
v
in
(1+CRs)
LCRs
2
+|L+CR(R
L
+R
csr
)]s+R+R
L
0
(s)
=
i
cut(s)
cut(s)
=
1
R
where
0
d(s)
is the small signal transfer function of output
voltage over duty cycle;
0
d(s)
is the small signal transfer function of inductor
current over duty cycle;
0
(s)
is the small signal transfer function of output cur-
rent over output voltage.
With bilinear transform, the discrete time equivalent of (8)
to (10) can be derived as
0
d(z)
= 0
d(s)
|
s=
2(z-1)
T
s
(z+1)
(11)
0
d(z)
= 0
d(s)
|
s=
2(z-1)
T
s
(z+1)
(12)
0
(z)
= 0
(s)
|
s=
2(z-1)
T
s
(z+1)
. (13)
B. Inner Predictive Current Mode Controller
Predictive current control is an accurate digital control
technique that is based on inductor current predicted by sam-
pled inductor current and output voltage. There are three kinds
of predictive current mode controls peak current control,
average current control and valley current control. There are
four kinds of modulation methods trailing edge, leading edge,
trailing triangle and leading triangle. Each of the three current
control methods has to be paired with the correct modulation
method in order to be stable over the whole range of the duty
cycle. For the buck converter used, its duty cycle range is 0-1,
so it is important to pair the current control method with the
right modulation method. Here average current control is used,
and it is paired with trailing triangle modulation to give stabil-
ity over the whole duty cycle range of the buck converter. Re-
gardless of the current control method, the predictive current
mode control law for a buck converter is given as [7]
J|n +1]
= -J|n] +
L
in
1
s
(i
c]
|n] -i
L
|n]) +
2
c
in
. (14)
The small signal discrete time transfer function of duty
over current error is given as [8]
J
(z)
= F
m(z)
(i
c](z)
-i
L(z)
) (15)
where
F
m(z)
=
L
v
in
1
s
1
z+1
. (16)
The switching diagram is shown in Fig. 4. Sampling oc-
curs at the beginning of each switching period. It can be seen
that by the end of the second switching period, the average
inductor current reaches the reference current set at the first
switching period.
Figure 3. Control block diagram of the PV simulator
(s)
(18)
(s)
= SCRI
s
Is
2
+(2CRI +SII
s
+4CRR
cs
I
s
+
4CRR
L
I
s
)s +2I +4RI
s
+4R
L
I
s
= SCRI
s
Is
2
+(2CRI +SII
s
+4CRR
cs
I
s
+
4CRR
L
I
s
)s +2I +4RI
s
. (19)
The compensator, 0
C(s)
, is designed based on the common
PI controller as
PI = K
P
+
K
I
s
=
K
p
_s+
K
I
K
P
]
s
. (20)
If the zero of the compensator is placed over the dominant
pole of I
(s)
, the band width of the system will be equal to the
cross over frequency of the compensated loop gain. The DC
gain of the PI controller will be chosen so that the bandwidth
is maximized while satisfying the phase margin greater than
75 and gain margin greater than 6 dB requirements.
However, the small signal transfer functions of the buck
converter are dependent on the load condition. In order to
avoid having to implement mode switching or gain scheduling
in the controller, it is necessary to find the load conditions that
place the most stringent requirements on the PI controller. If
the load resistance is assumed to be between 0.25 and 200,
then a PI controller can be designed to satisfy both load condi-
tions. Using Matlab, a range of operating conditions can be
considered. The location of the zero is determined primarily
by the light load condition, while the choice of gain is deter-
mined primarily by the heavy load condition. Considering
both, a stable controller may be found for the entire operating
range. The PI controller is chosen to be
0
c(s)
=
2000(1+0.0039s)
s
. (21)
The discrete time equivalent of 0
c(s)
is transformed as
0
c(z)
= 0
c(s)
|
s=
2(z-1)
T
s
(z+1)
=
7.61z-7.59
z+1
. (22)
The bandwidth of the system increases as load resistance
decreases. The bode plots of the close loop gains when the
system is operating at minimum load resistance, maximum
load resistance and maximum power point load resistance is
shown in Fig. 5.
D. Stability Analysis
The loop gain of the whole closed system, which includes
the LUT and the plant, is found to be
H
ss(z)
= -0
L01
1
((z))
u
c(z)
1+1
((z))
u
c(z)
(23)
0
L01
is the gain from the LUT. From (23), one can tell
that the stability of the whole system depends on the gain of
the LUT since the plant is designed to be stable. The IV curve
of the PV module to be simulated in Section V is shown in Fig.
6 along with the corresponding 0
L01
. From the figure, one can
tell that the absolute value of the IV curve slope increases as
the voltage increases, and the worst case gain is -1.797. At this
Figure 5. Compensated plant loop gains for multiple load conditions
Figure 6. PV module IV curve and slope
56
worst case gain, the loop gain of the whole system is shown in
Fig. 7. As seen in Fig.7, the system still has adequate gain and
phase margins and is stable.
V. EXPERIMENTAL RESULTS
The PV simulator has been built with the circuit parame-
ters shown in Table 1. The PV simulator is set to simulate the
multi-crystalline PV module model SW-S85P from SunWize.
The outputs of the PV simulator when connected to constant
current loads are shown in Fig. 8 for 100%, 60% and 20%
insolation levels. From Fig. 8, it can be seen that the output of
the PV simulator follows the ideal IV curves consistently
without encountering stability issues. The load step response
of the PV simulator corresponding to five different operating
points on the IV curve under 100% insolation is shown from
Fig. 9 to Fig. 13. The top trace is the output voltage, the mid-
dle trace is the output current and the bottom trace is the load
switch. Therefore, the PV simulator can be perturbed, as by a
MPPT controller, with a sampling frequency of up to 2 kHz.
Figure 7. Bode plot of worst case system loop gain
TABLE 1. PV SIMULATOR PARAMETERS
DC-DC converter parameters
Switching Frequency (f
sw
) 100 kHz
Inductor (L
1
) 138 H
Inductor (L
2
) 138 H
Input Capacitor (C
in
) 560 F
Filter Capacitor(C
B
) 1 mF
Output Capacitor (C
out
) 560 F
Photovoltaic module parameters
Short Circuit Current (I
sc
)(100% Insolation) 5.4 A
Open Circuit Voltage (V
oc
)(100% Insolation) 22 V
Internal Series Resistance (R
s
) 342 m
Internal Shunt Resistance (R
sh
) 1.11 k
Max. Output Power (P
max
)(100% Insolation) 85 W
Temperature 300 K
Figure 8. PV simulators performance with constant current load
Figure 9. Step response when load changes between 1 and 0.9.
Figure 10. Step response when load changes between 2.22 and 2.
Figure 11. Step response when load changes between 3.2 and 2.9.
57
VI. CONCLUSION
This paper presents a photovoltaic simulator that emulates
a real PV module. The special output characteristics of a solar
panel can be emulated by combining a microcontroller and a
DC-DC converter. With a double current mode controller, the
stability of the system can be guaranteed over a wide range of
load conditions. The speed and convergence path of the simu-
lator is also examined to allow users make informed decision
to maximize the effectiveness of the simulator.
ACKNOWLEDGMENTS
This work was supported in part by the National Science
Foundation under grant ECCS-0900940.
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Figure 12. Step response when load changes between 4.4 and 4.
Figure 13. Step response when load changes between 9.6 and 8.7.
58