Sie sind auf Seite 1von 10

[CSM51A / EE16 S10] Solutions for Midterm

Date: 05/03/10
The midterm is closed book, and up to 2 sheets (= 4 pages) of summary notes are allowed.
Please show all your work and write legibly, otherwise no partial credit will be given.
This should strictly be your own work; any form of collaboration will be penalized.
Name :
Student ID :
Problem Points Score
1 15
2 10
3 20
4 20
5 15
6 20
Total 100
1
Problem 1 (15 points)
The following questions are based on the function described below.
Inputs: a, b, c {0, 1}
Outputs: z {0, 1}
Function: z =

0 if two or more inputs are 1,


1 otherwise
1. (4 points) Fill in the table.
Solution
a b c z
0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 0
2. (5 points) Write the boolean expression of the function in minimal sum of products form.
Solution Looking at the ones in the above table, we can write and simplify:
z = a

+ a

c + a

bc

+ ab

= a

(c

+ c) + a

bc

+ ab

= a

+ a

bc

+ ab

= a

(b

+ bc

) + ab

= a

(b

+ c

) + ab

= a

+ a

+ ab

= a

+ c

(a

+ ab

)
= a

+ c

(a

+ b

)
= a

+ a

+ b

3. (6 points) If the constant input 1 is allowed (but not 0), does this function form a universal set? Please
show proof.
Solution Fixing the value of a to 1, we can see that
z(1, b, c) = b

= (b + c)

This is an implementation of a NOR gate, which is a universal set. Therefore, the given function forms a
universal set.
2
Problem 2 (10 points)
Given the following simplication of a boolean expression, answer the following.
(a

+ c)(a + b)(b

+ a

(1)
= (a

ab

+ ac + a

b + bc)(b

+ a

(2)
= (ac + bc)(b

+ a

(3)
= (a + b)c b

(a + c) (4)
= (a + b)(a + c)b

c (5)
= (a + ab + ac + bc)b

c (6)
= (a(1 + b + c) + bc)b

c (7)
= bc b

c (8)
= 0 (9)
1. (4 points) Is the above simplication correct? If not, write all steps that are derived incorrectly from its
previous step.
Solution The wrong steps are (4) (no prime on b) and (8) (rst term should be (a + bc)).
2. (6 points) If the given equation is not correct, show the correct simplication.
Solution The correct simplication is shown here.
(a

+ c)(a + b)(b

+ a

= (a

ab

+ ac + a

b + bc)(b

+ a

= (ac + bc)(b

+ a

= (a + b)c b(a + c)
= (a + b)(a + c)bc
= (a + ab + ac + bc)bc
= (a(1 + b + c) + bc)bc
= (a + bc)bc
= abc + bc
= bc(a + 1)
= bc
3
Problem 3 (20 points)
We would like to determine the timing of the gate network shown here. The necessary gate characteristics are
given in the table below.
G2
G1 G3
1.1
2.0
x
y
z
L
z
= 1.0
Gate Fan- Propagation Delays (ns) Load Factor
Type in t
pLH
t
pHL
I
NAND 2 0.05 + 0.038L 0.08 + 0.027L 1.0
XOR 2 0.30 + 0.036L 0.30 + 0.021L 1.1
0.16 + 0.036L 0.15 + 0.020L 2.0
1. (9 points) Find the worst case value of t
pHL
(x z). (Hint: For an XOR gate, a signal transition at the
input can drive an output both lowhigh and highlow. Be sure to use the worst possible case.)
Solution The load on G1 is 2.0, and we calculate
t
pLH
(G1) = 0.05 + 0.038 2.0 = 0.126 (ns)
t
pHL
(G1) = 0.08 + 0.027 2.0 = 0.134 (ns)
We can see that t
pHL
(G1) is the longer delay. Now, looking at the network, we can write
t
pHL
(z) = t
pHL
(G3) + t
pLH
(G2) + max{t
pLH
(G1), t
pHL
(G1)}
= 0.08 + 0.027 + 0.16 + 0.036 + 0.134
= 0.437 (ns)
2. (9 points) Find the worst case value of t
pLH
(x z).
Solution Using the same methods,
t
pLH
(z) = t
pLH
(G3) + t
pHL
(G2) + max{t
pLH
(G1), t
pHL
(G1)}
= 0.05 + 0.038 + 0.15 + 0.020 + 0.134
= 0.392 (ns)
3. (2 points) What is the worst case value of t
p
(x z)?
Solution 0.437 ns is the maximum delay.
4
Problem 4 (20 points)
Given the following CMOS circuit, answer the following questions.
c
VDD
a b
c d
e
f
g
z
a
b d
e
f g
1. (4 points) There is a problem in this CMOS circuit. When a = 0 and g = 0, there exists a combination of
signals that form a direct path from V
DD
to ground. Find the values of b, c, d, e and f.
Solution For PMOS:
z = (a

+ b

)(c

+ d

) + e

+ f

For NMOS:
z

= (a + c)(b + d)(ef + g)
For a direct path to form from V
DD
to ground, both PMOS and NMOS circuits need to be connected. For
the PMOS, at least one of (a

+ b

)(c

+ d

), e

, or f

needs to be 1, and for the NMOS, a + c, b + d, and


ef + g all have to be 1 at the same time.
Because g = 0, ef must be 1, therefore e = 1 and f = 1. Since e and f are both 1, e

and f

are both 0
and therefore (a

+ b

)(c

+ d

) must be 1, which means that a

+ b

and c

+ d

should both be 1. Also, due


to the NMOS circuit, a + c and b + d are both 1 also.
5
Since a = 0 is given, c should be 1 to keep the NMOS connected. This leads to d = 0, as c

+d

cannot be 1
otherwise. With d = 0, we need b = 1 to ensure b + d is 1.
The resulting signal values are: b = 1, c = 1, d = 0, e = 1 and f = 1.
2. (8 points) Assuming that the PMOS circuit has the correct functionality that we want, draw the corre-
sponding NMOS circuit.
Solution
z = (a

+ b

)(c

+ d

) + e

+ f

(a

+ b

)(c

+ d

) + e

+ f

(a

+ b

+ (c

+ d

(f

= (ab + cd)e(f + g)
c
z
a
b d
e
f g
3. (8 points) Assuming that the NMOS circuit has the correct functionality that we want, draw the corre-
sponding PMOS circuit.
Solution
z

= (a + c)(b + d)(ef + g)
z = {(a + c)(b + d)(ef + g)}

= (a + c)

+ (b + d)

+ (ef + g)

= a

+ b

+ (e

+ f

)g

VDD
a b
c d
e f
g
z
6
Problem 5 (15 points)
We would like to implement the following combinational system using a minimal NAND-NAND network. The
encoder accepts the following 2421 coded inputs and converts them into BCD coded digits as shown in the table.
2421 BCD
0 0000 0000
1 0001 0001
2 0010 0010
3 0011 0011
4 0100 0100
5 1011 0101
6 1100 0110
7 1101 0111
8 1110 1000
9 1111 1001
1. (3 points) Complete the switching table. Do not forget dont-cares.
Solution
x
3
x
2
x
1
x
0
z
3
z
2
z
1
z
0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 0
0 0 1 1 0 0 1 1
0 1 0 0 0 1 0 0
0 1 0 1 - - - -
0 1 1 0 - - - -
0 1 1 1 - - - -
1 0 0 0 - - - -
1 0 0 1 - - - -
1 0 1 0 - - - -
1 0 1 1 0 1 0 1
1 1 0 0 0 1 1 0
1 1 0 1 0 1 1 1
1 1 1 0 1 0 0 0
1 1 1 1 1 0 0 1
2. (6 points) Derive minimal sum of products forms for the output bits z. (Note that we can use z
0
= x
0
)
Solution
z
3
= x
2
x
1
x
0
0 0 0 0
0 - - -
0 0 1 1
- - 0 -
x
1
x
2
x
3
7
z
2
= x
3
x

2
+ x
2
x

1
x
0
0 0 0 0
1 - - -
1 1 0 0
- - 1 -
x
1
x
2
x
3
z
1
= x

3
x
1
+ x
3
x

1
x
0
0 0 1 1
0 - - -
1 1 0 0
- - 0 -
x
1
x
2
x
3
3. (6 points) Draw the two-level NAND-NAND networks for the output bits z
3
to z
1
. Complemented variables
are also available for all inputs.
Solution
x
2
x
1
z
3
x
3
x
2
'
z
2
x
2
x
1
'
x
3
'
x
1
z
1
x
3
x
1
'
8
Problem 6 (20 points)
We would like to implement the following combinational system using a PLA.
Inputs: x, y {0, 1, 2, 3}
Outputs: z {0, 1, 2, 3}
Function: z = {xy + 2} mod 4
1. (4 points) Complete the switching table using binary encoding for all values.
Solution
x
1
x
0
y
1
y
0
z
1
z
0
0 0 0 0 1 0
0 0 0 1 1 0
0 0 1 0 1 0
0 0 1 1 1 0
0 1 0 0 1 0
0 1 0 1 1 1
0 1 1 0 0 0
0 1 1 1 0 1
1 0 0 0 1 0
1 0 0 1 0 0
1 0 1 0 1 0
1 0 1 1 0 0
1 1 0 0 1 0
1 1 0 1 0 1
1 1 1 0 0 0
1 1 1 1 1 1
2. (8 points) Derive minimal sum of products forms for z
1
and z
0
.
Solution
z
1
= x

1
x

0
+ y

1
y

0
+ x

0
y

0
+ x

1
y

1
+ x
1
x
0
y
1
y
0
y
0
1 1 1 1
1 1 0 0
1 0 1 0
1 0 0 1
y
1
x
0
x
1
9
z
0
= x
0
y
0
y
0
0 0 0 0
0 1 1 0
0 1 1 0
0 0 0 0
y
1
x
0
x
1
3. (8 points) Program the following PLA to implement the function.
Solution
y
0
y
1
x
0
x
1
z
1
z
0
x
1
'x
0
'
y
1
'y
0
'
x
1
'y
1
'
x
1
x
0
y
1
y
0
x
0
y
0
x
0
'y
0
'
10

Das könnte Ihnen auch gefallen