You are on page 1of 3

84

01

Reg. No. :

Question Paper Code :

20107

M.E./M.Tech. DEGREE EXAMINATION, JANUARY 2011.


First Semester
VLSI Design

(Common to Applied Electronics)

252101 DSP INTEGRATED CIRCUITS


(Regulation 2010)
Maximum : 100 marks

Time : Three hours

84
0

Answer ALL questions.

PART A (10 2 = 20 marks)

1.

List few applications of ASICs?

2.

Draw the two input NAND gate using MOS logic.

3.

Calculate the % reduction in computation via FFT when N = 512. Assume


radix - 2 DIT algorithm.

4.

Write the discrete cosine transform pair.

5.

If x(n ) = { 0,1, 2, 7, 6.5, 2.5, 7.5}, find x (3n ) .

Define first order coefficient sensitivity of digital system.

7.

What are the characteristics of ideal DSP architecture?

8.

State the advantages of Bitserial system (DSP).

9.

Name the FFT processor, IC No.

10.

Compare Conventional number system with residue number system.

01

6.

(a)

Describe with the help of block diagram DSP system, design from first
principles.
Or

(b)

Write short notes on

84

11.

PART B (5 16 = 80 marks)

(i)

CMOS circuit of two input XOR gate and its working principle and
VLSI layout.

(ii)

VLSI process technologies.

(a)

84
01

12.

Explain the least mean square (LMS) method of finding optimal weight

vector for stationary random signals. (Assume Adaptive transversal


filter)
Or
(b)

(i)

Find the DFT of the following sequences.


(1)

x (n ) = (0.75) n , n = 0,1, 2, 7

= 0, n = 8,9, 15
(2)
(ii)
(a)

State and explain the sampling process of analog signals.

Describe a rational sampling rate converter with frequency conversion

(i)
(ii)

84
0

factor L/M = 0.8

13.

x (n ) = (n 1) + (n 2), n = 0,1, 2, 7.

Sketch a block diagram of sampling rate converter.


Find the difference equation for the sampling rate converter.
Or

(b)

(i)

Draw the three different structure for H(z)

H ( z ) = ( z 1 + 1) ( z 2 + 0.5 z 1 + 0.06) ( z 1 + 0.6)

(ii)

Explain a method of measurement of round off noise in digital

system.

(a)

(i)

Differentiate between multiprocessors with multicomputers.

(ii)

Explain systolic and wave front arrays and its applications.

01

14.

84

(b)

Or

What is complex PE? Discuss the hardware implementation based on


complex PE? What are its merits and demerits of such system?

20107

(a)

Design a complex multiplier using two different techniques and compare


their performance.
Or

(b)

84
01

15.

Write short notes on


(i)

Residue number system.

(ii)

Layout of VLSI circuit by taking an example.

84

01

84
0

20107