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Operations & Maintenance Manual

Manual P/N 571119-0001


MODEL 1119 DME
DISTANCE MEASURING
EQUIPMENT
THIS DOCUMENT CONTAINS PROPRIETARY INFORMATION AND SUCH INFORMATION
MAY NOT BE DISCLOSED TO OTHERS FOR ANY PURPOSES WITHOUT WRITTEN
PERMISSION FROM ALENIA MARCONI SYSTEMS INC.
Original Issue July, 1989
Reissued November, 1992
Rev. A May, 1995
Rev. B October, 1996
Rev. C September, 1999
Rev. D December, 2002
Copyright, Alenia Marconi Systems Inc., 2002
ALENIA MARCONI SYSTEMS INC.
11300 West 89th Street
Overland Park, Kansas 66214 U.S.A.
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 Effective Pages 1
AIRPORT SYSTEMS INTERNATIONAL, INC.
11300 West 89th Street
Overland Park, KS U.S.A. 66214
Date: December, 2002
TO: Holders of the Model 1119 DME Distance Measuring Equipment (1119 DME) Operations and
Maintenance Manual (Part No. 571119-0001)
REVISION D HIGHLIGHTS
Pages which have been revised, together with the highlights of this revision, are outlined below. Remove
the affected pages and replace them with these revised pages. Retain all revision highlight pages. They
should be inserted in the manual immediately following the Record of Revisions.
Page No. Description of Change
All December, 2002
MODEL 1119 DME
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MODEL 1119 DME
Rev. D December, 2002 Effective Pages 1
LIST OF EFFECTIVE PAGES
Page No. Issue Page No. Issue
Title December, 2002
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Revision D Highlights December, 2002
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Record of Revisions December, 2002
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Safety Summary December, 2002
Warranty December, 2002
i thru xvi December, 2002
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8-1 thru 8-6 December, 2002
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10-1 thru 10-2 December, 2002
11-1 thru 11-4 December, 2002
ALENIA MARCONI SYSTEMS INC.
11300 West 89th Street
Overland Park, KS U.S.A. 66214
MODEL 1119 DME
Record of Revision 2 Rev. D December, 2002
THIS SHEET INTENTIONALLY LEFT BLANK
MODEL 1119 DME
REV. D December, 2002 Record of Revision 1
Alenia Marconi Systems Inc.
RECORD OF REVISIONS
Page
Number
Revision Insertion
Date
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Number
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Date
Level Date Level Date
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MODEL 1119 DME
Record of Revision 2 Rev. D December, 2002
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MODEL 1119 DME
SAFETY SUMMARY
The following are general safety precautions that are not related to any specific procedures and therefore do
not appear elsewhere in this publication. These are recommended precautions that personnel must
understand and apply them during many phases of operation and maintenance.
ELECTROSTATIC SENSITIVE DEVICES PRECAUTIONS
Since most modules used in all models of equipment have Electrostatic Discharge (ESD) sensitive devices
included in them, all modules should be considered sensitive to electrostatic discharge. Handling in the field
shall be the same as in the factory. Each system is shipped with a wrist strap that must be worn while
maintaining the equipment. The wrist strap shall be fastened to the equipment chassis either in the
designated plug-in or attached to the equipment chassis with the alligator clip. The wrist strap must be used
before any modules are removed from the equipment and at all times while handling the modules until they
are placed in a protective environment such as an anti-static bag. Modules or boards must not be placed on
any non-conducting surface such as wooden work benches, painted metal work benches, plastics, or
technical manuals. Any work surface to be used must have a conducting mat placed on it and attached to
earth ground. The mat and additional wrist straps can be obtained from Airport Systems International, Inc.
KEEP AWAY FROM LIVE CIRCUITS
Operating personnel must at all times observe all safety regulations. Under no circumstances should any
person remove any protective covers that expose lethal voltages. Do not replace components or make
adjustments inside the equipment with primary power supply turned on. Under certain conditions,
dangerous potentials may exist when the power is in the off position, due to charges retained by capacitors.
To avoid casualties, always remove power and allow time for the capacitors to discharge before touching
it.
DO NOT SERVICE OR ADJUST ALONE
Under no circumstances should any person reach into or enter the enclosure for the purpose of servicing or
adjusting the equipment except in the presence of someone who is capable of rendering aid.
RESUSCITATION
Personnel working with or near high voltages should be familiar with modern methods of resuscitation.
MODEL 1119 DME
MODEL 1119 DME
The equipment is supplied by Alenia Marconi Systems (ASI) Inc.. For replacement parts and repair service,
contact Alenia Marconi Systems (ASI) Inc.
HOW TO ORDER REPLACEMENT PARTS
When ordering replacement parts, you should direct your order as indicated below and furnish the following
information insofar as applicable. To enable us to give better replacement service, please be sure to give
us complete information.
INFORMATION REQUIRED
1. Alenia Marconi Systems (ASI) Inc.. model number, type and serial number of equipment.
2. Unit sub-assembly number (where applicable).
3. Item or reference symbol number from parts list or schematic.
4. Alenia Marconi Systems (ASI) Inc. part number and description.
5. Manufacturer's code, name and part number (where applicable).
6. Quantity of each replacement part required.
CORRESPONDENCE/SHIPPING ADDRESS
ALENIA MARCONI SYSTEMS (ASI) INC
11300 West 89th Street
Overland Park, Kansas 66214
U.S.A.
COMMUNICATIONS
Telephone: 913/495-2600
Telex: 705394 ASI KSC UD
Fax: 913/492-0870
MODEL 1119 DME
ALENIA MARCONI SYSTEMS INC. MANUFACTURER'S WARRANTY
A. The Manufacturer warrants to the original purchaser, subject to the limitations and exclusions stated
below, that all mechanical and electrical parts of products which it manufactures (the "Products") will be
free of defects in materials and workmanship for a period of (i) one year from the date of installation or (ii)
eighteen (18) months from the date of shipment, whichever first occurs (the "Warranty Period").
B. If the Customer believes a Product is defective, notice thereof shall be provided to the Manufacturer's
Customer Service Department at the address provided on the cover page and (if applicable) to the selling
Distributor. A defect in materials and workmanship covered by this warranty shall be deemed to have occurred
only if, and as of the time when, the Manufacturer is notified in writing by the Customer, within the Warranty
Period, that the Product has become defective, and the Manufacturer's personnel verify that the said Product,
in fact, does not comply with the warranty provided hereunder and it is determined that:
(i) The Products, during the entire Warranty Period, have been operated within normal service conditions
recommended by the Manufacturer and recognized in the industry, and
(ii) The Products have been installed and adjusted according the Manufacturer's procedures as stated
in the Instruction Manual or other instructions supplied in writing by the Manufacturer.
C. Failures caused by lightning or other acts of God, or power surges, are not considered to be defects
in materials and workmanship and are not covered under this warranty. Routine maintenance and calibration
are also not considered to be defects in materials and workmanship and are not covered under this warranty,
Any change, modification or alteration of the Manufacturer's Products not specifically authorized by the
Manufacturer will void this warranty.
D. Any circuit board or module returned to the factory for warranty coverage, must be enclosed in an
electrostatic sensitive device (ESD) protective wrapping. If circuit board or module is not received in an
ESD protective wrap, any and all warranty will be null and void.
E. If it is determined that the conditions for warranty coverage, as described above, have been satisfied,
the Manufacturer shall repair or replace the defective Products or parts thereof in accordance with the following
procedures:
(i) Customer will contact the Manufacturer's Customer Service Department which will issue the Customer
a Return Authorization (RA) number.
(ii) The component, defective part, or Product, as appropriate, shall be returned to the Manufacturer
for inspection, freight prepaid by the Customer. The RA number must be clearly displayed on the
exterior of the shipping container. No shipments will be accepted without a RA number. All customs
duties, fees, etc. will be paid by the Customer.
MODEL 1119 DME
ALENIA MARCONI SYSTEMS INC. MANUFACTURER'S WARRANTY
(Cont)
(iii) If, upon inspection, it is determined by Manufacturer's personnel that the Product or component
thereof is indeed defective and covered by this warranty, then Manufacturer, at its option, may either
repair the Product or defective component thereof and return the same to the Customer or ship a
replacement for the defective Product or part thereof, freight paid. All customs duties, fees, etc. will
be paid by the Customer. The Product or component thereof will be returned to the customer utilizing
a shipping mode similar to that used by Customer to ship the same to the Manufacturer.
(iv) If, upon inspection by Manufacturer, it is determined that the Product or component thereof was
not defective or was not covered by this warranty, then the cost of all of Manufacturer's inspections
and the return shipping charges will be charged to Customer.
F. The Manufacturer reserves the right to make modifications and alterations to Products without obligation
to install such improvements on, in, or in place of theretofore manufactured Products of Manufacturer.
G. Manufacturer does not warranty any Products, components, subassemblies, or parts not of its own
manufacture. Manufacturer hereby transfers to Customer any and all warranties (if any) which it receives
from its suppliers.
H. This warranty applies only to the original purchaser and, unless Customer receives the express written
consent of an officer of Manufacturer, this warranty may not be assigned, transferred, or conveyed to any
third party, even if the third party is a bona a fide purchaser of the Products.
I. THIS WARRANTY IS EXPRESSLY IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED
OR IMPLIED, WHETHER STATUTORY OR OTHERWISE, INCLUDING AND IMPLIED WARRANTY
OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
THE MANUFACTURER BE LIABLE FOR INDIRECT, INCIDENTAL, COLLATERAL, PUNITIVE,
OR CONSEQUENTIAL DAMAGES OF ANY KIND, WHETHER ARISING OUT OF CONTRACT,
TORT, NEGLIGENCE, STRICT LIABILITY, OR OTHER PRODUCTS LIABILITY THEORY.
J. CUSTOMER'S SOLE REMEDY FOR ANY BREACH OF THE WARRANTY SHALL BE
THE REPAIR OR REPLACEMENT OF THE PRODUCTS BY THE MANUFACTURER AS PROVIDED
HEREIN, AND IN NO EVENT SHALL THE MANUFACTURER BE REQUIRED TO INCUR COSTS
FOR THE REPAIR OR REPLACEMENT OF ANY PRODUCT IN EXCESS OF THE PURCHASE
PRICE OF SUCH PRODUCT, PLUS ANY TRANSPORTATION CHARGES ACTUALLY PAID
ATTRIBUTABLE TO SUCH PRODUCTS.
MODEL 1119 DME
REV. D December, 2002 i
TABLE OF CONTENTS
SECTION 1. GENERAL INFORMATION
Paragraph Description Page
1.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.2 EQUIPMENT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.2.1 Electronics Cabinet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1
1.2.1.1 Test Panel Assembly (1A1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.1.1 Display CCA (1A1A1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.1.2 Time Interval CCA (1A1A2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.1.3 Power Measurement CCA (1A1A3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.1.4 Steering Logic CCA (1A1A4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.2 Monitor Control Assembly (1A2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.3 Calibrated Attenuator Assembly (1A3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6
1.2.1.4 Detector Assembly (1A4/1A5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.5 Directional Coupler Assembly (1A6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.6 Monitor Transfer Assembly (1A7) Dual Systems Only . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.7 RF Generator Assembly (1A8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.8 Diode Modulator Assembly (1A9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.9 Signal Generator Video CCA (1A10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.10 Monitor A CCA (1A11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
1.2.1.11 Monitor B CCA (1A12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.2.1.12 Low Voltage Power Supply CCA (1A13/1A28) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.2.1.13 High Voltage Power Supply Assembly (1A14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.2.1.14 CPU CCA (1A15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.2.1.15 DME System Interface CCA (1A16) Optional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8
1.2.1.16 Interface CCA (1A17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.17 Control Interface CCA (1A18) Optional . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.18 Transponder Control Panel Assembly (1A19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.19 Preselector Assembly (1A20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.20 First Mixer Assembly (1A21) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.21 RF Generator Assembly (1A23) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.22 IF Amplifier Assembly (1A24) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9
1.2.1.23 Decoder CCA (1A25) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.24 Keyer CCA (1A26) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.25 Transmitter Video CCA (1A27) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.26 Power Control Panel Assembly (1A29) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.26.1 Scaling CCA (1A29A1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.26.2 Input Power Monitor CCA (1A29A2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.2.1.27 +28 Vdc Power Supply (1A30) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.1.28 ILS Current Limiter (1A31) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
MODEL 1119 DME
ii REV. D December, 2002
TABLE OF CONTENTS (Continued)
SECTION 1. GENERAL INFORMATION (Continued)
Paragraph Description Page
1.2.1.29 Power Amplifier Assembly (1A32) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.1.30 Fan Assembly (1A33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.1.31 Backplane CCA (012537-0005) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.1.32 Circulator Assembly (950086-0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.2 Antenna (950005-0001) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11
1.2.3 Video Terminal (950340-0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.3 EQUIPMENT SPECIFICATION DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.4 EQUIPMENT AND ACCESSORIES SUPPLIED . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-20
1.5 OPTIONAL EQUIPMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-21
1.6 EQUIPMENT REQUIRED BUT NOT SUPPLIED . . . . . . . . . . . . . . . . . . . . . . . . . 1-23
1.7 REFERENCE DESIGNATOR CONVERSION CHART . . . . . . . . . . . . . . . . . . . . . 1-24
SECTION 2. TECHNICAL DESCRIPTION
2.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.2 DME OPERATING PRINCIPLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.3 THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.3.1 Simplified System Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.3.2 Detailed Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.3.2.1 Test Panel Assembly (1A1) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-11
2.3.2.2 Display CCA (1A1A1) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
2.3.2.3 Time Interval CCA (1A1A2) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . 2-12
2.3.2.3.1 Time Interval CCA (1A1A2) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.3.2.4 Power Measurement CCA (1A1A3) Block Diagram Theory . . . . . . . . . . . . . . . . . . . 2-15
2.3.2.4.1 Power Measurement CCA (1A1A3) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . 2-16
2.3.2.5 Steering Logic CCA (1A1A4) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . 2-18
2.3.2.5.1 Steering Logic CCA (1A1A4) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.3.2.6 Calibrated Attenuator (1A3) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.3.2.7 Detector Assembly (1A4/1A5) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2.3.2.8 Directional Coupler Assembly (1A6) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
2.3.2.9 Monitor Transfer Assembly (1A7) (Dual Systems Only) Circuit Theory . . . . . . . . . . 2-22
2.3.2.10 RF Generator (1A8/1A23) Assembly Block Diagram Theory . . . . . . . . . . . . . . . . . . 2-23
2.3.2.10.1 VCO Buffer (1A8/1A23) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24
2.3.2.10.2 VCO Buffer (1A8/1A23) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2.3.2.10.3 Synthesizer CCA (1A8/1A23A1) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . 2-26
2.3.2.10.4 Synthesizer CCA (1A8/1A23A1) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . 2-28
2.3.2.11 Diode Modulator Assembly (1A9) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . 2-29
2.3.2.11.1 Diode Modulator Assembly (1A9) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . 2-32
MODEL 1119 DME
REV. D December, 2002 iii
TABLE OF CONTENTS (Continued)
SECTION 2. TECHNICAL DESCRIPTION (Continued)
Paragraph Description Page
2.3.2.12 Signal Generator Video CCA (1A10) Simplified Block Diagram Theory . . . . . . . . . 2-33
2.3.2.12.1 Signal Generator Video CCA (1A10) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . 2-35
2.3.2.13 Monitor A CCA (1A11) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-39
2.3.2.13.1 Monitor A (1A11) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-40
2.3.2.14 Monitor B CCA (1A12) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-44
2.3.2.14.1 Monitor B CCA (1A12) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-46
2.3.2.15 Low-Voltage Power Supply (1A13/1A28) Circuit Theory . . . . . . . . . . . . . . . . . . . . . 2-48
2.3.2.16 High Voltage Power Supply Assembly (1A14) Circuit Theory . . . . . . . . . . . . . . . . . . 2-49
2.3.2.17 CPU CCA (1A15) Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-49
2.3.2.17.1 CPU CCA (1A15) (012733-1001) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . 2-49
2.3.2.17.1.1 CPU CCA (1A15) (012733-1001) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . 2-50
2.3.2.17.2 CPU CCA (1A15) (012775-1001) Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . 2-56
2.3.2.18 DME System Interface CCA (1A16) (Optional) Block Diagram Theory . . . . . . . . . . 2-57
2.3.2.18.1 DME System Interface CCA (1A16) (Optional) Detailed Circuit Theory . . . . . . . . . 2-59
2.3.2.19 Interface CCA (1A17) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-60
2.3.2.20 Control Interface CCA (1A18) (Optional) Block Diagram Theory . . . . . . . . . . . . . . . 2-64
2.3.2.20.1 Control Interface CCA (1A18) (Optional) Detailed Circuit Theory . . . . . . . . . . . . . . 2-65
2.3.2.21 Preselector Assembly (1A20) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-67
2.3.2.22 First Mixer Assembly (1A21) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-67
2.3.2.23 IF Amplifier Assembly (1A24) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . 2-68
2.3.2.23.1 IF Amplifier Assembly (1A24) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . 2-70
2.3.2.24 Decoder CCA (1A25) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-78
2.3.2.24.1 Decoder CCA (1A25) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-78
2.3.2.24.2 Decoder CCA(1A25) (012380) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . 2-79
2.3.2.24.3 Decoder CA (1A25) (012380-0001) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . 2-88
2.3.2.25 Keyer CCA (1A26) Simplified Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . 2-91
2.3.2.25.1 Keyer CCA (1A26) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-92
2.3.2.26 Transmitter Video CCA (1A27) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . 2-96
2.3.2.26.1 Transmitter Video CCA (1A27) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . 2-100
2.3.2.27 Scaling CCA (1A29A1) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-104
2.3.2.28 Input Power Monitor/Watchdog (1A29A2) Circuit Theory . . . . . . . . . . . . . . . . . . . 2-104
2.3.2.29 +28 Vdc Power Supply Assembly (1A30) Circuit Theory . . . . . . . . . . . . . . . . . . . . 2-106
2.3.2.30 ILS Current Limiter (1A31) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-106
2.3.2.31 RF Amplifier (1A32) Block Diagram Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-106
2.3.2.31.1 Exciter CCA (1A32A1) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-109
2.3.2.31.2 Power Amplifier CCA (1A32A2) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . 2-109
2.3.2.31.3 Main Board CCA (1A32A3) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . 2-110
2.3.2.31.4 Modulation Amplifier CCA (1A32A4) Detailed Circuit Theory . . . . . . . . . . . . . . . 2-113
2.3.2.31.5 Regulator CCA (1A32A5) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . 2-113
2.3.2.31.6 Switch CCA (1A32A6) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-113
MODEL 1119 DME
iv REV. D December, 2002
TABLE OF CONTENTS (Continued)
SECTION 2. TECHNICAL DESCRIPTION (Continued)
Paragraph Description Page
2.3.2.31.7 Surge Limiter CCA (1A32A7) Detailed Circuit Theory . . . . . . . . . . . . . . . . . . . . . . 2-103
2.3.2.32 Fan Assembly (1A33) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-113
2.3.2.33 Circulator Assembly (950086-0000) Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . 2-114
2.3.2.34 Temperature Sensor Circuit Theory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-115
SECTION 3. OPERATION
3.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2 CONTROLS AND INDICATORS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2.1 Test Panel Assembly (1A1) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
3.2.2 Monitor Control Assembly (1A2) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . 3-7
3.2.3 Transponder Control Panel Assembly (1A19) Controls and Indicators . . . . . . . . . . . . 3-7
3.2.4 Power Panel Assembly (1A29) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . 3-9
3.2.5 Remote Control Interface (1A18) Controls and Indicators (Optional) . . . . . . . . . . . . 3-11
3.3 TURN ON AND CHECKOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
3.3.1 Independent (without Video Terminal) Turn On and Checkout . . . . . . . . . . . . . . . . . 3-13
3.3.1.1 Dual System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-13
3.3.2 Video Terminal Initial Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
3.3.2.1 Dependent (with Video Terminal) Turn On and Checkout . . . . . . . . . . . . . . . . . . . . . 3-14
3.3.3 Changing Password . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
3.3.4 Changing Station Identifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
3.3.5 Changing Station Phone Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
3.3.6 Changing Input Power Parameter Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
3.3.7 Changing Low Power Shutdown Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18
3.3.8 Changing System Parameter Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-19
3.3.9 Entering/Exiting the FORTH Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.4 REMOTE MONITORING AND CONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.4.1 Remote Status and Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-20
3.4.2 Remote Maintenance Monitor System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.4.2.1 Modem Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.5 EQUIPMENT SHUTDOWN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21
3.6 COMMAND WORDS and DEFINITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
3.6.1 COMM Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
3.6.2 PASS Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24
3.6.3 Quest Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-24
3.6.4 Service Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-29
3.6.4.1 Service Vocabulary Dual DME Command Words . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
MODEL 1119 DME
REV. D December, 2002 v
TABLE OF CONTENTS (Continued)
SECTION 3. OPERATION (Continued)
Paragraph Description Page
3.6.4.2 Service Vocabulary Hardware Debugging Command Words . . . . . . . . . . . . . . . . . . . 3-31
3.6.4.3 Service Vocabulary Modem Control Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-38
3.6.4.4 Service Vocabulary RMM Calibration Control Words . . . . . . . . . . . . . . . . . . . . . . . . 3-39
3.6.4.5 Service Vocabulary Test Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-39
3.6.4.6 Service Vocabulary Test Parameter Command Words . . . . . . . . . . . . . . . . . . . . . . . . 3-42
3.6.4.7 Service Vocabulary Analog Command Words . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-42
3.6.4.8 Service Vocabulary Analog Parameter Command Words . . . . . . . . . . . . . . . . . . . . . . 3-43
3.6.4.9 Service Vocabulary RMM Calibration Control Words . . . . . . . . . . . . . . . . . . . . . . . . 3-44
3.6.4.10 Service Vocabulary RMM Time Delay Control Words . . . . . . . . . . . . . . . . . . . . . . . . 3-45
3.6.4.11 Service Vocabulary Calendar and Clock Command Words . . . . . . . . . . . . . . . . . . . . 3-46
3.6.5 System Vocabulary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-48
3.6.6 Alphabetical Listing of 1119 DME Vocabulary Words and Definitions . . . . . . . . . . . 3-49
SECTION 4. STANDARDS AND TOLERANCES
4.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.2 STANDARDS AND TOLERANCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4.3 INTERCONNECTION CABLE REQUIREMENTS . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
SECTION 5. PERIODIC MAINTENANCE
5.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5.2 PERFORMANCE CHECKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5.3 OTHER ONSITE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
5.4 OFFSITE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
SECTION 6. MAINTENANCE PROCEDURES
6.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.2 PERFORMANCE CHECK PROCEDURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-1
6.2.1 Performance Check Test Equipment and Switch Position Settings . . . . . . . . . . . . . . . . 6-1
6.2.2 1119 DME Minimum Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-5
6.2.3 Low Voltage Power Supply (1A13/1A28) Performance Check . . . . . . . . . . . . . . . . . 6-11
6.2.4 Test Unit Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-11
6.2.5 Monitor RF Signal Generator Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-12
MODEL 1119 DME
vi REV. D December, 2002
TABLE OF CONTENTS (Continued)
SECTION 6. MAINTENANCE PROCEDURES
Paragraph Description Page
6.2.6 Monitor A and Signal Generator Video Performance Check . . . . . . . . . . . . . . . . . . . 6-13
6.2.7 Monitor B CCA (1A12) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-16
6.2.8 RF Signal Generator Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-21
6.2.9 IF Amplifier Assembly (1A24) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . 6-22
6.2.10 Decoder CCA (1A25) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-24
6.2.11 Keyer CCA (1A26) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-26
6.2.12 Transmitter Video CCA (1A27) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . 6-27
6.2.13 Power Amplifier Assembly (1A32) Performance Check . . . . . . . . . . . . . . . . . . . . . . . 6-29
6.2.14 High Voltage Power Supply (1A14) Performance Check . . . . . . . . . . . . . . . . . . . . . . 6-30
6.2.15 +28 VDC Power Supply (1A30) Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . 6-30
6.2.16 Battery Performance Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-31
6.2.17 Power Control Performance Check (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-32
6.2.18 Transfer Performance Check (Dual 1119 Systems Only) . . . . . . . . . . . . . . . . . . . . . . 6-33
6.3 OTHER MAINTENANCE PROCEDURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-34
6.3.1 Quarterly Visual Inspection of DME System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-34
6.3.2 Annual Visual Inspection of DME Antenna System . . . . . . . . . . . . . . . . . . . . . . . . . . 6-35
6.3.3 Annual Visual Inspection of DME Cabinet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-35
6.4 SPECIAL MAINTENANCE PROCEDURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-35
6.4.1 RF Generator Assembly (1A8/1A23) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-39
6.4.1.1 Checking RF Generator Assembly (1A8/1A23) Channel Frequency . . . . . . . . . . . . . 6-39
6.4.1.2 Selecting RF Generator Assembly (1A8/1A23) Channel Frequency . . . . . . . . . . . . . 6-42
6.4.2 Diode Modulator Assembly (1A9) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-43
6.4.3 Signal Generator Video CCA (1A10) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-44
6.4.4 Monitor A CCA (1A11) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-47
6.4.5 Preselector Assembly (1A20) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-54
6.4.6 First Mixer Assembly (1A21) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56
6.4.7 IF Amplifier Assembly (1A24) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-56
6.4.8 IF Amplifier Assembly (1A24) Echo Suppression Alignment . . . . . . . . . . . . . . . . . . 6-61
6.4.9 Decoder CCA (1A25) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-62
6.4.10 Keyer CCA (1A26) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-63
6.4.10.1 Keyer CCA (1A26) Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-64
6.4.10.2 Keyer (1A26) Alignment Procedures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-65
6.4.11 Transmitter Video CCA (1A27) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-68
6.4.12 Detector (1A4/1A5) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-69
6.4.13 Power Amplifier Assembly (1A32) Detailed Field Alignment Procedure . . . . . . . . . 6-72
6.4.14 Monitor B (1A12) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-76
6.4.15 RMM CALIBRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-80
MODEL 1119 DME
REV. D December, 2002 vii
TABLE OF CONTENTS (Continued)
SECTION 6. MAINTENANCE PROCEDURES (Continued)
Paragraph Description Page
6.4.16 Power Measurement CCA (1A1A3) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-83
6.4.17 Speaker Volume Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-83
6.4.18 +28 Vdc Power Supply (1A30) Output Adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . 6-84
6.4.19 High Voltage Power Supply (1A14) Output Adjustment . . . . . . . . . . . . . . . . . . . . . . 6-85
6.4.20 Low Battery Shutdown Voltage Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-86
6.5 OTHER MAINTENANCE INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-87
6.5.1 Jumper and Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-87
6.5.1.1 Monitor RF Signal Generator (1A8) Switch Setting . . . . . . . . . . . . . . . . . . . . . . . . . . 6-87
6.5.1.2 Signal Generator Video (1A10) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-87
6.5.1.3 Monitor A (1A11) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-88
6.5.1.4 Monitor B CCA (1A12) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-88
6.5.1.4.1 Monitor B CCA (012001) (1A12) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-88
6.5.1.4.2 Monitor B CCA (012019) (1A12) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-89
6.5.1.5 CPU CCA (1A15) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-89
6.5.1.5.1 CPU CCA (012733-1001) (1A15) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-90
6.5.1.6 Interface CCA (1A17) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-91
6.5.1.7 Transmitter RF Generator (1A23) Switch Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-91
6.5.1.8 IF Amplifier (1A24) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-91
6.5.1.9 Decoder CCA (1A25) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-91
6.5.1.10 Keyer CCA (1A26) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-92
6.5.1.11 Transmitter Video CCA (1A27) Jumper Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-92
6.6 Frequency or Channel Change Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-92
6.6.1 Frequency Change . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-92
6.6.2 Conversion from X-channel to Y-channel 6-93 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-93
6.6.2.1 RF Generator Assembly (1A8/1A23) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-93
6.6.2.2 Signal Generator Video CCA (1A10) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-94
6.6.2.3 Monitor A CCA (1A11) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-95
6.6.2.4 IF Amplifier Assembly (1A24) and Preselector (1A20) Alignment . . . . . . . . . . . . . . 6-99
6.6.2.5 Decoder CCA (1A25) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-102
6.6.2.6 Transmitter Video CCA (1A27) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-102
6.6.2.7 Power Amplifier Assembly (1A32) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-103
6.6.2.8 Monitor A CCA (1A11) Search Pulse Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-103
6.6.2.9 PRF Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-104
6.6.2.10 Monitor B CCA (1A12) Half Power Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-104
6.6.2.11 Receiver Sensitivity Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-105
6.6.2.12 RMM Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-106
6.6.3 Conversion from Y-Channel to X-Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-107
6.6.3.1 RF Generator Assembly (1A8/1A23) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-107
6.6.3.2 Signal Generator Video CCA (1A10) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . 6-107
MODEL 1119 DME
viii REV. D December, 2002
TABLE OF CONTENTS (Continued)
SECTION 6. MAINTENANCE PROCEDURES (Continued)
Paragraph Description Page
6.6.3.3 Monitor A CCA (1A11) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-108
6.6.3.4 IF Amplifier Assembly (1A24) and Preselector (1A20) Alignment . . . . . . . . . . . . . 6-112
6.6.3.5 Decoder CCA (1A25) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-115
6.6.3.6 Transmitter Video CCA (1A27) Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-115
6.6.3.7 Power Amplifier Assembly (1A32) Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-116
6.6.3.8 Monitor A CCA (1A11) Search Pulse Alignment . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-116
6.6.3.9 PRF Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-116
6.6.2.10 Monitor CCA (1A12) Half Power Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-117
6.6.3.11 Receiver Sensitivity Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-117
6.6.3.12 RMM Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-117
SECTION 7. CORRECTIVE MAINTENANCE
7.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7.2 TEST EQUIPMENT REQUIRED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7.3 ON-SITE CORRECTIVE MAINTENANCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7.3.1 General Troubleshooting Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-2
7.4 OFF-SITE REPAIRS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
7.5 OVERHAUL, MAINTENANCE, AND REPAIR STANDARDS . . . . . . . . . . . . . . . 7-10
7.6 PACKING INSTRUCTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-10
SECTION 8. PARTS LIST
Paragraph Description Page
8.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
SECTION 9. INSTALLATION
9.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2 SITE INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.1 Site Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.1.1 Terrain Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.1.2 Obstructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-1
9.2.2 Shelter Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.3 UNPACKING AND REPACKING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.3.1 Environmental Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
MODEL 1119 DME
REV. D December, 2002 ix
TABLE OF CONTENTS (Continued)
SECTION 9. INSTALLATION (Continued)
Paragraph Description Page
9.4 INPUT REQUIREMENT SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.5 INSTALLATION PROCEDURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.5.1 Installation Tools and Test Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.5.2 Installation Kits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-3
9.5.3 Shelter Foundation Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.5.4 Shelter Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9.5.5 Tower Foundation and Tower Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.6 Shelter and Tower Installation Grounding Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.7 Air Conditioner Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.8 DME Transmitter Cabinet Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.9 Battery Backup Assembly Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-5
9.5.10 Primary AC Power Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-6
9.5.11 DME/ILS Collocation Keying Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-9
9.5.12 Triangular Tower Adapter Plate Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-12
9.5.13 Shelter to Tower Conduit Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-12
9.5.14 Obstruction Light Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-13
9.5.15 Obstruction Light Power Cable Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
9.5.16 DME Antenna Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
9.5.17 1119 DME Transmitter to Antenna Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-19
9.5.17.1 Single 1119 DME Transmitter to Antenna Interconnect . . . . . . . . . . . . . . . . . . . . . . . 9-22
9.5.17.2 Dual DME Interconnection (Dual Systems Only use 470100-0001 kit) . . . . . . . . . . . 9-22
9.5.18 Gluing 2" PVC Conduit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-22
9.5.19 1119 DME to Optional RSCU Interconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-22
9.5.20 VOR/DME Collocation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9.5.21 Connecting VOR/DME Keyer Wiring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9.6 INSPECTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9.7 INITIAL START-UP AND PRELIMINARY TESTING . . . . . . . . . . . . . . . . . . . . . . 9-23
9.7.1 Input Voltage Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-23
9.7.2 +28 Vdc Power Supply (1A30) Output Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-24
9.7.3 Low Voltage Power Supply (1A13/1A28) Installation . . . . . . . . . . . . . . . . . . . . . . . . 9-24
9.7.4 Setting Station Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-26
9.7.5 Installing Modules in Transmitter Cabinet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-29
9.7.6 Video Terminal Hookup and Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-29
9.7.7 Turn on Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-30
9.7.9 Limit Data Checks And Modification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-32
SECTION 10. COMPUTER SOFTWARE
10.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10-1
SECTION 11. TROUBLESHOOTING SUPPORT DATA
11.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1
MODEL 1119 DME
x REV. D December, 2002
LIST OF ILLUSTRATIONS
Figure Description Page
1-1 Single 1119 DME. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2
1-2 Dual 1119 DME. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1-3 Model 1119 DME Antenna (Typical). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1-4 Model 1119 DME Module Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-5
2-1 Basic DME System Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2-2 DME Transponder Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2-3 System Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6
2-4 Model 1119 DME Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-7
2-5 Time Interval CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-13
2-6 Power Measurement CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17
2-7 Steering Logic CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-19
2-8 RF Generator Assembly Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25
2-9 VCO Buffer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26
2-10 Synthesizer CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
2-11 Diode Modulator Assembly Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31
2-12 Signal Generator Video Simplified Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2-34
2-13 Signal Generator Video Pulse Timing (X-Channel) . . . . . . . . . . . . . . . . . . . . . . . . . . 2-36
2-14 Monitor A CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-39
2-15 Monitor A Pulse Timing (X-Channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-41
2-16 Monitor B CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-45
2-17 CPU CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-51
2-18 DME System Interface CCA Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-58
2-19 1119 DME Bypass Interconnect Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-63
2-20 Control Interface CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-64
2-21 IF Amplifier Assembly Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-69
2-22 Half-Amplitude Finder Narrow Pulse Rejection and Echo Suppression . . . . . . . . . . . 2-73
2-23 Timing Diagram for Half-Amplitude Finder with Short Distance Echo
Suppression Enabled. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-74
2-24 Timing Diagram for Half-Amplitude Finder with Short Distance Echo
Suppression Disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-75
2-25 Timing Diagram for Narrow Pulse Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-77
2-26 Decoder CCA Block Diagram (012380-0000 Version) . . . . . . . . . . . . . . . . . . . . . . . . 2-78
2-27 Decoder CCA Simplified Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-81
2-28 Decoder CCA 1st Pulse Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-83
2-29 Decoder CCA 2nd Pulse Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-84
2-30 Keyer CCA Block Diagram (012380-0001 Version) . . . . . . . . . . . . . . . . . . . . . . . . . . 2-89
2-31 Keyer CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-91
2-32 Simplified Keyer Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-94
2-33 Transmitter Video CCA Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-97
2-34 Power Amplifier Assembly Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-107
2-35 Signal Routing Through the Circulator Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-114
MODEL 1119 DME
REV. D December, 2002 xi
LIST OF ILLUSTRATIONS (Continued)
Figure Description Page
3-1 Test Panel Assembly (1A1) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
3-2 Monitor Control Assembly (1A2) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . 3-5
3-3 Transponder Control Panel Assembly (1A19) Controls and Indicators . . . . . . . . . . . . 3-8
3-4 Power Panel Assembly (1A29) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-5 Remote Control Interface (1A18) Controls and Indicators. . . . . . . . . . . . . . . . . . . . . . 3-11
3-6A Typical TEST.A Command Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32
3-6B Typical TEST.A Command Readout with Malfunction Test Channel #1 . . . . . . . . . . 3-33
3-6C Typical TEST.B Command Readout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-34
3-6D Typical TEST.B Command Readout with Malfunction Test Channel #3 . . . . . . . . . . 3-35
3-7A VIA2 Port A Data and Explanation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-36
3-7B VIA2 Port B Data and Explanation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-36
3-8A VIA2 Port A Data and Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37
3-8B VIA2 Port B Data and Explanation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-38
6-1 Monitor B CCA Component Location Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-17
6-2 DME Cabinet with Power Panel Lowered. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-18
6-3 Peak Rider Pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-23
6-4 RF Generator Assembly Component Location Guide . . . . . . . . . . . . . . . . . . . . . . . . . 6-41
6-5 Power Measurement CCA, Rear View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-46
6-6 Monitor A CCA Component Location Guide. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-49
6-7 Half-Amplitude Finder Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-50
6-8 Preselector Alignment Presets in Inches. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-54
6-9 Preselector Alignment Presets in Centimeters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-55
6-10 Keyer CCA Component Location Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-67
6-11 Equipment Setup for Peak Power Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-71
6-12 Power Amplifier Assembly Component Location Diagram . . . . . . . . . . . . . . . . . . . . 6-74
6-13 Cabinet Interface Connections Using Power Supply Part No. 950572-0001 . . . . . . . 6-85
6-14 CPU CCA (012775-1001) Component Location Guide . . . . . . . . . . . . . . . . . . . . . . . 6-90
7-1 DET TX Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-7
7-2 Waveform 1A24-TP1 Decoder Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-11
7-3 Waveform 1A24-TP2 Short Distance Echo Suppression (SDES) . . . . . . . . . . . . . . . . 7-11
7-4 Waveform 1A24-TP3 Narrow Pulse Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12
7-5 Waveform 1A24-TP4 Peak Rider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-12
7-6 Waveform 1A24-TP5 Delayed Interrogation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-13
7-7 Waveform 1A24-TP4 Peak Rider and 1A24-TP5 Delayed Interrogation . . . . . . . . . . 7-13
7-8 Waveform 1A24-TP6 Long Distance Echo Suppression (LDES) Gate . . . . . . . . . . . 7-14
7-9 Waveform 1A24-TP8 ON-Channel Gate Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-14
7-10 Waveform 1A24-TP10 Narrow Band Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15
7-11 Waveform 1A24-TP11 Second Mixer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-15
7-12 Waveform 1A24-TP12 Log Video . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
MODEL 1119 DME
xii REV. D December, 2002
LIST OF ILLUSTRATIONS (Continued)
Figure Description Page
7-13 Waveform 1A25-TP2 Decoder Clock Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-16
7-14 Waveform 1A25-TP3 Decode Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
7-15 Waveform 1A25-TP4 Dead Time Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-17
7-16 Waveform 1A25-TP5 Squitter Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-18
7-17 Waveform 1A25-TP6 Decoder Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-18
7-18 Waveform 1A25-TP7 Decoder Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-19
7-19 Waveform 1A27-TP1 Decodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-19
7-20 Waveform 1A27-TP2 Encode Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-20
7-21 Waveform 1A27-TP3 1350-Hz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-20
7-22 Waveform 1A9-TP1 Diode Mod Shaped Pulse Input . . . . . . . . . . . . . . . . . . . . . . . . . 7-21
7-23 Waveform 1A9-TP2 Diode Modulator Detected Interrogation . . . . . . . . . . . . . . . . . . 7-21
7-24 Waveform 1A10-TP1 Signal Generator Video Start Pulse . . . . . . . . . . . . . . . . . . . . . 7-22
7-25 Waveform 1A10-TP2 Delay Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-22
7-26 Waveform 1A10-TP3 Efficiency Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-23
7-27 Waveform 1A10-TP4 Alternate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-23
7-28 Waveform 1A10-TP5 50-MHz Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-24
7-29 Waveform 1A10-TP6 Diode Modulator Shaped Pulse . . . . . . . . . . . . . . . . . . . . . . . . 7-24
7-30 Waveform 1A11-TP2 Composite Half-Amplitude Input . . . . . . . . . . . . . . . . . . . . . . 7-25
7-31 Waveform !a11-TP3 Delayed Pulses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-25
7-32 Waveform 1A11-TP4 Peak Rider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-26
7-33 Waveform 1A11-TP3 (Channel 1) Delayed Pulses
1A11-TP4 (Channel 2) Peak Rider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-26
7-34 Waveform 1A11-TP5 Half-Amplitude Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-27
7-35 Waveform 1A11-TP6 Interrogation Inhibit Pulse Pair . . . . . . . . . . . . . . . . . . . . . . . . 7-27
7-36 Waveform 1A11=TP5 (Channel 1) Half-Amplitude Trigger
1A11-TP9 (Channel 2) First Interrogation Pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-28
7-37 Waveform 1A11-TP5 (Channel 1) Half-Amplitude Trigger
1A11-TP11 (Channel 2) Delay Gate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-29
7-38 Waveform 1A11-TP7 1350-Hz Tone . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-29
9-1 Typical DME Site . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-2
9-2 Typical DME Tower Installation Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-7
9-3 Triangular Tower Adapter Plate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-8
9-4 Typical DME Shelter and Tower Grounding Diagram . . . . . . . . . . . . . . . . . . . . . . . . 9-10
9-5 Typical Unistrut Layout for Interior Shelter Wall . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-11
9-6 Typical Single DME Transmitter to Shelter Wall Installation . . . . . . . . . . . . . . . . . . . 9-12
9-7 Typical Dual DME Transmitter to Shelter Wall Installation . . . . . . . . . . . . . . . . . . . . 9-14
9-8 Typical Single DME Transmitter Cabinet Installation . . . . . . . . . . . . . . . . . . . . . . . . 9-15
9-9 Typical Dual DME Transmitter Cabinet Installation . . . . . . . . . . . . . . . . . . . . . . . . . . 9-16
9-10 Cabinet Interface Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-17
9-11A DME Obstruction Light 120 Vac Interconnect Diagram . . . . . . . . . . . . . . . . . . . . . . . 9-18
MODEL 1119 DME
REV. D December, 2002 xiii
LIST OF ILLUSTRATIONS (Continued)
Figure Description Page
9-11B DME Obstruction Light 240 Vac Interconnect Diagram (International Use Only) . . . 9-18
9-12 Typical Threaded Conduit Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-19
9-13 Typical Shelter to Tower Conduit Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-20
9-14 Obstruction Light Installation Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-21
9-15 1119 DME Module Location Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-25
11-1 Single 1119 DME RF Interconnect Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-5
11-2 Dual 1119 DME RF Interconnect Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
11-3 1119 DME Interconnect Diagram 001119-9001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-9
11-4 Monitor B CCA (1A12) Schematic Diagram 012001-9001 . . . . . . . . . . . . . . . . . . . 11-29
11-5 Decoder CCA (1A25) (Sheets 1 & 2) Schematic Diagram 012380-9001 . . . . . . . . . 11-31
11-6 Display CCA (1A1A1) Schematic Diagram 012390-9001 . . . . . . . . . . . . . . . . . . . . 11-35
11-7 Steering Logic CCA (1A1A4) Schematic Diagram 012391-9001 . . . . . . . . . . . . . . . 11-37
11-8 Signal Generator Video (1A10) (Sheets 1 & 2) Schematic Diagram 012394-9001 . 11-39
11-9 Time Interval CCA (1A1A2) Schematic Diagram 012398-9001 . . . . . . . . . . . . . . . 11-43
11-10 Power Measurement CCA (1A1A3) Schematic Diagram 012400-9001 . . . . . . . . . . 11-45
11-11 Input Power Monitor/Watchdog CCA (1A29A2) Schematic Dia 012406-9004 . . . . 11-47
11-12 Synthesizer CCA (1A8A1/1A23A1) Schematic Diagram 012423-9001 . . . . . . . . . . 11-49
11-13 Voltage and Scaling CCA (1A29A1) Schematic Diagram 012547-9001 . . . . . . . . . 11-51
11-14 Interface CCA (1A17) Schematic Diagram 012573-9001 . . . . . . . . . . . . . . . . . . . . . 11-53
11-15 Transfer Logic CCA (1A7A1) Schematic Diagram 012589-9001 . . . . . . . . . . . . . . 11-55
11-16 Transmitter Video CCA (1A27) (Sheets 1 through 3) Schematic
Diagram 012629-9001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-57
11-17 Monitor A CCA (1A11) (Sheets 1 through 4) Schematic Diagram 012668-9001 . . 11-63
11-18 Low Voltage Power Supply (1A13/1A28) Schematic Diagram 012670-9001 . . . . . 11-71
11-19 CPU CCA (1A15) Schematic Diagram (old version) 012733-9001 . . . . . . . . . . . . . 11-73
11-20 Microprocessor CCA (1A15) Schematic Diagram (new version) 012775-9001 . . . . 11-75
11-21 Keyer CCA (1A26) Schematic Diagram 012735-9001 . . . . . . . . . . . . . . . . . . . . . . . 11-77
11-22 DME System Interface CCA (1A16) Schematic Diagram 012740-9001 . . . . . . . . . 11-79
11-23 Control Interface CCA (1A18) Schematic Diagram 012741-9001 . . . . . . . . . . . . . . 11-81
11-24 Detector Assembly (1A4/1A5) 030204-9001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-83
11-25 First Mixer Assembly (1A21) Schematic Diagram 030205-9001 . . . . . . . . . . . . . . . 11-85
11-26 RF Generator Assembly (1A8/1A23) Schematic Diagram 030207-9001 . . . . . . . . . 11-87
11-27 IF Amplifier Assembly (1A24) (Sheets 1 through 4) Schematic
Diagram 030210-9001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-89
11-28 Calibration Attenuator Assembly (1A3) Schematic Diagram 030211-9001 . . . . . . . 11-97
11-29 Diode Modulator Assembly (1A9) Schematic Diagram 030215-9001 . . . . . . . . . . . 11-99
11-30 Power Control Panel Assembly (1A29) Schematic Diagram 030218-9001 . . . . . . 11-101
11-31 Power Amplifier (1A32) (Sheets 1 through 5) Schematic Diagram 030312-9001 . 11-103
11-32 Monitor Transfer Assembly (1A7) Schematic Diagram 030345-9001 . . . . . . . . . . 11-113
11-33 Current Limiter (1A31) Schematic Diagram 030347-9001 . . . . . . . . . . . . . . . . . . . 11-115
MODEL 1119 DME
xiv REV. D December, 2002
LIST OF ILLUSTRATIONS (Continued)
Figure Description Page
11-34 Dual DME Interconnect Diagram 470100-0002 . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-117
11-35 Typical 8' x 10' Shelter Schematic 600011 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-119
11-36 DME-RSCU Interface Schematic Diagram 070412-9001 . . . . . . . . . . . . . . . . . . . . 11-121
11-37 High Voltage Power Supply Assembly (1A14) Schematic Diagram 030418-9001 11-123
11-38 VOR/DME Interconnect Diagram 470222-9001 . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-125
11-39 Battery Back-Up Installation Kit 470057-0001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-127
11-40 Kit, DME Antenna w/Rohn 45G Tower 470085-TAB . . . . . . . . . . . . . . . . . . . . . . 11-129
MODEL 1119 DME
REV. D December, 2002 xv
LIST OF TABLES
Table Description Page
1-1. Equipment Specification Data for 1119 DME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1-2. Equipment Specification Data for Standard 1119 DME Antenna.
(PN 950005-0001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18
1-2a. Equipment Specification Data for Narrow Beam 1119 DME Antenna.
(PN 950561-0000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-19
1-3. Equipment and Accessories Supplied for Single 1119 DME Systems . . . . . . . . . . . 1-20
1-4. Equipment and Accessories Supplied for Dual 1119 DME Systems. . . . . . . . . . . . . 1-21
1-5. 1119 DME Single and Dual Optional Equipment. . . . . . . . . . . . . . . . . . . . . . . . . . . 1-21
1-6. Equipment Required But Not Supplied. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-23
1-7. Reference Designator Conversion Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-24
1-8. Reference Designator Conversion Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-23
2-1 Jumper Description for Keyer CCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-96
3-1 Test Panel Assembly (1A1) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
3-2 Monitor Control Assembly (1A2) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . 3-6
3-3 Transponder Control Panel Assembly (1A19) Controls and Indicators. . . . . . . . . . . . . 3-9
3-4 Power Panel Assembly (1A29) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . . . 3-10
3-5 Remote Control Interface (1A18) Controls and Indicators . . . . . . . . . . . . . . . . . . . . . 3-12
3-6 Pass Vocabulary Command Words and Explanations. . . . . . . . . . . . . . . . . . . . . . . . . 3-23
3-7 Pass Vocabulary Command Words and Explanations . . . . . . . . . . . . . . . . . . . . . . . . . 3-24
3-8 Quest Vocabulary Command Words and Explanations . . . . . . . . . . . . . . . . . . . . . . . . 3-25
3-9 Service Vocabulry System Control Words and Explanations . . . . . . . . . . . . . . . . . . . 3-29
3-10 Service Vocabulary Dual DME System Control Words and Explanations . . . . . . . . . 3-30
3-11 Service Vocbulary Hardware Debugging Command Words and Explanatons . . . . . . 3-31
3-12 Service Vocabulary Communications Command Words and Explanations . . . . . . . . 3-38
3-13 Service Vocabulary RMM System Identification Command words and Explanations 3-39
3-14 Service Vocabulary Test Command Words and Explanations . . . . . . . . . . . . . . . . . . 3-40
3-15 Service Vocabulary Test Parameter Words and Explanations . . . . . . . . . . . . . . . . . . . 3-42
3-16 Service Vocabulary Analog Parameter Command Words and Explanations. . . . . . . . 3-42
3-17 Service Vocabulary Analog Parameter Words and Explanations . . . . . . . . . . . . . . . . 3-44
3-18 Service Vocabulary RMM Calibration Words and Explanations. . . . . . . . . . . . . . . . . 3-44
3-19 Service Vocabulary RMM Time Delay Control Words and Explanations. . . . . . . . . . 3-45
3-20 System Vocabulary Calendar and Clock Command Words and Explanations . . . . . . 3-47
3-21 System Vocabulary Command Words and Explanations . . . . . . . . . . . . . . . . . . . . . . 3-49
3-22 Alphabetical Listing of 1119 DME Vocabulary Words and Explanations . . . . . . . . . 3-49
4-1 System Standards and Tolerances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
4-2 Remote Monitor Alarm Thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
5-1 Performance Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
5-2 Other Maintenance Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3
MODEL 1119 DME
xvi REV. D December, 2002
LIST OF TABLES (Continued)
Table Description Page
6-1 Equipment Required for Performance Check Procedures . . . . . . . . . . . . . . . . . . . . . . . 6-2
6-2 Switch Positions for Normal Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-2
6-3 Switch Positions for Performance Checks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-3
6-4 Extender Cables and Extender CCAs Required for Performance Check
and Alignment Procedures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-4
6-5 Monitor Test Spac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
6-6 Monitor Test Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-7
6-7 Monitor Test Spac . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
6-8 Monitor Test Delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-14
6-9 Switch Positions for Alignment Procedures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-36
6-10 Maintenance Procedures vs. Assembly Replacement . . . . . . . . . . . . . . . . . . . . . . . . . 6-37
6-11 Equipment Required for Alignment and Adjustments . . . . . . . . . . . . . . . . . . . . . . . . . 6-39
6-12 Morse Code Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6-64
7-1 Test Equipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-1
7-2 Initial Switch Positions for Corrective Maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-3
7-3 1119 DME On-Site Corrective Maintenance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-4
7-4 Assembly or CCA Signals and Voltage Levels. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7-30
8-1 Single 1119 DME Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-1
8-2 Dual 1119 DME Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8-2
8-3 Indented Parts List for Part Number 001119-0102 and 470191-0001 . . . . . . . . . . . . . . 8-4
9-1 Special Tools Required for Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-4
9-2 Component or Modification Kits Required to Install the 1119 DME . . . . . . . . . . . . . . 9-4
9-3 Additional kits required to Install Shelter and Tower Grounding Systems . . . . . . . . . . 9-4
9-4 Frequency Setup Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-28
9-5 Switch Positions for Turnon Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9-30
11-1 Schematic Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-1
MODEL 1119 DME
Rev. D December, 2002 1-1
SECTION 1. GENERAL INFORMATION AND REQUIREMENTS
1.1 INTRODUCTION.- This manual provides the data required to operate and maintain the single or dual
Model 1119 Distance Measuring Equipment (DME). Figure 1-1 shows a single 1119 DME, Figure 1-2
shows a dual 1119 DME, Figure 1-3 shows the DME Antenna, and Figure 1-4 shows the layout of the
various modules within the transmitter cabinet(s). Included are equipment description and specifications,
block diagram theory of operation, detailed theory of operation, operating procedures, standards and
tolerances, periodic maintenance procedures, corrective maintenance procedures, parts list, installation
procedures, schematics, and other diagrams.
1.2 EQUIPMENT DESCRIPTION.- The DME system is comprised of a DME ground station and on-board
equipment in the aircraft. An interrogator in the aircraft transmits signals to the ground station. The DME
evaluates the interrogation pulses, and if they are valid, transmits a reply on a different frequency. The
interrogator measures the elapsed time for the round trip and converts this time to a distance indication (in
nautical miles). An identification signal is transmitted by the DME approximately every 30 seconds;
therefore, the pilot can positively identify the selected station. Each interrogator transmits interrogation
pulse pairs at a constant rate and listens for replies from the ground station. Interrogations and replies have
a time-distance relationship. For the airborne DME to display a distance, several successive time-distance
interrogation replies must be received by the interrogator. When distance is displayed, the system condition
is known as "lock-on". Other interrogations will not affect the system, because the time-distance
relationship is not correct. The 1118 DME can be interrogated simultaneously by a maximum of 100 aircraft
interrogators (within range and tuned to its channel).
The 1119 DME is normally collocated with a VOR as an enroute navigation aid. It may be collocated with
an ILS for a terminal application. Identification of the DME is synchronized to the respective collocated
facility or the DME may be configured to ident by itself through the use of a built-in keyer.
1.2.1 Electronics Cabinet.- Refer to Figure 1-1. The single Model 1119 DME is contained in one (1)
wall-mounted electronics cabinet. The electronics cabinet is 19 inches wide, 12-1/4 inches deep, and 42
inches high. A key-lockable front panel door covers all equipment except the Monitor/Test display panel
and the Power Panel Assembly. This feature allows non-technical personnel to observe the equipment
operation and take meter readings (yet prohibits them from making any adjustments). The Model 1119 is
100% solid-state. Its internal circuitry is contained on plug-in type printed circuit board assemblies (CCAs)
or RF modules.
Refer to Figure 1-2. The dual Model 1119 DME is contained in two (2) wall-mounted electronics cabinets,
each of which is 19 inches wide, 12-1/4 inches deep, and 42 inches high. A key-lockable front panel door
covers all equipment except the Test Panel Assembly and the Power Panel Assembly. This feature allows
non-technical personnel to observe equipment operation and take meter readings yet, prohibits them from
making any adjustments. The Model 1119 DME is 100% solid-state. Its internal circuitry is contained on
plug-in type printed circuit card assemblies (CCAs) or RF modules.
MODEL 1119 DME
1-2 Rev. D December, 2002
Figure 1-1. Single 1119 DME.
MODEL 1119 DME
Rev. D December, 2002 1-3
Figure 1-2. Dual 1119 DME.
MODEL 1119 DME
1-4 Rev. D December, 2002
Figure 1-3. Model 1119 DME Antenna (Typical).
MODEL 1119 DME
Rev. D December, 2002 1-5
Figure 1-4. Model 1119 DME Module Layout.
Refer to Figure 1-4. The figure shows the layout of the various modules in the Model 1119 DME cabinet.
The paragraphs on the following pages provide a brief description of each of the modules and its function
in the system. Note that two cabinets are used for dual equipment systems.
MODEL 1119 DME
1-6 Rev. D December, 2002
1.2.1.1 Test Panel Assembly (1A1).- The Test Panel Assembly is located in the upper portion of the DME
cabinet and contains the Status Normal, Bypass, Shutdown, Test Normal, and Test indicator lamps. It also
contains the RESET, TEST SELECT, and DISPLAY switches, as well as a digital (LED) display readout.
The Test Panel Assembly is hinged and can be opened to gain access to the rear and to those assemblies,
components and cables mounted in the top of the DME cabinet.
1.2.1.1.1 Display CCA (1A1A1).- The Display CCA is located behind the Test Panel Assembly on circular
spacers. It receives various input signals from the Steering Logic CCA and provides a digital readout
according to the position of the TEST SELECT switch. The Display CCA has a twelve (12) pin connector
that connects to the Test Panel Assembly and the main wiring harness.
1.2.1.1.2 Time Interval CCA (1A1A2).- The purpose of the Time Interval CCA is to measure time in 10
nano (n) second increments between start and stop pulses. The Time Interval CCA is located behind the
Test Panel Assembly on hexagon shaped standoffs and has a 12 pin connector that connects to the TEST
SELECT switch and a thirty (30) pin connector that connects to the main wiring harness.
1.2.1.1.3 Power Measurement CCA (1A1A3).- The Power Measurement CCA generates signals
proportional to the detected RF power. The Power Measurement CCA is located behind the Test Panel
Assembly on hexagon shaped standoffs and has a 12 pin connector that connects to the main wiring harness.
1.2.1.1.4 Steering Logic CCA (1A1A4).- The Steering Logic CCA is located behind the Test Panel
Assembly on hexagon shaped standoffs. It provides data for time interval measurement and for display on
the Test Panel Assembly. The CCA has a 12 pin connector that connects to the TEST SELECT switch and
a 30 pin connector that connects to the main wiring harness.
1.2.1.2 Monitor Control Assembly (1A2).- The Monitor Control Assembly is located below the Test Panel
Assembly and contains the DISPLAY ON/NORMAL switch, MONITOR TEST DELAY, SPAC, and
ON/NORMAL controls, SIGNAL GENERATOR FREQ, PRF, SPAC, CW, and NORMAL controls,
CALIBRATION ATTENUATOR control, and MONITOR NORMAL, FAULT, and ON indicators.
1.2.1.3 Calibrated Attenuator Assembly (1A3).- The Calibrated Attenuator Assembly is located behind the
Monitor Control Assembly and connects to the Calibrated Attenuator control via a metal shaft and gear
mechanism. The Calibrated Attenuator Assembly varies the RF output of the Diode Modulator Assembly
whenever the Signal Generator Video CCA is generating a % efficiency interrogation.
MODEL 1119 DME
Rev. D December, 2002 1-7
1.2.1.4 Detector Assembly (1A4/1A5).- There are two (2) Detector Assemblies in the 1118 DME. The
Monitor Detector Assembly is located behind the Test Panel Assembly on the rear wall of the cabinet insert
assembly, and the Transmitter Power Detector is located behind the Monitor Control Assembly. Each
Detector Assembly has 2 SMA type RF connectors, one (1) test point, and is hard wired to the main wiring
harness.
1.2.1.5 Directional Coupler Assembly (1A6).- The Directional Coupler Assembly is attached to the rear
wall of the cabinet insert assembly and is accessible when the Test Panel Assembly is opened. The
Directional Coupler has four (4) RF connectors.
1.2.1.6 Monitor Transfer Assembly (1A7) Dual Systems Only.- The Monitor Transfer Assembly is
responsible for system transfer when a fault is detected in the active system and connects to the main wiring
harness through 4 RF connectors and a twenty-five (25) pin D-shell connector. Indicators on the front of
the assembly indicate which system is actively connected to the antenna. The assembly is held in place by
a 1/4 turn fastener.
1.2.1.7 RF Generator Assembly (1A8).- The RF Generator Assembly produces the output frequency for
use within the monitor. The RF Generator has a fifteen (15) pin D-shell connector and 1 RF connector that
connect to the main wiring harness. The assembly is held in place by a 1/4-turn fastener.
1.2.1.8 Diode Modulator Assembly (1A9).- The Diode Modulator Assembly provides a simulated
interrogation which continually tests the transponder. The Diode Modulator has a 15 pin D-shell connector
and five (5) RF connectors that connect to the main wiring harness. The assembly is held in place by a 1/4-
turn fastener.
1.2.1.9 Signal Generator Video CCA (1A10).- The Signal Generator Video CCA provides various test
signals to other CCAs for test purposes. The Signal Generator CCA connects to the main wiring harness
via a thirty-six (36) pin edge connector and has five (5) test points for monitoring various signals. This CCA
has three (3) switches that control the pulse lengths of various signals used in the monitor interrogator
section of the DME.
1.2.1.10 Monitor A CCA (1A11).- The Monitor A CCA monitors the transponder replies for evaluation
of pulse spacing and reply delay. The Monitor A CCA connects to the main wiring harness via a thirty-six
(36) pin edge connector and has 12 test points for monitoring various signals. This CCA has six (6) switches
that control the pulse length of various timing signals used in the DME.
MODEL 1119 DME
1-8 Rev. D December, 2002
1.2.1.11 Monitor B CCA (1A12).- The Monitor B CCA monitors the transponder replies for evaluation of
pulse spacing, reply delay, reply efficiency, pulse repetition frequency (PRF), output power level and
identification. Single and dual-monitor versions of the Monitor B CCA are available depending on customer
requirements. The Monitor B CCA connects to the main wiring harness via a 36 pin edge connector and
has 1 test point for connection of external test equipment for monitoring. The single-monitor version has
2 momentary switches on the front panel; one for attenuation of the input power to the CCA for calibration
of the half-power alarm point and the other for display of previous faults when the system is in a
shutdown condition. Display indicators on the front panel include Spacing, Delay, PRF, Efficiency,
Power, Identification and system Overload. The dual-monitor version has two identical sets of switches and
display indicators on its front panel, one set for each of the two monitors.
1.2.1.12 Low Voltage Power Supply CCA (1A13/1A28).- The Low Voltage Power Supply provides
regulated +12, -12, and +5 Vdc for the 1118 DME transponder. Each Low Voltage Power Supply has 5 test
points for monitoring input and output voltages. The Low Voltage Power Supplies connect to the main
wiring harness via a thirty-six (36) pin edge connector.
1.2.1.13 Power Supply Assembly (1A14).- The High Voltage Power Supply Assembly (030418-0001)
provides + 62 V dc for operation of the Power Amplifier Assembly. The assembly consists of two (2)
separate modules located at the left end of the Transponder Control Assembly; a +12 V dc power supply
mounted on the (012654-0001) High Voltage Power Supply CCA, and a +50 V dc power supply mounted
directly on the chassis to the left of the CCA. The outputs of these two supplies are summed to provide the
required + 62 V dc. The High Voltage Power Supply CCA (012654-0001) connects to the main cabinet
wiring harness through a twenty-two (22) pin edge connector, and the + 50 V dc power supply connects, in
turn, to the High Voltage Power Supply CCA through a short cable and a 3-pin Molex connector. The High
Voltage Power Supply CCA contains 3 test points for monitoring the +50 V and +62 V dc Voltages.
1.2.1.14 CPU CCA (1A15).- The CPU CCA monitors the DME system. It collects information, measures
various system powers, checks for spacing and delay faults, and provides local and remote communication.
The CCA connects to the DME wiring harness through two multipin slip-on connectors and a main
motherboard connector; sixteen (16) pin, eighteen (18) pin, and sixty-four (64) pin, respectively. There are
2 versions of the CPU CCA. Model 1119 DME systems with serial number 264 or lower have CPU CCA
part number 012733-1001. Model 1119 DME systems with serial number 265 or higher have CPU CCA
part number 012775-1001.
1.2.1.15 DME System Interface CCA (1A16) Optional. The DME System Interface CCA functions as an
interface between the DME and the Control Interface CCA (1A18). When installed, the CCA connects to
the DME wiring harness through two multi-pin slip-on connectors and a main motherboard connector;
fourteen (14) pin, sixteen (16) pin, and sixty-four (64) pin respectively.
MODEL 1119 DME
Rev. D December, 2002 1-9
1.2.1.16 Interface CCA (1A17).- The Interface CCA provides an interface between the DME CPU CCA
and the Remote Maintenance Monitor (RMM). It connects to the DME wiring harness through two multi-
pin slip-on connectors and a main motherboard connector; eighteen (18) pin, twenty (20) pin, and sixty-four
(64) pin, respectively.
1.2.1.17 DME Control Interface Assembly (1A18) Optional.- The DME Control Assembly provides the
Remote Status Control Unit (RSCU) with information which is decoded and transformed into a visual
indication of the operating status of the DME system. It also receives control signals from the RSCU which
control various functions of the DME. When installed in a dual DME, The Control Assembly is always
located in DME System number 2. It connects to the DME wiring harness through two multi-pin slip-on
connectors and a main motherboard connector; ten (10) pin, twenty-four (24) pin, and sixty-four (64) pin,
respectively.
1.2.1.18 Transponder Control Panel Assembly (1A19).- The Transponder Control Panel Assembly contains
the CHASSIS POWER, FINAL HV, and IDENT switches, Power, Final HV indicators, and the Counter,
SG TRIG, and TX TRIG BNC type connectors.
1.2.1.19 Preselector Assembly (1A20).- The Preselector Assembly is a mechanically tuned filter that
discriminates against undesired input frequencies. The assembly is attached to the cabinet by 2 machine
screws. Three (3) tuning probes are located on the front of the Preselector Assembly and the Preselector
assembly has two (2) TNC type RF connectors.
1.2.1.20 First Mixer Assembly (1A21).- The First Mixer Assembly is contained in a subassembly module
that is attached to the cabinet frame and electrically connected to the Preselector Assembly via a coaxial
cable. This assembly has two (2) TNC type RF connectors, one SMA type RF connector, and one fourteen
(14) pin D-shell connector that connects to the main wiring harness.
1.2.1.21 RF Generator Assembly (1A23).- The Transmitter RF Generator Assembly produces the output
frequency of the DME. The RF Generator has a fifteen (15) pin D-shell connector and two (2) RF
connectors that connect to the main wiring harness. One RF connector provides the RF signal to the Power
Amplifier Assembly and the other provides a low power local oscillator signal to the First Mixer Assembly.
The assembly is held in place by a 1/4 turn fastener.
1.2.1.22 IF Amplifier Assembly (1A24).- The IF Amplifier Assembly processes and amplifies the received
signal from the First Mixer assembly and provides a suitable output for decoding. The IF amplifier assembly
connects to the main wiring harness thru a fifteen (15) pin D-shell connector and one RF connector. There
are thirteen (13) test points on the front of the assembly for monitoring various signals within the IF
Amplifier Assembly. The assembly is held in place by a 1/4 turn fastener.
MODEL 1119 DME
1-10 Rev. D December, 2002
1.2.1.23 Decoder CCA (1A25).- The Decoder CCA examines the output of the IF Amplifier Assembly and
produces an output pulse for each valid interrogation pulse pair. The Decoder CCA connects to the main
wiring harness via a thirty-six (36) pin edge connector and has seven (7) test points for monitoring various
signals. The CCA has two (2) switches that are used for setting the output pulse timing.
1.2.1.24 Keyer CCA (1A26).- The Keyer CCA produces the DME keying signal, which is a programmed
morse code sequence that identifies the DME transponder. It also produces a 50-MHZ clock for use
elsewhere in the system. The Keyer CCA plugs into the main wiring harness via a thirty-six (36) pin edge
connector and has three (3) test points for monitoring various signals. This CCA has six (6) DIP switches
for setting the morse code keying group. The Keyer CCA may be configured to use its on board keyer
circuits or use the keying signal from the collocated VHF transmitter to provide the morse code sequence
to the Transmitter Video CCA.
1.2.1.25 Transmitter Video CCA (1A27).- The Transmitter Video CCA connects to the main wiring harness
via a thirty-six (36) pin edge connector and has 4 test points for monitoring various signals. This CCA has
four (4) thumb switches for setting the system reply delay. It also has three (3) rotary switches for setting
the transmitter pulse pair spacing.
1.2.1.26 Power Control Panel Assembly (1A29).- The Power Control Panel Assembly is located in the
lower portion of the DME cabinet and contains the AC and DC system circuit breakers, Low Batt Voltage
indicator, twenty-five (25) pin D-Shell connector (wired as a DTE (Data Terminal Equipment) connector)
for the local video terminal, 1/4 amp fuseholder, 5 amp fuseholder, and 2 AC outlets. The Power Control
Panel Assembly also has 2 CCA's attached to its back side as well as a sensor to measure cabinet operating
temperature, and a second twenty-five (25) pin D-Shell connector, configured as a standard RS-232 DCE
(Data Communications Equipment) connector, for interconnection with a modem for remote
communications.
1.2.1.26.1 Scaling CCA (1A29A1).- The Scaling CCA scales the station voltages and currents for
measurement and use by the built-in test equipment. The CCA is attached to the Power Control Panel
Assembly by hexagon shaped standoffs and connects to the main wiring harness via a sixteen (16) pin
connector.
1.2.1.26.2 Input Power Monitor CCA (1A29A2).- The Input Power Monitor CCA monitors the main DC
voltage and the control microprocessor. If the DC voltage drops below a predetermined level, such as when
the station operates on batteries for an extended period, this assembly will disconnect the batteries from the
station. Circuits on this assembly also monitor operation of the control microprocessor and remove power
from the two Low Voltage Power Supplies if the microprocessor malfunctions. The CCA is attached to the
Power Panel Assembly by hexagon shaped standoffs and is hardwired into the cabinet wiring harness.
MODEL 1119 DME
Rev. D December, 2002 1-11
1.2.1.27 +28 Vdc Power Supply (1A30).- The +28 Vdc Power Supply is located behind the Power Control
Panel Assembly. It supplies +28 V DC for use throughout the DME. The +28 V DC Power Supply is
attached to the transmitter cabinet and sets on hexagon standoffs.
1.2.1.28 Current Limiter (1A31).- The Current Limiter protects the battery-charging circuit by limiting its
output current. It is located on the lower right side at the rear of the cabinet assembly.
1.2.1.29 Power Amplifier Assembly (1A32).- The Power Amplifier Assembly amplifies the RF from the
Transmitter RF Generator to produce 700 watts of output power. It is comprised of seven (7) separate circuit
card assemblies (CCAs) which are attached to heat sinks within the assembly and is located on the upper
left, exterior side of the cabinet. The Assembly connects to the main wiring harness through a twenty-five
(25) pin D-shell connector and two (2) RF connectors and is held in place by a lip and clamping plate. A
separate cover for the assembly is secured with 1/4 turn fasteners.
1.2.1.30 Fan Assembly (1A33).- The fan assembly consists of 2 brushless DC fans that provide cooling for
the Power Amplifier Assembly and is located on the left side of the cabinet below the Power Amplifier
Assembly.
1.2.1.31 Backplane CCA (012537-0006).- The Backplane CCA is located at the rear of the Transmitter
Control Assembly card cage and provides a common interconnection bus for CPU CCA (1A15), Interface
CCA (1A17), optional DME System Interface CCA (1A16) and Optional Control Interface CCA (1A18).
1.2.1.32 Circulator Assembly (950086-0000).- The Circulator Assembly is located behind the Test Panel
Assembly. It provides isolation between the transmitted and received signals, since a common antenna is
used for both.
1.2.1.33 Connector Panel Assembly (1A32). - The Connector Panel Assembly (not shown) is located at the
bottom of the rear cover of the DME Cabinet and contains connectors J40, J41, and J42 for interfacing with
the optional Enhanced RMM system computer.
1.2.2 Antenna.- Refer to Figure 1-3. The Model 1119 DME utilizes a broad band antenna array which
covers the full 962 to 1213 MHZ frequency band. Standard and narrow-beam antennas are available. Each
antenna is 77.8" high, has an 8" mounting base and weighs 21 lb. The standard and narrow beam antennas
consist of 8 and 10 active radiator assemblies, respectively. Both antennas are protected by a fiberglass
radome. Facilities are provided for attachment of a dual obstruction light at the top of each of the antennas.
All RF connections are made at the antenna base using three (3) type-N female connectors. The centrally-
mounted connector is for the RF input, while the 2 outer connectors are for the monitor probes. An AC
connector for the obstruction lights is also located on the antenna base. Specific data for each of the
antennas is supplied in tables 1-2 and 1-2 a.
MODEL 1119 DME
1-12 Rev. D December, 2002
1.2.3 Video Display Terminal.- The Video Display Terminal consists of Cathode Ray Tube (CRT) display
and associated alphanumeric keyboard and is used for monitoring, local control, and maintenance of the
DME station. An appropriately configured computer system may be used in lieu of a video terminal. When
the optional Enhanced RMM (ERMM) system is included with the supplied configuration, the Video
Display Terminal is replaced by the computer included with the ERMM system.
1.3 EQUIPMENT SPECIFICATION DATA.- Table 1-1 contains the specification data for the 1119 DME
transponder. Table 1-2 contains the specification data for the Model 1119 DME antenna.
Table 1-1. Equipment Specification Data for 1119 DME.
CHARACTERISTICS SPECIFICATIONS
PHYSICAL
Cabinet Dimensions 48.26 W x 31.12 D x 106.68 H (cm)
19.00 W x 12.25 D x 42.00 H (in)
(Dual system uses 2 cabinets)
Mounting Hinged wall mount (each cabinet)
Weight (each cabinet) 63 kg (140 lbs)
ENVIRONMENTAL AND ELECTRICAL
Temperature -10E to +55EC
Relative Humidity Up to 90% at 50EC
Altitude 0 to 4500 m MSL (0 to 15,000 ft MSL)
Primary Power 120/240 Vac, 50/60 Hz, single phase
Standby Power 28 V DC no-break battery backup system with built-in
charger (4-hour operation)
Power Consumption Single System:
890 VA (Max) including 214 VA for obstruction
lighting
MODEL 1119 DME
Rev. D December, 2002 1-13
Table 1-1. Equipment Specification Data for 1119 DME Systems. (Cont.)
CHARACTERISTICS SPECIFICATIONS
Dual System: 1280 VA (Max) including 214 VA for obstruction
lighting
Duty Cycle Continuous
TRANSMITTER
Operating Frequency Any of the 252 X or Y-Channels in the 960 to 1215
MHZ frequency band
Frequency Control Crystal Referenced Synthesizer
Frequency Stability 0.001%
Rated Power Output $ 700 Watts (minimum across frequency band as
measured at the transmitter output connector)
Output Impedance 50 Ohms
Pulse Pair Spacing
X Channel 12 0.1Fs initial, 0.25Fs operational.
Y Channel 30 0.1Fs initial, 0.25Fs operational.
Transponder Capacity 100 Aircraft
Pulse Count 1000 100 PPS to 2700 PPS 90 PPS.
Pulse Shape Width at half-amplitude: 3.5 ( 0.5)Fs
Rise time (10% to 90% points): 2.5Fs initial, 1.5 to
3.0Fs operational.
Decay time (10% to 90% points): 2.5Fs initial, 1.5 to
3.5Fs operational
Ident Rate 1350 PPS 10 PPS plus equalizing pulses.
(Ident code is generated by an internal keyer or from
a co-located Localizer or VOR facility)
MODEL 1119 DME
1-14 Rev. D December, 2002
Table 1-1. Equipment Specification Data for 1119 DME Systems. (Cont.)
CHARACTERISTICS SPECIFICATIONS
Squitter Rate 775 10 PPS
System Time Delay 50 0.2Fs initial, 0.5Fs operational (X-Channel)
56 0.2Fs initial, 0.5Fs operational (Y-Channel)
System Time Reference Selectable: 1st or 2nd pulse
System Accuracy 0.04 NM (0.5Fs)
RECEIVER/DECODER
Frequency Range Any of the 252 X or Y Channels in the 960 to 1215
MHZ band
Frequency Control Crystal Referenced Synthesizer
Frequency Stability 0.001%
Receiver Sensitivity 70% replies to interrogations at -117 dBW (-87
dBm, -103 dBW/m
2
) measured at the cabinet
antenna connector.
Receiver Bandwidth 400 kHz (between 3 dB points); # 5% replies to
signals at a level of 0 dBm at frequencies $ 900 kHz
from channel center frequency
Dynamic Range -103 dBW/m
2
to -22 dBW/m
2
Adjacent Channel Rejection 80 dB min
IF Frequency Rejection 80 dB min
Spurious Rejection 75 dB min for spurious frequencies 962 to 1213-
MHZ.
Receiver Decodes 12 0.6 Fs, X-channel
36 0.6Fs, Y-channel
Decoder Rejection 55 dB min for interrogation code error of 2Fs.
MODEL 1119 DME
Rev. D December, 2002 1-15
Table 1-1. Equipment Specification Data for 1119 DME Systems. (Cont.)
CHARACTERISTICS SPECIFICATIONS
Receiver Dead Time 60 5

Fs nominal
Echo Suppression Long-Range:
Threshold: 0 to -50 dBm (potentiometer adjustable)
Anti Echo Duration: 50 to 400 Fs (potentiometer
adjustable.
Short Range:
On/Off jumper selectable; potentiometer adjustable
CW Desentization # 3 dB variation in receiver sensitivity for on-
channel CW signals 10 dB below minimum receiver
sensitivity
# 10% reduction in reply efficiency for on-channel
CW signals 13 dB below the receiver input signal
when the input signal is 20 dB above minimum
receiver sensitivity
Sensitivity Level Variation < 1 dB for transmission rates from 0 to 90%
maximum PRF and for pulse spacing variations of
1Fs.
Sensitivity Reduction
Gain Reduction Sensitivity is reduced up to 50 dB when transponder
loading exceeds 90% of maximum.
Noise Generated Pulse Pairs # 5% of maximum PRF (when the receiver is
interrogated at a level of 087 dBm (-103 dBW/m
2
)
to produce a transmission rate equal to 90% of
maximum.
Recovery Time Within 8 Fs of the reception of a signal between 0
and 60 dB above the minimum sensitivity level, the
minimum sensitivity level of the transponder to a
desired signal will be within 3 dB of the value
obtained in the absence of such signals with echo
suppression disabled.
MODEL 1119 DME
1-16 Rev. D December, 2002
Table 1-1. Equipment Specification Data for 1119 DME Systems. (Cont.)
CHARACTERISTICS SPECIFICATIONS
Spurious Radiation During intervals between transmission of individual
pulses, the spurious power received and measured
in a receiver having the same characteristics as a
transponder receiver, but tuned to any DME
interrogation or reply frequency, is more than 80 dB
below the peak pulse power received and measured
in the same receiver tuned to the reply frequency in
use during the transmission of the required pulses.
Out-of-Band Spurious Radiation At all frequencies from 10 to 1800 MHZ, but
excluding the frequencies from 960 to 1215 MHZ,
the spurious output of the DME does not exceed -
40dBm in any 1 kHz of receiver bandwidth. The
equivalent isotopically radiated power of CW
harmonics of the carrier frequency on the DME
operating channel does not exceed -10dBm.
MONITOR
Interrogation Signal Generator
Frequency f
0
(center frequency) 0.001%
f
0
-200 kHz 0.001%
f
0
+200 kHz 0.001%
f
0
-900 kHz 0.001%
f
0
+900 kHz 0.001%
Interrogation Pulse Pair Spacing 12 0.2Fs, X-channel
36 0.2Fs, Y-channel
Pulse Spacing 8 to 40Fs (adjustable)
Pulse Width 3.5 0.5 Fs
Pulse Rise Time 0.5 to 2.5 Fs
Pulse Decay Time 0.5 to 2.5 Fs
PRF 25 to 3600 PPS (adjustable)
Attenuation Range for
Interrogation signals 0 to -90 dBm (adjustable)
MODEL 1119 DME
Rev. D December, 2002 1-17
Table 1-1. Equipment Specification Data for 1119 DME Systems. (Cont.)
CHARACTERISTICS SPECIFICATIONS
Monitor Triggering Rate 100 10 PPS
Monitor Alarms
Power -1 to -6 dB (adjustable)
Pulse Spacing 11.25 0.25 Fsec and 12.75 0.25Fsec
(adjustable), X-channel
29.25 0.25 Fsec and 30.75 0.25 Fsec
(adjustable), Y-channel
Reply Delay 49.65 0.15 Fsec and 50.35 0.15 Fsec
(adjustable), X-channel
55.65 0.15 Fsec and 56.35 0.15 Fsec
(adjustable), Y-channel
PRF 725 25 PPS (adjustable)
Efficiency/Sensitivity < 70% Replies @ >6dB from minimum sensitivity
Identification
Absence 75 5 seconds, nominal (adjustable from 0 to 240
sec)
Continuous 5 1 seconds, nominal (adjustable from 0 to 240
sec)
MODEL 1119 DME
1-18 Rev. D December, 2002
Table 1-2. Equipment Specification Data for Standard 1119 DME Antenna (PN 950005-0001)
CHARACTERISTICS SPECIFICATIONS
Design Co-linear array with 8 active radiator assemblies
Frequency Range 960-1215 MHZ
Polarization Vertical
Impedance 50 Ohms
VSWR 2:1 maximum
Gain:
Main Beam 8dBi minimum
Horizon 6dBi minimum
Main Beam Tilt Between 2E and 5E above horizon
Half Power Beamwidth 10E minimum
Azimuth Coverage Omnidirectional 1 dB maximum
Power Handling Capability 10kW peak @ 3% duty cycle
Monitor Port Coupling Factor -23 dB 5dB at connector J2
-30 dB 5dB at connector J3
Weather Protection Built-In Radome - 3-1/8" O.D.
Size 77.8" high excluding obstruction light and mounting
base.
Weight 21 lb excluding obstruction light and mounting
base
Connectors RF 3 ea, Type N female mounted on antenna bottom
flange
Wind Loading 100 mph (87 knots)
Temperature -55EC to +70EC operating
Humidity Up to 100%
Obstruction Lighting:
MODEL 1119 DME
Rev. D December, 2002 1-19
Table 1-2. Equipment Specification Data for Standard 1119 DME Antenna (PN 950005-0001)(Cont.)
Type Standard two-bulb fixture with 120 or 240 V, 116
W lamps and aviation red covers mounted at the top
of the antenna.
Size & Weight 13.5" (34.3 cm) high, 6 lb (2.7 kg)
Wiring Lamps are wired in parallel
Connector 3-conductor (MS-3112E8-3P) is mounted on the
antenna bottom flange.
Table 1-2a. Equipment Specification Data for narrow beam 1119 DME Antenna. (PN 950561-0000)
CHARACTERISTICS SPECIFICATIONS
Frequency 960-1215 MHZ
Polarization Vertical
Number of Elements Ten
Impedance 50 Ohms
VSWR 2:1 maximum
Gain:
Main Beam 8dBi minimum
Horizon 6dBi minimum
Main Beam Tilt 3E 1E above horizon
Half Power Beamwidth 6E minimum
Azimuth Coverage Omnidirectional 1 dB maximum
Power Handling Capability 5kW peak @ 3% duty cycle
Monitor Port Coupling Factor -25 1dB at connectors J2 and J3
Weather Protection Built-In Radome
MODEL 1119 DME
1-20 Rev. D December, 2002
Table 1-2a. Equipment Specification Data for narrow beam 1119 DME Antenna.
(PN 950561-0000) (Cont.)
Size 77.8" high excluding obstruction light and mounting
base - 3 1/4" O.D. radome
Weight 22 lb excluding obstruction light and mounting
base
Connectors, RF Type N Jack, 3 each
Wind Loading 100 mph
Temperature -55EC to +70EC operating
Humidity Up to 100%
1.4 EQUIPMENT AND ACCESSORIES SUPPLIED.- Table 1-3 contains a list of the equipment and
accessories that may supplied with a single equipment 1119 DME depending on the customer
configuration. Table 1-4 contains a list of the equipment that may be supplied with a dual equipment
1119 DME.
Table 1-3. Equipment and Accessories that may be Supplied for Single 1119 DME
Systems Depending on Customer Configuration.
PART NUMBER DESCRIPTION
001119-0101 or 0104 1119 DME with RMM and Single or Dual Monitor
470026-0004 Single DME Accessory Kit
470074-0000 Video Terminal Kit w/Modem
470085-0001 Antenna Kit w/Standard Omnidirectional Antenna
470288-0001 Equipment Mounting Kit
470483-0001 Battery Back Up Kit (Single)
571119-0001 1119 DME Technical Manual (2 each)
MODEL 1119 DME
Rev. D December, 2002 1-21
Table 1-4. Equipment and Accessories that may be Supplied for Dual 1119 DME
Systems Depending on Customer Configuration.
PART NUMBER DESCRIPTION
001119-0101 or 0104 1119 DME with RMM and Single or Dual Monitor
001119-0102 or 0105 1119 DME with RMM, Single or Dual Monitor and Transfer Unit
030341-0002 Communications Control Unit
470026-0005 Dual DME Accessory Kit
470074-0002 Video Terminal Kit w/o Modem
470085-0001 or 0003 Antenna Kit w/Standard Omnidirectional Antenna, 115 or 230V
470100-0001 Cabinet Interconnect Kit
470288-0001 Equipment Cabinet Mounting Kit (2 each)
470483-0002 Battery Back Up Kit (Dual)
571119-0001 1119 DME Technical Manual (2 each)
1.5 OPTIONAL EQUIPMENT.- Table 1-5 contains a list of optional equipment for the single and dual
1119 DME systems. Specific Items Supplied Depend on Customer Configuration
Table 1-5. 1119 DME Single and Dual Optional Equipment.
PART NUMBER DESCRIPTION
A. Antenna Systems:
470085-0001/0003 Standard Omnidirectional, DME Antenna Kit w/o Tower, 115 or
230 V (Includes Obstruction Lights)
470085-0002/0004 Standard Omnidirectional, DME Antenna Kit w/Tower, 115 or
230 V (Includes Obstruction Lights)
470085-0005/0007 Narrow Beam Omnidirectional DME Antenna Kit w/o Tower, 115
or 230 V (Includes Obstruction Lights)
470085-0006/0008 Narrow Beam Omnidirectional DME Antenna Kit w/Tower, 115
or 230 V (Includes Obstruction Lights)
470252-0002 Civil Installation Kit, Rohn Tower
B. Video Terminals/Computers, Enhanced RMM (ERMM) Systems and Remote
Maintenance Terminals/Computers
470074-0000/0007 Video Terminal Kit, w/Modem, 115 or 230 V
470074-0005/0004 Video Terminal Kit, w/o Modem, 115 or 230 V
MODEL 1119 DME
1-22 Rev. D December, 2002
Table 1-5. 1119 DME Single and Dual Optional Equipment. (Cont.)
470074-0002/0008 Video Terminal Kit, w/o Modem, 115 or 230 V
470410-0002/0004 Enhanced RMM (ERMM) Kit for Single Stations, 115 or 230 V
470410-0001/0003 Enhanced RMM (ERMM) Kit for Dual Stations, 115 or 230 V
470159-0001/0002 Remote Maintenance System Kit w/Terminal, 115 or 230 V
030341-0002 Communications Control Unit Assembly
C. Remote Control and Interface Equipment
470213-0001 Interface Kit, 1138 RSCU, Single DME
470191-0001 Interface Kit, 1138 RSCU, Dual DME
470222-0001 Interface Harness Kit, VOR/DME
470488-0001/0002 Interface Kit, 2138 RCSU, Single/Dual (factory installed)
Model 1138 ILS/VOR/DME Remote Status and Control Equipment.
Configuration and specific part numbers Depend on Customer
Requirement. (contact the factory)
Model 2138 ILS/VOR/DME Remote Control and Status Equipment.
Configuration and specific part numbers Depend on Customer
Requirement. (contact the factory)
D. Remote Off-the-Air Monitoring Receiver
001125-0101/0102 DME Remote Status Receiver Assembly, 115 or 230 V.
470040-0001 Installation Kit, 1125 Receiver
E. System Test Equipment and Spares
470077-0003/0005 Test Equipment Kit
480011-0001 Spare Modules Kit, Minimum, 1119 DME, Single/Dual with
Single or Dual Monitor
480011-0002 Spare Modules Kit, Full, 1119 DME, Single/Single Monitor
480011-0003 Spare Modules Kit, Full, 1119 DME, Dual/Single Monitor
MODEL 1119 DME
Rev. D December, 2002 1-23
Table 1-5. 1118 DME Single and Dual Optional Equipment. (Cont.)
480011-0004 Spare Modules Kit, Recommended, 1119 DME, Single/Single
Monitor
480011-0005 Spare Modules Kit, Recommended, 1119 DME, Dual/Single
Monitor
480014-0001 Spare Components Kit, 1119 DME, Single/Single Monitor
480036-0001 Spares Components Kit, Recommended, 1119 DME, RSCU
Interface
480082-0001 Spares Components Kit, 1119 DME, RSCU Interface
480118-0001 Spares Components Kit, Minimum, 1119 DME, Single/Dual
w/Dual Monitor
480119-0001 Spare Modules Kit, Recommended, 1119 DME, Single/Dual
Monitor
480119-0002 Spare Modules Kit, Recommended, 1119 DME, Dual/Dual
Monitor
480120-0001 Spare Modules Kit, Full, 1119 DME, Single/Dual Monitor
480120-0002 Spare Modules Kit, Full, 1119 DME, Dual/Dual Monitor
1.6 EQUIPMENT REQUIRED BUT NOT NORMALLY SUPPLIED.- Table 1-6 contains a list of
equipment that is not normally supplied but is required to make the station operational.
Table 1-6. Equipment Required But Not Supplied.
Name/Part Number Description
Stopwatch
Temperature Sensor Fluke 80T-150 or equivalent
470077-0005 Test Equipment Kit from Table 1-5 or equivalent.
See Table 1-6a for a list of items in the 470077-
0005 Kit.
MODEL 1119 DME
1-24 Rev. D December, 2002
Table 1-6a. Items Contained in Test Equipment Kit PN 470077-0005.
Name/Part Number Description
950288-0000 Wattmeter, Bird Model 4314B-KT 110/220 VAC
950257-0000 Multimeter, Digital 3 Digit, Portable
950259-0000 Oscilloscope, Tektronix Model TDS210
950260-0000 Frequency Meter 1.4 GHz 115/230 VAC 50/60 HZ
950272-0000 Dummy Load, Dry 25 Watt
950292-0000 Detecting Element, 10W, 950-1260 MHZ Bird 10J
950389-0000 Detecting Element 2500W, 950-1260 MHz Bird
2500J
234619-0030 Attenuator, Fixed, 30 dB, 10 W, 50 ohms
234619-0003 Attenuator, Fixed, 3dB, 10W, 50 ohms
185272-0000 Adapter, N Female/TNC Female
1.7 REFERENCE DESIGNATOR CONVERSION CHART.- Two sets of reference designators have
been used on the Model 1119 DME. Table 1-7 contains a conversion chart that lists the older reference
designators used on early units and their newer reference designator counterparts. The chart is provided
to assist users ordering updated manuals for use with an earlier system.
Table 1-7. Reference Designator Conversion Chart.
New Old
Nomenclature Part Number Ref. Des Ref. Des.
Test Panel Assembly 030213-0000 1A1 1A3A11
Display CCA 012390-0000 1A1A1 1A3A11A1
Time Interval CCA 012398-0000 1A1A2 1A3A11A2
Power Measurement CCA 012400-0000 1A1A3 1A3A11A4
Steering Logic CCA 012391-0000 1A1A4 1A3A11A3
Monitor Control Assembly 030224-0000 1A2 1A3
MODEL 1119 DME
Rev. D December, 2002 1-25
Table 1-7. Reference Designator Conversion Chart. (Cont.)
New Old
Nomenclature Part Number Ref. Des Ref. Des.
Cal Attenuator Assembly 030211-0000 1A3 1A3A3
Detector Assembly 030204-0001 1A4 1A2A14
Detector Assembly 030204-0001 1A5 1A3A10
Dir Coupler Assembly 030026-0003 1A6 1A3A9
Monitor Transfer Assembly 030345-0002 1A7 1A6A1
RF Generator Assembly 030207-0002 1A8 1A3A1
Diode Modulator Assembly 030215-0000 or 1A9 1A3A2
030215-0001
Signal Generator Video 012394-0000 1A10 1A3A4
Monitor A CCA 012668-0001 1A11 1A3A5
Monitor B CCA 012001-0001 1A12 1A3A6
or
Monitor B CCA 012019-0001 1A12 1A3A6
Low Voltage Power Supply 012670-0002 1A13 1A2A11
High Voltage Power Supply CCA 030418-0001 1A14 1A2A12
CPU CCA 012733-1001 1A15 1A5A2
or
012775-1001 1A15 N/A
DME System Interface CCA 012740-1001 1A16 N/A
Interface CCA 012573-0003 1A17 1A5A3
DME Control Assembly 030654-0001 1A18 N/A
Transponder Control Assembly 030225-0002 1A19 1A2
Preselector Assembly 030206-0003 1A20 1A2A5
MODEL 1119 DME
1-26 Rev. D December, 2002
Table 1-7. Reference Designator Conversion Chart. (Cont.)
New Old
Nomenclature Part Number Ref. Des Ref. Des.
First Mixer Assembly 030205-0000 1A21 1A2A6
RF Generator Assembly 030207-0001 1A23 1A2A1
IF Amplifier Assembly 030210-0000 1A24 1A2A7
Decoder CCA 012380-0001 1A25 1A2A8
Keyer CCA 012735-0001 1A26 1A2A9
Transmitter Video CCA 012629-0002 1A27 1A2A10
Low Voltage Power Supply 012670-0002 1A28 1A3A8
Power Control Panel Assembly 030218-0002 1A29 1A4
Voltage & Scaling CCA 012547-0001 1A29A1 1A4A6
Input Power Monitor CCA 012406-0004 1A29A2 1A4A1
Power Supply 950087-0000 1A30 N/A
or
Power Supply 950572-0001 1A30 N/A
Current Limiter Assembly 030347-0001 1A31 1A4A7
Power Amplifier Assembly 030312-0001 1A32 1A2A2
Fan Assembly 030435-0001 1A33 N/A
RF Circulator 950086-0000 N/A 1A2A4
Secondary Line Assembly 030748-0001 N/A 1A6A1
MODEL 1119 DME
Rev. D December, 2002 2-1
SECTION 2. TECHNICAL DESCRIPTION
2.1 INTRODUCTION.- This section contains a technical description of the single and dual 1119 DME.
This includes, simplified system block diagram theory and block diagram and detailed circuit theory of the
Circuit Card Assemblies (CCA) contained in the system.
2.2 DME OPERATING PRINCIPLES.- Refer to Figure 2-1. The DME system requires a single-channel
receiver-transmitter combination (transponder beacon) in conjunction with a special omni-directional
antenna as the ground station, and a multichannel receiver-transmitter combination (interrogator) on board
the aircraft. One multichannel airborne receiver-transmitter (transmitting and receiving coded, pulsed
information) provides both the distance and identification functions.
The DME system has 252 operating channels, with the adjacent channels spaced one megahertz apart in the
frequency range of 962 to 1213 MHZ.
The DME system utilizes pulse-coding techniques in the transmission of its intelligence. The transmissions
are composed of pulse groups with a prearranged spacing between the pulses of the group. For X-Channels,
the interrogation pulses and the transponder reply pulses are both spaced 12 Fs apart. For Y-Channels, the
interrogation pulses are spaced at 36 Fs; and the transponder reply pulses are spaced at 30 Fs.
Both the interrogator and transponder receivers employ pulse decoders, which are set to pass only pulse pairs
of the prescribed spacing. The purpose of the two-pulse technique is to increase the signal-to-noise ratio
and to discriminate against pulse interference, such as might be produced by radar transmission and other
extraneous sources of RF energy on the frequency. The intelligence supplied to the aircraft by the DME
transponder is both identity and distance information. The identity information is necessary for the pilot to
positively identify the station that has been selected. Identity information is provided to the aircraft
approximately every 30 seconds. The distance information, however, is provided to the aircraft only upon
demand. Each aircraft must interrogate the ground facility by means of the coded interrogation pulse pairs,
before the transponder beacon can generate and transmit distance information.
MODEL 1119 DME
2-2 Rev. D December, 2002
Figure 2-1. Basic DME System Block Diagram.
MODEL 1119 DME
Rev. D December, 2002 2-3
Refer to Figure 2-2. As stated, the transponder beacon must be interrogated by the aircraft before the ground
facility can transmit usable distance information. Assuming an aircraft has interrogated the ground facility,
the interrogation signal is received at the beacon antenna, then routed to the receiver through the Circulator
and Preselectors. The signal is then amplified, detected, and fed to the Decoder for verification of proper
pulse spacing. The decodes from the Decoder (in turn) trigger the Encoder and priority logic circuits, which
encode a reply with the proper pulse spacing and delay. The output from this unit is routed to the Pulse
Shaper, where the encoded replies are shaped into 3.5 Fs pulses and amplified. The shaped pulses modulate
the gated RF from the Exciter in the Transmitter to produce the RF output pulses. The output pulses are then
sent to the antenna and radiated to the aircraft as reply pulse pairs.
Figure 2-2. DME Transponder Block Diagram.
MODEL 1119 DME
2-4 Rev. D December, 2002
Three separate signals are transmitted by the beacon as a train of pulse pairs. These signals, in order of
priority, are: identification, replies to interrogations, and squitter pulse pairs (used as fill-in pulses). This
priority system prevents any interference between the three signals in the overall pulse train.
The identification of the ground facility is important to the using aircraft; therefore, it has been assigned first
priority in the priority system. The generation of identification intelligence is a function of the Encoder.
Identification is transmitted periodically in International Morse Code with the characters of the code
consisting of a periodic train of pulse pairs. Identification keying occurs approximately every 30 seconds.
When keyed, the priority logic circuit input is disabled; and the circuits will not accept any decodes from
the receiver.
The replies to an interrogation signal are second in the order of priority. Their induction into the pulse train
must be controlled (to prevent interference with the identity cycle and to establish priority over the squitter
pulses). This is accomplished by allowing them to enter the pulse train only during a time interval not
occupied by the identity cycle. This is a major portion of the time, since the identity cycle only occurs
approximately every 30 seconds. Also, a blanking gate is generated each time an interrogation pulse pair
is decoded. The blanking gate is used to inhibit the squitter pulses for a period of approximately 50 Fs.
Once the receiver accepts an interrogation and decodes it, a blanking gate is generated (the so-called
dead-time gate). The dead-time gate is used to inhibit the transponder decoder for approximately 60 Fs.
During this period, the decoded interrogation is delayed a predetermined amount of time and transmitted
back as a reply. The total delay from the time of a received interrogation to transmission of a reply is
typically set for 50 Fs.
The squitter pulses are third in the order of priority. In the absence of interrogations or identity information,
random squitter pulses are generated to maintain an average output pulse train of 1000 pulses pairs per
second (PPS). The purpose of transmitting squitter pulse is to stabilize the Automatic Gain Control (AGC)
circuits the aircraft interrogator.
The process of distance measuring originates in the airborne unit with the generation and transmission of
pulse signals called interrogations. The airborne transmitter repeatedly initiates and transmits pulse signals
consisting of pulse pairs having 12 Fs spacing, a pulse width of 3.5 Fs, and a gaussian or sine-squared shape.
These pulse pairs are recovered by the transponder beacon receiver, whose output triggers the associated
transmitter into transmitting reply pulse pairs. The reply pulse pairs are received by the airborne receiver
and timing circuits, which automatically measure round-trip travel time (the time interval between
interrogation and reply pulses) and convert this time into the electrical signals that operate the distance
meter.
Using the block diagram of the system in Figure 2-2, the distance measurement function can be examined
from the system stand point. The range circuits of the airborne interrogator initiate the distance measuring
process. They formulate and transmit an interrogation pulse pair, which is received at a ground station
antenna and sent to the receiver where they are amplified and detected into video pulse pairs. They are then
fed to the decoder, where the pulses are examined for proper coding (spacing and width) and decoded, if
such proper coding exists. The output of the decoder then triggers the encoder, which encodes a reply signal
with the proper pulse spacing. The output of this unit (pulse pairs) is routed to the pulse-shaper, where the
pulses are shaped, amplified, and routed to the transmitting section for modulation of the gated RF. The
MODEL 1119 DME
Rev. D December, 2002 2-5
output RF pulses are then radiated into space (as replies) via the antenna. The reply pulses are received by
the aircraft, decoded by the airborne receiver, and examined by the range circuits for synchronism with the
airborne unit's own randomly generated interrogation pulses.
The airborne unit measures the elapsed time between the transmission of the interrogation pulse pair and
the receipt of the reply pulse pair. It then, converts this time into a distance indication. In other words, the
distance indication is a measurement of the range time of the pulse pairs. This timing sequence is easily seen
by means of the system timing diagram of Figure 2-3. Timing starts (in the range circuits of the airborne
unit) with the first pulse of the interrogation pulse pair. After a time delay, depending upon the distance
between the aircraft and the ground station, the interrogation pulses are received at the antenna of the ground
transponder beacon. The interrogation pulses are decoded, and the reply is encoded and transmitted after
a preset time delay (the reply delay of the ground station).
This reply delay has a duration of 50 Fs, for which the airborne range circuits automatically account. Thus,
the total time lapse for any interrogation response cycle is the sum of reply pulse spacing, the two-way transit
time (range time), and the reply delay.
2.3 THEORY OF OPERATION.-
2.3.1 Simplified System Block Diagram Theory.- Figure 2-4 is a simplified block diagram of the 1119
DME. The Transponder portion of the 1119 DME consists of the Directional Coupler (1A6), Circulator,
First Mixer (1A21), IF Amplifier (1A24), Preselector (1A20), Power Amplifier (1A32), and RF Generator
(1A23) assemblies as well as the Decoder (1A25), Keyer (1A26), and Transmitter Video (1A27) CCAs.
Aircraft interrogations are picked up by the antenna and routed through the Directional Coupler to the
Circulator. Additional interrogations from the Diode Modulator (1A9) are injected into the Directional
Coupler. The responses to these interrogations are sampled at the monitor antenna and are used to monitor
the reply delay and reply efficiency. The Directional Coupler provides a sample of the transponder reply
to the Monitor Detector (1A5).
The Monitor Detector provides a sample of the transmitted reply to the Test Unit for power output
measurement.
The Circulator provides isolation between the transmitted and received signals, since a common antenna is
used for both. Signals applied to any of the ports will experience the least insertion loss or minimum
resistance when traveling to the adjacent port in a clockwise direction. Signals traveling in a
counterclockwise direction will be attenuated by at least 20 dB. Interrogations arriving from the Directional
Coupler are directed to the Preselector Assembly.
MODEL 1119 DME
2-6 Rev. D December, 2002
Figure 2-3. System Timing Diagram.
MODEL 1119 DME
2-8 Rev. D December, 2002
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 2-9
The Preselector Assembly is a narrow-band, three-poll, mechanically-tuned filter that discriminates against
undesired frequencies and provides additional attenuation of transmitter energy. From the Preselector, the
received interrogation is directed to the First Mixer Assembly.
The local oscillator (LO) injection supplied by the RF Generator is sent to the First Mixer. This signal is
separated by 63-MHZ from the received interrogation signal. The two signals are mixed and the resultant
63-MHZ intermediate frequency (IF) is sent to the IF Amplifier Assembly.
The IF Amplifier is a logarithmic amplifier that provides a simple means of compressing the large dynamic
range of the input signal into a linear, non-limiting output. Its circuits also provide short and long-distance
echo suppression, narrow-pulse rejection, and carrier wave (CW) suppression. The IF Amplifier Assembly
provides video pulses to the Decoder CCA.
The Decoder is comprised of several shift registers and gates. The video pulses from the IF Amplifier are
sent to two separate paths (delayed and undelayed) for a coincidence comparison. If the pulse pairs are
spaced correctly, a decoded output pulse is produced. The Decoder also produces a dead-time gate which
inhibits the Decoder until the decodes, which represent an aircraft interrogation, have been delayed, encoded,
and transmitted back as replies. The Decoder circuitry includes a noise generator that produces squitter
pulses. Squitter pulses are generated to maintain an average output pulse train of 1000 PPS.
The decode signals are sent to the Transmitter Video CCA. By the time they reach this point, the
transmission has been established to conform to the following order of precedence:
1. Identity pulse groups;
2. Decoded replies;
3. Squitter pulse pairs;
The Transmitter Video Assembly contains a microprocessor that performs a variety of tasks. Its primary
function is to continually adjust reply delay to its selected value. Information required to measure the reply
delay is obtained from the Monitor A CCA via the TX Power Detector (1A4) Assembly.
Under normal conditions, the 1119 DME will receive identity keying from a collocated VOR or ILS. If this
keying signal is present, it will be gated through the Keyer CCA to the Transmitter Video CCA. If there is
no external keying for forty seconds, or if the signal is continuous for more than five seconds, the external
keying signal will be blocked; and an internal keying signal will be generated by the Keyer CCA. The code
group is selected by means of rocker switches installed on the Keyer CCA.
The Power Amplifier Assembly delivers 750 watts peak at its output. This translates to a minimum 600W
output at the antenna. This output power is attainable on any DME channel from 962-MHZ to 1213-MHZ.
The Power Amplifier uses a unique microprocessor control system to achieve pulse shape control. This
control system compares the transmitter output pulse shape to a reference pulse shape stored in ROM. The
microprocessor then computes a set of 96 successive slopes. These slope values are converted to
proportional analog currents and integrated to produce a complex waveform, resulting in the desired
transmitter RF output envelope.
The input to the Power Amplifier is a nominal 450 mW CW signal from the RF Generator Assembly
MODEL 1119 DME
2-10 Rev. D December, 2002
(1A23). The Power Amplifier utilizes 4 amplifier stages to produce shaped RF pulses at 750 W peak level
minimum.
The excitation for the Power Amplifier is provided by the RF Generator Assembly (1A23), which uses a
phase-locked loop to generate highly stable RF energy. The output frequency can be set to any one of the
252 channels in the 962 to 1213-MHZ band by the use of internal programming switches.
The Monitor portion of the DME consists of two major sections: the Signal Generator (for interrogating the
transponder) and the Monitor proper (to evaluate the reply parameters).
The Signal Generator consists of the Signal Generator Video (1A10), Diode Modulator (1A9), RF Generator
(1A8), and Calibrated Attenuator (1A3) Assemblies. In normal operation, the Signal Generator interrogates
the transponder 100 times per second at a fixed output level. This signal level simulates a close-in aircraft
and is used to monitor reply delay. When the Test Unit is set to measure reply efficiency, the interrogation
pulse repetition frequency (PRF) is increased to 1000 PPS; and two different RF signal levels are alternately
generated. One level is dependent upon the setting of the Calibrated Attenuator and is used to measure reply
efficiency. The second level is maintained at approximately -15 dB to continue to measure reply delay. The
interrogation signals are fed into the Transponder via the Directional Coupler.
The RF Generator (1A8) used in the Monitor is similar to that used in the Transponder. In the Monitor
application, an additional "monitor frequency" switch allows the generator frequency to be set 200-kHz
or 900-kHz.
The Monitor Proper portion consists of the Monitor A and Monitor B CCAs. The transponder replies are
sampled by the Monitor Sample Probe in the antenna, detected, and fed to the Monitor A CCA for evaluation
of pulse spacing and reply delay. A Test Pulse, from the Signal Generator Video CCA, is synchronized with
the Detected Interrogation, from the Diode Modulator Assembly, and is used to simulate the transponder
output for the alignment and determination of the delay monitor alarm points. The MON/TEST switch is
provided for selection of either the Detected Transponder Reply pulses, from the antenna, or Test Pulses,
from the Signal Generator, for the input to the Monitor A CCA.
The INTRG (D), REPLY (D), and 2nd TX Pulse signals (from Monitor A) are sent to the Monitor B CCA.
The primary function of Monitor B is to provide information to the Test Unit and to generate a Shutdown
Control signal when a fault signal requiring a system shutdown exists.
The Test Unit consists of the Power Measurement CCA (1A1A3), Steering Logic CCA (1A1A4), Time
Interval CCA (1A1A2), and Display CCA (1A1A1). The Test Unit provides a means of measuring and
displaying critical parameters within the DME.
The Detected TX Sample from the TX Power Detector is sent to the Power Measure CCA. The Power
Measurement CCA provides generation of signals proportional to the detected RF power and sends them
to the Steering Logic CCA.
The Steering Logic CCA receives detected RF power signals from the Power Measurement CCA and
provides data for time interval measurement and for display on the Test Panel Assembly.
MODEL 1119 DME
Rev. D December, 2002 2-11
The Time Interval CCA measures time in 10 nano (n) second increments between pulses supplied by the
Steering Logic CCA.
The Display CCA receives various input signals and provides a digital readout according to the applied
signals.
The Remote Maintenance Monitor (RMM) and the local Video Terminal communicate locally. Test
information is displayed on the terminal (for on-site maintenance). The RMM records system test data and
compares it with preset limits. If the recorded data is outside the presets, the RMM will signal (through a
Modem) a remote maintenance Video Terminal to report the data. If the transmitter power falls below the
preset half-power level, the RMM will shutdown the system.
2.3.2 Detailed Theory of Operation.-
2.3.2.1 Test Panel Assembly (1A1) Circuit Theory.- Refer to Figure 11-3. The Test Panel Assembly (the
Test Unit on the 1119 DME Simplified Block Diagram) provides a means of measuring critical parameters
for both the Signal Generator and the Transponder portions of the DME. Parameters displayed by the Test
Panel Assembly are selected via the TEST SELECT switch. The Test Panel Assembly is comprised of a
front panel and four CCAs.
On the front of the Test Panel Assembly are six (6) indicator lamps, the TEST SELECT switch, the RESET
switch, the DISPLAY (test on) switch, and a LED digital readout. In normal usage, the test circuits and
digital readout are only energized when the momentary DISPLAY switch is depressed. For trouble-shooting
and alignment, these circuits may be energized continuously with the DISPLAY toggle switch on the
Monitor Control Panel Assembly (1A2).
The Test Panel Assembly (1A1) is a rack installed panel with the Display CCA installed on the rear of the
panel so the display shows through a panel cutout. In addition to the Display CCA, the Time Interval CCA,
the Power Measurement CCA, and the Steering Logic CCA are installed in a single stack on the rear of the
panel. These CCAs are individually described in this chapter.
TEST SELECT switch, S1, is a 5 section, rotary, wafer switch that provides control and power routing to
the various circuits involved in the display of individual parameters.
RESET push button, S2, provides a reset facility local to the Test Panel. This is in parallel to the system
reset facility.
Pressing the DISPLAY push button, S3, increases the refresh rate of the LED Display when the TEST
SELECT switch is in the % EFF, DELAY, S.G. level or S.G. spacing positions.
Terminal board TB1 terminals E1-E2 are +5 Vdc distribution points for the Test Panel Assembly, its
associated components, and CCAs.
Terminal board TB1 terminals E3-E4 are chassis ground for the Test Panel Assembly.
MODEL 1119 DME
2-12 Rev. D December, 2002
2.3.2.2 Display CCA (1A1A1) Circuit Theory.- Refer to Figure 11-8. The Display CCA provides a four
(4) digit LED Display which can be observed through an opening in the Test Panel Assembly.
The Display Clock signal from Steering Logic CCA enters the Display CCA via connector P1 pin 1 and is
applied to the CK input (pin 12) of counter, multiplexer, latch display driver, U2. The counter portion of
U2, when not reset by pin 14 counts the Display Clock pulses and holds this count until more clock signals
occur or a reset at pin 14 of U2 occurs.
The Reset Trig signal enters the CCA via connector P1 pin 9 and is applied to the 1A input (pin 1) of dual
retriggerable multivibrator U1. Each section of U1 has an output pulse length of 5 Fs. The 1Q "Not" output
of the first section is applied to the LE input (pin 11) of U2. This pulse transfers U2's count to a latch and
to its outputs (SEG a thru SEG g) and applies them to the inputs (a thru g) of LED seven segment displays
DS1 thru DS4. These numbers will be displayed until the latch receives a new LE pulse from U1.
At the end of the 5 Fs period, the 1Q output from the first section of U1 triggers its second section. This
resets the counter of U2 to the count of 0000.
The Blank signal enters the CCA via connector P1 pin 7. This signal is selected when the TEST SELECT
switch is in the IDENT position. This inhibits the output of U2, effectively blanking the LED Display.
The Clear pulse exits via connector P1 pin 3 and is applied to the Time Interval CCA. When this signal is
active (LOW) it clears all the accumulators of the Time Interval CCA.
The display segments, DS1, DS2, DS3, and DS4 have common cathodes and individual anodes (a thru g)
for the display segments.
Decimal point control is determined by the signals at P1 pin 10 (DEC PT 00.), pin 11 (DEC PT .00), and
pin 12 (DEC PT 0.0) and is set as appropriate to the parameter being displayed.
2.3.2.3 Time Interval CCA (1A1A2) Block Diagram Theory.- Refer to Figure 2-5. The purpose of the
Time Interval CCA is to measure, in 10 ns increments, the time between start and stop pulses. One hundred
of these measurements are accumulated before this time is displayed. These pulses are selected by the
Steering Logic CCA, depending upon the position of the TEST SELECT switch.
MODEL 1119 DME
Rev. D December, 2002 2-13
Figure 2-5. Time Interval CCA Block Diagram.
The 50-MHZ clock from the Signal Generator Video CCA is sent to the 50-MHZ Amplifier. This circuit
consists of transistors Q1 and Q2. The 50-MHZ is amplified and sent to a Divide by 4 and a Divide by 50
circuit.
The Divide by 4 circuit consists of dual D-type flip-flops U2 and U8. This circuit produces 12.5-MHZ up
and down signals that are sent to the Up/Down Gates.
The Up/Down Gates circuit is comprised of NAND gates U1B and U1D. This circuit determines which
12.5-MHZ signal will be allowed to clock the Accumulator circuit.
The Divide by 50 circuit consists of counters U16 and U17. This circuit produces the Time INT Clock
signal that is applied to the Steering Logic CCA.
Stop pulses are shaped by multivibrator U12 and sent to the Stop Pulse Counter and the Time INT Reset
Generator.
MODEL 1119 DME
2-14 Rev. D December, 2002
As Stop pulses are being counted, the Accumulator circuit (U3 thru U7) is enabled by the Time INT Enable
signal and counts up. When the count of 100 is reached the count up sequence is ended. At each Stop pulse
the Accumulator output is routed back to the Latch circuit (U9A, U10A, U10B, and U11).
The Load Gate circuit compares the Load signal with Count Up signal. When both signals are present, it
supplies a signal that enables the latch count to be loaded into the accumulator presets.
The Stop Pulse Counter, U13, counts the number of Stop pulses generated by the Stop Pulse Shaper. On
the 100th count, it outputs a pulse to the Up/Down Flip-Flop.
The Up/Down Flip-Flop consists of NAND gates U15A and U15B. When it receives the pulse from the
Stop Pulse Counter, its output changes states causing the Accumulator circuit to count down for a period
determined by the previous count up.
2.3.2.3.1 Time Interval CCA (1A1A2) Detailed Circuit Theory.- Refer to Figure 11-9. The 50-MHZ signal
from the Signal Generator Video CCA enters the Time Interval CCA via connector P1 pin 13 and is applied
to an amplifier circuit which consists of transistors Q1 and Q2. Q1 and Q2 amplify, buffer, and apply the
signal to pin 13 of NAND gate U15D and to the Clock (CLK) inputs (pins 3 and 11) of dual D-type flip-flop
U2.
U2 divides the 50-MHZ input by two and applies it to the CLK (pins 3 and 11) inputs of dual D-type flip-
flop U8, where it is again divided by two. When the Time INT Enable signal and the 1Q output (pin 5) of
U8 are applied to NAND gate U1D, the 1Q output of U8A is inverted and returned to its 1D input (pin 2).
The resulting 12.5-MHZ is applied to the Count Up (CU) input (pin 5) of accumulator U3 for as long as the
Time INT Enable signal is present. The 2Q "Not" output (pin 8) of U8 is returned to its 2D input (pin 12)
and is also applied to pin 5 of NAND gate U1B. This supplies 12.5-MHZ to the Count Down (CD) input
(pin 4) of accumulator U3 during the count down sequence.
Integrated circuits U3 thru U7 are presettable BCD decade, up/down counters configured to operate as
accumulators. With the Time INT Enable active, accumulators U3 thru U7 count up. If a Stop pulse arrives
prior to the end of the Time INT Enable, the inputs of latches U9B, U10A, U10B, and U11 are transferred
to the accumulators. If a Stop pulse does not occur, the latch inputs are not transferred.
When a Load signal arrives, the data on the latch outputs will be loaded into accumulators U3 thru U7. If
there has been a valid Stop pulse, the new accumulated number is loaded into the accumulator presets. If
there has not been a valid stop pulse, the previous accumulated number is reloaded; and the new number is
discarded.
The count up/count down sequence is controlled by Stop pulses that enter at connector P1 pin 3 and are
applied to the 1A (pin 1) input of dual monostable multivibrator U12. U12 is configured to produce a 150
ns pulse from its 1Q "Not" output (pin 4). This pulse is applied to the CLK inputs (pin 11) of latches U9B,
U10A, U10B, and U11; to the 1B input (pin 2) of retriggerable monostable multivibrator U14; and to the
CPO input (pin 1) of dual decade counter U13.
When 100 Stop pulses have been counted by U13; U13 outputs a pulse to U12 via its Q3 output (pin 9).
MODEL 1119 DME
Rev. D December, 2002 2-15
This pulse triggers U12 causing it to output a 6 Fs pulse via its 2Q "Not" output. This pulse is applied to
pin 1 of NAND gate U15A.
NAND gates U15A and U15B are configured to operate as a flip-flop. They control the accumulator
up/down count. The 6 Fs pulse toggles the flip-flop and starts the count down sequence. NAND gate U1B
is enabled and the 12.5-MHZ from the 2Q "Not" output of U8 causes accumulators U3 thru U7 to count
down. NAND gates U1C and U15C are enabled, allowing accumulator loading and supplying a Time INT
Reset signal to the Steering Logic CCA. The condition of the Count signal is changed providing status data
to the Steering Logic CCA. When the accumulators reach a count of 0000, the output of U7 toggles the flip-
flop (U15A and U15B) and the cycle starts again.
NAND gate U15D is enabled during the count down period, supplying 50-MHZ to the CK1 input (pin 8)
of monolithic counter U16.
U16 is configured to divide the input frequency by ten and supply a 5-MHZ signal to the CP1 input (pin 1)
of 4-bit counter U17.
U17 divides the 5-MHZ input by five and produces a 1-MHZ Time INT Clock, which provides 1 pulse per
microsecond during the count down period. The Time INT Clock signal exits the CCA via connector P1
pin 7 and is applied to the Steering Logic CCA.
The Clear pulse, generated by the Display CCA, enters at connector P1 pin 9 and is applied to the CLR
"Not" input (pin 1) of latches U9B, U10A, U10B, and U11. This pulse is inverted to NAND gate U1A and
applied to the CLR input (pin 14) of accumulators U3 thru U7. Whenever the Clear line goes LOW,
accumulators U3 thru U7, latches U9B thru U11, and decade counter U13 are cleared.
2.3.2.4 Power Measurement CCA (1A1A3) Block Diagram Theory.- Refer to Figure 2-6. The Power
Measurement CCA provides an audio signal to drive a panel installed speaker. It also generates signals
proportional to the detected RF power in a form which can be displayed on the LED Display.
The Keyed 1350-Hz Tone and the Ident Tone Enable signals are applied to the Keyed Tone Control circuit.
This circuit consists of Q5, Q6, U1, and R16. When the TEST SELECT switch is placed in the IDENT
position, this circuit is enabled. It buffers and amplifies the Keyed 1350-Hz Tone signal and applies it to
a panel installed speaker. Volume Control potentiometer R16 sets the gain of the Keyed Tone Control
circuit. The level of the Ident Tone Enable signal enables this circuit.
Detected RF pulses are applied to a Peak Detector circuit which consists of voltage comparator U2 and diode
CR1. The output of the Peak Detector circuit is a DC signal that is sent to the Variable Gain Amplifier U3A.
The Tx Power Enable and S.G. Level Enable signals are applied the Power Select circuit which consists of
transistors Q7, Q9, FETs Q8, Q10, and potentiometer R36. Potentiometer R36 is provided to match the Tx
Power Enable signal with the S. G. Level Enable signal. The output of this circuit controls the gain of the
Variable Gain Amplifier U3A.
MODEL 1119 DME
2-16 Rev. D December, 2002
The Variable Gain Amplifier circuit consists of amplifier U3A. This circuit supplies a DC level to the
Voltage-To-Frequency Converter circuit and the Voltage-To-Period Converter circuit.
The Voltage-To-Frequency Converter circuit consists of U3B, Q13, Q14, U4B, and U5B. This circuit
converts the dc voltage from the Variable Gain Amplifier circuit into an output frequency. This frequency
is the Power Frequency (Power F) signal and is sent to the Steering Logic CCA.
The Voltage-To-Period Converter consists of U4A, U5A, U6, Q11, Q12, and Q15. This circuit converts the
output of the Variable Gain Amplifier into pulse length output. This pulse length output is the Power Period
(Power P) signal that is sent to the Steering Logic CCA.
2.3.2.4.1 Power Measurement CCA (1A1A3) Detailed Circuit Theory.- Refer to Figure 11-10. The Keyed
1350-Hz Tone from the Monitor A CCA enters the Power Measurement CCA via connector P1 pin 5 and
is applied to emitter follower Q5. The Ident Tone Enable signal at connector P1 pin 6 and is applied to the
base of transistor switch Q6. Under normal conditions, the base of Q6 is held HIGH by the Ident Tone
Enable signal. This turns on Q6 and applies a ground to the base of Q5; turning Q5 off. When the TEST
SELECT switch is placed in the IDENT position, the Ident Tone Enable signal goes LOW; Q6 is turned off
and Q5 is turned on. Q5 amplifies the Keyed 1350-Hz Tone and applies it to buffer amplifier U1 via
potentiometer R16. Potentiometer R16 is the Volume Control and adjusts the gain of U1. The amplified
output of U1 exits the CCA via connector P1 pin 7 as the Ident Audio signal and is applied to a panel
installed speaker.
MODEL 1119 DME
Rev. D December, 2002 2-17
Figure 2-6. Power Measurement CCA Block Diagram.
Detected RF pulses (aerial samples or simulated transmissions) enter the CCA via connector P1 pin 1 and
are applied to a peak detector circuit which consists of voltage comparator U2 and detector diode CR1. The
output of the peak detector circuit is applied to the non-inverting input (pin 2) of differential amplifier U3A.
The inverting input (pin 1) of U3A is driven by a gating network consisting of Q7 thru Q10.
The Tx Power Enable signal at connector P1 pin 3 is applied to the base of emitter follower Q9. The S.G.
MODEL 1119 DME
2-18 Rev. D December, 2002
Level Enable signal enters the CCA via connector P1 pin 2 and is applied to the base of emitter follower Q7.
When the input of Q7 or Q9 is LOW, the device is activated which turns on FET Q8 or Q10, setting the gain
of amplifier U3A. The Tx Power Enable reference is matched to the S.G. Level Enable by Matching
potentiometer R36. The DC output of U3A is applied to a voltage-to-frequency converter circuit and a
voltage-to-period converter circuit.
The voltage-to-frequency converter circuit consists of U3B, Q13, and U4B. This circuit generates the Power
(F) signal. The output of U3A is amplified by U3B, buffered, inverted, and amplified by Q13, and applied
to U4B. U4B is a timing circuit configured to oscillate and provide a frequency output. The current thru
Q13 adjusts the operating frequency of U4B.
The voltage-to-period converter consists of U6 and U4A. This circuit generates the Power (P) signal. The
output of U3A is applied to the non-inverting input (pin 2) of voltage comparator U6. The level applied to
the inverting input of U6 is determined by the feedback supplied by Q12 and the setting of Power Adjust
potentiometer R54 and Q11. The output of U6 is applied to U4A. U4A is a timing circuit configured to
provide a pulse output. The length of the pulse output is determined by U6. Q11 provides a constant current
source, which regulates the charge rate on C18. This charge rate is controlled and calibrated by Power
Adjust potentiometer R54. During set up and calibration a fixed level of power is transmitted and R54 is
used to calibrate the output of U6 and determines the output pulse length of U4A.
As the input voltage increases, both the frequency and period output of U4A and U4B increase
proportionally. These outputs are inverted by Q14 and Q15, and divided by ten by dual decade counter U5A
and U5B. The outputs of U5A and U5B become the POWER (F) and POWER (P) signals that exit via
connector P1 pins 9 and 8 and are applied to the Steering Logic CCA.
Since +5 Vdc is applied to the Test Panel Assembly only upon demand, via the Display switches, the 12
Vdc is not applied to the Power Measurement CCA unless +5 Vdc is present. This is regulated by the action
of transistors Q1, Q2, Q3, and Q4.
2.3.2.5 Steering Logic CCA (1A1A4) Block Diagram Theory.- Refer to Figure 2-7. The Steering Logic
CCA provides data for time interval measurement and display on the Test Panel Assembly LED Display.
Parameter display signals from the Test Panel Assembly are applied to the Data Select circuit. This circuit
consists of steering diodes CR1 thru CR10, NAND gates U1 thru U3 and several other components. The
Data Select circuit monitors the parameter display signals and provides select signals to the appropriate
circuit.
Time interval select parameters from the Monitor A CCA and the Time Limit signal are applied to the Time
Interval Measurement circuit. This circuit consists of multiplexer U10, monostable multivibrator U12 and
NAND gates U11 and U13. It monitors the time interval select parameters and generates the Time INT
Enable and Stop signals which are applied to the Time Interval CCA.
The Clock Display circuit consists of multiplexer U14. It receives a parameter selected for display and
allows the parameter to be applied to the Display CCA as the Display Clock signal.
MODEL 1119 DME
Rev. D December, 2002 2-19
Figure 2-7. Steering Logic CCA Block Diagram.
The Display Reset Trigger circuit consists of multiplexer U9 and counter U15. This circuit receives the
INTRG Efficiency (INTRG E), Time INT Reset, and Power (P) signals. It outputs the proper signal
according to which parameter is selected to be displayed and the status of the select line. The output of the
Display Reset Trigger circuit is the Reset Trig signal and is applied to the Display CCA.
MODEL 1119 DME
2-20 Rev. D December, 2002
The 50-MHZ signal from the Signal Generator CCA is applied to the 50-MHZ Divider circuit. This circuit
consists of dividers U4 thru U8. It provides a 1-kHz signal to the Display Clock and a 1-Hz signal to the
Display Reset Trigger circuit.
2.3.2.5.1 Steering Logic CCA (1A1A4) Detailed Circuit Theory.- Refer to Figure 11-11. The Steering
Logic CCA has ten selectable inputs, which are governed by the position of the TEST SELECT switch.
When an input is selected it is applied to the cathode of steering diodes CR1 thru CR10 or directly to an
input of NAND gates U2A, U2B, or U3B. The inputs to NAND gates U1A, U1D, U2A, U2B, and U3B are
normally held HIGH by pull-up resistors R1 thru R10.
When an input line is selected it is pulled LOW. This LOW is applied to the appropriate NAND gate input
line. The LOW on the input of the NAND gate causes its output to go HIGH.
The outputs of NAND gates U1A, U1D, U2A, U2B, and U3B are connected to the select inputs of
multiplexers, U9, U10, and U14.
U9 and U14 are 8:1 multiplexers capable of selecting one bit of data from up to eight sources. U10 is a dual
4:1 multiplexer and is capable of selecting two bits of data from up to four sources.
Multiplexer U10 receives the 1st Sig Gen, 1st TX, 2nd Sig Gen, 2nd TX, INTRG Delay (INTRG D), and
Replies Delay(Relies D) data signals from the Monitor A CCA. These signals enter the CCA via connector
J2 pins 30, 29, 4, 5, 28, 6, respectively. U10 supplies two outputs (Stop and Start) which are applied to
NAND gates U11A and U11B and used for time interval measurement.
Multiplexer U14 receives the 1st Sig Gen, EXT, Time INT CLK, Replies Efficiency (Replies E), TX PRF,
and Power data signals via connector J2 pins 30, 19, 20, 14, 15, 16, respectively. When a parameter is
selected for display, the select lines for U14 designate the appropriate input signal for routing to the output
of U14. The output of U14 (pin 5) is the Display Clock signal that exits the CCA via connector J2 pin 25.
Multiplexer U9 receives the Time INT Reset and Power (P) data signals via connector J2 pins 12 and 11.
It supplies the Reset Trig to the Display CCA via connector J2 pin 13.
When the SG Level (J1 pin 4) or TX PWR (J1 pin 9) inputs are selected, output signals SG Level Enable
and TX Power Enable signals are generated. These signals exit the CCA via connector J2 pins 7 and 17.
These signals are generated to provide gating for power measurement within the Power Measurement CCA.
When one of the Time Interval Select parameters are chosen for display, the select line (pin 7 and 9) of
multiplexer U10 route the appropriate Start and Stop signals to NAND gates U11A and U11B. When a Start
pulse arrives it is applied to pin 1 of NAND gate U11A. U11A is enabled by the Count Up pulse which
enters the CCA via connector J2 pin 8.
MODEL 1119 DME
Rev. D December, 2002 2-21
The output of U11A is applied to pin 9 of NAND gate U13C. NAND gates U13A and U13C are configured
to function as an R-S flip-flop that is enabled by the output of U11A. The output of this flip-flop is the time
interval measuring gate which exits the CCA via connector J2 pin 27 as the Time INT Enable signal.
The output of U11A is also applied to the 1A input (pin 1) of monostable multivibrator U12A. U12A has
an output pulse length of 55 Fs, however, the Time Limit signal which is applied to U12A via transistor Q3,
modifies this period. The Time Limit signal is active for signal generator interrogation spacing and
transmitter pulse pair spacing. The output pulse length of U12A can be further modified for X or Y-Channel
operation by terminals E1-E2. Terminals E1-E2 are jumpered for X-Channel operation; the jumper is
removed for Y-Channel operation.
If a Stop pulse arrives before U12A times out, flip-flop U13 is reset by the pulse generated by NAND gates
U11B, U11C, and U13D. The Time INT Enable is terminated and a Stop signal is generated. The Stop
pulse exits the CCA via connector J2 pin 26, this ends the time interval measurement.
If no Stop pulse arrives, U12A times out generating a Stop signal via pin 6 of NAND gate U13B. The Stop
signal exits the CCA via connector J2 pin 28. The 1Q output (pin 13) of the U12A is also connected to the
2A input (pin 9) of U12B. U12B provides a 6 Fs signal to the time interval measurement circuits and ends
the Time INT Enable signal.
The INTRG (E) signal is applied to the CPO input (pin 1) of dual decade counter U15. U15 divides this
signal by a factor of 100 in order to produce 100 samples for display purposes. The Q3 output (pin 9) of
U15 is applied to the I7 data input (pin 12) of multiplexer U9.
When a parameter is selected for display, the select lines for U9 designate the appropriate input signal for
routing to the Z output (pin 5) of U9. This output becomes the Reset TRIG signal that exits the CCA via
connector J2 pin 13.
The 50-MHZ signal from the Signal Generator Video CCA enters the Steering Logic CCA via connector
J1 pin 23 and is applied to an amplifier circuit that consist of Q1, Q2, and several other components. The
signal is amplified and applied to a divider circuit which consists of counters U4 thru U8. The circuits of
U4, U5, and U6 divide the input frequency by 50,000 to generate a 1-kHz signal that is applied the I3 input
(pin 1) to U14. The circuits of U7 and U8 further divide the 1-kHz signal by a factor of 1,000 and generate
a 1-Hz signal that is applied simultaneously to the I2, I3, I4, and I5 inputs to U9. TP1 is provided to monitor
the 50-MHZ signal; TP2 is provided to monitor the 1-Hz signal.
2.3.2.6 Calibrated Attenuator (1A3) Circuit Theory.- Refer to Figure 11-12. The Calibrated Attenuator is
an assembly that provides fixed and variable RF signals to the Diode Modulator Assembly (1A9) for test
purposes. The Shaped RF at enters via connector J2 and is routed via a coupling element to a fixed RF
output connector. This fixed signal exits via connector J3 as the Shaped RF Return signal. The Shaped RF
signal also routed via a coupling element to the variable output connector J1 and to 50 ohm termination R2.
The coupling of this circuit can be varied to produce an attenuated output from 0 to 80 dBm. The Calibrated
Attenuator has an insertion loss of approximately 13 dB.
MODEL 1119 DME
2-22 Rev. D December, 2002
2.3.2.7 Detector Assembly (1A4/1A5) Circuit Theory.- Refer to Figure 11-13. A modulated RF signal is
sent to the Detector Assembly. This signal is detected to provide an audio signal corresponding to the
original modulation. Detector Assembly (1A4) is the TX Power Detector. It provides a sample of the
transmitted reply for output power measurement. Detector Assembly (1A5) is the Monitor Detector. It
provides a signal for the monitoring circuits to examine for correct transmission.
The Sample RF signal, from either the Directional Coupler or the ANT Sample, is applied to RF connector
J1. The signal is then envelope detected by diode CR1. The resulting audio signal level is applied to a
buffer amplifier which consists of U1, Q1, Q2, and associated components. U1 buffers the signal and
applies it to a current amplifier consisting of transistors Q1, Q2 and their associated components. Diode
CR2 and resistor R7 provide negative feedback to pin 2 of U1 to control the gain of the complete amplifier
buffer stage. Potentiometer R6 is used to null the offset voltage at the inputs of U1. The buffered output
signal exits the Detector Assembly via coaxial connector J2 as the Detected Sample Signal.
Supply lines for 12 Vdc are applied to feedthrough capacitors C1 and C2, then to terminals E1 and E3.
2.3.2.8 Directional Coupler Assembly (1A6) Circuit Theory.- Refer to Figure 11-1. The Directional
Coupler is a mechanical assembly that consists of a center conductor, in a metal housing which forms a
transmission line, and two secondary conductors. The center conductor has a coaxial connector on each end,
providing a direct link between antenna and transmitter/receiver. The secondary conductors have a coaxial
connector on each end, the other end is terminated with a 50 ohm load. These secondary lines, in
conjunction with the center conductor, form quarter wave directional couplers.
Interrogations arriving at the antenna, and replies generated by the transponder are routed to/from the
antenna via the common primary line J1-J2.
A sample of the transmitted reply energy (about 1/1000 or -30 dB) is coupled to one of the secondary
conductors. This sample exits the Directional Coupler Assembly via RF connector J3. This signal is then
routed to the Detector Assemblies.
A controlled RF signal level, from the Diode Modulator Assembly, is injected at connector J4. This signal
is coupled to the center conductor by the remaining secondary conductor. The direction of coupling routes
this signal to the transmitter/receiver connector J1 to test the receiver system as a simulated interrogation.
2.3.2.9 Monitor Transfer Assembly (1A7) (Dual Systems Only) Circuit Theory.- The Monitor Transfer
Assembly is a two-sided assembly. One side is an RF Diode Switch which keeps the monitor signals
correct. The other side is the electronic logic and relay driver circuits.
Refer to Figure 11-14. +28 Vdc from DME system #1 and #2 enter at connector P1 pins 1 and 2 and are
ORed together by diodes CR1 and CR2. From CR1 and CR2 the +28 Vdc is applied across fuse F1 to the
inputs of U1 and U3. U1 is a +12 volt regulator that converts the +28 Vdc into +12 Vdc. The +12 Vdc
output of U1 is used as a supply voltage for the Monitor Transfer Assembly (1A7). The output of U1 is also
applied to the input of positive to negative voltage converter U2.
MODEL 1119 DME
Rev. D December, 2002 2-23
U2 converts the +12 Vdc into -12 Vdc. The output of U2 is used as a supply voltage for the Monitor
Transfer Assembly.
U3 is a DC to DC converter. It converts the +28 Vdc into +5 Vdc. The output of U3 is used as a supply
voltage for the Monitor Transfer Assembly.
The ANT.CAP #1 and ANT.CAP #2 signals enter at connector P1 pins 21 and 22 and are applied to
darlington switch U4. U4 converts the 5 volt, 100 ms ANT.CAP #1 and ANT.CAP #2 pulses into pulses
suitable for switching the Transfer Switch Assembly. The outputs of U4 are the Select #1 and Select #2
signals that exit at connector P1 pins 17 and 16 respectively. During switching time, transistor Q3 is turned
off and the Antenna Interlock output is pulled HIGH by pullup resistor R20 on the Transmitter Video CCA.
This action inhibits the Transmitter Video CCA, disabling the transmitter.
The Remote Off signal at connector P1 pin 13 is applied to the non-inverting input of voltage comparator
U5. U5 converts the Remote Off signal to TTL levels and applies it to the junction of diodes CR4 and CR5.
From CR4 and CR5 the signal exits at connector P1 pins 24 and 25 as the R. Off (TTL) #1 and the R. Off
(TTL) #2 signals, respectively.
P1 pins 8 and 9 are connected to the transfer relay indicator contacts. The indicator contacts act as a single
poll double throw switch with the center contact connected to ground.
When pin 8 is at ground potential, transmitter #2 is connected to the antenna and CR10 will illuminate on
the front panel to indicate #2 is on. CR13 is connected to the remote control system and to transmitter #1
for indication of the operating transmitter.
When P1 pin 8 is LOW, current flows through CR10 and causes Q2 to conduct providing a positive voltage
at terminal E3-E4. At the same time CR9 is not conducting and R20 pulls the base of Q1 HIGH, turning
it off. Terminals E1-E2 are placed at -12 Vdc by resistor R13.
Refer to Figure 11-15. This action causes a positive voltage at C2 and C6 and a negative voltage at C3 and
C5. The positive voltage at C2 and C6 cause diodes CR1, CR2, CR5, and CR6 to be forward biased and
conduct. Diodes CR3, CR4, CR7, and CR8 are reversed biased and are not conducting.
Thus in this state the antenna sample input is connected to the Monitor 2 antenna sample input and the
Attenuated Standby RF is connected to the Monitor 1 antenna sample.
When the relay contacts are in the opposite state the reverse connection is true.
2.3.2.10 RF Generator (1A8/1A23) Assembly Block Diagram Theory.- Refer to Figure 2-8. The 1118
DME uses two RF Generator Assemblies. RF Generator Assembly (1A23) is located in the Transponder
section of the system. RF Generator Assembly (1A8) is located in the Monitor section of the system. Both
RF Generator Assemblies operate basically the same. The RF Generator (1A23) provides a drive signal to
the Power Amplifier Assembly (1A32). It also produces a low level RF signal which is used as the local
oscillator injection signal for the First Mixer Assembly (1A21). RF Generator (1A8) provides a drive signal
to the Diode Modulator Assembly (1A9).
MODEL 1119 DME
2-24 Rev. D December, 2002
The output frequency of the RF Generator Assembly can be set to any one of the 252 channels in the 962
to 1213-MHz band by the use of internal channel select switches. The RF Generator (1A8) used in the
Monitor is identical to the RF Generator (1A23) that is used in the Transponder. In the Monitor application,
additional inputs from the SIGNAL GENERATOR FREQ switch allow the generator frequency to be set
200-kHz or 900-kHz above or below the selected channel frequency.
The RF Generator consists of two CCAs, the Synthesizer and VCO buffer. These CCAs are enclosed in an
RF-shielded module, which has one power and control connector. On the back of this enclosure are two RF
connectors. For RF Generator Assembly (1A8), only the top connector is used. The connector for receiver
local oscillator is disconnected and covered to prevent RF leakage.
2.3.2.10.1 VCO Buffer (1A8/1A23) Block Diagram Theory.- Refer to Figure 2-9. The VCO Control
Voltage signal from the Synthesizer CCA is sent to the Voltage Controlled Oscillator U1. U1 produces an
RF signal that is proportional to the applied control voltage. The output of U1 is applied to the Buffer
Amplifier circuit.
The Buffer Amplifier circuit consists of transistors Q1 thru Q7. It amplifies the signal and provides the
necessary isolation between the various stages within the circuit. The Buffer Amplifier provides an RF
Generator output signal that is used by the Transponder and Monitor sections in the DME. The level of the
RF Generator output signal is determined by the level of the VAR VCC signal from the Synthesizer CCA.
The Buffer Amplifier circuit also supplies an RF signal to the Directional Coupler circuit.
Pickoffs in the Directional Coupler circuit provide a Local Oscillator signal to the First Mixer Assembly;
they also provide the Prescaler Drive and Detected RF signal to the Synthesizer CCA.
MODEL 1119 DME
Rev. D December, 2002 2-25
Figure 2-8. RF Generator Assembly Block Diagram.
2.3.2.10.2 VCO Buffer (1A8/1A23) Detailed Circuit Theory.- Refer to Figure 11-16. The VCO Buffer
CCA contains a voltage controlled oscillator (U1) that generates approximately 20 mW of RF signal at a
frequency determined by the VCO control voltage, which is supplied by U16 on the Synthesizer CCA. For
the DME frequency band of 962 to 1213-MHz, a control voltage of two to ten volts will sweep the spectrum.
Consequently, there is approximately a 30-MHz change in frequency per volt of change in the control
voltage.
MODEL 1119 DME
2-26 Rev. D December, 2002
Figure 2-9. VCO Buffer Block Diagram.
The output of U1 is attenuated by a 10 dB attenuator that consists of R1, R2, and R3. This allows
approximately 2 mW to be applied to the base of Q1. Q1 and Q2 each operate as Class A amplifiers with
a collector voltage of approximately +7 V and gain of 11 dB. The resistive attenuators R1, R2, and R3
(before) and R12, R13, and R14 (between) Q1 and Q2 provide isolation between amplifying stages to
prevent one stage from loading the next. This provides the necessary isolation for U1. Transistors Q5, Q6,
Q7, and associated circuitry provide active bias control for the amplifier stages of Q1, Q2, and Q3. This bias
control is used to maintain optimum quiescent operating conditions in the buffer amplifier. With an input
of approximately 13 mW into Q3 and the primary collector voltage of 18 volts, Q4's output into 3 dB
attenuator AT1 is approximately 700 mW. From AT1 the signal exits the CCA via RF connector P1 as the
Generator RF (350 mW) signal. The actual level of this signal is 250 mW or 450 mW. The collector
voltage for Q3 (derived from Q3 on the Synthesizer CCA) is controlled by the Power Set potentiometer R38.
The VCO Buffer CCA contains three stripline directional couplers. The first coupler, from the collector
circuit of Q3, is 10 dB. It is for the local oscillator output which exits at RF connector P2. This is not used
in RF Generator Assembly (1A8) and terminates with a 50-ohm resistor. The second directional coupler
feeds a sample of the RF signal via R37 through the center plate to frequency prescalers U1 and U4 on the
Synthesizer CCA. The third coupler provides a signal, which is detected and used as feedback voltage to
U18 on the Synthesizer CCA.
2.3.2.10.3 Synthesizer CCA (PN 012036-0001) (1A8/1A23A1) Block Diagram Theory.- Refer to Figure
2-10. The Prescaler Drive signal from the VCO Buffer is sent to a Frequency Divider circuit that consists
of dividers U1 and U3. This circuit divides the Prescaler Drive signal by either 64/65 or 40/41 dependant
on the circuit installed in the factory. The ouput of U3 is sent to U8, Preselector/Control Logic circuit.
MODEL 1119 DME
Rev. D December, 2002 2-27
Figure 2-10. Synthesizer CCA Block Diagram.
MODEL 1119 DME
2-28 Rev. D December, 2002
Information from the Test Panel Assembly and channel select information from the Channel Select Switches
are sent to the Divide by N Counter circuit. It should be noted that only the Synthesizer CCA that is
installed in RF Generator (1A8) receives inputs from the Test Panel Assembly. The Synthesizer installed
in RF Generator Assembly (1A23) receives no such inputs. The Divide by N Counter circuit consist of
divide by N counters contained in the U8 Control Logic EPLD. The settings of the Channel Select Switches
and the Test Panel Information determine the output frequency of the RF Generator Assembly.
The 10-MHz Reference Oscillator Y1 produces a stable 10-MHz signal that is sent to a Frequency Divider
circuit within U8. This circuit divides the 10-MHz signal by 400 to produce a 25kHz signal that is sent to
the Phase Detector circuit.
The Phase Detector contained within U8 compares the 25kHz variable frequency to the 25kHz reference
frequency. The phase detector circuit then outputs a pulsed signal at pins 78 and 79 that is filtered to a DC
voltage and used to bring the phase difference of the two signals to zero. This DC voltage is sent to a loop
filter circuit that consists of U5 and associated circuitry. U5 amplifies this voltage, provides the filtering
along with a 100kHz low pass and a 25 kHz notch filter for synthesizer loop stability, and applies the
resultant voltage to the VCO Buffer for tuning the voltage controlled oscillator.
The Frequency Unlock Amplifier circuit consists of transistors Q1 and Q2. During a frequency unlock
condition, Q1 and Q2 amplify the Phase Unlock signal from U8are and drive the frequency unlock indicator.
The DET RF (Detected RF) signal from the VCO Buffer is sent to the Power Set Buffer Amplifier circuit.
This circuit consists of amplifier U7 and transistor Q3. This circuit buffers and amplifies the DET RF signal
dependant upon the setting of Power Set potentiometer R38. The output of this circuit is sent to the VCO
Buffer to set the output power for the RF Generator Assembly.
2.3.2.10.4 Synthesizer CCA (012036-0001) (1A8/1A23A1) Detailed Circuit Theory.- Refer to Figure 11-
17. The operating frequency of the 1118 system is generated by a frequency synthesizer phase-locked loop
that may be set for any one of the 252 channels in the 962 to 1213-MHz DME frequency band.
The Prescaler Drive signal from the VCO Buffer is applied to the input (pin 1) of U1. U1 divides the signal
by 4 (or 64/65 for the MC12054AD) and applies it to the input (pin 15) of divider U3. U3 divides the signal
by a 10/11 and applies it to the Fin input (pin 92) Control Logic EPLD U8.
The combination of U1 and U3 and U8 form a circuit that is known as a "pulse swallowing prescaler". Pulse
swallowing is a technique used to enable a synthesizer to make step sizes equal to the reference frequency
used at the phase detector even though the signal is prescaled. When a synthesizer has a fixed prescaler (say
divide by 64) the smallest step size in the output frequency is equal to the reference frequency times the
prescaler factor. In this case, if the synthesizer used a fixed divide by 64 prescaler, the smallest step
obtainable in the output frequency would be 64 times 25-kHz or 1.6-MHz. The dual modulus prescaler
(divide by 64/65) divides by 64 for part of the reference period, and by 65 for the remainder, with the portion
controlled by the control logic contained in U8. By varying the ratio of time spent dividing by 64 or 65,
steps in the output frequency equal to the reference frequency of 25-kHz are obtainable.
MODEL 1119 DME
Rev. D December, 2002 2-29
The three channel-selector switches, S1 (a 256-MHz step), S2 (a 16-MHz step), and S3 (a 1-MHz step),
preset the counters for a frequency 1-MHz less than the assigned channel frequency. Integrated circuit U8
is programmed by the SIGNAL GENERATOR FREQ switch for an additional frequency division of 100-
kHz, 800-kHz, 1.0-MHz, 1.2-MHz and 1.9-MHz. In the FO position, the additional 1-MHz is added to what
is selected by channel-selector switches. The SIGNAL GENERATOR FREQ switch allows the generator
frequency to be switched 200-kHz or 900-kHz above or below the selected channel frequency. RF Generator
Assembly (1A8) has the control circuits U8 hard-wired for a permanent FO frequency.
Control Logic Rate test point TP1 is provided for monitoring the output of U8 with external test equipment.
The 10-MHz reference oscillator Y1 produces a stable 10-MHz signal which is applied to U8 which divides
the 10-MHz signal by 8 and applies a 1.25-MHz signal to the FOUT (pin63) of Control Logic EPLD U8.
Test Point TP2 is provided for monitoring the 1.25-MHz signal with external test equipment.
The PHASE_UP/Phase_Down output (pin 78 and 79) of U8 is a stepped voltage, which is applied to the
inverting input (pin 2) of amplifier U5. U5 filters and amplifies the signal and applies it to the tuning
voltage input of VCO 1A8/1A23U1. The output of U5 varies in such a manner as to compensate for any
off-frequency conditions. Phase Det Out test point TP3 is provided for monitoring this DC voltage with
external test equipment. Transistors Q1 and Q2 form an indicator driver to indicate that the phase loop is
not locked. With Q1 and Q2 on, a ground is applied to the cathode of LED DS1 causing it to illuminate.
The DET RF from the VCO Buffer is applied to the non-inverting input (pin 3) of U7. The potential applied
to the inverting input (pin 2) of U7 is determined by a voltage divider that consists of R40 and Power Set
potentiometer R38. The output of U18 is applied to the base of Q3. Q3 amplifies the signal and sends it
to the VCO Buffer as the VAR VCC signal. The VAR VCC signal is applied to the collector of Q3 and sets
the level of the Generator RF (350 mW) signal.
Integrated circuit U6 is a +15 Vdc regulator, used primarily in the VCO circuit and in the first two RF
Amplifiers on the VCO Buffer.
2.3.2.11 Diode Modulator Assembly (1A9) Block Diagram Theory.- Refer to Figure 2-11. The Diode
Modulator Assembly provides a number of test signals which are used for checking the performance of the
Transponder. The Diode Modulator Assembly produces simulated pulse pairs, a CW preset level, an
alternating fixed/variable-level signal, and simulated detected interrogation pulses.
The Shaped RF Return signal is sent to the Detected Amplifier circuit which consists of U3 and Q12. This
circuit provides a feedback signal to the Mod Driver circuit and produces the DET INTRG signal which is
sent to the Monitor A CCA.
The Shaped Pulse or a DC level (as determined by the position of the SIGNAL GENERATOR CW switch)
is sent to the Input Amplifier circuit which consists of U2 and Q11. This circuit provides isolation between
the shaped pulse source and the Mod Driver circuit.
The Mod Driver circuit consists of transistors Q7 thru Q10. It receives the detected interrogation feedback
signal from the Detected Amplifier circuit and combines it with the Shaped Mod Pulse signal and provides
MODEL 1119 DME
2-30 Rev. D December, 2002
the necessary drive for the Diode Modulator circuit.
The GEN RF signal is routed to the Input Switch Driver circuit, which is operated by a gate pulse. This
circuit consists of U1A, U1B, Q1, and Q2. During the period of the gate pulse the GEN RF signal is sent
to the Diode Modulator circuit. When the gate pulse is not present, the GEN RF signal is sent to dummy
load R1.
The Diode Modulator circuit consists of diodes CR7 thru CR10. The output of the Diode Modulator circuit
is the Shaped RF signal and is either a shaped pulse pair or a continuous level as determined by the position
of SIGNAL GENERATOR CW switch. A portion of the Shaped RF output is coupled through the coupling
elements of the Directional Coupler circuit (C22, R2) and sent to the Diode Switch circuit.
The Alternate signal is sent to the Output Switch Driver circuit. This circuit consists of U1C, U1D, Q3 thru
Q6, and provides the necessary drive to the Diode Switch circuit.
MODEL 1119 DME
Rev. D December, 2002 2-31
Figure 2-11. Diode Modulator Assembly Block Diagram.
The Diode Switch consists of diodes CR11 thru CR21. This circuit selects either the Shaped RF Pulses,
from the Directional Coupler circuit, or the Attenuator RF signal, from the Calibration Attenuator Assembly.
The output of the Diode Switch circuit is the Monitor RF signal that is sent to the system monitoring circuits.
MODEL 1119 DME
2-32 Rev. D December, 2002
2.3.2.11.1 Diode Modulator Assembly (1A9) Detailed Circuit Theory.- Refer to Figure 11-18. The Diode
Modulator Assembly consists of the Diode Modulator (1A9) and the Modulator Driver CCA (1A9A1). It
provides simulated interrogation pulse pairs which continually test the Transponder. This assembly utilizes
four inputs from the Signal Generator Video CCA. These signals are: Shaped Pulse, Gate Pulse, Alternate,
and a power supply voltage. Additionally, it receives CW RF from the RF Generator Assembly, the Shaped
RF Return and Attenuator RF signals from the Calibrated Attenuator Assembly.
The GEN RF signal from the RF Generator Assembly (1A8) enters at connector P5 and is normally applied
to 50 ohm load, R1. However, when a simulated interrogation is generated, the GEN RF is switched from
the R1 to the modulating circuits of CR7 thru CR10. Drive for the switching is Gate Pulse signal from the
Signal Generator Video CCA (1A10). The Gate Pulse is buffered by U1A and U1B before being applied
to the base of Q2.
The RF operation of the input switch minimizes the Voltage Standing Wave Ratio (VSWR) at the input.
50 ohm load, R1, is 1/4 wavelength from the ON path pin diode, CR1. Pin Diode CR2 is in series with the
ON path diodes, so that all diodes have the same RF impedance (even when they are changing states). As
CR1, CR3, CR4, and CR5 turn on, CR2 shorts R1. This short reflects back 1/4 wavelength and appears as
an open. The diodes used are slightly inductive at these frequencies. These inductances are canceled by
stripline adjusters between CR3 and CR4 and CR5. These are broadband adjustments and do not require
field adjustments (even if diodes are replaced).
The GEN RF is routed via C5 to the diode modulator circuit for pulse shaping.
The diode modulator consists of pin diodes CR7 thru CR10 and associated components. Modulation control
is via L2 thru L7 and is supplied by the Modulator Driver CCA. The diode modulator shapes the top 35 dB
of the switched RF. CR7 and CR10 are biased to the 50 ohm level, while CR8 and CR9 are off.
Consequently, the RF input sees a 50 ohm load at CR7. As shaping current is applied, the impedance of
CR7 moves toward a short and the impedance of CR8 moves from maximum toward a short, shaping the
RF input. CR9 and CR10 form an identical circuit, which is in series with the RF and is driven by the same
video signal.
The Shaped RF exits via connector P3 and is applied to the Calibrated Attenuator Assembly (1A3). The
signal at P3 is routed through the attenuating elements of the Calibrated Attenuator Assembly back to
connector P2 as the Attenuator RF. This signal is applied to pin diode switch CR18 thru CR21. Also
applied to the pin diode switch circuit is the output of a directional coupler circuit that consists of C22 and
R2.
Control signals from the modulator driver at L8 and L9 select either the shaped RF pulses (from the
directional coupler and routed via CR11 thru CR17) or the output of the Calibrated Attenuator (via P2 and
CR18 thru CR21) to output via connector P1. The P1 output is Monitor RF signal that is used to interrogate
the Receiver and is sent to the Directional Coupler Assembly. This is a fixed RF output level at -15 5 dB
with respect to the variable RF output with the Calibrated Attenuator set to 0 on the dial.
MODEL 1119 DME
Rev. D December, 2002 2-33
The Gate pulse from the Signal Generator Video CCA at P1 pin 13 is routed via the buffer gates of U1A and
U1B to the base of Q2. The pulse at the collector of Q2 is routed via Q1 and E1 to switch the output of the
diode modulator.
The Alternate signal enters at connector P6 pin 15 is buffered by U1C and inverted by U1D. This generates
opposing signals at the bases of Q5 and Q6. The signals on the collectors of Q5 and Q6 are routed via
Q3/E7 and Q4/E8 to the output switch (CR11 thru CR17 and CR18 thru CR21). Q3/CR3, Q4/CR4 and
associated components are current sources for the switching signals of Q5 and Q6 respectively. When the
TEST SELECT switch is placed to the % EFF position, this circuit is enabled and every other interrogation
is utilized to check reply efficiency.
The Shaped RF Return signal from the Calibrated Attenuator enters via connector P4 and is routed, as
feedback, to detector CR22, C26, and L10. The detected pulses are then isolated by unity-gain amplifier (U3
and Q12). The output of the unity-gain amplifier is the detected interrogation signal that is applied as
feedback to the modulation driver Q10. This signal also exits the assembly via connector P6 pin 1 as the
DET INTRG signal.
The Shaped Mod Pulse at P6 pin 9 is applied to unity-gain amplifier (U2 and Q11), before being mixed with
the feedback signal (from Q12) and applied to modulator driver Q10.
Both isolation amplifiers (U2 and U3) require DC offset centering. DC offset for U2 is set by Input Offset
ADJ potentiometer R39 and can observed at TP1 even when RF is not applied. DC offset for U3 is set by
DET Offset ADJ potentiometer R75 and can be observed at TP2 only with RF applied.
The Mod Driver circuit is a dual differential amplifier, comprised of transistors Q7, Q8, Q9, and Q10. The
reference level of Q10 is derived from potentiometer R12, and stabilizing diode CR5. Mod Level ADJ
potentiometer R12 establishes the static level of the modulator diodes. When it is set just below conduction,
load diodes CR7 and CR10 will be 50 ohms. Q7, Q8, and Q9 provide the necessary drive to the modulation
diodes.
2.3.2.12 Signal Generator Video CCA (1A10) Simplified Block Diagram Theory.- Refer to Figure 2-12.
The primary function of the Signal Generator Video CCA is to produce signals and gates that are used to
produce simulated interrogation pulses for testing in the Diode Modulator Assembly. It also produces a 50-
MHZ system clock and simulated interrogation and reply signals which are monitored for test purposes.
U6 is a 50-MHZ oscillator that produces a stable 50-MHZ signal that is used as the system clock. This 50-
MHZ signal is also sent to the Interrogation Synchronization circuit to synchronize the interrogation pulses
with the 50-MHZ system clock.
The PRF Generator consists of timer U1. The PRF Control signal from the Monitor Control Panel Assembly
initiates the interrogation signal. The pre-set interrogation rate is 100 PPS. This rate can be changed by use
of the switches and controls on the Monitor Control Panel Assembly. The interrogations are sent to the
Interrogation Synchronization circuit.
MODEL 1119 DME
2-34 Rev. D December, 2002
Figure 2-12. Signal Generator Video Simplified Block Diagram.
The Interrogation Synchronization circuit consists of dual D-type flip-flop U2 and retriggerable multivibrator
U3. It synchronizes the interrogations with the 50-MHZ system clock. The synchronized interrogation
pulses are then sent to the Pulse Pair Generator and to the Gating circuit.
The Gating circuit consists of NAND gates U4A, U4B, U4D, and U5B. It receives the ALT Control signal
and the synchronized interrogations to produce the Delay Enable, EFF Enable, Alternate, and SIG GEN
Scope TRIG signals that are routed to the edge connector.
MODEL 1119 DME
Rev. D December, 2002 2-35
Pulse Pair Generator consists of timer U1B, retriggerable monostable multivibrator U11, monostable
multivibrator U13, U19, U20, NAND gate U18B, and associated components. This circuit produces the
Shaped Pulse Pairs (simulated interrogations), Test Pulse Pairs (simulated replies), Gate Pulse, Enable
TRIG, and Inhibit Pulse Pair TRIG signals that are routed to the edge connector.
2.3.2.12.1 Signal Generator Video CCA (1A10) Detailed Circuit Theory.- Refer to Figure 11-19 and Pulse
Timing Diagram, Figure 2-13. The switches and controls on the Monitor Control Assembly adjust and
control the various inputs to the Signal Generator Video CCA.
When the SIGNAL GENERATOR PRF switch is placed in the NORMAL position, the Signal Generator
Video CCA produces a fixed PRF of 100 PPS. When placed to the PRF (up) position, it enables the variable
SIGNAL GENERATOR PRF control. The variable SIGNAL GENERATOR PRF control potentiometer
can be set to adjust the PRF within the range of 25 to greater than 3600 PPS.
The SIGNAL GENERATOR SPAC switch and variable SIGNAL GENERATOR SPAC control
potentiometer provide a means to control the pulse spacing. When placed to the NORMAL position, a fixed
interrogation of 12 Fs (X-Channel) or 36 Fs (Y-Channel) is provided. When placed to the SPAC (up)
position, interrogation pulse spacing can be adjusted over the range of 8 to 40 Fs.
The SIGNAL GENERATOR CW switch provides the capability to have the Signal Generator Video CCA
output a calibrated signal. When placed to the NORMAL position, the output of the Diode Modulator
Assembly is pulsed RF. When placed to the CW (up) position, the output of the Diode Modulator Assembly
is an unmodulated CW signal, which is calibrated to 1 mW.
The SIGNAL GENERATOR FREQ switch is used for testing purposes. Its normal position is FO, which
is the operating frequency of the system. For testing purposes, however, this switch can be used to set the
monitor interrogation 200-kHz or 900-kHz in order to check bandpass characteristics of the receiver.
For circuit analysis purposes, we will begin with the SIGNAL GENERATOR PRF switch in the NORMAL
position, the SIGNAL GENERATOR SPAC switch in the SPAC position, and SIGNAL GENERATOR
FREQ switch in the FO position.
MODEL 1119 DME
2-36 Rev. D December, 2002
Figure 2-13. Signal Generator Video Pulse Timing (X-Channel).
MODEL 1119 DME
Rev. D December, 2002 2-37
The PRF Control signal enters via connector P1 pin 25 and is applied simultaneously to the discharge,
threshold, and trigger inputs (pins 1, 2, and 6, respectively) of timer U1A. This triggers U1A initiating the
interrogation signal. The composition of the interrogation signal is determined by the setting of the
front-panel switches and controls. The output of U1A (pin 5) is inverted by NAND gate U4C and applied
to the 2 CL input (pin 13) of dual D-type flip-flop U2. U2 is clocked by the 50-MHZ clock, thus
synchronizing the interrogation signal with the 50-MHZ clock.
When the TEST SELECT switch is placed in the % EFF position, the interrogation signal PRF is increased
from 100 to 1000 PPS. This PRF increase results from an enabling input from the TEST SELECT switch.
This input is the Pulse Rate Select MAN signal that enters via connector P1 pin 23. This signal causes Q1
and Q2 to turn on. In addition, during reply efficiency measurement, Calibrated RF and Fixed RF signals
are alternately generated.
During the Calibrated RF signal test, the output of the Diode Modulator Assembly is routed through
Calibration Attenuator Assembly (1A3) and is variable between the limits of 0 dBm and 80 dBm. This
variable signal level is used to measure reply efficiency.
During the Fixed RF output test, the RF output of the Diode Modulator Assembly is a fixed value of -15 5
dBm. This RF level represents a close-in aircraft, and is used to measure reply delay.
When the TEST SELECT switch is in the % EFF position, the Diode Modulator Assembly (1A9) is
switched alternately between the variable and fixed levels by control pulses generated on the Signal
Generator Video CCA (1A10).
The alternating function is initiated by D-type flip-flop U2A. The 1Q output (pin 5) of U2A is used as the
Delay Pulse trigger (TP2) and is the alternate input to NAND gate U5D. The output of U5D is controlled
by the SIGNAL GENERATOR CW switch, and is DC level when in the SIGNAL GENERATOR CW
switch is in the CW (up) position.
The 1Q output (pin 5) of U2A is also inverted by U5A to provide the EFF Enable signal. Test point TP3
is provided to monitoring of the EFF Enable signal.
The Signal GEN Scope TRIG pulse is also influenced by the alternate signal from U2A. This trigger pulse
is timed so that the variable signal is displayed at the beginning of the scope sweep period. The ALT
Control signal enters via connector P1 pin 29 and is applied through voltage divider R12 and R13 to the base
of Q3. When HIGH, the ALT Control signal turns on Q3 placing a ground on pin 4 of NAND gate U4B.
The alternate signal from the 1Q (pin 5) output of U2A is compared with the ALT Control by U4B and the
compared output is then applied to pin 12 of NAND gate U4D.
The 2Q "Not" output (pin 8) of U2B is applied as a trigger to 3 Fs multivibrator U3. When triggered, U3
provides a start pulse. The output of U3 is inverted by NAND gate U4A, and used to set an R-S flip-flop
which consists of NAND gates U7B and U7D. The output of the flip-flop is applied to NAND gate inverter
U7C and starts ripple counters U8, U9, and U10.
MODEL 1119 DME
2-38 Rev. D December, 2002
The resultant ripple counter output is the pulse pair spacing. The pulse pair spacing is selected by
hexadecimal switches S1, S2, and S3. Switch S1 adjusts the pulse pair spacing by .02 Fs per position; S2
adjusts the pulse pair spacing by .3 Fs per position; and S3 adjusts the pulse pair spacing by 5 Fs per
position.
The QD output (pin 12) of U10 is gated through NAND gates U12C and U12D and triggers multivibrator
U13. Integrated circuit U13 is a dual monostable multivibrator that is configured to have an output pulse
of 1 Fs. The 1Q output (pin 13) of U13 is inverted by NAND gate U15C. This inverted signal becomes the
Enable TRIG signal that exits the CCA via connector P1 pin 27. The 2Q "Not" output (pin 12) of U13,
resets R-S flip-flop U7B and U7D. The 1Q "Not" and 2Q "Not" outputs (pins 4 and 12) of U13 are gated
through U15D and become the Inhibit Pulse Pair TRIG signal that exits the CCA via connector P1 pin 26
and is used to trigger U16.
Refer to Figure 11-19 sheet 2. U16 is a dual monostable multivibrator. The Inhibit Pulse Pair TRIG is
inverted by NAND gate U18A and applied to the 2A input (pin 9) of U16A and the 1B input (pin 2) of
U16B. U16A is configured to have an output pulse of 1.0 to 3.9 Fs. This pulse length is set by adjusting
Width potentiometer R56. U16B is configured to have an output pulse of 7.2 to 8.8 Fs. This pulse length
is set by adjusting Intergate Width potentiometer R58. The 2Q "Not" output (pin 12) of U16B is applied
to pin 1 of NAND gate U15A and is used as a gating signal to generate Gate Pulse signal which exits the
CCA via connector P1 pin 28. The 1Q output (pin 13) of U16A is applied to the pulse shaper circuit.
Both interrogation pulses and test reply pulses are shaped by the pulse shaper circuit. The 1Q output of U16
(pin 13) is applied to the base of Q4. The pulse is amplified by Q4 and applied to base of Q5. The decay
time of the pulse is set by adjusting Decay potentiometer R63. The decay time is typically set for 1.5 .25
Fs. Q5 amplifies the signal and applies it to Q6. Potentiometer R65 controls the rise time of the pulse. It
is adjusted for a rise time of 1.5 .25 Fs. Q6, Q7, and Q8 further buffer and amplify the signal. The output
amplitude of Q8 is controlled by Amplitude Set potentiometer R72. The pulse amplitude is typically set for
approximately 1.5 volts. The interrogation shaped pulse pair and test pulse pair (reply) are steered to their
respective outputs through the action of two transistor shunt switches, Q10 and Q11. The 2Q and 2Q "Not"
outputs (pins 5 and 12) of multivibrator U16B are used to control the switches. The shaped pulse pair
(interrogation) is applied to the diode modulator for modulation of the RF signal through an integrated
circuit analog switch, U17. This analog switch selects either the CW mode (constant DC signal) or pulse
modulation of the RF signal. The shaped pulse pair can be monitored at test point TP6 and exits the CCA
via connector P1 pin 2 as the Shaped MOD signal.
The test pulse pair (reply) is also initiated by the start pulse, which resets R-S flip-flop U18B and U18C,
providing a negative trigger for dual one-shot multivibrator U19. The PRF Generator runs at approximately
800-Hz. This results in %EFF of 80% (interrogation rate at 1000). The pulse width from the 2Q output of
U19: 1) represents the TEST DELAY; 2) is variable by the MONITOR TEST DELAY potentiometer; and
3) is used to trigger the first section of U19. The 1Q and 1Q "Not" output widths are variable by the
MONITOR TEST SPAC potentiometer, and each is used to trigger one-half of multivibrator U20. The 1Q
"Not" and 2Q "Not" outputs of U20 are applied to U16 via NAND gate U18D, and represent test pulse pairs.
These test pulse pairs are applied to the Monitor A reply pulse input through the MONITOR TEST switch.
MODEL 1119 DME
Rev. D December, 2002 2-39
2.3.2.13 Monitor A CCA (1A11) Block Diagram Theory.- Refer to Figure 2-14. The transponder replies
are sampled by the Monitor Sample Probe in the antenna, detected, and fed to the Monitor A CCA for
evaluation of pulse spacing and reply delay. The Monitor A CCA provides constant monitoring of the
Receiver, Transponder, and Signal Generator providing Reply (D) and INTRG (D) signals to the Transmitter
Video CCA for analysis and adjustment of the system delay; 1350-Hz for audio monitoring and identity
keying; and 2nd TX Pulse, Reply (D) and INTRG (D) which are monitored to provide indications of
normal/fault conditions. The Monitor A CCA also provides outputs for processing to enable presentation
of the following parameters on the LED Display; SG SPAC, SG PRF, SG LEVEL, % EFF, DELAY, TX
PWR, TW PRF, and TX SPAC.
Figure 2-14. Monitor A CCA Block Diagram.
MODEL 1119 DME
2-40 Rev. D December, 2002
The Half-Amplitude Finder circuit consists of transistors Q1 thru Q14, Q19, delay line DL1, comparator U3,
and multivibrators U2 and U4. The purpose of this circuit is to find the half-amplitude point of the detected
pulse. The DET INTRG, DET TX, and Search Pulses are combined in this circuit and simultaneously
applied to a delay circuit and a peak riding circuit. The resultant outputs of the two circuits are then
compared by U3. The Half-Amplitude Finder circuit is enabled only when valid pulses are detected. It
outputs 0.1 Fs Half-Amp Triggers to the Transmitter Pulse Generator and the Reply Pulse Generator.
A 50-MHZ clock signal from the Signal Generator Video CCA is sent to the 50-MHZ Amplifier that
consists of transistors Q16, Q17, and NAND gate U11C. It amplifies and buffers the 50-MHZ signal before
sending it to the Transmitter Pulse Generator and Reply Pulse Generator circuits.
The Transmitter Pulse Generator consists of counters U12, U13, U14, multivibrators U5, U15, and switches
S1, S2, and S3. This circuit is clocked by the 50-MHZ signal from the 50-MHZ Amplifier and provides the
1st TX Pulse, 2nd TX Pulse signals for display purposes. A third signal, 2nd TX Pulse "Not", is routed to
the Monitor B CCA for a normal/fault indication. The settings of switches S1, S2, and S3 establish
transmitter pulse pair spacing acceptance gate position.
The Enable Pulse Generator is triggered by the Enable TRIG signal. This circuit consists of multivibrators
U25, U26, and U28. It triggers the Reply Pulse Generator and provides Replies (E) and INTRG (E) pulses
to the Steering Logic CCA for display purposes.
The Reply Pulse Generator consists of counters U22, U23, U24, multivibrators U18, U20, and switches S4,
S5, and S6. This circuit is clocked by the 50-MHZ signal from the 50-MHZ Amplifier and provides
interrogation and reply pulse outputs to the Monitor B CCA for monitoring of system delay. Further
interrogation and reply pulse outputs are sent to the Steering Logic CCA for display purposes. The settings
of switches S4, S5, and S6 establish reply delay acceptance gate position.
2.3.2.13.1 Monitor A (1A11) Detailed Circuit Theory.- Refer to Figure 11-20 and Pulse Timing Diagram
Figure 2-15. The 1119 DME system is designed to utilize either 1st or 2nd pulse timing. This theory
description will cover 1st pulse timing.
The three inputs to the Half-Amplitude Finder of the Monitor A CCA are; the DET INTRG (Detected
Interrogations) signal from the Diode Modulator Assembly; the DET TX (Detected Transmitter) signal from
the TEST SELECT switch; and the Search Pulses from the Transmitter Video CCA. The Search Pulses
provide simulated replies to the monitoring circuits while the system microprocessor establishes the correct
system delay and until the transmitter RF output signals have been enabled. Search Pulses are initiated when
the system is first turned ON, when any control switch (other than the transponder CHASSIS POWER) is
returned from a TEST position to NORMAL, or when the system delay exceeds the limit tolerance. During
search periods the transmitter is inhibited, this insures that erroneous delay information is not transmitted.
MODEL 1119 DME
Rev. D December, 2002 2-41
Refer to Figure 11-20 sheet 1. As they enter Monitor A CCA, the DET INTRG, DET TX, and the Search
Pulses are gated via Q1, Q2, and Q3, combined, and routed at Q4 to be applied to the half-amplitude input
isolating amplifier network of Q5, Q6, and Q7. From the isolation amplifier the amplified pulses at the
emitter of Q7 are applied to a peak rider (Q12, Q13, and C18) circuit and to the 2.5 Fs delay line (Q10, Q11,
and DL1). Detected Transmitter Pulse Matching potentiometer R4 and Search Transmitter Pulse Matching
potentiometer R7 are used to match the amplitude of the DET TX and Search Pulses, respectively, to the
DET INTRG pulses.
Comparator U1 detects the presence of pulses exceeding a preset level set by Half-Amp Enable Pulse
Trigger potentiometer R36. The output of U1 triggers multivibrator U2. The output pulse width of U2 is
set by Half-Amp Enable Pulse Width potentiometer R40 and can be set from 2 to 4 Fs. The 1Q output (pin
13) output of U2 is used to enable U3. Thus, whenever pulses are detected, U2 generates an enable signal
which enables comparator U3.
Figure 2-15. Monitor A Pulse Timing (X-Channel).
MODEL 1119 DME
2-42 Rev. D December, 2002
The 1Q "Not" output (pin 4) of U2 is applied to a RC circuit that consists of C17 and R41. Whenever pulses
are not present, the RC circuit charges turning on Q14, which in turn discharges C18 discharging the peak
rider pulse.
The signal applied to the "B" input (pin 4) of U3 has been delayed by 2.5 Fs in relation to the "A" input (pin
3). This makes it possible for the peak of the "A" input signal to fall on the half-amplitude point of the
delayed pulse. Peak Rider H-A Adjust potentiometer R35 determines the amplitude of the peak rider signal.
It is nominally set to the half-amplitude point of the delayed pulse. This half-amplitude point of all valid
interrogations (and replies to them) is used for all Monitor, Test, and some control functions.
The output of U3 is applied to the 2A input (pin 9) of 5 Fs multivibrator U4B. The 2Q "Not" output (pin
12) of U4B is applied to the 1A input (pin 1) of U4A. In this configuration, U4A generates 0.1 Fs triggers
coincident with the half-amplitude point to the interrogation or reply pulse. The output of U4A is applied
to gates U6D, U21A, U21D, U27B, and U27C.
Refer to Figure 11-20 sheet 2. The Inhibit Pulse Pair Trigger at P1 pin 23 is routed to the 2A input (pin 9)
of dual monostable multivibrator U5. When triggered, the 2Q output (pin 5) of U5 drives transistor switch
Q19. When Q19 is turned on, a ground is placed on the input to Q2. This prevents interference of
Transmitter Squitter pulses during interrogation pulse time. U5 is triggered by the inhibit pulse pairs, which
are coincident with the interrogation pulses generated on the Signal Generator Video CCA. NAND gate
U6D will, therefore, be inhibited during interrogation pulses, but will be enabled during reply pulses. The
2Q "Not" output (pin 12) of U5 allows gate U6D to pass trigger pulses, due to replies, to the transmitter
pulse pair spacing gate ripple counters of U12, U13, and U14.
Refer to Figure 11-20 sheet 3. The Enable Trigger signal at connector P1 pin 3 triggers a series of
multivibrators which are utilized to insure that the correct 0.1 Fs half-amplitude trigger corresponding to
the 1st or 2nd interrogation pulse can be selected prior to setting the reply delay.
The Enable Trigger is applied to the 2A input (pin 9) of multivibrator U18B. U18B is configured to have
an output pulse of 3 to 10 Fs. The 2Q output (pin 5) of U18B is applied to the 1A input (pin 1) of
multivibrator U18A. When triggered, U18A outputs a 0.5 Fs pulse that is utilized as a gate pulse so the
correct 0.1 Fs half-amplitude trigger can be selected at NAND gate U21. The Q output of U18A is applied
to pin 2 of NAND gate U21A. The 1Q "Not" output (pin 4) of U18A sets R-S flip-flop U19C and U19D
which allows dual multivibrator U20 to generate a 1.5 Fs 2nd INTRG Pulse Enable from its 1Q output (pin
13).
The 1Q output (pin 13) of U18A, which is the first interrogation pulse enable signal, is gated through U21A,
inverted by U21B, and applied to the 2B input (pin 10) of multivibrator U31B. When triggered, U31B
generates a 1 Fs pulse from its 2Q output (pin 5). This 1 Fs pulse exits the CCA via connector P1 pin 10
as the 1st SIG GEN Pulse. Additionally, because the jumper is from E1 to E3 (1st pulse timing), the output
of U21A sets R-S flip-flop U19A and U19B.
Refer to Figure 11-20 sheet 4. The "set" signal for U19A and U19B is inverted by U17B and applied to pin
12 of U17D. The DME Keying signal at connector P1 pin 22 and is applied to pin 13 of U17D. U17D
compares the "set" signal to the DME Keying signal and applies an output to NAND gates U29A and U29D.
Two other input signals to gate U29 (which is the interrogation delay gate) are Delay Enable and Eff Enable
MODEL 1119 DME
Rev. D December, 2002 2-43
(efficiency-enable). The resultant outputs are the INTRG (D) (interrogation delay) and INTRG (E)
(interrogation efficiency) signals that exit via connector P1 pins 13 and 11, respectively. The INTRG (D)
is also inverted by U30B and becomes the INTRG (D) "Not" signal that exits via connector P1 pin 7.
The output of flip-flop U19A and U19B is applied to the Count/Load inputs of ripple counters U22 thru
U24. This signal enables NAND gate U11A and allows the 50-MHZ signal to clock the ripple counter
circuit. When the delay time for the reply delay gate has been established (as determined by the factory
setting of S4, S5, and S6.), output of U24 triggers multivibrator U25A.
The output pulse of U25A is set by Delay Gate Position Adjust potentiometer R116 and has a range of 0.5
to 3 Fs. The 1Q "Not" output (pin 4) of U25A resets the position of flip-flop U19A and U19B. The 1Q
output (pin 13) of U25A triggers multivibrator U25B, which generates the reply accept gate. The width of
this gate is set by Delay Gate Width Adjust potentiometer R118. Thus U24B generates the reply delay gate
and U25A determines the position of the gate. The leading edge of the 1Q "Not" output of U25A triggers
retriggerable multivibrator U26, which generates the reply-efficiency accept gate. The width of this gate is
normally set to 5 Fs by Efficiency Gate Width Adjust potentiometer R121. When the three inputs to NAND
gate U27B are in coincidence, a negative 0.1 Fs reply pulse trigger is sent to the Steering Logic CCA after
being widened to 1 Fs by U28 and inverted by U30A. This signal exits via connector P1 pin 8 as the Replies
(E) signal. The output of U26 is inhibited during IDENT to prevent erratic Test Unit readings. Gates U27
and U29 perform the additional function of selecting the correct 0.1 Fs half-amplitude triggers corresponding
to the specific pulse or pulses monitored for reply delay and/or reply efficiency.
The primary function of U30 is to buffer the desired signals to other parts of the DME. The purpose of U8
is to stabilize the delay count in the Test Unit. The Q "Not" output (pin 6) of U7 is applied to pin 5 of U8B.
This inhibits U8B as soon as the desired 0.1 Fs trigger at U8A has passed.
Refer to Figure 11-20 sheet 2. The first reply pulse appearing at the output of U6D sets flip-flop U6A and
U6B. This pulse is inverted by U6C and applied to U16A where the first reply pulse will be gated through.
When flip-flop U6A and U6B is set, its output enables NAND gate U11D, which passes 50-MHZ pulses
to ripple counters U12, U13, and U14. The count of this ripple counter is determined by the settings of
switches S1, S2, and S3. The setting of these switches establishes the transmitter pulse pair spacing gate.
The resultant ripple counter output triggers one-shot multivibrator U15, which (in turn) enables NAND gate
U16D and allows the second transmitter pulse will be gated through. This signal is inverted by NAND gate
U16C and exits via connector P1 pin 32 as the 2nd TX Pulse signal.
Depending on the strapping of E4, E5, and E6, multivibrator U7 will be triggered on either the first or
second transmitter pulse. The Q output (pin 8) of U7 routed via the emitter follower, Q15, to the 1350-Hz
generator U19. U19 shapes the pulses into a 1350-Hz sine wave. This 1350-Hz tone exits via connector
P1 pin 24 as the Keyed 1350-Hz Tone signal that is sent to the Power Measurement CCA. The output of
U9 is also applied via 1350-Hz Output Level Adjust potentiometer R66 to U10. The output of U10 (pin 6)
is routed to the primary of signal transformer T1. The 1350-Hz signal at the secondary of T1 is routed to
P1 pins 15, 16, and 17 for general system use.
The 0.1 Fs pulses (due to transmitter pulses) at U7 pins 1 and 2 trigger the 40 Fs multivibrator whose Q
"Not" output (pin 6) is inverted by U8C and exits via connector P1 pin 4 as the TX PRF signal that is sent
to the Steering Logic CCA.
MODEL 1119 DME
2-44 Rev. D December, 2002
Refer to Figure 11-20 sheet 4. The 0.1 Fs Half-Amp Triggers, the 5 Fs Efficiency Gate, and the Delay
Enable are applied to AND gate U27A. This combined signal is the WYD Delay pulse that exits the via
connector P1 pin 30 and is sent to the Transmitter Video CCA (1A27) for use during Reply Delay "Capture"
Time.
Q18 buffers the DME Keying input P1 pin 22 to isolating diodes CR6, CR7, and CR8. The outputs are
routed to the Display CCA for (1A1A1) decimal point placement.
2.3.2.14 Monitor B CCA (1A12) Block Diagram Theory.- Refer to Figure 2-16. The Monitor B CCA
provides status signals to LEDs on the Test and Monitor Control Panel Assemblies. In addition, it monitors
the parameters of reply delay, transmitter pulse spacing, transmitter power, transmitter count, reply
efficiency, transmitter ident code, and transmitter interrogation overload and provides a visual indication
if a fault condition exists in one of these parameters. The Monitor B CCA monitors these parameters
through the use of various detector circuits.
The Reply Delay Detector circuit consists of retriggerable multivibrator U2, NAND gates U1A thru U1D,
LED CR2, and associated components. If the INT (D) "Not" is not present for a predetermined amount of
time, a fault signal is generated causing CR2 to illuminate.
The Transmitter Pulse Spacing Detector circuit consists of retriggerable multivibrator U4, transistors Q5A
thru Q5D, and LED CR3. This circuit is triggered by the 2nd T.X. Pulse (second transmitter pulse) signal.
If the 2nd T.X. Pulse signal is does not have the proper pulse spacing a fault is detected causing CR3 to
illuminate.
The Transmitter Power Detector circuit consists of comparator U6, detector diode CR4, comparator U7, and
LED CR5. The DET. TX signal is detected by U6 and CR4, and compared to a fixed level by U7. If the
detected signal is greater than the fixed level, the system is operating normally. If the detected signal level
is less that the fixed level, a fault is detected causing CR5 to illuminate.
The Transmitter Count Detector circuit consists of comparator U8A and U8B, and LED CR6. As long as
the transmitter pulse count is within acceptable limits LED CR6 remains extinguished. If the transmitter
pulse count drops below a predetermined level, a fault is detected causing LED CR6 to illuminate.
The Reply Efficiency Detector circuit consists of multivibrator U9, comparator U8C, and LED CR10. The
INT (E) and REP (E) signals alternately trigger U9. When there are 70% or fewer replies than interrogations
a fault is initiated and CR10 illuminates.
MODEL 1119 DME
Rev. D December, 2002 2-45
Figure 2-16. Monitor B CCA Block Diagram.
The Transmitter Ident Code Detector circuit consists of timer U11, NAND gates U10A thru U10D, and LED
CR19. This circuit detects an ident signal that is too long or too short. If keying is continuous for more than
5 seconds or if no keying is present for 75 seconds a fault is initiated and CR19 illuminates.
The Overload Detector circuit consists of comparator U8D, and LED CR13. U8D compares the AGC signal
to a fixed reference level. During an overload condition, the AGC signal level drops below the reference
level causing a fault to be initiated and CR13 to illuminate.
The fault signals from the various fault detector circuits (except the Overload Detector) are applied the
Monitor Fault/Normal Circuit. This circuit consists of NAND gate U13 and transistors U17A thru U17D.
This circuit produces the Monitor Fault LED and Monitor Normal LED signals that are applied to the Test
Panel Assembly (1A1) and used to illuminate the Monitor Fault and Monitor Normal LEDs. It also produces
a fault signal that starts the Shutdown Timer circuit.
MODEL 1119 DME
2-46 Rev. D December, 2002
The Shutdown Timer circuit consists of transistors U18A, U21A, U21B, and timer U14. This circuit latches
the previous fault status into the Status Memory circuit and initiates a system shutdown. The shutdown
timer requires approximately 6 seconds to timeout and will inhibit all attempts to reset the station for that
period.
The Status Memory circuit consists of octal, tri-state, non-inverting flip-flop U12 and Previous Fault Display
(PDF) switch S2. This circuit is clocked by a latching signal from the Shutdown Timer circuit. LED status
may be viewed after shutdown by pressing switch S2.
2.3.2.14.1 Monitor B CCA (1A12) Detailed Circuit Theory.- Refer to Figure 11-21. The primary functions
of Monitor B CCA are to illuminate LED indicators on the Test and Monitor Control Panel Assemblies and
to cause system shutdown in the event of a primary fault. Latching relay K1 provides a ground for the
station power relay located on the Power Control Panel Assembly (1A29).
All the fault parameters listed below may be selected by Jumpers J1-J6 as primary faults.
J1 - REPLY DELAY (DLY)
J2 - TRANSMITTER PULSE SPACING (SPC)
J3 - TRANSMITTER POWER (PWR)
J4 - TRANSMITTER COUNT (PRF)
J5 - REPLY EFFICIENCY (EFF)
J6 - TRANSMITTER IDENT CODE (ID)
Reply efficiency fault may be disabled by J7 if the receiver is desensitized by traffic overload (OL) or CW
interference.
When a fault is detected its associated red LED is illuminated and, if selected as a primary fault, will start
the shutdown timer U14. The shutdown time is set by potentiometer Shutdown Timer ADJ potentiometer
R87 for a nominal 7 second delay. If the fault persists until the time-out is complete, relay K1 is set and the
station shuts down.
The status memory circuit is comprised of octal tri-state non-inverting flip-flop U12. U12 is clocked by the
shutdown pulse from the shutdown timer. The LED status may be viewed after shutdown by pressing
Previous Fault Display (PFD) switch S2. The shutdown timer (timer U14) requires approximately 6 seconds
to timeout and will block all attempts to reset the station until the time out is complete.
The INT (D) "Not" and REP (D) "Not" signals (from Monitor A CCA) are applied to NAND gate U1A and
U1B. U1A and U1B are configured to operate as an R-S flip-flop. The INT (D) "Not" signal sets the flip-
flop output (pin 6) LOW. The LOW is passed through U1D and U1C which turns off transistor U3A and
allows C3 to begin charging. The REP (D) "Not" signal resets the flip-flop output (pin 6) HIGH which
passes through U1D and U1C to turn on U3A and discharge C3. If the INT (D) "Not" signal is not present,
retriggerable multivibrator U2 times out (pin 8 LOW), U3A is turned off and C3 charges. When C3 charges
to approximately half of its applied voltage, U3B, U3C, and U3D are turned on and a fault is initiated. The
output of U3D is applied to the cathode of CR2. When U3D is turned on, a ground is placed on the cathode
of CR2 causing it to illuminate. The output of U3D is also tied to NAND gate U13 and 3 state non-inverting
flip-flop U12.
MODEL 1119 DME
Rev. D December, 2002 2-47
The 2nd T.X Pulse "Not" signal from the Monitor A CCA enters via connector P1 pin 32 and is applied to
the 1A input (pin 1) of dual monostable multivibrator U4. U4 produces a 40 Fs pulse that discharges C6.
A few hundred pulses per second are required to keep the charge on C6 below the level needed to turn on
U5C, U5B, and U5A and initiate a fault.
The DET. T.X signal from the antenna sample port is applied to the non-inverting input (pin 4) of linear
voltage comparator U6. This signal is peak detected by U6 and CR4 and applied to the non-inverting input
(pin 2) of differential comparator U7. The comparator trip level is set by PWR Alarm Set potentiometer
R30. Nominal setting is .716 of normal output (the -3 dB point). Switch S1 provides a nominal 3 dB
decrease in input level to provide a reference for the setting of R30. When the power level drops below this
level, the output of U7 goes LOW and the fault is initiated.
PRF pulses from Monitor A CCA at connector P1 pin 28 are applied to the inverting input (pin 6)
comparator U8B. These pulses are representative the transmitted pulse count. The non-inverting input (pin
7) of U8B is held at a fixed voltage level by a voltage divider network that consists of R35 and R36. U8B
compares the signals on its inputs and, under normal conditions, outputs a LOW. Approximately 700 pulses
per second are required to keep the output of U8B LOW and C13 discharged. The output of U8B is applied
to the inverting input (pin 4) of U8A. The comparator trip level is set by PRF Alarm Set potentiometer R39.
U8A compares the output of U8B to the trip level set by R39 and, under normal conditions, outputs a HIGH
which keeps CR6 turned off. If the pulse count falls below 700 PPS, C13 charges, trips the output of U8A
(pin 2), and a fault is initiated.
INT (E) "Not" and REP (E) "Not" pulses trigger U9. The corresponding 50 Fs pulses from U9 alternately
charge and discharge C17. R47 and R48 are selected to produce half of the applied voltage on C17 when
there are 70% fewer replies than interrogations. The charge on C17 trips comparator U8C and a fault is
initiated. If J7 is connected (jumper pin 1 to 2), the overload circuit discharges C17 and disables the Reply
Efficiency circuit.
There are two aspects to the Ident Code Detector - one circuit detects an ident tone that is too long; the other
circuit senses the loss or absence of any type of keying. The time delay before an alarm is indicated is
adjustable for both of these circuits. The MON ID Code (from Interface CCA 1A17) at connector P1 pin
33 is applied to dual timer U11. When the MON ID Code (detected keying) is not present, C18 discharges
through R60 and CR14. If the keying is continuous for more than 5 seconds (adjusted by 5 SEC ADJ
potentiometer R61), C18 charges to the threshold level (two-thirds applied voltage) and triggers U11B. The
LOW output of U11B (pin 9) is buffered and inverted by U10B, U10C, and U10D and turns on Q8 to initiate
the fault. When no keying is present, C21 is charging. If the keying is absent for more than 75 seconds
(adjusted by 75 SEC ADJ potentiometer R64), C21 charges to the threshold level and triggers U11A. The
LOW output of U11A (pin 5) is inverted by U10D to turn on Q8 and initiate the fault.
MODEL 1119 DME
2-48 Rev. D December, 2002
When a fault exists, a LOW is present on the corresponding line of NAND gate U13, which sets the output
(pin 8) of U13 HIGH. This turns on transistor U17C and the collector goes to ground. This ground turns
off transistors U21A and U21B. When U21B turns off, C26 charges through Shutdown Delay Time ADJ
potentiometer R87, diode CR24, and resistor R89. When pins 2 and 6 of U14 reach +6.8 volts, the output
of U14 (pin 3) goes LOW. The output from U14 turns off transistor U18A and a positive pulse is applied
to U12 (pin 11) to latch the fault into the status memory circuit. U18C is turned on through CR32, CR31,
and R81 and the latching relay (K1) causes the system to shutdown. If the system is in BYPASS or the
DME ON line is HIGH, U21B conducts through U21C or U21D. Capacitor C26 is prevented from charging
and shutdown timer U14 does not trigger.
The EXT. Counter signal from the external counter input on the Transponder Control Panel Assembly
(1A19) enters via connector P1 pin 20 and is applied across C42 and R133 to a preamplifier buffer circuit
that consists of Q2, Q6, and differential comparator U16. This circuit amplifies the EXT. Counter signal
and provides the necessary isolation between the EXT. Counter signal source and the DME Transponder.
The output of the pre-amplifier buffer is taken from pin 7 of U16. This signal exits at connector P1 pin 11
and is applied to the Steering Logic CCA as the Counter PRE AMP signal.
Upon shutdown, +12 and +5 Vdc go to a level near 0 volts in the system. The +5.1 and +10.2 Vdc from U15
and Q1 remain on the board to power some circuits. When +12 and +5 are removed, pin 4 of U14 goes
LOW. U14 causes pin 7 to go LOW and start discharging C26. Because the threshold is now one-third of
0.7 volts, C26 will have to almost completely discharge (about 6 seconds) before pin 3 of U14 returns to a
HIGH level. Any attempts to reset the system before this time will be ignored. When the system is reset
a HIGH is applied from the collector of Q5 to U12 pin 11 to reset the status memory circuit.
2.3.2.15 Low-Voltage Power Supply (1A13/1A28) Circuit Theory.- Refer to Figure 11-23. The Low
Voltage Power Supply provides regulated +12, -12, and +5 Vdc for the 1119 DME transponder. The power
supply consists of two circuits: one supplies +12 and -12 Vdc and the other +5 Vdc.
In the first circuit, the +28 Vdc primary supply is filtered by capacitor C1 and applied to dual-output dc to
dc converter Z1. TP1 allows access for monitoring the +28 Vdc input of Z1. Z1 converts the +28 Vdc into
positive and negative 12 Vdc with 1% regulation under load. The breakdown voltage of zener diodes CR1
and CR2 is 14.3 Vdc minimum to protect the circuits from overvoltage. The output voltages are filtered
by C2 and C3. TP2 and TP3 provide access for monitoring the +12 and -12 Vdc outputs, respectively.
Operation of the +5 Vdc supply is similar. The +28 Vdc primary supply is filtered by C4 and applied to dual
output dc to dc converter Z2. TP5 allows access for monitoring the +28 Vdc input to Z2. Z2 converts +28
Vdc into an output of approximately +5.2 Vdc. Resistors R1 and R2 are used to set the voltage slightly
above 5 volts. Zener diode CR3 has a breakdown voltage rating of 6.45 Vdc minimum to protect the
circuit from overvoltage. Capacitor C5 filters the output voltage. TP6 is provides access for monitoring the
+5 Vdc output.
MODEL 1119 DME
Rev. D December, 2002 2-49
2.3.2.16 High Voltage Power Supply Assembly (1A14) Circuit Theory.- Refer to Figure 11-24. The High
Voltage Power Supply Assembly (1A14) consists of the 950361-0001 Assembly and the High Voltage
Power Supply CCA (012654-0001). The 950361-0001 Assembly produces a regulated +48 Vdc output that
is adjusted to +50 Vdc and combined with the +12 Vdc output of the High Voltage Power Supply CCA to
produce a regulated +62 Vdc output that is applied to the Power Amplifier Assembly (1A32).
The +48 Vdc from the 950361-0001 Assembly enters the High Voltage Power Supply CCA at connector
P1 pin 1 and is applied to the REF input of +12 Vdc Regulator PS1. +28 Vdc from the +28 Vdc Power
Supply (1A30) enters the High Voltage Power Supply CCA at connector P1 pins 17 thru 22 and is applied
to the +28 Vdc input of PS1. PS1 produces an output voltage that is +12 Vdc higher than the voltage applied
to its REF input. The output of PS1 exits at terminal E4, is filtered by capacitors C3 and C4, and exits the
CCA via connector P1 pins 9 thru 11. The output of PS1 is also applied to the base of Q1 via zener diode
CR1 and is used to produce the H.V Lamp signal that exits the CCA via connector P1 pin 12.
2.3.2.17 CPU CCA (1A15) Theory of Operation.- There are two versions of the CPU CCA. 1119 DME
systems with serial number 264 or lower have CPU CCA part number 012733-1001. 1119 DME systems
with serial number 265 or higher have CPU CCA part number 012775-1001. Paragraph 2.3.2.17.1 details
the theory CPU CCA part number 012733-1001 and paragraph 2.3.2.17.2 details the theory CPU CCA part
number 012775-1001.
2.3.2.17.1 CPU CCA (1A15) (012733-1001) Block Diagram Theory.- Refer to Figure 2-17. The CPU CCA
collects information from the DME system. It monitors DME keying, measures various system powers,
checks for spacing and delay faults, and provides local and remote communication.
The Power-On Reset circuit consists of inverter U3A, transistor Q1, capacitor C8 and associated
components. This circuit provides a reset signal to microprocessor U2 during power-up, while system
voltages are stabilizing. Once operating voltages have stabilized the reset is removed and U2 operates
normally.
The Watchdog circuit consists of binary counter U1B. This circuit monitors the activity of U2. Once U2
is operating, the watchdog timer is triggered by the Watchdog signal. If the watchdog signal fails to occur
in the proper time sequence, the reset line changes states forcing U2 to attempt to reinitialize the CCA.
Crystal oscillator Y1 produces a 7.3728-MHZ signal that is divided by the other half of dual binary counter
U1 to a produce 1.8-MHZ MCLK signal that is applied to U2.
Address demultiplexers U4 and U5 decode various address inputs and provide chip select signals to
Ram/Real Time Clock U7, EEPROM U8, and Versatile Interface Adapters (VIAs) U10 and U11.
VIAs U10 and U11 provide a communications link between the DME system, the outside world, and the
CPU microprocessor. They collect information from the system and transfer it to U2.
U2 is an 8-bit microprocessor that performs various monitoring and information collecting functions. It also
performs the major function of handling address/data control for the system.
MODEL 1119 DME
2-50 Rev. D December, 2002
The microprocessor utilizes several memory circuits to perform its required functions. The software
program for operating the DME system resides in 32k by 8-bit EPROM U9. Static RAM U7 is a non-
volatile ram chip that provides temporary data storage during calculations. The last memory circuit used
is EEPROM U8. The microprocessor utilizes U8 to store all local parameters such as alarm points, station
identifier, etc.
2.3.2.17.1.1 CPU CCA (1A15) (012733-1001) Detailed Circuit Theory.- Crystal oscillator Y1 produces
a 7.3728-MHZ signal that is applied to the 1A "Not" input (pin 1) of dual 4-bit binary counter U1A. U1A
divides the oscillator frequency and provides divide by 2 (QA), divide by 4 (QB), and divide by 8 (QC)
outputs. The QA, QB, and QC outputs of U1 are applied to terminals E8, E10, and E12, respectively. A
jumper placed between terminals E8-E9, E10 - E11, or E12 - E13 selects the clock frequency applied to
microprocessor U2. The selection shown from E10 - E11 is 1.8-MHZ. This is the MCLK signal which is
applied to the to the PH-0 input (pin 37) of U2.
The watchdog timer and power reset circuit consists of 4-bit binary counter U1B, inverter U3A, transistor
Q1, and associated components. When power is applied capacitor C8 is charged by current flow through
R3. This applies a LOW to the input of schmitt trigger inverter U3A. U3A inverts the LOW and applies
a HIGH to the base of Q1 through R2. This saturates Q1 causing its collector to go LOW. The output of
Q1 is tied to the RES "Not" input (pin 40) of U2. A LOW applied to the RES "Not" input, places the
microprocessor in a Reset state and provides a time delay for the +5 Vdc power to settle. When C8 is
charged, the output of U3A changes from HIGH to LOW. This turns Q1 off, removes the LOW from the
RES "Not" input of U2, and allows U2 to operate normally. Placing a jumper between terminals E1 - E2
provides a constant reset condition.
MODEL 1119 DME
2-52 Rev. D December, 2002
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 2-53
The watchdog circuit monitors the activity of microprocessor U2. Once U2 is operating, the watch dog timer
is triggered from the Watchdog signal from VIA U10. Normally the CLR input of U1B is asserted HIGH
then LOW. The HIGH on the CLR input of U1B resets U1B before its QD output can clock from LOW to
HIGH. The QD output (pin 8) of U1B is applied to the base of Q1 through the closed jumper contacts of
E3 - E4 and R1. If the reset line is LOW for more than two clock cycles the microprocessor is placed into
a reset condition. This reset condition is followed by a re-initialize period that begins on the positive edge
of the reset signal. The re-initialization process takes six clock cycles. The watchdog circuit can be disabled
by removing the jumper placed between terminals E6 - E7 or by placing a jumper between terminals E4 -
E5. This is used for factory testing.
Programmable voltage detector U12 monitors the +5 Vdc supply voltage. If the supply voltage drops below
+4.6 Vdc or rises above +5.4 Vdc the output (pin 4) of U12 goes LOW. This places the microprocessor in
a reset condition. When the supply voltage returns to normal the output of U12 goes HIGH and the
microprocessor will begin operating normally again.
The RDY (Ready) is an asynchronous signal that, when HIGH, signals that the peripherals are ready,
otherwise the microprocessor can go into halt mode. This signal enters the CCA via connector P1 pin 22a
and is applied to the RDY input (pin 2) of U2. The RDY input is used for extending the bus cycle of U2
for slower devices. When HIGH, it signals that all transactions on the buss will take only one buss cycle.
The Interrupt Request "Not" (IRQ "Not") is an open collector signal (active LOW) pulled HIGH by resistor
pack RP3. The IRQ "Not" signal enters the CCA via connector P1 pin 24a and is applied to the IRQ "Not"
input (pin 4) of U2. When LOW, this input requests that an interrupt sequence begin within microprocessor
U2.
The Non-Maskable Interrupt "Not" (NMI "Not") is an open collector signal (active LOW) pulled HIGH by
resistor pack RP3. The NMI "Not" at connector P1 pin 24c and is applied to the NMI "Not" input (pin 6)
of U2. When LOW, this requests that a non-maskable interrupt sequence be generated within U2.
Microprocessor U2 is an 8-bit microprocessor that can access 64K of memory. It has nonmultiplex
address/data lines. That means all the addresses are assigned to the address lines and all data is assigned to
separate data lines.
U4 is a dual, 2 to 4 line decoder that serves as an address demultiplexer with active LOW outputs. The first
section of U4 is always enabled as its enable (EN "Not") input (pin 1) is tied to ground. The first section
of U4 decodes four different address location sections, 0 to 3FFF, 4000 to 7FFF, 8000 to BFFF, and C000
to CFFF. Whenever address location 0000 to 3FFF is selected, the 1Y0 "Not" output (pin 4) becomes active
(goes LOW). This output is used as an enable for the second section of U4. Whenever address location
4000 to 7FFF is selected the 1Y1 "Not" becomes active. This output is used as an enable for the first section
of U5. Outputs for address locations 8000 to BFFF and C000 to FFFF are not connected.
When enabled, the second section of U4 decodes address location sections from 0000 to 0FFF, 1000 to
1FFF, 2000 to 2FFF, and 3000 to 3FFF. Whenever address location 0000 to 0FFF is selected the 2Y0 "Not"
output (pin 12) becomes active. This output is used to enable the second section of U5. Whenever address
location 3000 to 3FFF is selected the 2Y3 "Not" output (pin 9) becomes active. This output is used to enable
VIAs U10 and U11. Outputs for address locations 1000 to 1FFF and 2000 to 2FFF are not connected.
MODEL 1119 DME
2-54 Rev. D December, 2002
U5 is a dual 2 to 4 line decoder that operates in the same manner as U4. When enabled by U4, the first
section of U5 decodes four different address location sections, 4000 to 4FFF, 5000 to 5FFF, 6000 to 6FFF,
and 7000 to 7FFF. Whenever address location 4000 to 4FFF is selected the 1Y0 "Not" output (pin 4)
becomes active. This output provides the 4X "Not" chip select signal to the backplane CCA. Whenever
address location 5000 to 5FFF is selected, the 1Y1 "Not" output (pin 5) becomes active. This output
provides the 5X "Not" chip select signal to the backplane CCA. Whenever address location 6000 to 6FFF
is selected the 1Y2 "Not" output (pin 6) becomes active. This output provides the 6X "Not" chip select
signal to the backplane CCA. Whenever address location 7000 to 7FFF is selected, the 1Y3 "Not" output
(pin 7) becomes active. This output is applied as one input to NAND gate U6D.
When enabled by U4, the second section of U5 decodes two different address locations 0000 to 07FF and
0800 to 0FFF. Whenever address locations 0000 to 07FF are selected the 2Y0 "Not" output (pin 12)
becomes active. This output is used to enable ram/real time clock U7. Whenever address locations 0800
to 0FFF are selected the 2Y1 "Not" output (pin 11) becomes active. This output is applied as the other input
to NAND gate U6D.
Since both signals applied to U6D are active LOW; U6D performs an OR-gate function. When either input
to U6D goes LOW its output goes HIGH. The output of U6D is inverted by U3B and applied to the chip
enable "Not" (CE "Not") input of U8.
U8 is a 2k x 8-bit EEPROM with an internal on-chip timer. U8 becomes enabled for a read or a write
operation whenever address locations 7000 to 7FFF or 0800 to 0FFF are selected. It has a write time of 10
ms, acts as ram during a read operation, and all operations between write cycles are invalid up to 10 ms
while the byte is being reprogrammed into the chip.
U7 is a 2k x 8-bit non-volatile ram with a real time clock and battery built into the chip. U7 becomes
enabled for a read or write operations whenever address locations 0000 to 07FF are selected.
U9 is a 32k by 8-bit EPROM that contains the program for the CPU CCA. U9 is enabled anytime address
line A15 is HIGH. Address line A15 is inverted by NAND gate U6C and applied to the CE "Not" input of
U9. Anytime that address locations 8000 to FFFF are selected U9 is enabled. The jumpers at terminals E14-
E15-E16 and E17-E18-E19 are provided for different configurations for U9. This option is provided so a
larger memory chip may be inserted instead of 32k by 8-bit device currently in use. Jumper selection shown
on the schematic diagram (E14-E15 and E17-E18) is correct for the 32k by 8-bit EPROM currently in use.
Read "Not" (RD "Not") and Write "Not" (WR "Not") generated by microprocessor U2 are buffered and
gated through a circuit consisting of inverters U3C, U3D, U3E, and NAND gates U6B and U6A. This
circuit generates the BPH-2 (buffered phase 2 clock); the B R/W (buffered Read/Write); the RD "Not"; and
the WR "Not" signals. These signals exit the CCA via connector P1 pins 26a, 21a, 21c, and 22c,
respectively.
VIAs U10 and U11 are enabled whenever address locations 3000 to 3FFF are selected. Each VIA consist
of dual parallel I/O ports with two built-in 16-bit interval timers, a serial to parallel/parallel to serial shift
register and input data latching on the peripheral ports. Each VIA contains two programmable 8-bit
bidirectional peripheral I/O ports which allow direct interfacing between the CPU and associated CCAs.
Each port (ports A and B) acts as latching memory. They latch the input of J1 and J2 connectors and also
MODEL 1119 DME
Rev. D December, 2002 2-55
act as output latches so that data present on D0 thru D7 is latched and held and the inputs can be read like
ram. Each of the eight bits in parallel port A or B may be configured to be either an input or output. The
outputs of U10 are active LOW with the following ports held HIGH by pull-up resistor RP1; PA0 thru PA7,
CA2, PB1, PB4, and PB5 CB1 and CB2. The outputs of U11 are active LOW with the following ports held
HIGH by pull-up resistor RP1 and RP2; PA0 thru PA3, PA7, PB1, PB3, PB5, and PB7.
Jumpers placed between terminals E20 - E22 or E21 - E23 determine the baud rate at which data is
transmitted. Jumpering terminal location E20 - E22 sets the baud rate to 1200. Jumpering terminal location
E21 - E23 sets the baud rate to 300. Normal setting is 1200 baud with E20 - E22 jumpered.
The S0, S2, and S4 signals are select signals that are sent to 3 to 8 line decoder U8 on the Interface CCA
(1A17). The logic level of these signals determine which output of U8 will be active. The S0, S2, and S4
signals exit the CPU CCA via connector J1 pins 3, 4, and 5, respectively.
The SEN signal is an enable that is sent to the G1 enable input (pin 6) of 3 to 8 line decoder U8 on the
Interface CCA (1A17). Whenever the SEN signal is LOW U8 is disabled forcing all of its outputs HIGH.
The SEN signal exits the CPU CCA via connector J1 pin 6.
The DET Ident Keying signal from the Interface CCA (1A17) enters via connector J1 pin 7 and is sent to
VIA U10 where it is passed to U2 for evaluation. U2's operating program expects the Ident Tones to arrive
at U10 in the form of digital logic; to be of less than 5-second duration; and to recur at intervals of not more
than 45 seconds. If these conditions are not met, the program will initiate a service report.
The Watchdog signal exits the CPU CCA at connector J1 pin 8. This signal is a 2-Hz pulse that retriggers
the watchdog circuit on Input Power Monitor CCA (1A29A2) to keep the relays energized.
The DME Keying signal from the Keyer CCA (1A26) enters via connector J1 pin 9. This signal is
monitored by the microprocessor to insure the proper duration and interval is maintained. If the DME
Keying signal does not meet required parameters, the program will initiate a service report.
Should the transmitter power drop below the preset half-amplitude limit, the operating program will cause
the system to shutdown by issuing a DME Off command. The DME Off signal exits the CPU CCA via
connector J1 pin 16 and is sent to the Monitor B CCA. After a preset time delay, the program will startup
the system by issuing a DME On command. The DME On signal exits the CPU CCA via connector J1 pin
14 and is sent to the Monitor B CCA (1A12).
The Remote Com. Set signal is an output that exits the CPU CCA via connector J1 pin 15. This signal is
used to clear dual, D-type flip-flop U12 on the Interface CCA.
The Ant Capture signal is an output that is sent to darlington switch U4 on the Monitor Transfer Assembly
(1A7). This signal exits the CPU CCA via connector J2 pin 3 and is active (LOW) when the system is
radiating to the antenna. On dual systems this line will be HIGH if the other transponder has captured (is
radiating to) the antenna.
The Shutdown signal is an output that is applied to the optional DME System Interface CCA. When active
(LOW) it indicates to the DME System Interface CCA that a system shutdown has occurred.
MODEL 1119 DME
2-56 Rev. D December, 2002
The +5V #1 and +5 Vdc signals are inputs supplied by the Low Voltage Power Supply CCAs. The
microprocessor monitors these voltages to insure the proper voltage is present.
The /SW POS signal from the Monitor Transfer Assembly enters via connector J2 pin 13. The
microprocessor uses the voltage level on this input to monitor the position of the Transfer Switch and
determine which system is on-line. For single system DMEs this line is held HIGH by pull-up resistor pack
RP2.
The Test (1) signal enters the CPU CCA via connector J2 pin 15 and is applied through the Monitor B CCA
to the Test Normal LED on the Test Panel Assembly (1A1). Whenever any system operational switch is
moved from the NORMAL position the LOW is removed from this line causing the Test Normal LED to
extinguish, and the level at J2 pin 15 changes from LOW to HIGH.
2.3.2.17.2 CPU CCA (1A15) (012775-1001) Theory of Operation.- Refer to Figure 11-25. The CPU CCA
collects information from the DME system. It monitors DME keying, measures various system powers,
checks for spacing and delay faults, and provides local and remote communication.
Crystal oscillator Y1 produces a 7.3728-MHZ signal that is applied to the GCLK input (pin 36) of Erasable
Programmable Logic Device (EPLD) U10. U10 is a 128 macrocell EPLD used primarily to read and write
digital data to connectors J1 and J2 by emulating the VIA data port registers.
This CCA uses an 8-bit architecture with 64K of address space controlled by a Rockwell 65C02 CPU (U4).
Six devices are connected to the data bus on the board. U1 is an 2K by 8 static RAM used for variable and
buffer storage. The EPROM, U2, holds all of the microprocessor program instructions and jump vectors.
The size of U2 is set to either 16K, 32K, or 64K using jumper terminals E10 through E15. Default jumper
settings are E10 - E11 and E14 - E15. Two Versatile Interface Adapter (VIA) chips, U8 and U9, each
provide two 16-bit internal counter timers plus microprocessor interrupt registers. The EPLD controls U5
which is a data bus transceiver that connects the microprocessor data bus to external connector P1.
Other functions performed by the EPLD include dividing down the on-board oscillator Y1 to 1.8432 MHZ
and providing the following buffered signals to P1: R/W, 1.8 MHZ, and PH-2.
All address decoding is performed by Programmable Array Logic (PAL), U6. U6 also provides read and
write logic decoding.
U7 is a microprocessor supervisory chip that provides a 200 ms reset pulse during power-up. It also protects
the system from inadvertent EEPROM writes during power-down by resetting the microprocessor when the
supply voltage falls below 4.65 volts. It also provides a microprocessor watchdog circuit that will reset the
software if a transition on the watchdog input line is not seen in at least 1.6 seconds. This internal
microprocessor watchdog is disabled by removing the jumper between E3 and E4.
Jumper terminals E1 and E2 are provided to manually reset the microprocessor software by momentarily
shorting the two pins.
MODEL 1119 DME
Rev. D December, 2002 2-57
U3 is a 2k by 8 Electrically Erasable Programmable Read Only Memory (EEPROM). It holds non-volatile
systems variables such as passwords, telephone numbers, and alarm limits. Writing to U3 is controlled by
PAL U6. The correct jumper settings to write to U3 is terminals E8 - E9 shorted with terminals E5 - E6
open.
Jumpers E16 and E17 and E18 and E19 provide baud rate selection for the external terminal. With the
jumper placed between terminals E16 and E17, the selected baud rate is 300. When the jumper is placed
between terminals E18 and E19, which is the default for this application, the selected baud rate is 1200.
2.3.2.18 DME System Interface CCA (1A16) (Optional) Block Diagram Theory.- Refer to Figure 2-18. The
DME system interface CCA is functions as an interface between the DME system (s) and the Control
Interface CCA.
The 2-Hz Clock circuit consists of timer U2. The output of this circuit is used as a clock signal for the PAL
circuit.
The PAL/Decoder circuit consists of PAL U1. This circuit decodes status signals from the DME and creates
the 1 Ant Data, 2 Ant Data, 1 Norm Data, 2 Norm Data, and Alarm Data signals which are applied to the
Control Interface CCA (1A18).
Resistor R1, capacitor C1, and diode CR1 form the Power-On Reset circuit. This circuit inhibits the
PAL/Decoder circuit at power-up while voltages and circuits are stabilizing from the application of power.
MODEL 1119 DME
2-58 Rev. D December, 2002
Figure 2-18. DME System Interface CCA Block Diagram.
The Command Interface circuit consists of voltage comparators U3 thru U6. This circuit resets the
PAL/Decoder circuit and converts various commands from the Control Interface CCA (1A18) into signals
that can be used by the DME.
Whenever the DME is commanded by the RSCU to Reset, turn on transmitter #1, or turn on transmitter #2,
the Command Interface circuit outputs a reset pulse to the PAL/Decoder. This resets the PAL/Decoder
internal registers to a known condition allowing further information to be processed.
Since the signals from the RSCU are incompatible with those required for the DME, the Command Interface
circuit is also used to convert the signals from the RSCU into short duration pulses that are useable by the
DME.
The No Data Indicator circuit consists of LED CR2 and resistor R5. This circuit provides a visual indication
of a No Data condition.
A DC voltage (+28 Vdc) from DME #1 and DME #2 is applied to the +5 Vdc power source which consists
of +5 Vdc power supply PS1 and zener diode CR5. PS1 converts the +28 Vdc input voltage to +5 Vdc
output voltage that is used as a supply voltage within the CCA and to power the Control Interface CCA
(1A18). Zener diode CR5 is used to help regulate the output of PS1 to +5 Vdc.
MODEL 1119 DME
Rev. D December, 2002 2-59
2.3.2.18.1 DME System Interface CCA (1A16) (Optional) Detailed Circuit Theory.- Refer to Figure 11-26.
Timer U2 is configured to operated as an astable multivibrator with an output frequency of 2-Hz. The 2-Hz
output of U2 is applied to PAL U1 where it is used as a clock input.
The SD, Batt, 2 Norm, Ant Pos, and 1 Norm status signals from the DME are applied to the inputs of U1.
U1 processes these signals and creates the 1 Ant Data, 2 Ant Data, 1 Norm Data, 2 Norm Data, and Alarm
Data signals which exit the CCA via connector J2 pins 2, 1, 4, 11, and 13, respectively.
Resistor R1, capacitor C1, and diode CR1 form a power-on inhibit circuit that inhibits U1 at power-up while
voltages and circuits are stabilizing.
The (Reset) Q3 signal is an active LOW signal from the Control Interface CCA. It enters the CCA via
connector J1 pin 3 and is applied to the non-inverting input of voltage comparator U3. The inverting input
of U3 is referenced to 2.5 volts by a voltage divider which consist of resistors R6 and R7. Under normal
conditions the non-inverting input of U3 is held HIGH by pull-up resistor RN1. This causes U3 to output
a HIGH. When the (Reset) Q3 signal goes LOW, the voltage level applied to the non-inverting input of U3
drops below the reference voltage applied to its inverting input and the output of U3 changes from HIGH
to LOW.
The output of U3 is applied to the cathode of diode CR6. When the output of U3 is HIGH CR6 is reversed
biased. When the output of U3 is LOW, diode CR6 is forward biased and a LOW is applied to pin 9 of PAL
U1. This resets the internal registers of U1 to a known state and causes its Alarm Data output to go LOW.
The (1 On) Q0 signal is an active LOW signal from the Control Interface CCA. It enters the CCA via
connector J1 pin 5 and is applied to the non-inverting input of voltage comparator U4. The inverting input
of U4 is referenced to 2.5 volts. Under normal conditions the non-inverting input of U4 is held HIGH by
pull-up resistor RN2. This causes U4 to output a HIGH. When the (1 On) Q0 signal goes LOW, the voltage
level applied to the non-inverting input of U4 drops below the reference voltage applied to its inverting input
and the output of U4 changes from HIGH to LOW.
Diodes CR6, CR7, and CR8 perform a 3 input wired-AND configuration. If any cathode goes LOW the
output (all anodes) go LOW also.
The output of U4 follows 2 paths. It exits the CCA via connector J1 pin 11 as the 1 On signal and is also
applied to the cathode of diode CR7. When the output of U4 is HIGH, CR7 is reversed biased. When the
output of U4 is LOW, diode CR7 is forward biased and a LOW is applied to pin 9 of PAL U1.
The (2 On) Q1 signal is an active LOW signal from the Control Interface CCA. It enters the CCA via
connector J1 pin 7 and is applied to the non-inverting input of voltage comparator U5. The inverting input
of U5 is referenced to 2.5 volts. Under normal conditions the non-inverting input of U5 is held HIGH by
pull-up resistor RN2. This causes U5 to output a HIGH. When the (2 On) Q1 signal goes LOW, the voltage
level applied to the non-inverting input of U5 drops below the reference voltage applied to its inverting input
and the output of U5 changes from HIGH to LOW.
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2-60 Rev. D December, 2002
The output of U5 follows 2 paths. It exits the CCA via connector J1 pin 4 as the 2 On signal and is applied
to the cathode of diode CR8. When the output of U5 is HIGH, diode CR7 is reversed biased. When the
output of U5 is LOW, diode CR8 is forward biased and a LOW is applied to pin 9 of PAL U1.
The (Off) Q4 signal is an active LOW signal from the Control Interface CCA. It enters the CCA via
connector J1 pin 9 and is applied to the non-inverting input of voltage comparator U6. The inverting input
of U6 is referenced to 2.5 volts. Under normal conditions the non-inverting input of U5 is held HIGH by
pull-up resistor RN2. This causes U6 to output a HIGH. When the (Off) Q4 signal goes LOW, the voltage
level applied to the non-inverting input of U6 drops below the reference voltage applied to its inverting input
and the output of U6 changes from HIGH to LOW.
The output of U6 exits the CCA via connector J1 pin 2 as the Off signal.
The No Data signal is an active LOW signal from the Control Interface CCA. This signal enters the CCA
via connector J1 pin 13 and is applied to the anode of LED CR2. During a No Data condition the signal
applied to the anode is LOW. This turns on CR2 and provides a visual indication of a No Data condition.
A DC voltage (+28 Vdc) enters at connector J1 pins 15 and 16 and is applied to the anodes of diodes CR3
and CR4. The diodes are forward biased and allow the voltage to pass through fuse F1 where it is applied
to the input of +5 Vdc power supply PS1. PS1 converts the +28 Vdc input voltage to +5 Vdc output voltage
that is used as a supply voltage within the CCA.
2.3.2.19 Interface CCA (1A17) Circuit Theory.- Refer to Figure 11-27. The Interface CCA provides and
interface between the CPU CCA, the DME system, and the outside world. Readings from the Test Panel
Assembly in the form of DISP. Clock and Reset Trigger signals enter via connector J1 pins 17 and 16,
respectively. The Display Clock signal is applied to the 1B input (pin 2) of retriggerable monostable
multivibrator U6. U6 stretches the DISP. Clock pulses by 3 Fs. In time interval modes, U6 converts the
pulse train into a single pulse causing the length of the pulse train to be directly proportional to the time
being measured. In all other measurements, DISP. Clock pulses are counted from negative edge to negative
edge of the Reset Trigger signal.
The S0, S2, and S4 signals enter via connector J1 pins 8, 7, and 6, respectively and are applied to the data
inputs of 3-to-8 line decoder/multiplexer U8. The SEN signal enters via connector J1 pin 5 and is applied
to the G1 enable input (pin 6) of U8. When the SEN signal is logic LOW the outputs of U8 are forced
HIGH. The outputs of U8 cause the selected line to be grounded on the Steering Logic CCA (1A1A4).
When the TX PWR or S.G. LEVEL outputs are selected, the appropriate detected signal is provided by
analog switch U10 to the Power Measurement CCA (1A1A3).
The Keyed 1350-Hz tone from the Monitor A CCA enters via connector J1 pin 18 and is peak detected by
CR6, CR7, and CR8 and applied to NOR-gate U13A where it is converted to digital logic. The output of
U13A exits the CCA via connector J2 pins 17, and 18 as the DET. IDENT. Key signal.
There are three (RS-232) 2-wire ports on the Interface CCA. One for local control, one for remote control,
and an auxiliary (RS-232) connector with hand-shaking capability. The Local RX signal (information from
the local Video Terminal) enters the CCA via connector J1 pin 4 and is applied to line receiver U4A. When
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Rev. D December, 2002 2-61
any character is received by line receiver U4A, flip-flop U12A is placed in a set condition. This action
places analog switch U15 in the "local" position (contacts 14-15 and contacts 6-7 close), which allows
information from the local Video Terminal to be processed by the DME. The Local RX signal is then passed
to the RXD input (pin 12) of Asynchronous Communications Interface Adapter (ACIA) U7.
After the last entry from the local Video Terminal has been received, U15 will remain in the "local" position
for a period of time as determined by the SET.REM.DLY command. If there are no further entries, a
Remote COM Set signal is generated. This signal enters via connector J1 pin 12 and is applied to the Reset
input (pin 1) of U12A. U12A is reset by the Remote Com. Set signal placing U15 in the "remote" position
(contacts 2-3 and contacts 10-11 close).
The Remote RX signal (information from a remote Video Terminal) enters the CCA via connector J1 pin
3 and is applied to line receiver U4B. U4B converts the RS-232 information into TTL levels and applied
the signal to analog switch U15. When U15 is in the "remote" position, the Remote RX signal is passed to
the RXD input (pin 12) of ACIA U7.
ACIA U7 is a bidirectional device that is capable of placing information onto or receiving information from
the data bus. Information received from the outside world is placed onto the data bus and sent to the CPU
CCA's microprocessor. Information from the CPU CCA is received by U7 and sent to either the line driver
U3A or U3B as determined by the position of U15. Line drivers U3A and U3B convert the TTL level
signals into RS-232 level signals that exits the CCA as the Local Tx and Remote TX signals via connector
J1 pins 2 and 1, respectively.
Terminals E1, E2, and E3 are provided for ACIA/Modem interface for the auxiliary connector. Placing a
jumper between terminals E1-E2 controls the modem from the ACIA. Placing a jumper between terminals
E2-E3 indicates the status of the ACIA to the modem.
The Clear to Send "Not" (CTS "Not") signal enters via connector J3 pin 7 and is applied to line receiver
U17B. U17B converts the RS-232 signal level to TTL levels. The output of U17B is applied to the CTS
"Not" input (pin 9) of U7. The level of the CTS "Not" input controls the operation of the ACIA/Modem
interface. A HIGH on this input enables the ACIA/Modem interface.
The 1.8432-MHZ clock signal from the CPU CCA enters via connector P1 pin 17C and is applied to the
CLK input of D-type flip-flop U12B. U12B divides the 1.8432-MHZ signal by a factor of 2 and supplies
a 921-kHz signal to the CLK input of Analog to Digital (A-D) converter U14. The A-D converter receives
the following analog inputs, which have already been scaled (with the exception of TEMP) on the Voltage
and Scaling CCA (1A29A1):
TEMP (Temperature)
PRI VAC (AC line voltage)
PRI VDC (+28 Vdc from Power Supply (1A30) or +24 Vdc from the battery backup unit.)
PRI IDC (DME Station current)
BATT IDC (Battery-charging current)
The RMM can affect the Test status and the DME microprocessor mode (Search or Track). Relays 1A17-K1
and K2 are in series with the manually-activated test circuit interconnect switches (refer to Figure 2-19.)
MODEL 1119 DME
2-62 Rev. D December, 2002
These switches and relays are used for troubleshooting purposes to inhibit the auto-shutdown circuits and
to stop the CPU microprocessor in the Track mode. This forces the transmitter ON (even in the event no
RF output is present).
Fused 28 Vdc enters via connector J1 pin 20 and is applied to +12 volt regulator U1 and to DC to DC
converter U2. U1 converts the +28 Vdc input to a regulated +12 Vdc output. The +12 Vdc output of U1
is used as a regulated +12 Vdc power source and as the input of voltage converter U5.
U2 converts the +28 Vdc input voltage to a regulated +5 Vdc that is used as a +5 Vdc power source. Zener
diode CR2 provides overvoltage protection for U2.
U5 is a positive to negative voltage converter that converts the +12 Vdc from U1 to -12 Vdc for use as a
regulated -12 Vdc power source.
The +12 Vdc from U1, the -12 Vdc from U5, and the +5 Vdc from U2 are sent to the Backplane CCA.
These voltages exit the CCA via connector P1 pins 17A, 16C, and 1C, respectively.
Jumpers placed on terminals E4 thru E13 are used for calibrating the various functions of the RMM.
MODEL 1119 DME
Rev. D December, 2002 2-63
Figure 2-19. 1119 DME Bypass Interconnect Diagram.
MODEL 1119 DME
2-64 Rev. D December, 2002
Figure 2-20. Control Interface CCA Block Diagram.
2.3.2.20 Control Interface CCA (1A18) (Optional) Block Diagram Theory.- Refer to Figure 2-20. The
Control Interface CCA provides the RSCU with information which is decoded and transformed into a visual
indication of the operating status of the DME system. It also receives control signals, from the
RSCU, which control various functions of the DME.
The Encoder State/Time-Base Generator consists of timer U16 and counter U15. This circuit creates a 4-bit
binary count that is applied to the Tone Encoder/Transmitter.
The Tone Encoder/Transmitter consists of PAL U14 and Dual Tone Multi-Frequency (DTMF) generator
U13. Status signals from the DME and the binary count from the Encoder State/Time-Base Generator are
applied to the Tone Encoder/Transmitter where they are encoded into DTMF signals and applied to the Data
MODEL 1119 DME
Rev. D December, 2002 2-65
Access Arrangement (DAA) circuit as the Tone Out signal.
The 3.58-MHZ Oscillator creates the timing signal for the Tone Encoder/Transmitter and the Tone Receiver.
The oscillator consists of inverters U1D, U1E, and U1F, resistors R3 and R19, crystal Y1, and capacitor
C26.
The DAA circuit is an amplifier buffer circuit that consists of amplifiers U12A, U12B, and U12C and
coupling transformer T1. The Tone Out signal is amplified and buffered within the DAA circuit then sent
to the RSCU on the Tip and Ring telephone lines as a Tone Coded Data Stream.
The Tone Coded Data Stream, from the RSCU, is applied to the DAA circuit where it is amplified, buffered,
and applied to the Tone Receiver circuit as the Tone In signal.
The Tone Receiver circuit consists of DTMF receiver U7 and terminal boards TB1 and TB2. U7 decodes
the Tone In signal into 4-bit binary data which is applied to the Decoder circuit. Jumpers on terminal boards
TB1 and TB2 are used to select the sensitivity of U7.
The Decoder circuit consists of decoders U8 and U11 and inverter U1A. U8 and U11 decode the data from
U7 and generate preset (PR) or clear (CL) signals that go to the Function Latch/Driver circuit.
The Function Latch/Driver circuit consists of quad D flip-flops U2, U5, and U9, positive AND drivers U3,
U6 and U10, and terminal boards TB3, TB4, TB5, TB6 and TB7. It converts the PR or CL signals into
control signals that are applied to DME system for processing.
The Unmonitored Line Detector consists of retriggerable monostable multivibrator U4A. U4A receives a
Strobe from U7. During normal operation, the Strobe constantly triggers U4A never allowing it to time out.
If the strobe is absent for more than 3.4 seconds, U4A will time out, sending a communication fault to the
Function Latch/Driver.
2.3.2.20.1 Control Interface CCA (1A18) (Optional) Detailed Circuit Theory.- Refer to Figure 11-28.
Inverters U1E, and U1F, resistors R19 and R3, capacitor C26, and crystal Y1 form an oscillator circuit which
creates the 3.58-MHZ clock signal for use by the DTMF generator U13 and the DTMF Receiver U7. This
signal is buffered and inverted by U1D before being applied to U13 and U7.
Timer U16 generates a 10-Hz signal which is applied to the A input (pin 14) of 4-bit binary counter U15.
The B input (pin 1) of U15 is connected to its QA output (pin 12). This cascades the divider sections of U15
to provide a maximum count length for U15. U15 is enabled by an active LOW from the Q "Not" output
(pin 6) of U9A. D-type flip-flop U9A functions as a latch that processes the last bit from the RSCU data
stream. This commands the Control Interface CCA to send the latest DME status signals to the RSCU.
Therefore, the only time U15 outputs a count is after it was directed by the RSCU.
The 4-bit count from U15 drives select inputs on PAL U14. The other inputs to U14 are the DME status
inputs. The QD output of U15 also drives the CLK input (pin 3) of U9A. This bit resets U9A which causes
the Q "Not" output to go HIGH. With the reset inputs of U15 HIGH the outputs of U15 are all forced LOW.
This disables U15 and prepares it for the next transmit command from the RSCU.
MODEL 1119 DME
2-66 Rev. D December, 2002
PAL U14 selects from the #1 ANT, Alarm, #2 NORM and #1 NORM signals from by means of the 4-bit
code from U15. Unused inputs are pulled HIGH by resistor R4. Each bit of the six bit status input is
encoded by U14 to develop a proper row and column data signal for DTMF generator U13.
The eight inputs of U13 are organized to represent the four rows and columns of an expanded keypad.
Selecting a unique row and column combination causes U13 to generate the unique DTMF tone that is
associated with that combination. The DTMF signal from U13 is the tone out signal that is applied to
amplifier U12B. Potentiometer R10 is used to adjust the level of the tone out signal before it is applied to
U12B. R10 is adjusted to produce a 1 Vpp signal level on the telephone lines for that portion of the signal
data stream when the Control Interface CCA is replying to the RSCU. This level is approximately
equivalent to -7 dB at 600 ohms and insures that the signal driving the Tone Decoder circuit in the RSCU
is not distorted from being overdriven.
U12B amplifies the Tone Out signal with an approximate gain of 1. Voltage divider R17 and R18
establishes a reference of approximately 3 volts at the non-inverting input of U12B. The output of U12B
is applied to the inverting input of U12A. The non-inverting input of U12A is also set to a reference of
approximately 3 volts by voltage divider R17 and R18. The output of U12A is applied to transformer T1
and exits the CCA via connector P1 pins 1 and 2 and is applied to the Tip and Ring telephone lines.
The DTMF signals, from the RSCU, at connector J1, pass through transformer T1, and are applied to the
inverting input of amplifier U12C. U12C amplifies the signals with an approximate gain of 1.5. The output
of U12C is coupled to DTMF receiver U7 by capacitor C3.
Bypass capacitor C1 helps filter the +5 Vdc entering via connector P1 pins 1C and 32C. Zener diodes VR1
and VR2 are used to eliminate voltage spikes in excess of 5.1 volts. A jumper is installed across terminal
J3 which allows the Control Interface CCA to obtain +5 V power from the backplane CCA. This jumper
is removed when installed in a DME system.
U7 decodes the DTMF signals into four bit binary data which is applied to decoders U8 and U11. The
Strobe output of U7 is used to enable U8 and U11. The Strobe goes to logic HIGH after a valid tone pair
is sensed and decoded at the data outputs. The Strobe remains a logic HIGH until a valid end-of-signal
pause occurs or when the clear input is driven to a logic HIGH. Once cleared, the Strobe will not rise to a
logic HIGH until a new valid tone is detected.
Jumpers on terminal boards TB1 and TB2 are used to select the sensitivity of the SIG IN input of U7 to a
maximum of -38 dB.
Decoders U8 and U11 decode the lower three bits, of the four-bit output, from U7 and generates active LOW
PR or CL signals that are applied to the Function Latch/Driver. The D3 output of U7 is applied to the G2A
enable input of U8 and to the G2A input of U11 through inverter U1A. A LOW on this line will be seen
as a LOW on the G2A input of U8, enabling U8. This LOW will be inverted by U1A and be seen as a HIGH
on the G2A input of U11, disabling U11. The Strobe output of U7 is applied to the G1 inputs of U8 and
U11. Under normal conditions the Strobe output of U7 will be HIGH enabling U8 and U11. A LOW Strobe
will disable U8 and U11 causing all of their outputs to go logic HIGH.
MODEL 1119 DME
Rev. D December, 2002 2-67
The Strobe output of U7 is also applied to the A input of U4A. U4A is a retriggerable monostable
multivibrator with an output pulse width of approximately 3.7 seconds. The Strobe from U7 constantly
triggers U4A, which never allows U4A to time out. If U4A is allowed to time out its Q output will change
from HIGH to LOW. The Q output of U4A exits the CCA via connector J2 pin as the No Data signal. The
No Data signal is an active LOW signal that indicates a communication fault for the DME system. This
signal is applied to No Data indicator CR2 on the DME System Interface CCA (1A16).
D-type flip-flops U2A, U2B, U9A, and U9B all operate the same, so only the operation of U2A will be
discussed. Active LOW signals from decoder U8 are applied to either the PR or CL of U2A. A LOW on
the PR input of U2A causes its Q output to go logic HIGH. A LOW applied to the CL input of U2A will
cause its Q "Not" output to go logic LOW. These signals are applied to terminal board TB4. Jumpers across
TB4 are used to select the Q or Q "Not" outputs of U2A. This signal exits the RSCU interface assembly as
the #2 ON signal via J2 pin 8.
D-type flip-flop U9A is used to reset binary counter U15 and to clear DTMF receiver U7. Whenever a logic
LOW is applied to the PR input of U9A; U9A presets causing its Q output to go HIGH and its Q "Not"
output to go LOW. A HIGH on the Q output sends a clear pulse to DTMF receiver U7 which forces its
Strobe output to a logic LOW. This insures that U7 will not attempt to decode the RSCU interface tones
which are being sent to the RSCU. A LOW on the Q "Not" output is applied to the R0(2) input of binary
counter U15 which resets its count to zero.
Components U1C, U4B, and U12D are not used.
2.3.2.21 Preselector Assembly (1A20) Circuit Theory.- The Preselector Assembly is constructed of three
quarter-wave resonant cavities, critically coupled by inductive irises to form a narrow-band,
mechanically-tuned filter with a 3dB bandwidth of approximately 5-MHZ. It provides interference
suppression to image frequencies, intermediate frequencies, and other undesired signals remote from the
desired on-channel interrogation signal frequencies. The image frequency rejection is approximately 80 dB.
Its input and output impedance is 50 ohms, and it has a maximum insertion loss of about 1 dB.
The frequency range is tunable from 1025 to 1150-MHZ. Frequency adjustment is accomplished by
presetting each of the three tuning probes to the desired frequency.
2.3.2.22 First Mixer Assembly (1A21) Circuit Theory.- Refer to Figure 11-30. The First Mixer is a
fixed-tuned, double-balanced device. The local oscillator (LO) injection signal, supplied by RF Generator
Assembly, enters this assembly via RF connector J2. This signal is a continuous wave (CW) signal
separated by 63-MHZ from the interrogation signal frequency and has a nominal level of 7 mW.
The LO is fed to mixer U1, where it is mixed with the incoming Preselector Pulsed RF from connector J1.
The resulting 63-MHZ intermediate frequency (IF) output is then applied to the G1 gate of amplifier Q1.
Variable capacitor C5, in the output circuit of Q1, is tuned for maximum output level at 63-MHZ.
MODEL 1119 DME
2-68 Rev. D December, 2002
The ACG (MAX ARRC/CW SUPPLY) signal enters the First Mixer Assembly via connector P1 pin 1 and
is coupled thru filter F1 to the gate G2 of Q1. Gate G2 controls the gain of Q1. Parameters controlled by
gate G2 are; desensitization by CW, sensitivity variation with maximum interrogation loading; and
Automatic Reply Rate Control (ARRC).
The mixer-conversion loss, preamplifier noise figure, and net bandwidth of the receiver result in insuring
a minimum threshold sensitivity of -87 dBW or less (-125 dBW including antenna gain). The output of the
First Mixer Assembly is fed by coaxial cable to IF Amplifier Assembly.
2.3.2.23 IF Amplifier Assembly (1A24) Block Diagram Theory.- Refer to Figure 2-21. A 63-MHZ signal
is sent to the 63-MHZ Tuned Amplifier circuit. This circuit consists of Q1, C10, and L2. It amplifies the
63-MHZ signal and sends it to the Logarithmic Amplifier. Gain control for the 63-MHZ Tuned Amplifier
is provided from an Automatic Gain Control (AGC) feedback signal from the CW Suppression circuit.
The Logarithmic Amplifier consists of logarithmic amplifiers U1 thru U9. This circuit compresses the large
dynamic range of the input signal to a linear, non-limiting output. The Logarithmic Amplifier provides
outputs to the Second Mixer and the CW Suppressor Circuits.
The CW Suppressor circuit consists of amplifiers U11A and U11B. The presence of CW in the Logarithmic
Amplifier output causes a DC level shift which is amplified by U11A and U11B and sent back to the 63-
MHZ Tuned Amplifier to provide CW suppression and gain control. This circuit also provides the AGC
(MAX ARRC/CW SUPP) signal to the Decoder CCA.
The Second Local Oscillator consists of crystal Y1 and transistors Q4 and Q5. It produces a stable 54.25-
MHZ signal that is sent to the Second Mixer circuit.
The Second Mixer consists of FET Q6 and associated components. It combines the output from the
Logarithmic Amplifier with the 54.25-MHZ signal from the Second Local Oscillator to produce an output
frequency of 8.75-MHZ. The output of the Second Mixer is sent to the Filter/Detector circuit.
The Filter/Detector circuit consists of CR3, CR4, L9, R35, and C30. It provides the necessary rejection to
signals 900-kHz from the center frequency so that adjacent channel interrogations are rejected. The output
of Filter/Detector circuit is sent to the On Channel Gate Trigger Generator.
On Channel Gate Trigger Generator consists of comparator U12 and multivibrator U13. It produces a fixed-
amplitude pulse when the received signal is on channel. This output is used to trigger the Half-Amplitude
Finder and the Reset Multivibrator circuits.
MODEL 1119 DME
Rev. D December, 2002 2-69
Figure 2-21. IF Amplifier Assembly Block Diagram.
The Half-Amplitude Finder circuit consists of Q7, Q8, Q10 thru Q14, DL1, DL2, and U17. The purpose
of this circuit is to find the half-amplitude point on the detected pulse. This is done by simultaneously
applying the detected pulse to a delay circuit and a peak riding circuit and comparing the output of the two
circuits in comparator U17. The Half-Amplitude Finder circuit sends outputs to the Long Distance Echo
Suppression (LDES) and Narrow Pulse Rejection Circuits and provides the Decoder TRIG signal that is sent
to the Decoder CCA.
MODEL 1119 DME
2-70 Rev. D December, 2002
The Reset Multivibrator circuit consists of multivibrator U18 and NAND gate U15A. It receives a Blanking
pulse from the Decoder CCA and the On Channel Gate from the On Channel Generator circuit. This circuit
produces a Reset Delay pulse that is sent to the LDES circuit.
The Narrow Pulse Rejection circuit consists of NAND gate U20D, and multivibrators U19 and U21A. This
circuit rejects the half-amplitude finder pulses that are too narrow and sends the Decoder Inhibit pulse to the
Decoder CCA.
The Short Distance Echo Suppression (SDES) circuit consists of multivibrator U21B. It provides a means
of suppressing interrogation echoes due to ground structures or other terrain features. When enabled, this
circuit suppresses echoes outside of the decoding aperture.
The LDES circuit consists of Q9 and voltage comparator U16. It provides a means of suppressing reply
echoes due to terrain features. When enabled, this circuit suppresses echoes outside of the decoding
aperture.
2.3.2.23.1 IF Amplifier Assembly (1A24) Detailed Circuit Theory.- Refer to Figure 11-31 sheet 2. The 63-
MHZ from the First Mixer Assembly enters via connector P1 and is applied to the 63-MHZ tuned amplifier
which consists of dual gate MOSFET Q1 and associated components. Selectivity of this amplifier is
provided by the tuned circuit of C10 and L2. The AGC (MAX ARRC/CW SUPP) voltage applied to gate
G2 of Q1 provides automatic gain control.
The output of Q1 is applied to the logarithmic amplifier circuit. The logarithmic amplifier provides a means
of compressing the large dynamic range of the DME input signal. It operates at 63-MHZ and is broadband;
no tuning adjustments are required within the amplifier. The amplifier is a successive detection type where
the maximum output signal is provided by all stages working in tandem. The logarithmic amplifier utilizes
nine integrated circuit devices (U1 thru U9), each of which contains both an IF amplifier and a video
detector. The total amplifier circuit has a dynamic range of 90 dB.
The inputs of logarithmic amplifiers U5 and U6 are cascaded and attenuated by approximately 20 dB with
respect to the input of amplifier U1. This is accomplished by a capacitive voltage divider circuit comprised
of C16 and C17. Amplifiers U5 and U6 improved the logarithmic accuracy for higher level signals ranging
from 20 to 80 dBm, using the paralleled video detector outputs (pin 4).
Logarithmic amplifiers U1 thru U4 are connected so that each IF amplifier output is cascaded. The video
detector output of these devices as well as the video detector outputs of U5 and U6 are connected to a
common line that is tied to the emitter of NPN transistor Q2. The IF amplifier output of U4 is applied to
a filter which consists of C20, C21, C25, R10, and L10. This filter improves the signal to noise
performance.
Logarithmic amplifiers U7 thru U9 are connected so that each IF amplifier output is cascaded. The video
detector output of these devices are connected to a common line and applied to the base of PNP transistor
Q3.
MODEL 1119 DME
Rev. D December, 2002 2-71
Transistor Q2 amplifies the video detector signal and applies it to the base of Q3. Also applied to the base
of Q3 is the video detector outputs of U7 thru U9. Q3 amplifies the signal and creates a detected video
signal. Test point TP12 is provided for monitoring the detected video output of the logarithmic amplifier
with external test equipment.
The logarithmic amplifier generates two outputs. One output, from pin 3 of U8, is the amplified IF (63-
MHZ) signal which is applied via C29 to Q6 in the second mixer and second IF circuits. The remaining
output from the collector of Q3 is the detected video output, which is applied to the half-amplitude finder
(Q7 base) and the CW suppression circuits (U11 pin 1).
Voltage regulator U10 provides a stable +6 Vdc supply for the elements of the logarithmic amplifier.
Refer to Figure 11-31 sheet 3. The second local oscillator is comprised of crystal Y1, oscillator components
Q5 and C37, and buffer amplifier Q4. It is a crystal controlled oscillator that has a frequency stability of
0.005%. Crystal Y1 provides the basic 54.25-MHZ operating frequency for grounded base oscillator Q5.
Capacitor C37 tunes the output so the proper frequency is maintained. The 54.25-MHZ output of the second
local oscillator is amplified and buffered by Q4 and applied thru capacitor C41 to the second mixer. Test
point TP13 allows for monitoring the output of the second local oscillator with external test equipment.
The second mixer consists of dual gate FET Q6 and the tuned elements of L7 and C42. Q6 combines the
amplified IF from the logarithmic amplifier with the 54.25-MHZ from the second local oscillator to produce
an output frequency of 8.75-MHZ. The mixer peak is tuned by inductor L7. The output of the second mixer
can be monitored at Mixer test point TP11.
The output of the second mixer is applied to narrow band, 8.75-MHZ filter and detector network which
consists of C46, C48, L9, CR4, and associated components. The filter, which is tuned by L9, has a 3 dB
bandwidth of 400-kHz providing adequate bandpass for 100-kHz deviation of the signal frequency in
addition to the total receiver drift. The circuit provides at least 80 dB of rejection to signals 900-kHz from
center frequency. The presence of such signals at levels of up to 80 dB above the threshold for desired
signals and repetition rates of up to 3600 PPS does not reduce receiver sensitivity by more than 3 dB. The
selectivity of this and the Logarithmic Amplifier stages provide the necessary inhibition to the adjacent
channel signals.
Detected pulses from CR4 are applied to the on channel gate trigger generator. The on channel gate trigger
generator consists of voltage comparators U12, U14, and retriggerable multivibrator U13. Detected pulses
from CR4 are applied to the non-inverting input of voltage comparator U12. The inverting input (pin 3) of
U12 is tied to the output of comparator U14 through CR6. The output of U12 is a stream of fixed amplitude
pulses which occur only when valid "on-channel" signals are received. These pulses appear at On Channel
Gate Trigger test point TP8 and are used to trigger U13.
When triggered, U13 produces 8 Fs pulses. The Q "Not" output (pin 6) of U13 supplies the On Channel
"Not" pulse for Q14. The Q output (pin 8) is the On Channel pulse and is used to trigger an enable gate in
the half-amplitude finder. The Q output of U13 is also connected to the non-inverting input (pin 2) of
comparator U14.
MODEL 1119 DME
2-72 Rev. D December, 2002
Voltage comparator U14 working in conjunction with Receiver Noise Threshold Adjust potentiometer R40
and On Channel Gate Trigger potentiometer R39 function as the sensitivity control, which is used to
maintain a minimum decode rate of approximately 200 PPS to insure maximum receiver sensitivity.
The detected video from the logarithmic amplifier is applied to the inverting input (pin 1) of amplifier
U11A. The presence of CW in the detected video signal causes a DC level shift that is amplified by U11A
and U11B. The output of U11B follows two paths. It exits the CCA via connector P2 pin 12 as the AGC
(MAX ARRC/CW SUPP) signal and it is fed back to the 63-MHZ tuned amplifier through diode CR7. The
feedback at Q1, gate G2, reduces the amplifier gain in proportion to the amplitude of the CW so that less
than 3 dB change in the threshold triggering level to desired input signals occurs when the CW level is 13
dB or more below the threshold trigger level of desired signals. CW AGC Adjust potentiometer R50 sets
the gain of amplifier U11A and determines the amount of feedback applied to the G2 gate of Q1.
Refer to Figure 11-31 sheet 4. The detected video from the logarithmic amplifier is applied the half-
amplitude finder. The half-amplitude finder consists of Q7, Q8, Q10 thru Q13, U17, and associated
components. The half-amplitude point will always be a constant voltage from the peak amplitude point,
because the ratio between the two values is constant. Therefore, the half-amplitude point on the detected
video pulse is determined by simultaneously applying the detected video pulse to a delay circuit and a peak-
riding circuit, and comparing the output of the two circuits in comparator U17. It should be noted that
because of the characteristics of the logarithmic function, the half-amplitude point for relatively high-level
signals is considerably higher than the detected video pulse half-amplitude point. Delay line DL2, shown
in Figure 2-22, delays the detected video pulse 2.5 Fs.
Figure 2-23 depicts a typical set of waveforms and their relationship at the half-amplitude comparator input
and output when SDES is enabled.
Figure 2-24 depicts a typical set of waveforms when SDES is not employed.
When SDES circuits are enabled, the output of the SDES-blanking multivibrator U21B is applied to the clear
input of the on-channel gate multivibrator. Consequently, when the SDES-blanking pulse occurs, the peak-
rider signal is discharged and reset. Note that the time interval (designated "t" in Figure 2-23 is equal to the
delay time between the half-amplitude trigger point and the reset time with SDES enabled. The time interval
is dependent upon the delay time of the narrow-pulse-rejection width setting of U19A of Figure 2-22. When
SDES is disabled, the time interval (designated "t" in Figure 2-23 is equal to the half-amplitude width of the
pulse. The gating circuit, composed of gates U15B and U20C and U20A and U20B, is used to obtain an
output pulse, which has the leading-edge time coincident with the half-amplitude point. (Refer to
comparator output line H of timing diagrams figures 2-23 and 2-24). This output is tested by the narrow-
pulse-rejection circuit, which subsequently inhibits the Decoder CCA and rejects the resulting signal, if too
narrow.
The detected video is amplified by Q7 and Q8, then applied to 2.0 Fs delay line DL1. The output of DL1
follows two paths. The first path, is to an amplifier which consists of Q10 and Q11. They amplify the signal
and apply it to 2.5 Fs delay line DL2 which delays the signal and applies it to pin 2 of half-amplitude
detector comparator U17.
MODEL 1119 DME
Rev. D December, 2002 2-73
The second path from DL1 is to an amplifier which consists of Q12 and Q13. Q12 and Q13 amplify the
signal and apply it to a peak rider circuit which consists of CR12, Q14, and C73. The output of the peak
rider circuit is applied to pin 3 of half-amplitude detector comparator U17.
Figure 2-22. Half-Amplitude Finder Narrow Pulse Rejection and Echo Suppression.
MODEL 1119 DME
2-74 Rev. D December, 2002
Figure 2-23. Timing Diagram for Half-Amplitude Finder with Short Distance
Echo Suppression Enabled.
MODEL 1119 DME
Rev. D December, 2002 2-75
Figure 2-24. Timing Diagram for Half-Amplitude Finder with Short Distance
Echo Suppression Disabled.
MODEL 1119 DME
2-76 Rev. D December, 2002
U17 performs a comparison function and outputs a pulse that is applied to pin 5 of NAND gate U15B.
The Blanking signal from the Decoder CCA enters at connector P2 pin 13 and is applied to pin 1 of NAND
gate U15A. U15 compares the Blanking signal to the on channel gate from U13 to produce a trigger pulse
that is applied to the 1A input of reset delay multivibrator U18. U18 produces a reset pulse whose duration
is set by Reset Delay potentiometer R94. The output of U18 is applied to NAND gates U15D and U15B.
U15B compares the output pulse of U17 with the output of U18. The compared output of U15B is inverted
by NAND gate U20C and applied as an input to NAND gate U20B and as a trigger for narrow pulse gate
generator U19.
U20B compares the signal from the 2Q "Not" output (pin 12) of U21 to that of the output from U20C. The
output of U20B is inverted by U20A and exits the assembly via connector P2 pin 6 as the Decoder TRIG
signal. Decoder Trigger test point TP1 is provided for monitoring this signal.
Figures 2-22 and 2-25 show a simplified circuit and timing diagrams of the narrow pulse gate generator.
U19A is configured to trip when leading edge of the half-amplitude finder pulse goes positive; U19B trips
when the trailing edge of the half-amplitude finder pulse goes negative. The 1Q and 2Q outputs (pins 13
and 5) of U19 are applied to NAND gate U20D. U20D will have an active output only when the half-
amplitude finder pulse width is less than the output pulse width of U19A (note lines J, K, L and M of Figure
2-25). The output of U20D is used to trigger U21A (producing a pulse approximately 3 Fs long) to inhibit
the decoder. The pulse length from the 1Q (pin 13) output of U19 is set by adjusting Narrow Pulse Gate
potentiometer R97.
SDES is achieved by employing a multivibrator (which clears the half-amplitude finder peak rider). The
SDES multivibrator U21B is triggered by the output of U19. The SDES circuit may be adjusted so that any
interference on the leading edge of the second interrogation pulse, will not stop the receiver from decoding
that interrogation. When in this configuration, the decoder rejection of #10 Fs is defeated. When the SDES
is disabled, reflections may cause good interrogations to be rejected, because the Decoder CCA will reject
all spacings outside the decoding aperture. The output pulse of U21B may be adjusted for operation through
a range of 5 to 40 Fs as determined by the setting of Short Distance Echo Suppression potentiometer R103.
The time constant of U21B is increased for Y-Channel operation, by jumpering terminals E21-E22. SDES
may be enabled or disabled by jumpering E24-E23 or E24-E25, respectively.
Performance of the LDES circuit is dependent upon two parameters; interrogation level and suppression
time.
The suppression time, determined by the Gain Time Control (GTC) circuit, is variable and dependent upon
the signal strength of the interrogation level. Stronger signals generate longer suppression times than weak
signals. Input for GTC circuit is obtained from the delayed log signal of the half-amplitude finder circuit
through isolation emitter-follower Q9. The output signal of Q9 is used to charge capacitor C65 through
diode CR11. Diode CR11 will decouple the charging circuit after the log signal decays.
MODEL 1119 DME
Rev. D December, 2002 2-77
Figure 2-25. Timing Diagram for Narrow Pulse Rejection.
The discharge time of C65 is, thus, independent of the charging circuit and is adjusted by time constant R66.
The ramp voltage across C65 is applied to comparator U16, which switches state and blanks the decoder
output when the video level exceeds the threshold voltage. The triggering level is adjusted by Gate Width
potentiometer R68 between 10 dB above threshold sensitivity level to an absolute level in excess of 10 dB.
The blanking period is adjusted from 50 to 350 Fs as determined by the setting of Time Constant Adjust
potentiometer R66.
MODEL 1119 DME
2-78 Rev. D December, 2002
2.3.2.24 Decoder CCA (1A25) Theory of Operation.- There are two versions of the Decoder CCA in use,
the 012380-0000 and 012380-0001. The 012380-0001 is currently in production and was designed to use
an EPLD (Electrically Programmable Logic Device) to replace integrated circuits in the 012380-0000 that
are now difficult to obtain.
2.3.2.24.1 Decoder CCA (1A25) Block Diagram Theory (012380-0000 Version).- Refer to Figure 2-26.
The Decoder CCA can be configured (by means of jumper E2) to decode either X or Y-Channel
interrogations. The Decoder Trigger pulses from the IF Amplifier are fed into two separate paths (delayed
and undelayed) to a coincidence gate for comparison. If the pulse pairs are spaced correctly, a decode gate
pulse is produced. The decode gate pulse is used to trigger the Dead Time Generator. The Dead Time
Generator produces a dead time gate that inhibits the Decoder. The decoder circuitry includes a Squitter
Pulse Generator. The number of squitter pulses generated is automatically controlled as a function of
interrogation signal loading. When there are no decoded interrogations, the Squitter Pulse Generator
produces 1000 100 PPS. The automatic reply rate control circuitry, also located in the
Figure 2-26. Decoder CCA Block Diagram (012380-0000 Version).
MODEL 1119 DME
Rev. D December, 2002 2-79
Decoder, limits the number of replies from decodes and squitter to a maximum of 2700 PPS. This is
necessary to keep from overloading the RF finals.
Decoder Trigger pulses from the IF Amplifier are applied to the delayed and undelayed trigger circuits.
The Undelayed Trigger circuit consists of shift register U6 and NAND gate U10C. This circuit produces an
undelayed trigger pulse that is sent to the Pulse Timing Channel Select Jumper.
The Delayed Trigger circuit consists of shift registers U1, U4, U7, U8, jumper E1, and several other
components. This circuit allows the decoding aperture to be set for different widths and produces a delayed
trigger pulse that is sent to either the Y-Channel Delay circuit or the X-Channel Delay Circuit as determined
by the Pulse Timing Channel Select Jumper.
The Y-Channel Delay circuit consists of shift registers U12 thru U17. This circuit introduces a 24 Fs delay
into the signal and produces a delayed pulse that is sent to the X-Channel Delay circuit.
The X-Channel Delay circuit consists of shift registers U19 and U20. This circuit introduces a 10 to 14 Fs
delay into the delayed pulse and applies it to the Pulse Channel Select Jumper.
The Pulse Channel Select circuit consists of DIP jumper E2. It receives the delayed and undelayed triggers
and passes them to the Decode Gate Generator. In addition, this circuit selects the 1st or 2nd pulse timing
option and the X or Y-Channel mode of operation.
The Decode Gate Generator produces a decode gate which is sent to the Dead Time Generator.
The Dead Time Generator consists of multivibrator U22B. It compares the Long Distance Echo Suppression
signal and the decode gate and the decode trigger to produce a dead time gate which is sent to the Squitter
Generator.
The Squitter Generator consists of zener diode CR1, amplifier U28, multivibrator U30, and several other
components. This circuit generates squitter pulses which are sent to the Decodes Generator U26.
The Decodes Generator consists of multivibrator U26. This circuit produces the Decodes, the Decodes "Not",
and IF Blanking pulses that are sent to the IF Amplifier Assembly (1A24).
2.3.2.24.2 Decoder CCA (1A25) (012380-0000) Detailed Circuit Theory.- Figures 2-27, 2-28, and 2-29
show the time-related signals for key points in the circuit for 1st or 2nd pulse timing. Operation with 1st or
2nd pulse timing is optional, and either mode may be selected by use of DIP jumpers E1 and E2. The 1st
pulse timing option measures the time between interrogations using the 1st pulse as a trigger. The 2nd pulse
timing option measures the time between interrogations using the 2nd pulse as a trigger.
MODEL 1119 DME
2-80 Rev. D December, 2002
The 50-MHz clock from the Keyer CCA enters via edge connector P1 pin 32 and is applied to an amplifier
circuit which consists of NPN transistors Q1 and Q2. Q1 and Q2 amplify the 50-MHz signal and apply it to
pin 5 of NAND gate U3B.
Pin 4 of U3B is tied HIGH by pull-up resistor R58. U3B inverts the amplified 50-MHz signal and applies
it to CK2 input (pin 6) of high speed monolithic counter U5.
MODEL 1119 DME
Rev. D December, 2002 2-81
Figure 2-27. Decoder CCA Simplified Schematic.
MODEL 1119 DME
2-82 Rev. D December, 2002
The output of U3B is also applied to NAND gate U3C (pins 9 and 10). U3C inverts the 50-MHz signal and
applies it to the CLK inputs (pin 10) of 4-bit shift registers U6 and U20.
Counter U5 divides the 50-MHz input signal by a factor of 5 to produce a 10-MHz signal. The Clock Enable
Pulse from U2 is applied to the CL input (pin 13) of U5. Generation of the Clock Enable Pulse will be discussed
later in the text. The 10-MHz signal from the QD output (pin 12) of U5 is applied to the CK1 and CK2 (pins
8 and 6) inputs of high speed monolithic counter U9.
Counter U9 receives the 10-MHz signal from U5, divides it by a factor of 2 and supplies a 5-MHz clock signal
to 4-bit shift register U1 via its QA output (pin 5). U9 also provides a 2-MHz signal to NAND gates U11D and
U11C via its QD output (pin 12).
U11C and U11D invert the 2-MHz signal and apply it to the CLK inputs (pin 8) of U4, U7, U8, U12 thru U17,
and U19.
The Decode TRIG pulse is an 1 Fs pulse that occurs every time the IF amp detects a pulse. This pulse enters
the CCA via edge connector P1 pin 23 and is applied to the J and K inputs (pins 2 and 3) of 4-bit shift registers
U1 and U6, and to the B1 input (pin 3) of retriggerable multivibrator U2.
The output pulse of U2 is set by Clock Enable Adjust potentiometer R2, and is set to be slightly longer than the
spacing of valid interrogations for either X (20 Fs) or Y (45 Fs) channel operation. U2 outputs the Clock Enable
Pulse via its Q output (pin 8). This signal, which can be measured at TP2, is applied to the CL inputs (pin 13)
of high speed monolithic counters U5 and U9. This signal enables U5 and U9 in the event that a spurious pulse
precedes a valid interrogation, and insures that the delay line will not stop before the second pulse of a valid
interrogation.
Shift register U1 generates the delay-line trigger. U1 is clocked by 5-MHz signal supplied by U9. The Q0 and
Q3 (pins 15 and 11) outputs are applied to NAND gate U3D.
The output of U3D is a trigger pulse with a duration of 600 ns. This trigger pulse is inverted by NAND gate
U3A and applied to the A and B inputs of 4-bit serial in parallel out shift register U4.
The Decode Inhibit pulse enters the CCA via edge connector P1 pin 22 and is applied to the CLR "Not" input
(pin 9) of U4. When the CLR "Not" input of U4 is LOW, the outputs of U4 will be LOW also. When the CLR
"Not" input of U4 is HIGH; U4 operates normally. The Q1 thru Q6 outputs of U4 are applied to DIP switch S1.
The Q7 output of U4 is not used.
Appropriately setting sections of E1 allow the output of U4 to be delayed in 0.5 Fs increments so that the
decoder aperture may be operated at less than 4 Fs if desired. Advancing or delaying the output of U4 enables
the decoding aperture to be set for different widths.
From E1, the outputs of U4 are applied through serial in parallel out shift registers U7 and U8. U7 and U8
each provide 1 4 Fs delay in the signal.
.
MODEL 1119 DME
Rev. D December, 2002 2-83
Figure 2-28. Decoder CCA 1st Pulse Timing Diagram.
MODEL 1119 DME
2-84 Rev. D December, 2002
Figure 2-29. Decoder CCA 2nd Pulse Timing Diagram.
MODEL 1119 DME
Rev. D December, 2002 2-85
The delay signal output of U8 follows two paths. Depending on the position of jumper E2, the delayed signal
is used for Y or X-Channel operation.
For Y-Channel operation, the delay line signal is passed through NAND gate U10D and applied to a 24 Fs delay
block which consists of serial in parallel out shift registers U12 thru U17. These shift registers are configured
the same as shift registers U7 and U8. The output of the 24 Fs delay block is taken from the Q7 port (pin 13)
of U17 and is inverted by NAND gate U18D before being applied to pin 10 of NAND gate U18C.
For X-Channel operation, the delay line signal is gated around the 24 Fs delay block by NAND gates U10B,
U18B, and U18C and applied to section 6 of E2 and the A and B inputs (pins 1 and 2) of serial in parallel out
shift register U19. From U19 the delay line signal is applied to the J and K inputs (pins 2 and 3) of 4-bit shift
register U20. The resulting delay introduced by U19 and U20 is 10 to 14 Fs depending on whether the 1st or
2nd pulse timing option is selected.
Shift register U20 has two active outputs. Its Q3 output (pin 12) is applied to pin 9 of NAND gate U21C. Its
Q0 output (pin 15) is inverted by NAND gate U21D and applied it to pin 10 of NAND gate U21C. The output
of U21C is applied to section 4 of Jumper E2.
Decoder Trigger pulses are applied to the J and K inputs (pins 2 and 3) of 4-bit shift register U6. These pulses
are shifted thru U6 by the 50-MHz clock supplied by U3C. U6 has only two active outputs, its Q0 and Q3
outputs (pins 15 and 11). The data from these outputs is applied to NAND gate U10C.
U10C compares the outputs of U6 and produces a 60 ns decoder trigger that is applied to pins 10 and 12 of
switch E2.
U22 is a dual retriggerable monostable multivibrator. Its A section operates as the Decode Gate Generator and
its B section functions as the Dead Time Generator.
The decoder triggers from pins 5 and 6 of E2 are applied to the A1 input of multivibrator U22. These signals
trigger U22 causing it to output 3 Fs gate pulses that are applied to NAND gate U23C. The width of pulses is
set by Decode Gate Width Adjust potentiometer R10. TP3 allows access to measure the Decode Gate width.
Decode triggers from pins 3 and 4 of E2 are inverted by NAND gate U23D and are applied to pin 10 of NAND
gate U23C. TP7 allows access to measure the decode triggers before they are applied to U23C.
U23C compares the decode triggers with decode gate pulses from U22A. Coincidence between the appropriate
valid pulses (delayed trigger and second decode gate for 1st pulse timing, and undelayed trigger and first decode
gate for 2nd pulse timing) causes U23C to output a LOW. The output of U23C is inverted by NAND gate U23A
and applied to NAND gate U23B.
The output pulse from U23B is applied to the 2A input (pin 9) of the Dead Time Generator U22 and pin 9 of
NAND gate U24C.
MODEL 1119 DME
2-86 Rev. D December, 2002
The dead time generator is triggered anytime U23B outputs a LOW. The output of the dead time generator is
set by a voltage divider which consists of resistor R15 and Dead Time Adj potentiometer R14. This dead gate
is adjustable thru the range of 50 to 150 Fs, and is normally set for 60 Fs. The dead time gate inhibits the
Decoder until the decodes, which represent an aircraft interrogation, have been delayed, encoded, and
transmitted back as replies. The dead time gate may be monitored at TP4.
Control of transients and adjacent channel echo suppression is as followed. Long Distance Echo Suppression,
from the IF Amplifier, enters the CCA via edge connector P1 pin 34, is inverted by NAND gate U25D, and
applied to NAND gate U25C.
U25C compares the inverted Long Distance Echo Suppression signal with the dead time gate to produce an
output that is inverted by NAND gate U24B and applied to NAND gate U23B. The compared Long Distance
Echo Suppression and dead time gate signal is used to enable or disable the output of U23B.
The output of U23B is also applied to NAND gate U24C.
U24C compares the output of U23B and the squitter pulse from U30 and provides trigger pulses to monostable
multivibrator U26. Generation of the squitter pulse will be discussed later.
The pulses from U24C trigger U26. U26 is configured in such a way as to produce a 50 Fs pulse from its 1Q
"Not" output (pin 4) and a 1 Fs pulse from its 2Q and 2Q "Not" (pins 5 and 12) outputs. The 2Q output of U26
exits the CCA via edge connector P1 pin 36 as the Decodes signal, this signal may be monitored at test point
TP6. The 2Q "Not" output of U26 exits the CCA via edge connector P1 pin 35 as the Decodes "Not" signal.
The 1Q "Not" output of U26 exits the CCA via edge connector P1 pin 31 as the IF Blanking pulse.
The IF Blanking pulse is also applied to NAND gate U25B. U25B inverts this pulse and applies it to two
integrator circuits.
The first integrator circuit, consists of amplifier U27B, amplifier U31, and associated components. This circuit
provides gain control feedback to the receiver input and IF Amplifier circuits, AGC (MAX ARRC/CW SUPP),
which is used in the control the maximum pulse repetition rate when the transponder is subjected to
interrogation overload. The maximum pulse repetition rate is set by adjusting Max Rep Rate Adj potentiometer
R27. The output of this integrator circuit exits the CCA via edge connector P1 pins 3 and 4 as the AGC (Max
ARRC/CW SUPP) and Max Pulse Repetition Rate signals, respectively. This circuit is used to limit the reply
rate from all sources to a maximum of 2700 PPS.
The second integrator circuit, consists of amplifier U27A and associated components. This circuit controls the
squitter rate. This rate is set by a voltage divider which consists of resistor R61 and Squitter Rate Adj
potentiometer R45. The output of U27A is applied to voltage comparator U29. U27A working in conjunction
with U29, set the maximum squitter rate at 1000 PPS in the absence of interrogations. As the number of
interrogations increases, the DC output of U27A increases (which increases the comparator bias, desensitizing
U29 and reducing the squitter noise count).
Squitter pulses resulting from receiver noise are limited to approximately 200. In the absence of interrogation
and in order to maintain a transponder output of approximately 1000 pulse pairs a separate Squitter Pulse
Generator is needed.
MODEL 1119 DME
Rev. D December, 2002 2-87
Zener diode CR1, operates with very low current near its zener point and is used as the noise source. The noise
signal is passed through DC block capacitor C31 and applied to the inverting input of amplifier U28.
U28 amplifies the noise signal and applies it to voltage comparator U29. U29 receives a DC level from
amplifier U27A and the random noise from U28. It converts the random noise into pulses for triggering a
squitter pulse generator U30. The comparator is used as a control element to maintain a relatively constant
interrogation-plus-squitter rate.
Squitter pulse generator U30 is a dual retriggerable, monostable multivibrator with an output of approximately
60 Fs. This prevents the generation of squitter pulses less than 60 Fs apart. The leading edge of the 60 Fs
output of the B section of U30 is used as a trigger for its A section. The A section of U30 has an output pulse
of approximately 1 Fs. The 1 Fs squitter pulse or the pulse used to trigger the dead time generator are applied
to NAND gate U26A.
NAND gates U11A, U11B, U21A, U21B U24A, U24D, and U25A are not used.
The Delayed Trigger and Aperture Mux circuits consist of a shift register within U5 and E1. This circuit allows
the decoding aperture to be set for different widths and produces a delay trigger pulse that is sent to either the
Y-Channel Delay Circuit or the X-Channel Delay Circuit as determined by the jumper selection of E2.
The Y-Channel Delay circuit consists of the shift register circuit within U5. This circuit introduces a 24s delay
into the signal and produces a delayed pulse that is sent to the X-Channel Delay Circuit and to the Pulse Timing
Channel Mux.
The X-Channel Delay circuit consists of a shift register circuit within U5. This circuit introduces a 14s delay
into the delayed pulse that is sent to the Pulse Timing Channel Mux.
The Pulse Timing Channel Mux circuit consists of a multiplexer circuit within U5 and E2. This circuit
multiplexes the different delayed and undelayed signals throughout the design by decoding the First
Pulse/Second Pulse and X-Channel/Y-Channel Decodes from E2.
The Decode Gate Generator circuit consists of a multi vibrator U6 and produces a decode gate which is sent to
the Dead Time Generator.
The Decode Gate Generator consists of a digital one-shot circuit within U5. It compares the Long Distance
Echo Suppression Signal and the decode gate and the decode trigger to produce a dead time gate which is sent
to the Squitter Generator and the Decodes Generator Circuits.
The Squitter Generator circuit consists of zener diode CR1, amplifier U3, voltage U4, and a digital one-shot
circuit within U5. The circuit generates squitter pulses which are sent to the Decodes Generator Circuit.
The Decodes Generator Circuit consists of digital one-shot circuit within U5. This circuit produces the Decodes,
the Decodes Not, and IF Blanking pulses that are sent to the IF Amplifier Assembly (1A24).
MODEL 1119 DME
2-88 Rev. D December, 2002
2.3.2.24.3 Decoder CCA (1A25) (012380-0001) Detailed Circuit Theory - Refer to Figure 11-32. Figures 2-27,
2-27, and 2-28 show the time related signals for key points in the circuit for 1st or 2nd pulse timing. Operation
with the 1st or 2nd pulse timing is optional, and either mode may be selected by use of Jumpers E1 and E2. The
1st pulse timing option measures the time between interrogations using the 1st pulse as a trigger. The 2nd pulse
timing option measures the time between interrogations using the 2nd pulse as a trigger.
Refer to Figure 11-32 sheet 1. The 50-MHZ clock from the Keyer CCA enters via edge connector P1 pin B32
and is applied to a DC blocking Capacitor C1. Resistors R6 and R8 bias the positive input to U2 slightly lower
than the bias set by resistors R7 and R9. U2 compares the two input signals at pins 2 and 3 and provides a
positive output when pin 2 is greater than pin 3. The buffered 50MHz signal is applied to the main clock input
of the EPLD, U5.
The EPLD operates on the 50MHz clock and derives a 2MHz clock signal for internal timing.
The Decoder Trig signal starts a digital one-shot within U5, allowing the timer circuit to run for 20s or 45s
for an X-Channel or Y-Channel system respectively.
The Decoder Trig signal is also applied to the Delayed Trigger shift register circuit within U5 where it is delayed
8s in addition to the delay selected by the Pulse Timing Channel Select Jumpers (E2).
The Delayed Trigger signal is then applied to the X-Delay and Y-Delay shift register circuits. If the Y-Channel
Jumper is selected, the Delayed Trigger signal is delayed 24s through the Y-Delay circuit and then through
the X-Delay Circuit for an additional 4s. If the X-Channel Jumper is selected, the Delayed Trigger signal is
delayed 4s through the X-Delay Circuit.
The Pulse Timing Channel Mux circuit receives the output of the X-Delay and Y-Delay Circuits along with the
Undelayed Decoder Trigger Signal. Depending on the configuration of E2 for First/Second Pulse timing, the
signals are muxed to the Decode Gate Generator circuit (U6) and the Dead-Time Gate Generator.
For First Pulse Timing, the Undelayed Decoder Trigger signal is fed to the Decode Gate Firegate signal while
the output of the X-Delay circuit is fed to a 60ns pulse generator circuit and then fed to the Dead Time Gate
Generator circuit for comparison to the output of the Decode Gate Generator circuit.
For Second Pulse Timing, the input to the X-Delay circuit is fed to the Decode Gate Firegate signal while the
output of the Undelayed Decoder Trigger signal is fed to a 60ns pulse generator circuit and then fed to the Dead
Time Gate Generator circuit for comparison to the output of the Decode Gate Generator circuit.
If the output of the Decode Gate circuit is co-incident with the output of the 60nS pulse generator circuit, the
Dead-Time Gate Generator circuit is fired and blocks any additional decodes or Squitter generation for the next
60s. The Dead Time Gate Generator circuit and the Decodes Generator circuit are fired simultaneously. The
Decodes Generator Circuit is a digital one-shot that produces 1s Decodes and Decodes Not signals that exit
the CCA at the backplane connecter on pins P1-B36 and P1-B35 respectively. A 50s Blanking Not signal
is also produced and is present at the backplane connector P1-B31.
MODEL 1119 DME
Rev. D December, 2002 2-89
The Long Distance Echo Suppression signal, from the IF Amplifier, enters the CCA via edge connector P1 pin
B34 and is connected to U5 pin 23. This signal is used to suppress decodes starting the Dead-Time Gate
Generator.
The 50s Blanking Signal is applied to two integrator circuits.
Figure 2-30. Decoder CCA Block Diagram (012380-0001 Version).
The Delayed Trigger and Aperture Mux circuits consist of a shift register within U5 and E1. This circuit allows
the decoding aperture to be set for different widths and produces a delay trigger pulse that is sent to either the
Y-Channel Delay Circuit or the X-Channel Delay Circuit as determined by the jumper selection of E2.
The Y-Channel Delay circuit consists of the shift register circuit within U5. This circuit introduces a 24s delay
into the signal and produces a delayed pulse that is sent to the X-Channel Delay Circuit and to the Pulse Timing
Channel Mux.
The X-Channel Delay circuit consists of a shift register circuit within U5. This circuit introduces a 14s delay
into the delayed pulse that is sent to the Pulse Timing Channel Mux.
The Pulse Timing Channel Mux circuit consists of a multiplexer circuit within U5 and E2. This circuit
multiplexes the different delayed and undelayed signals throughout the design by decoding the First
Pulse/Second Pulse and X-Channel/Y-Channel Decodes from E2.
MODEL 1119 DME
2-90 Rev. D December, 2002
The Decode Gate Generator circuit consists of a multi vibrator U6 and produces a decode gate which is sent to
the Dead Time Generator.
The Decode Gate Generator consists of a digital one-shot circuit within U5. It compares the Long Distance
Echo Suppression Signal and the decode gate and the decode trigger to produce a dead time gate which is sent
to the Squitter Generator and the Decodes Generator Circuits.
The Squitter Generator circuit consists of zener diode CR1, amplifier U3, voltage U4, and a digital one-shot
circuit within U5. The circuit generates squitter pulses which are sent to the Decodes Generator Circuit.
The Decodes Generator Circuit consists of digital one-shot circuit within U5. This circuit produces the Decodes,
the Decodes Not, and IF Blanking pulses that are sent to the IF Amplifier Assembly (1A24).
The first integrator circuit, consists of amplifier U1B, amplifier U1C, and associated components. This circuit
provides gain control feedback to the receiver input and IF Amplifier circuits, AGC (MAX RATE), which is
used in the control the maximum pulse repetition rate when the transponder is subjected to interrogation
overload. The maximum pulse repetition rate is set by adjusting Max Rep Rate Adj potentiometer R27. The
output of this integrator circuit exits the CCA via edge connector P1 pins 3 and 4 as the AGC (Max ARRC/CW
SUPP) and Max Pulse Repetition Rate signals, respectively. This circuit is used to limit the reply rate from all
sources to a maximum of 2700 PPS.
The second integrator circuit, consists of amplifier U1A and associated components. This circuit controls the
squitter rate. This rate is set by a voltage divider which consists of resistor R24 and Squitter Rate Adj
potentiometer R45. The output of U1A is applied to voltage comparator U4. U1A working in conjunction with
U4, set the maximum squitter rate at 1000 PPS in the absence of interrogations. As the number of interrogations
increases, the DC output of U1A increases (which increases the comparator bias, desensitizing U4 and reducing
the squitter noise count).
Squitter pulses resulting from receiver noise are limited to approximately 200. In the absence of interrogation
and in order to maintain a transponder output of approximately 1000 pulse pairs a separate Squitter Pulse
Generator is needed.
Zener diode CR1, operates with very low current near its zener point and is used as the noise source. The noise
signal is passed through DC block capacitor C6 and applied to the inverting input of amplifier U3.
U3 amplifies the noise signal and applies it to voltage comparator U4. U4 receives a DC level from amplifier
U1A and the random noise from U3. It converts the random noise into pulses for triggering a squitter pulse
generator input (pin 2) of U5. The comparator is used as a control element to maintain a relatively constant
interrogation-plus-squitter rate.
Squitter pulse generator section of U5 is a digital retriggerable, one shot with an output delay of 62 Fs with
a pulse width of 0.5 usec when a noise pulse trips the U4. This prevents the generation of squitter pulses less
than approximately 60 Fs apart.
MODEL 1119 DME
Rev. D December, 2002 2-91
2.3.2.25 Keyer CCA (1A26) Simplified Block Diagram Theory.- Refer to Figure 2-31. The primary function
of the Keyer CCA is to provide identification keying for the DME system. The DME has the capability to
provide its own keying signal or use an external keying signal.
The 1-MHZ clock is sent to the Frequency Divider circuit that consists of dual decade counters U3, U4, and U5.
It divides the 1-MHZ clock to an 8-Hz signal which is used as a timing signal throughout the Keyer CCA.
The activity of the EXT Keyer signal is monitored by the 5 Second and the 40 Second Timer circuits. The 5
Second Timer circuit consists of timer U12. The 40 Second Timer circuit consists of time U11. If the EXT
Keyer signal is continuous for more than 5 seconds or absent for more than 40 seconds, the appropriate circuit
will trigger and the internal keying sequence will take over the keying operation.
The Binary Counter circuit consists of binary counter U15. This circuit is clocked by the 8-Hz signal produced
by the Frequency Divider circuit. The output of the Binary Counter circuit is used as an address input for the
Ident Code Select circuit.
The Ident Code Select circuit consists of multiplexers U6 thru U9 and seven section DIP switches S1 thru S6.
The positions of the various sections of S1 thru S6 determine the morse code ident tone. This circuit produces
the internal keying signal which is sent to the Priority Gates circuit.
Figure 2-31. Keyer CCA Block Diagram.
The outputs of the Ident Code Select, 5 Second Timer, and 40 Second Timer circuits as well as the EXT Keyer
signal are sent to the Priority Gates circuit. The Priority Gates Circuit consists of NAND gates U16B, U18A,
U18B, U18C, U19A, and U19B. This circuit allows the EXT Keyer signal (if valid) to pass and become the
MODEL 1119 DME
2-92 Rev. D December, 2002
DME Keying signal. In the absence of a valid EXT Keyer signal, the Priority Gates circuit allow the Internal
Keying signal to pass and become the DME Keying signal.
The 50-MHZ Oscillator consists of oscillator U1. It produces a stable 50-MHZ timing signal that is used
throughout the DME system.
2.3.2.25.1 Keyer CCA (1A26) Detailed Circuit Theory.- Refer to Keyer CCA schematic diagram, Figure 11-33.
Refer to Table 2-1 for a description of the Keyer CCA jumper locations. The Model 1119 DME is capable of
being keyed internally (via circuits on the Keyer CCA), or externally from a collocated localizer or VOR. Since
the Model 1119 DME can be keyed internally or externally, the Keyer CCA circuit theory will be divided into
a discussion of the circuits involved with internal keying process, followed by a discussion of the circuits
involved in the external keying process.
With jumpers J1 thru J6 and J8 in the NORM position and J7 in the Internal position, the DME is placed in the
internal mode of operation.
The 1-MHZ clock signal from the Transmitter Video CCA enters via connector P1 pin 36 and is applied to a
frequency divider circuit that consists of dual decade counters U3, U4, and U5. This circuit divides the 1-MHZ
clock signal by a factor of 125,000 to produce a stable 8-Hz signal. This signal exits the CCA via connector P1
pin 24 as the 8-Hz signal that is applied to cabinet terminal board TB4. It is also applied to the CP "Not" input
(pin 1) of dual, 4-bit, binary counter U23 and to NAND gate U14D.
U14D passes the 8-Hz clock and applies it to U15. U15 is a four stage binary counter which has been
configured to count to 1111 and then reset to 0000. The four bit binary output is used as an address input to the
four 16-to-1 line multiplexers, U6 thru U9. The data inputs to the four multiplexers determine the code group
and are selected by DIP switches S1 thru S6. If a switch is closed, a positive-going pulse will appear at the
output (Y) of the appropriate multiplexer. If the switch is open, no pulse will be obtained. Thus, each
multiplexer will provide a stream of pulses and spaces at its output, corresponding to its associated switch
settings, as it is sequentially addressed by the binary output of U15.
Refer to Figure 2-32. In order to understand the operation of the data multiplexer, consider the multiplexers as
rotary switches. The position of the rotors is determined by the binary address from counter U15. For example,
when the binary address is 0000, the rotors would be in the first position. When U15 outputs change to 0001,
all the rotors would select the data from the second position. For an address of 0010, all the rotors would move
to the third position, etc. On the sixteenth clock pulse applied to U15, its output would go to 1111, which would
result in an immediate reset back to 0000, and the above sequence would be repeated.
In order to obtain a complete code train, it is necessary to arrange the output of each multiplexer in series. This
is accomplished by multivibrators U17A and U17B, in conjunction with priority gates U18A, U18B, U18C,
U19A, and U16B. Multivibrators U20A and U20B, in conjunction with U19B, select every fourth code train
from U16B and pass it on to U21D. Placing jumper J5 in the ILS position will add the Morse Code letter "I"
to the beginning of the internal sequence. In the NORM position, no "I" is added.
When an external keying signal is received, the EXT Keyer signal enters the CCA via connector P1 pin 15 and
is applied to the cathode of CR6. When the positive DC keying signal is applied, CR6 is back-biased causing
MODEL 1119 DME
Rev. D December, 2002 2-93
Q1 to turn on through CR7 and CR8. This takes the keying line to logic LOW which is the normal keying signal
for the remainder of the circuitry. The output of Q1 is applied to the Clock input of U24, to INV (invert)/NORM
(normal) jumper J1, and inverter U22C.
Placing J1 to the INV position bypasses inverter U22C, similarly placing J1 to the NORM position routes the
EXT Keying through inverter U22C. If the EXT Keying signal comes from a source that generates a logic HIGH
for keying, then jumpers J1 and J6 can be placed in the INV position. All other jumpers remain in their NORM
position.
From jumper J1 the EXT Keyer signal is applied to the 40 Second Adjust circuit, the 5 Second Adjust circuit,
TRIG/NORM jumper J2, and to TRIG/NORM jumper J3.
MODEL 1119 DME
2-94 Rev. D December, 2002
Figure 2-32. Simplified Keyer Circuits.
MODEL 1119 DME
Rev. D December, 2002 2-95
If jumper J3 is in the TRIG position, the EXT Keyer is applied to an RS flip-flop which consists of NAND gates
U22A and U22B. It sets the flip-flop, which will set RS flip-flop U14A and U14B and allow dual 4-bit binary
counter U23 to began counting. U23 is clocked by the 8-Hz signal from U5B and is configured to count up for
16 seconds. At the end of the 16 second period, the Q1 and Q2 outputs of U23 are HIGH. This causes the
NAND gate U22D to output a LOW, which triggers monostable multivibrator U13, resetting RS flip-flop U14A
and U14B.
When the U14A and U14B are in the reset mode, a LOW is placed on pin 5 of NAND gate U21B. This enables
U21B and allows the EXT Keyer signal to pass thru U21A to key the station. The output of U21A exits the
CCA via connector P1 pin 10 as the DME Keying signal. Test point TP1 is provided for monitoring the DME
Keying signal with external test equipment.
From INV/NORM jumper (J1) the EXT Keyer signal is applied across NORM/TRIG jumper J4 (if installed)
to pin 4 of NAND gate U21B. It is also applied to the A1 and A2 inputs of monostable multivibrator U13.
When the EXT Keyer signal is present, U13 is triggered which places a HIGH on its Q "Not" output. This resets
flip-flop U14A and U14B, places a LOW on pin 5 of NAND gate U21B, and allows the EXT Keyer signal to
pass thru U21A to key the station.
The EXT Keyer is also applied to inverter U10C. When the keying pulse is present, the output of U10C is
LOW, this triggers 5 second timer U12. If the external keying signal is continuous for more than 5 seconds, U12
will set flip-flop U14A and U14B and the internal keyer will take over the keying function. 5 SEC Adjust
potentiometer R23 is provided to allow adjustment in the 5 second time limit.
The 40 Second Timer circuit operates in much the same manner as the 5 second timer. The EXT Keyer is
applied to NAND gates U10A and U10B which buffer the signal. The output of U10A triggers 40 second timer
U11. If the external keying signal is not present for 40 seconds, U11 will set flip-flop U14A and U14B and the
internal keyer will take over the keying function. 40 SEC Adjust potentiometer R18 is provided to allow
adjustment in the 40 second time limit. This process is repeated with each external trigger.
With jumper J7 in the RESTART position and jumper J8 in the TRIG position the station will be slaved to the
external source and will shutdown or startup with the absence or restoration of EXT Keyer signal. During the
presence of external keying the EXT/INT line is HIGH and is applied to the D input (pin 2) of D-type flip-flop
U24A. The remainder of the outputs and inputs are at a LOW logic state. When the EXT Keyer signal is lost,
the D input of U24A goes LOW. After approximately 80 seconds the station is shutdown by the Monitor B
circuits and the D and CP inputs (pins 2 and 3) of U24A will go HIGH causing the Q "Not" (pin 6) out of U24A
and the D input (pin 12) of U24B to go HIGH. The reset input (pin 13) of U24B is also HIGH at shutdown.
This places the U24B in a ready state. When the EXT Keyer signal is restored, the CP input (pin 11) of U24B
is toggled on the first negative edge; this sets the Q output (pin 9) of U24B HIGH. This HIGH turns on Q2 and
provides a ground for the RESET line causing the station to startup.
Jumpers J2, J3, and J4 can be placed in the TRIG position to allow the station to be compatible with NAVAIDS
which send a trigger to initiate the DME's internal keying sequence. Jumpers J1 and J6 must be configured to
match the polarity of the external keying trigger (EXT Keyer).
MODEL 1119 DME
2-96 Rev. D December, 2002
Table 2-1. Jumper Description for Keyer CCA.
Jumper Position Description
J1, J6 NORM Used for logic low external keying.
J1, J6 INVERT Used for logic high external keying.
J2,J3,J4 NORM Used to allow the external keying signal to be transmitted.
J2,J3,J4 TRIG Used to transmit the internal keying sequence with the presence of an
external trigger.
J5 NORM No Morse code letter I.
J5 ILS Used to add the code letter I to the beginning of the internal sequence
when collocated with an ILS.
J7 INTERNAL DME does not restart with external keying.
J7 RESTART Used to allow DME to restart after shutdown when external keying is
restored.
J8 NORM Sends the detected ident to Monitor B card for both internal and external
keying.
J8 TRIG Allows only detected external keying to pass to the Monitor B CCA.
The Keyer CCA is also responsible for producing a 50-MHZ timing signal for the DME system. 50-MHZ
oscillator U1 produces a 50-MHZ signal that is applied to NAND gates U2A and U2B.
2.3.2.26 Transmitter Video CCA (1A27) Block Diagram Theory.- Refer to Figure 2-33. The circuits of the
Transmitter Video CCA provide following:
a. Processing of valid decoded interrogation signals.
b. Transmission priorities.
c. Generation of transponder pulses.
d. Continuous monitoring and adjustment of the system delay time.
e. Initiation of a search at power-up or reset to establish correct system delay.
f. Transmitter turn off when reply delay is not within tolerance.
g. Monitoring of Reply efficiency.
h. Monitoring of control switches for normal status.
I. Monitoring and control of system transients.
MODEL 1119 DME
2-98 Rev. D December, 2002
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 2-99
EPROM U11 holds the system program which determines the activities of U9.
Microprocessor U9 receives and sends data to/from associated circuits via three PIAs U8, U13, and U19.
Communication is carried out using the address, data, and control busses.
The 50-MHZ signal from the Keyer CCA is sent to the 50-MHZ Amplifier, which consists of transistors Q1 and
Q2. This circuit amplifies the signal and applies it to various circuits on the Transmitter Video CCA.
The Decodes signal, from the Decoder CCA, is sent to the Reply Delay Set Counters U15, U16, and U17. This
counter circuit is set to a value determined by U19. The Reply Delay Set Counters are clocked by a 50-MHZ
signal from Q1 and Q2. When the Reply Delay Set counters reach the preset count, this circuit sends a delayed
interrogation reply to the Priority Gates circuit.
The Priority Gate circuit consists of NAND gates U20, U21, and U23. There are five inputs to the Priority
Gates. They are; DME Keying, Ident Inhibit, Ident SW, LOC IND, and the delayed interrogation. The Priority
Gate circuit establishes an order of precedence for the input signals. The output of this circuit is monitored by
U9 and sent to the Hexadecimal Counter and the Gate Pulse No. 1 Generator.
The Gate Pulse No. 1 Generator consists of multivibrator U27A. This circuit produces the Gate Pulse No. 1
signal which is sent to the Power Amplifier Assembly. It also produces the TX Scope Trig signal that is sent
to the Transponder Control Panel Assembly.
The Hexadecimal Counter circuit consists of counters U24, U25 and U26. This counter is preset by the X/Y-
Channel Select Switches S2, S3, and S4 to provide either X or Y channel reply pulse spacing. The output of
this counter circuit is sent to the Gate Pulse No. 2 Generator.
The Gate Pulse No. 2 Generator consists multivibrator U27B. This circuit generates a control signal which is
sent to the Search Pulse Generator and produces the Gate Pulse No. 2 signal which is sent to the Power
Amplifier Assembly.
The Gate Pulse No. 1 and No. 2 Generators also generate pulses which are combined to produce a Blanking
pulse for inhibiting the receiver. This Blanking pulse is sent to the IF Amplifier Assembly.
The Search Pulse Generator provides a simple square pulse in the proper time for reply delay capture in Search
Mode.
The microprocessor U9 provides several functions within the transmitter. Its primary function is to continually
adjust and maintain the reply delay period.
The INTER D, the 50-MHZ clock, and the Reply (D) signals are applied to the Delay Counter Accumulator.
This circuit consists of counters U4 thru U7. This counter accumulates clock pulses until a valid Reply pulse
is received or until a Reset pulse has been generated. The Reset Pulse Generator consists of multivibrators U2A
and U2B. This circuit produces a Reset pulse approximately 72 Fs after a Reply (D) pulse has been received.
The microprocessor polls PIA U8, via the control, address, and data busses, to see which signal caused the reset.
If the accumulation is non-valid, it will be discarded. If it is valid, the first 20 replies will be saved. The
microprocessor then computes the average observed reply delay and compares it to the reference value set by
PIA U13 and Reference Select Switches S1A thru S1D.
MODEL 1119 DME
2-100 Rev. D December, 2002
2.3.2.26.1 Transmitter Video CCA (1A27) Detailed Circuit Theory.- Refer to Figure 11-34. With the exception
of the microprocessor circuit, all timing measurements within the Transmitter Video CCA are referenced to a
master 50-MHZ clock generator supplied by the Keyer CCA (1A26).
Microprocessor U9 is a monolithic, 8-bit microprocessor with its own internal registers, accumulators, internal
clock oscillator, driver, and 128 Kbytes of RAM. The microprocessor employs a 4-MHZ crystal oscillator (Y1)
for its control and generation of the ident signals.
EPROM U11 holds the system program which determines the activities of U9.
U9 receives and sends data to/from associated circuits via three PIAs U8, U13, and U19. Communication is
carried out using address bus A0-A10, data bus D0-D7, and the various control lines of the control bus.
The Decodes signal, from the Decoder CCA, enters the Transmitter Video CCA via connector P1 pin 12 and
is applied as one input to NAND gate flip-flop U14A and U14B. This signal sets the flip-flop which enables
NAND gate U22D and allows 50-MHZ clock pulses, from the amplifier circuit Q2 and Q3, to be applied to the
reply delay set counter.
Reply delay set counters U15, U16, and U17 are presettable ripple counters that are initially set to a value
determined by the data outputs of PIA U19 and the setting of switches S5 and S6. At the factory, the contacts
of S5 are all placed to the open position and the contacts of S6 are all placed to the closed position. Altering
the setting of S5 and S6 will change system timing and degrade system performance. When the reply delay set
counters reach the preset count, the QC output of U17 triggers, monostable multivibrator U18A.
U18A has an output pulse length of 1 Fs. The 1Q "Not" output of U18A is applied to flip-flop U14A and U14B.
This pulse resets the flip-flop to allow the next decoder pulse to be processed. The Q output of U18A is applied
to the priority gates (as a delayed interrogation reply). One output of flip-flop U14A and U14B (U14A pin 3)
inhibits the 50-MHZ clock pulses until the next decoder pulse is received. A second output (U14B pin 6) is
applied to the replay delay set counter presets through NAND gate U14C. This resets the reply delay set
counters to the value provided by U19, S5, and S6.
The priority gating is provided by the various elements of NAND gates U20, U21, and U23. The output of the
priority gates, priority has been established as follows:
1. Identity Pulse Groups;
2. Decoder Replies; and
3. Squitter.
There are five inputs to the priority gates. They are; DME Keying from the Keyer; Ident Inhibit from the
Monitor; Ident SW from the Test Panel Assembly; LOC IND from RF Generator Assembly, and delayed
interrogation reply from U18A.
MODEL 1119 DME
Rev. D December, 2002 2-101
The DME Keying signal establishes the identity and decode reply priority. Whenever any system operational
switch is not in the NORMAL position, the Ident Inhibit input line goes LOW, inhibiting identity keying. For
test purposes, the ident inhibit function can be overridden by placing the IDENT/CONST/OFF switch (on the
Transponder Control Panel) to the CONST/IDENT position. This allows testing with a continuous 1350-Hz
ident tone. Microprocessor U9 monitors the priority gating via the output of NAND gate U21A.
The output of the priority gating circuit is buffered and inverted by NAND gate U23B and applied to NAND
gate flip-flop U23C and U23D. The output of U23B sets the flip-flop which triggers monostable multivibrator
U27A.
U27A provides an output pulse of 7 to 9 Fs. This pulse length is set by Pulse No. 1 Width Adj potentiometer
R46. The 1Q "Not" output of U27A is inverted and buffered by NAND gate U28A and exits the CCA via
connector P1 pin 33 as the Gate Pulse No. 1 signal. The 1Q "Not" output of U27A is also applied to NAND gate
U28D where it is buffered and inverted. This pulse exits the CCA via connector P1 pin 31 as the TX Scope Trig
signal.
The 1Q output of U27A is also applied to the 1A "Not" trigger input of dual monostable multivibrator U31A
via a jumper placed between terminals E5-E6 or E4-E6. The other input of U31A is supplied by U19. U31A
and U31B form a search pulse generator. The search pulse generator provides a simple square pulse in the
proper time for reply delay capture in Search Mode (Transmitter OFF).
The Q "Not" output of flip-flop U23C and U23D (U23C pin 8) enables NAND gate U22B, allowing 50-MHZ
pulses to pass to the presettable ripple counters U24, U25 and U26.
Counters U24, U25, and U26 form a hexadecimal counter. This circuit is preset by switches S2, S3, and S4 to
provide either X or Y-Channel reply pulse spacing. The output of this counter circuit (U26 pin 12) is applied
to the 2A "Not" input of monostable multivibrator U27B. U27B provides an output pulse of 7 to 9 Fs. This
pulse length is set by Pulse No. 2 Width Adj potentiometer R48. When the counter reaches its preset count,
U27B is triggered producing Gate Pulse No. 2. At the same time, flip-flop U23C and U23D is reset, by the 2Q
"Not" output of U27B, in preparation for the next reply pulse pair. The 1Q "Not" and 2Q "Not" outputs of U27A
and U27B are compared by NAND gate U28C to provide a blanking pulse for inhibiting the receiver. This pulse
exits the CCA via connector P1 pin 32 as the Blanking signal.
The Antenna Interlock input is a function on dual system installations. This signal enters the CCA via connector
P1 pin 30 and is applied to the base of transistor Q1. When activated, it inhibits multivibrators U27A and U27B
to prevent transmitter replies during operation of the antenna changeover relays. In single system installations
this line is connected to ground.
Microprocessor U9 provides several functions within the transmitter. Its primary function is to continually
adjust and maintain the reply delay period. The information required to execute this function is obtained from
the system monitoring circuits that generate the Reply and INTRG pulses which are sent to U9 for evaluation.
Refer to Figure 11-34 sheet 1. The detected interrogation (INTER D) enters the CCA via connector P1 pin 36
and is applied to NAND gate flip-flop U3B and U3C via NAND gate U1D. The output of U1D is also applied
to the trigger input of monostable multivibrator U2A.
MODEL 1119 DME
2-102 Rev. D December, 2002
U2A produces a 70 Fs pulse that is used as trigger for multivibrator U2B. U2B produces a 2 Fs reset pulse that
is gated to NAND gate flip-flop U3B and U3C. The output of flip-flop U3B and U3C (pin 8) enables NAND
gate U22, allowing 50-MHZ clock pulses to be accumulated in the delay counter accumulator (U4 thru U7).
The counter accumulates clock pulses until a valid Reply pulse resets flip-flop U3B and U3C. If, for example,
there is a 50.00 Fs delay time, 2500 clock pulses will have been accumulated. The output of flip-flop U3B and
U3C (pin 6) is applied to the interrupt input (pin 40) of PIA U8. When flip-flip U3B and U3C is reset, the level
change sets the interrupt flag in U8. The microprocessor periodically polls U8. When the complete count is
obtained from the counter, U9 saves that count (via the data ports of U8) in temporary storage registers for data
accumulation. It then resets the counter (via the U8 port) in preparation for the next count sequence. U9
continues to add subsequent delay counts until a total of 20 counts have been received (20 x 2500 = 50,000).
The data will be in the form "05 00 00". In order to make the data more easily comparable to the decimal delay
time reference value (as established by the reference select switches S1A thru S1D), this three-byte data is
adjusted to two bytes. This is possible, because the first and last nibbles (being beyond the system range of
adjustment) can be discarded. The microprocessor computes the average observed reply delay and compares
it referenced value manually selected by hex switches S1A thru S1D. If there is a difference between these two
values, the microprocessor: 1) determines the difference: 2) changes the results to hexadecimal; and 3) corrects
reply delay set counter (U15 thru U17) to produce the desired delay. During the computation and adjustment
sequence, flip-flop (U3B and U3C) is inhibited by gate U1D until the microprocessor is ready to accept new
data.
A similar function is carried out at power-up or after a hardware reset. The microprocessor checks for 1st or
2nd pulse timing (as established by a jumper placed across terminals E5-E6 for 1st pulse timing or terminals
E4-E6 for 2nd pulse timing), then a search is initiated to adjust the reply delay set counter (U15, U16, and U17)
until the proper reply delay is established. During the search sequence, U9 increases the repetition rate of the
Signal Generator to approximately 1000 PPS, thereby reducing the time required to complete the search.
Transponder output and identity keying are also inhibited (TX Control) until the search is complete. When the
transponder delay has been adjusted to place the proper pulse within the delay monitor acceptance gate, the
search sequence is completed. The microprocessor then enters the normal delay adjust and identity pulse group
generation sequence.
When any system operational switch is not in its NORMAL operating position, the microprocessor leaves the
delay setting at its last valid setting prior to switch activation. By selecting the last valid setting, testing of
various circuits within the equipment can be made with a stable delay time. In addition, the reply delay gate
function can be tested without causing an out-of-specification condition. The microprocessor will also turn OFF
the transponder (TX Control) for all conditions in which the reply delay is not within tolerance.
During identity keying, or when the IDENT/CONST/OFF switch (on the Transponder Control Panel) is set to
the CONST/IDENT position, the transponder does not process decoder information. However, the
microprocessor will generate the identity pulse group at a rate of 1350-Hz.
Percent replies are constantly monitored by the microprocessor, and a search is initiated when the value is too
low (50% replies).
A hardware reset circuit is monitored and controlled by the microprocessor (to prevent transients within the
system from causing improper operation).
MODEL 1119 DME
Rev. D December, 2002 2-103
The DME system has a requirement to provide a minimum number of output pulse pairs in order to stabilize
interrogator AGC circuits. Dead-time due to this, along with traffic loading from other aircraft, prevents the
transponder from replying to every interrogation. Typically, the reply efficiency is greater than 80% for a single
interrogator. Therefore, since the delay counter is enabled for each interrogation, a means is required to exclude
count accumulations for which there is no valid reply.
If a valid Reply is not received, the accumulation of pulses is stopped by the 2 Fs reset pulse from U2A. Since
the maximum valid delay time for the system is 57 Fs, U9 is programmed to ignore any counts corresponding
to a delay time in excess of 60 Fs.
The first pulses from the transmitter are not very predictable in time. Therefore, for the first 1-second interval
after the transmitter is turned ON, a much wider gate is used for "replies". This is available from Monitor A and
enters the CCA on connector P1 pin 21. The 1-second timer (U30) is triggered by the TX Control transition.
It allows the WYD DELAY to "reset" multivibrator U2A, providing a reply input to the accumulator for 1 sec.
(approximately 5 updates).
Various input and output lines associated with microprocessor operations are used for the following purposes:
U13 pin 39 (CA2) is an output line used to increase the generator repetition rate during the search sequence.
This is the Rep Rate Control signal that exits the CCA via connector P1 pin 4 and is applied to the Signal
Generator Video CCA.
U19 pin 14 (PB4) is an output line that inhibits interrogations until completion of microprocessor initialization.
This line connects to pin 13 of NAND gate U1D.
U19 pin 39 (CA2) is an output line that inhibits transmitter RF output until the search sequence is finished and
system delay has been properly set. This is the TX Control signal that exits the CCA via connector P1 pin 5 and
is applied to the Power Amplifier Assembly (1A32).
U19 pin 13 (PB3) is an input line that monitors identity keying signals (from the Keyer) to begin generation of
identity pulse groups at a 1350-Hz rate. This line connects to pin 3 of U21A.
U19 pin 16 (PB6) is an output for identity and equalizing pulses. This line connects to the clock input of U18B.
U19 pin 17 (PB7) is an input that monitors whether 1st or 2nd pulse timing has been selected. A jumper is
placed is placed between terminals E1-E3 to select 1st pulse timing. Placing the jumper between terminals E2-
E3 selects 2nd pulse timing.
U19 pin 15 (PB5) is an input that monitors whether any operational switches in the DME equipment have been
placed in an OFF-NORMAL position. Figure 2-19 is a schematic of the totem poll connections for the auxiliary
contacts of the 1119 switches. The B2 terminal of CHASSIS POWER switch 1A2S1 connects to input PB5.
The IDENT, HVPS FINAL, HVPS DRIVER, FREQ, MON TEST, CW, SPACING, and PRF switches cause
U9 to stop adjusting delay and stop generating identity. The last valid delay setting is retained until the switches
are returned to NORMAL, so that testing can be performed with a fixed transmitter delay time. The CHASSIS
POWER switch ON position, by itself, will allow testing with U9 operating while inhibiting identity and
indicating BYPASS (or out-of-service).
MODEL 1119 DME
2-104 Rev. D December, 2002
U13 pin 19 (CB2) is an output that inhibits reset timer U10A and U10B. The reset timer eliminates the
possibility that a system transient might cause U9 to lose control of the program, thereby leaving the system in
an uncontrolled state. During normal program operation, an inhibit pulse is periodically sent to the reset timer
to prevent resetting. If the program is not being followed, this inhibit signal is absent; and U9 resets and goes
through the initialization process again.
U9 pin 37 is the 1-MHZ E clock output. As part of the control but it is used to control the process timing on
the CCA. The E clock also exits the CCA on connector P1 pin 10 to be used on the Keyer CCA.
2.3.2.27 Scaling CCA (1A29A1) Circuit Theory.- Refer to Figure 11-36. This CCA scales the station voltages
and currents for use by the built-in test equipment. Since the circuits that scale the PRI DCI and BATT DCI are
functionally the same only the circuit used to scale the PRI DCI is discussed.
The PRI DCI at connector J1 pin 10 and is applied to the inverting input of differential amplifier U1A through
resistor R2. The voltage difference between pins 2 and 3 is inverted and amplified by approximately 10 by U1A.
The output of U1A exits the CCA via connector J1 pin 7 and is applied to the Interface CCA. Zener diode CR3
provides over voltage protection by eliminating voltages in excess of +7.5 or below -.7 Vdc.
The AC HI Input voltage enters the CCA via connector J1 pin 14 and is stepped down to 6 Vac by transformer
T1. The 6 Vac is then rectified by diodes CR1 and CR2, filtered by R14 and C5, and applied to the Interface
CCA (1A17). The primary of T1 can be configured for 120 of 220 Vac operation. Connections made between
jumpers E1-E3 and E2-E4 are for 120 Vac operation. Connections between jumper E2-E3 configures the CCA
for 220 Vac operation.
The PRI DCV (+28 Vdc) enters the CCA via connector J1 pin 9 and is stepped down to 2.9 Vdc by R5 and R6.
The 2.9 Vdc is filtered by C12 and exits the CCA on 8 where it is applied to the Interface CCA (1A17). The
PA DCI circuits are not used on the 1119 DME.
2.3.2.28 Input Power Monitor/Watchdog (1A29A2) Circuit Theory.- Refer to Figure 11-37. The Input Power
Monitor/Watchdog CCA provides a means of monitoring the major power supply elements of the system. It
provides a remote indication that primary power has been lost. It also provides a Low Battery Voltage indication
to the Power Panel Assembly (1A29).
The +28 Vdc from the DC Power Supply Assembly enters the CCA via terminal E5 and is applied to the +28
to +5 Vdc converter. The +28 to +5 Vdc converter consists of R22, C13, and dc/dc converter U8. U8 converts
the +28 Vdc input voltage into +5 Vdc and supplies about 200 mA of current. The +5 Vdc supplied by U8 is
used as a supply voltage for several on board components.
An 8-Hz signal from the Keyer CCA is applied to pin 4 of NAND gate U7B. Pin 5 of U7B is held HIGH by
the TCU "Not" output of U6. The 8-Hz signal is buffered and inverted by U7B, inverted by U7A, and applied
to the count up (CU) input of U6.
MODEL 1119 DME
Rev. D December, 2002 2-105
The Watch Dog pulse from the CPU CCA is applied to the trigger input of timer U5. U5 is configured to
operate as a monostable multivibrator with an output pulse length of 8.25 ms. Under normal operating
conditions, U5 is constantly triggered by the Watch Dog. This causes U5 to output 8.25 ms pulses to NAND
gate U7C. U7C inverts the pulses and applies them to pin 12 NAND gate U7D. Pin 13 of U7D is tied HIGH
by pull-up resistor R17. In this configuration U7D functions as an inverter. The output of U7D is applied to
the Master Reset (MR) of U6. During power up, pull-up resistor R17 and C11 hold the MR input of U6 HIGH
until system voltages are stable.
U6 is a synchronous up/down counter. The pulses applied to the MR input of U6 continually resets the count
of U16 to zero. The TCU "Not" output of U6 goes LOW only when the count reaches 15. With the count
constantly being reset to zero, the count of U6 will not reach 15 and the TCU "Not" output will never go LOW.
The TCU "Not" output of U6 is applied to the base of NPN transistor Q4. The HIGH from U6 turns on Q4 and
energizes system power relay 1A29K2. Diode CR1 eliminates transient surges caused by stored energy in the
relay coil that may damage Q4.
If the Watch Dog is absent for 2 seconds the output of U6 will go LOW. This turns off Q4, deenergizes relay
1A29K2, and shuts down the transmitter.
U3 functions as the low voltage sensor. U3 is a precision timer configured to operated as a voltage comparator
monitoring the +28 Vdc level at E5. During normal operating conditions the trigger input (pin 3) of U3 is set
to approximately 2.65 volts by a voltage divider circuit which consist of R8 and R9. This turns on U3 causing
it to output a HIGH from its emitter output (pin 7). The emitter of U3 is tied to the base of transistor switch Q3
thru R10. The output from U3 turns on Q3 and energizes relay K1 on the Power Panel Assembly (1A29). If
the +28 Vdc level at E5 drops to 21.5 Vdc, the reference voltage applied to trigger input of U3 drops to about
2 volts. This causes the output of U3 to go LOW, turning off transistor Q3, deenergizing 1A29K1, and causing
the Low Battery indicator to illuminate.
U4 also functions as a low voltage sensor. U4 is a precision timer configured to operated as a voltage
comparator monitoring the +28 Vdc level at E5. It provides remote indication that primary power has been lost.
The trigger input (pin 3) of U4 is set at a reference voltage determined by a voltage divider which consist of R11
and R12. When primary power is absent and battery power is being used, the battery voltage will be about 3V
lower than the highest charge level, U4 detects a level of 26 volts and operates relay K1 providing remote
indication at E7-E8.
The contacts of relay K2 provide a supply path for a remote status indicator. The relay is controlled by the
Remote Status Relay drive at E9 which goes LOW to operate K2.
2.3.2.29 +28 Vdc Power Supply Assembly (1A30) Circuit Theory.- The 1119 DME has a built-in power
supply, which is capable of providing not only the +28 Vdc at 10.0 A necessary for the DME to operate, but also
the +28 Vdc charge and float voltage for the battery back-up unit. The Power Supply can be configured to
accept either 120 or 220 Vac as an input voltage. The unit is an independent module and may be replaced
should it fail. Because the batteries are constantly floated across the DC output of the charger, they provide both
filtering of any transients passing through the power supply and a no-break DC supply to the DME Transponder.
MODEL 1119 DME
2-106 Rev. D December, 2002
2.3.2.30 ILS Current Limiter (1A31) Circuit Theory.- Refer to Figure 11-38. Resistor R1 in series with the
battery charger serves to limit the charge current. When the system is being operated from the batteries, diode
D1, a low forward voltage drop diode, bypasses the resistor to limit the voltage loss. This allows the system to
operate for a longer period of time on battery backup.
2.3.2.31 RF Amplifier (1A32) Block Diagram Theory.- Refer to Figure 2-34. The Power Amplifier Assembly
is comprised of seven (7) separate CCA, which are individually installed upon a substantial heat sink. The heat-
generating modulating transistors are installed on the fin side of the heat sink with the transistor leads making
connection through the center plate. This entire module is then attached to a plate which provides the means
by which the Power Amplifier is installed on the side of the DME cabinet.
The 1119 DME Amplifier Assembly delivers 900 10% watts peak at its output connector (J2). The output
power is attainable on any DME channel from 962-MHZ to 1213-MHZ.
MODEL 1119 DME
Rev. D December, 2002 2-107
Figure 2-34. Power Amplifier Assembly Block Diagram.
MODEL 1119 DME
2-108 Rev. D December, 2002
The Power Amplifier Assembly uses a unique microprocessor control system to achieve pulse shape control.
This control system compares the transmitter output pulse shape with a reference stored in the microprocessor
ROM, which then computes a set of 96 successive slopes. These slope values are then read from RAM,
converted to a proportional analog current and integrated to produce a complex waveform, resulting in the
desired transmitter RF output envelope. Calculation of the 96 slope values is taken from a measurement made
on each P1 pulse. Adjustment to the pulses is accomplished with each pulse for the first 10,000 pulses;
thereafter, the adjustment rate slows to about one per 20 P1 pulses.
The peak power output of the Power Amplifier Assembly is controlled by an analog feedback loop that senses
the peak modulator voltage and adjusts the gain of the waveform generator digital to analog conversion. Both
the analog peak power loop and the microprocessor slope calculations affect total loop gain. It is, therefore,
necessary to sense the limits of the analog loop adjustment range and force the microprocessor to perform a
secondary gain adjustment.
The transmitter pulse waveform is controlled by the microprocessor program to match stored values at the 10%,
50% and 90% points on the leading and trailing edges. Thus, the transmitted pulse width at the 50% point, the
10% to 90% rise time and 90% to 10% fall time are set within the microprocessor program and are not
adjustable. Pulse position of P1 and P2 is determined by the falling edge of the input pulse.
The Exciter CCA is comprised of transistors Q1 thru Q4. It and converts the 962 - 1213-MHZ RF input into
a 250 W peak pulse output which is sent to the Power Amplifier CCA.
The Power Amplifier CCA consists of transistors Q1 thru Q4. It receives the peak pulse output from the Exciter
CCA and amplifies it through transistors Q1 thru Q4. These transistors are connected in parallel, with the
outputs being summed together to achieve the 900 10% W RF power output.
Modulating signals for the Exciter and Power Amplifier CCAs are generated by the Main CCA. The transmitter
pulse pair is initiated by the P1 and P2 pulses from the Decoder CCA (1A25). This CCA generates the
Transmitter Blanking Output that is sent to the Decoder CCA (1A25). These blanking pulses inhibit the decodes
during the transmit time.
The Antenna Interlock signal, from the Transmitter Video CCA, inhibits the Power Amplifier CCA during the
process of initial reply delay adjustment (Search Mode). This insures that no replies to aircraft interrogations
will be transmitted until proper system delay control has been established.
The Surge Limiter CCA limits the current supplied to the Regulator CCA.
The Regulator CCA reduces the supply voltage to provide +28 volts and +50 volts to the Switch CCA.
The Switch CCA is control by an input from the Modulation Amplifier CCA. When turned on it applies the +28
and +50 volts modulation voltage to the Exciter CCA.
The Modulation Amplifier CCA provides the Final AMP. Modulation voltage to the Power Amplifier CCA. It
also controls the operation of the Switch CCA.
MODEL 1119 DME
Rev. D December, 2002 2-109
2.3.2.31.1 Exciter CCA (1A32A1) Detailed Circuit Theory.- Refer to Figure 11-39. The Exciter contains four
amplifier stages. The 962 - 1213-MHZ 450 mW RF enters via connector J1 and is applied to diode PIN switch
CR1 and CR2. This diode PIN switch transfers the 450 mW RF input power between dummy load, R1, and the
first amplifier stage input. The transfer occurs for a 9.6Fs period centered on each pulse.
The first amplifier stage, transistor Q1, receives a fixed 28 V collector modulation during the 9.6Fs period and
delivers a nominal 4W output. This is attenuated by a 2-dB interstage attenuator which consists of R6, R7, R8,
and R9. R6 provides a 50-ohm sample point (TP1) for use during tests and alignment.
The second amplifier stage, transistor Q2, receives a fixed 50 V collector modulation during the 9.6Fs period
and delivers a nominal 30 W output. This is attenuated by a 2-dB interstage attenuator which consists of R10,
R11, R12, and R13. R11 provides a 50-ohm sample point (TP2) for use during tests and alignment.
The third amplifier stage, transistor Q3, is modulated by the shaped envelope common to the last three amplifier
stages. Peak output power is a nominal 100 W. This is attenuated by a 1-dB interstage attenuator which consists
of R14, R15, R16, and R17. R15 provides a 50-ohm sample point (TP3) for use during tests and alignment.
The fourth and final amplifier stage on the Exciter CCA is transistor Q4. Q4 raises the power to 250 W. The
output of the Exciter CCA is a 250 W pulse RF signal that is sent to the Power Amplifier CCA.
2.3.2.31.2 Power Amplifier CCA (1A32A2) Detailed Circuit Theory.- Refer to Figure 11-40. The 250 W pulse
RF from the Exciter CCA is divided in half by 90-degree hybrid H1, each output of H1 is again halved by the
following hybrids H2 and H3. The resulting four outputs to transistors Q1 thru Q4 are in phase quadrature.
The outputs of the four final amplifier transistors, Q1 thru Q4, are combined in hybrids H4 thru H6. Phase and
amplitude imbalance between the four final transistors is absorbed in the hybrid's dummy terminations R1 thru
R3 and R11 thru R13. R13 receives any power reflected back into the transmitter as a result of load VSWR,
thus protecting the final amplifier transistors.
A 42-dB directional coupler and detector diode CR1 provide the pulse shape input to the modulator control
circuits (on the Main CCA, 1A32A3) for comparison with a stored reference shape.
FETs Q5, Q6, and Q7 supply the Modulation Amplifier CCA with the Final Amp. Modulation voltage.
MODEL 1119 DME
2-110 Rev. D December, 2002
2.3.2.31.3 Main Board CCA (1A32A3) Detailed Circuit Theory.- Refer to Figure 11-39. The Thermal
Shutdown circuit consists of thermistor RT1, diodes CR3, CR4, and amplifier U35A. The inverting input of
U35A is referenced to 2.5 volts by a voltage divider which consists of R14 and R15. RT1 exhibits a negative
temperature coefficient; as the temperature rises, its effective resistance decreases which increase the voltage
applied to the non-inverting input of U35A. The output of U35A increases from a negative potential
proportionally with an increase in power amplifier temperature until the input voltage goes above the reference
voltage. The output of U35A then goes HIGH (this is an over-temperature indication). The output of U35A
is the Temp Sense signal; TP1 is provided for monitoring the Temp Sense signal. The output of U35 is applied
to pin 13 of OR-gate U7D.
The MPU Reset Time Out, from microprocessor U28, is applied to the other input of U7D. Under normal
operating conditions the inputs to U7D are both LOW, causing U7D to out a LOW to NOR-gate U4A.
The ANT Interlock at connector J3 pin 1 and is applied to pin 2 of U4A. Normally, the ANT Interlock signal
is LOW. With the LOW from U7D and the LOW ANT Interlock signal, U4A outputs a HIGH to the Set (S)
input of dual D-type flip-flop U8A.
The Reset (R) input of U8A is tied HIGH. This causes the Q output of U8A to follow the level applied to its
1D input.
The P1 signal at connector J3 pin 3 and is applied to the 1A input of U8A and to NAND-gate U1A. The P1
input pulse has a width roughly equal to the transponder delay. A minimum pulse width of 6.5Fs is required
to give the microprocessor sufficient time to abandon a write to the slope storage RAM U19 prior to the falling
edge. As long as the S input of U8A remains HIGH; the 1Q "Not" output of U8A will be the inversion of the
signal applied to its 1D input. The 1Q "Not" output of U8A is applied to U28 and to the other input of U1A.
U1A compares the two inputs and sends the compared signal to the C1 input (pin 3) of D-type flip-flop U9A.
The P2 signal at connector J3 pin 2 and is applied to NAND-gate U1B. The P2 input pulse width is nominally
equal to the P1 input pulse width. The other input of U1B is tied to the 1Q "Not" output of U8A. U1B
compares the two inputs and sends the compared signal to the C2 input of D-type flip-flop U9B.
Flip-flops U9A and U9B sense the start of P1 and P2. The outputs of U9A and U9B are applied to the D1 and
D2 inputs of dual D-type flip-flop U10. The P1 and P2 signals are then synchronized to 20-MHZ clock Y1.
This synchronization results in a 25ns jitter in the output pulse position.
The synchronized P1 and P2 pulses, from the Q1 and Q2 "Not" outputs of U10, are gated together thru NAND-
gate U1D and applied to the G1 "Not" input of tri-state octal buffer U20 and the G2 "Not" input of tri-state octal
buffer U18.
The synchronized P1 and P2 pulses, from the Q1 and Q2 "Not" outputs of U10, are also gated together thru
NAND-gate U1C and applied to the Modulator Amplifier CCA.
The Q2 output of U10 is, combined with the S "Not" output of U37, inverted by NAND-gate U5C, and exits
the CCA via connector J3 pin 5 as the X-MIT SYNC Out signal.
MODEL 1119 DME
Rev. D December, 2002 2-111
The Q1 output of U10 is applied to the INTO "Not" (external interrupt 0) port (pin 12) of U28.
The output of Y1 is applied to the 2CLK input of U12B. It is also inverted by NAND-gate U2D and applied
to the UP input of up/down counter U16.
Counters U16 and U15 form a 9.6Fs pulse width counter circuit that provides an address location for slope
storage RAM U19. The QD and QC outputs of counter U15 are also applied to the inputs of NAND-gate U2B.
U2B compares the signals and sends a reset pulse to the R inputs of U9A and U9B. This resets U9A and U9B
ending the synchronization of P1 and P2 pulses.
Seven bits from the counter circuit are passed thru tri-state octal buffer U17 to the address inputs of U19.
Microprocessor U28 enables U19 at the proper time through the action of OR-gates U6C and U6D. Binary
Coded Decimal (BCD) address locations (0 through 95) are read and an 8-bit RAM output is directed to data
latches U21 and U22. A clock pulse, provided by OR-gates U6A and U4D, clocks the data into the latches.
Data latches U21 and U22 are paired with two multiplying digital-to-analog converters (MDAC), U23 and U24.
The control current for U23 and U24 is proportional to the Peak Power Control voltage output from U35B via
Q6. A second proportional current from Q7, equal to half the control current applied to U23 and U24, is applied
to integrating capacitor C10. Thus, when the selected MDAC's digital input is half the maximum value, the
current from the MDAC output and Q7 will cancel, producing a flat slope. It follows that a hexadecimal value
of 00 produces a maximum positive slope on the integrating capacitor and a hexadecimal value of FF produces
a maximum negative slope.
The outputs of U6A and U4B also control two transistor switches, Q2 driven by Q5 and Q3 driven by Q4, that
alternately select the MDAC outputs. This allows each MDAC to be addressed and settle before its output is
directed to C10.
The voltage envelope produced at C10 is the variable portion of the transmitter modulation voltage although
the amplitude is only about 10% of the actual modulation voltage. This voltage is referenced to ground at the
start of P1 and P2 by shorting switch transistor Q8.
The variable envelope pulse shape, formed by C10, is applied to a high speed buffer amplifier that consists of
amplifiers U25 and U26. This circuit produces a low impedance source for the modulator amplifier and adds
an adjustable pedestal voltage to the variable envelope pulse shape. Pedestal Adjust potentiometer R38
determines the pedestal voltage and is normally set so the trailing edge of the pedestal is equal in amplitude to
the leading edge of the pedestal. This is about 18 volts on the transmitter. The output of U26 is a shaped pulse
pair and is applied to Modulation Amplifier (1A32A4).
The synchronized P1 and P2 pulses, from U1D, are also applied to the 2CLR and 1CLR inputs of dual 4-bit
binary counter U11. U11, U2A, U2C, and U8B form a circuit that produces the transmitter blanking output.
This signal, from the Q2 "Not" output of U8A, is buffered and inverted by NAND-gate U5B and exits the CCA
via connector J3 pin 4 as the Transmitter Blanking Output signal.
The 2 PRE "Not" output of U8A also control the writing of information to U19. A HIGH on this line allows
information to be written to U19. A LOW allows data to be read from U19.
MODEL 1119 DME
2-112 Rev. D December, 2002
The 2 PRE "Not" output of U8A is also applied to the base of transistor Q8. This signal releases the waveform
integrator reset switch Q8.
Data for computing adjustments to the modulation envelope is obtained by measuring the time between the
beginning of the synchronized P1 pulse and the transmitted envelope reaching a predetermined percentage of
its peak. The envelope peak is determined in a precision peak hold circuit composed of a comparator U38,
buffer Q11, hold capacitor C30, and buffer U39A.
The microprocessor requests a sample be made at some percentage of the envelope peak by latching the desired
value onto the MDAC input reference U40 input address latch U41. The MDAC input reference current through
R77 is proportional to the peak envelope value on the peak detector buffer output U39A. Therefore, output
current is a desired ratio of the peak value.
An operational amplifier U39B converts the MDAC output current to a proportional voltage and provides a
means to adjust for zero offset R76 and gain errors R68. These adjustments are made by first placing the
"TEST/RUN" switch in the "TEST" position. This causes the microprocessor to alternately request a zero ($00)
and 100% ($FF) measurement. The 0% and 100% values on TP4 are then adjusted to match the envelope on
TP5 with an oscilloscope.
"TEST" also produces a fixed modulator waveform that is useful in sweep aligning the transmitter.
The desired envelope measurement is now made by comparing the requested percentage of the envelope peak
with the detected envelope in a comparator U36. Either the leading- or trailing-edge measurement can be made
as requested by the microprocessor. The period of the resulting square wave is counted by U42 and U43 and
then gated onto the data bus via tri-state octal buffer U44 to the data bus. The QA outputs of U42 and U43 are
applied to the P1.2 input (pin 3) of U28.
Pulse shape control is obtained by comparing the output of these two circuits and computing the necessary
adjustments to the modulating pulse required to achieve the ideal pulse characteristic, as stored in the EPROM
(U31).
The MOD. Voltage Out Power Set, from the Modulator Amplifier CCA (1A32A4) is applied to a voltage divider
that consists of R13 (on the Modulator Amplifier CCA) and R14. This is the modulator output envelope and
is applied to the A input (pin 3) of comparator U33. The B input (pin 4) of U33 has an adjustable reference
voltage applied to it. This voltage is set by Pulse Amplitude Set potentiometer R43. The resulting comparator
output pulse has a width proportional to the peak voltage error. The B output (pin 9) of U33 can be monitored
at TP-2. This signal is buffered by transistor Q9 and integrated on capacitor C26. During P1, a fixed discharge
of C26 via R55 and Q10 insures that the control loop can act in both directions. The loop control voltage action
is inverted with zero volts on the integrating capacitor representing very high modulator voltage. U28 supplies
an initializing drive, via R53 and CR12, to buffer Q9. This initializing drive forces the analog control loop to
a minimum gain condition during system initialization.
The resulting control voltage on the C26 is amplified by U35B and becomes the Peak Power Control voltage.
MODEL 1119 DME
Rev. D December, 2002 2-113
Secondary loop gain control is achieved by sensing an upper and lower limit of the Peak Power Control voltage
by comparators U45A and U45B. The outputs of U45A and U45B are applied to U28. They cause the
computed slope values to be adjusted up or down in order to maintain the Peak Power Control voltage within
the loop's dynamic range.
2.3.2.31.4 Modulation Amplifier CCA (1A32A4) Detailed Circuit Theory.- Refer to Figure 11-39. The input
to the Modulator Amplifier CCA is at differential transistor pair Q4 and Q5. The output of Q4 and Q5 drives
FET buffer, Q3. FET switch, Q6, in the differential pair's common mode disables the amplifier between pulses,
since the pedestal voltage is present on the input at all times.
FET buffer Q3 provides the Final Amp. Modulation voltage that drives three parallel FETs, Q5, Q6, and Q7 on
the Power Amplifier CCA. Feedback to the Modulation Amplifier differential pair Q4 and Q5 is obtained via
voltage divider R12 and R18.
The Modulation Amplifier is aided by an input via CR3 from the switch driver Q2. This input helps to
overcome the FET's minimum turn-on voltage, but does not otherwise affect the modulation waveform.
2.3.2.31.5 Regulator CCA (1A32A5) Detailed Circuit Theory.- Refer to Figure 11-39. Regulators Q1 and Q2
reduce the supply voltage to 28 volts for the first amplifier stage (1A32A1Q1) and 50 volts for the second
amplifier stage (1A32A1Q2). The outputs of the Regulator CCA are sent to the Switch CCA.
2.3.2.31.6 Switch CCA (1A32A6) Detailed Circuit Theory.- Refer to Figure 11-39. The output of Q2 on the
Modulation Amplifier is applied to the gates of FET switches Q1 and Q2. This applies 28V and 50V
modulation to the first two amplifier stages on the Exciter CCA. The 28V modulation to the first stage also
switches the PIN switch on the RF input via capacitor C3.
2.3.2.31.7 Surge Limiter CCA (1A32A7) Detailed Circuit Theory.- Refer to Figure 11-39. The Power
Amplifier CCA stores current in four paralleled 330 FF capacitors (A2C14, C15, C16 and C17). These
capacitors represent a very low impedance to the external +62 Vdc power supply. Therefore, a Surge Limiter
CCA is needed. Transistor Q1 and FET Q2 limit the charging current to about 3 amps.
The Surge Limiter CCA also supplies current to Q1 and Q2 on the Regulator CCA.
2.3.2.32 Fan Assembly (1A33) Circuit Theory.- The Fan Assembly provides forced air cooling for the Power
Amplifier Assembly. There are two fans used in the Fan Assembly. Each fan is driven by a high-reliability
brushless dc motor operating from +28 Vdc from the +28 Vdc Power Supply.
MODEL 1119 DME
2-114 Rev. D December, 2002
2.3.2.33 Circulator Assembly (950086-0000) Circuit Theory.- Refer to Figure 2-35. The Circulator is a passive
element which provides directional routing between the antenna and the receiver, and between the transmitter
and the antenna. It is a self-contained assembly that provides full RF and magnetic shielding. The Circulator
Assembly houses resonant line sections terminated in type-N connectors, J1, J2, and J3.
Figure 2-35. Signal Routing Through the Circulator Assembly.
The transponder receives interrogations and transmits replies on a single antenna. Isolation between the receive
and transmit circuits are accomplished with resonant line sections within the circulator. Signals applied to any
of the ports will experience the least insertion loss or minimum resistance when traveling to the adjacent port
in a clockwise direction. Signals traveling in a counterclockwise direction will be attenuated by at least 20 dB.
The interrogations arriving at J2 will, therefore, be directed to J3 and into the Preselector.
A low level interrogation signal from the antenna is routed to Port J2 and exits at Port J3. From Port J3, the
interrogations are routed via a short coaxial cable to the Preselector Assembly (1A20) and to the receiver section
of the system.
900 W peak RF reply pulses are routed via low loss cable to Port J1 and exit at Port J2. From Port J2, the replies
are routed via Directional Assembly (1A6) to the antenna.
MODEL 1119 DME
Rev. D December, 2002 2-115
A test interrogation signal (a controlled level of RF signal) injected at the Directional Coupler Assembly is also
routed via Port J2 to the receiver section of the system.
Internally, the Circulator contains a strong magnetic field which causes the high directivity of the device. Other
magnetic devices should be kept away from this area of the cabinet.
2.3.2.34 Temperature Sensor Circuit Theory. - Refer to Figure 11-35, Power Panel Assembly schematic
diagram. The temperature sensor circuit consists Temperature Transducer (U1) and voltage dividing resistors
R12 and R13. Temperature Transducer U1 is an AD590 two-terminal integrated circuit temperature transducer
which produces an output current proportional to absolute temperature. The device acts as a high-impedance,
constant current regulator passing 1 FA per degree Kelvin. The device is calibrated to 298.2 FA output at
298.2EK (+25EC). U1 is connected from the system 24V supply through resistor R13 to ground. Resistor R12
is connected through pin 10 of Power Panel connector J3 to Pin 14 on Interface CCA (1A17). Pin 14 on 1A17
is connected to A/D converter U14. Also connected to U14 are the inputs for Primary Volts AC (AC.volts),
Primary DC current (DC.amps), Primary DC Volts (DC.volts) and Battery Charge current (BAT.amps). In
operation, the system is set for EK, then offset for EC using the equation (EK = EC + 273.2) following the
procedures outlined in Paragraph 6.4.15.2.
MODEL 1119 DME
2-116 Rev. D December, 2002
THIS SHEET INTENTIONALLY LEFT BLANK
MODEL 1119 DME
Rev. D December, 2002 3-1
SECTION 3. OPERATION
NOTE
Maintenance of the Model 1119 DME is facilitated by the Enhanced RMM Option. If your
Model 1119 is equipped with the Enhanced RMM, please refer to the Enhanced RMM
Operations Manual (Part Number 561119-0002) for automated fault isolation, trend data
collection, and remote certification procedures.
3.1 INTRODUCTION.- In this section, the function of operator controls and indicators are described.
Location of controls and indicators are illustrated. Included are procedures for equipment turnon, checkout
and shutdown. Operation of the 1119 DME is controlled by command words that are entered by means
of the Video Terminal.
3.2 CONTROLS AND INDICATORS.- The locations, descriptions and functions of the 1119 DME
Controls and indicators are described in Figures 3-1 thru 3-5 and Tables 3-1 thru 3-5.
NOTE
Certain switches on the DME are commonly referred to as "critical operational"
switches. If any of these switches are positioned to their "Off-Normal" position, the
DME will be placed into a mechanical "TEST" mode and it may also be placed into
a mechanical "BYPASS" mode. The "TEST" mode will inhibit the CPU CCA
microprocessor from polling the TEST SELECT Switch. The "BYPASS" mode
inhibits the Monitor from shutting off the DME and it also prevents the transmission
of the morse code identification signal. Some of these switches may also prevent the
Transmitter Video CCA microprocessor from controlling the system delay time.
These switches are identified in Tables 3-1, 3-2 and 3-3 with a dagger () symbol after
their name.
3.2.1 Test Panel Assembly (1A1) Controls and Indicators.- Refer to Figure 3-1 and Table 3-1.
MODEL 1119 DME
3-2 Rev. D December, 2002
Figure 3-1. Test Panel Assembly (1A1) Controls and Indicators.
MODEL 1119 DME
Rev. D December, 2002 3-3
Table 3-1. Test Panel Assembly (1A1) Controls and Indicators.
Item Name Reference
or Marking Symbol Function
TEST SELECT S1 A 12-position rotary switch used to select any of the
following parameters for display.
1. S.G. SPAC. Signal generator pulse pair spacing.
The space between 1st SIG GEN and 2nd SIG GEN
pulses from the Monitor A CCA.
2. S.G. PRF. Signal generator pulse repetition
frequency. Counts the repetition rate of the 1st SIG
GEN pulse from the Monitor A CCA.
3. S.G. LEVEL. Signal generator level. Output
level from the Diode Modulator Assembly.
4. % EFF. Efficiency. The number of replies in
comparison to the number of interrogations.
5. 1 KHz. A test of the 50-MHZ clock.
6. IDENT. When the TEST SELECT switch is
placed in this position, the LED Display blanks and
an audible 1350-Hz tone can be heard during the
keying cycle.
7. EXT. Allows the LED Display to be used as a
frequency counter in conjunction with the Counter
input on the Transponder Control Panel Assembly.
8. DELAY. Reply Delay. The delay from the
leading edge of the 1st SIG GEN pulse to the
leading edge of the 1st transmit pulse.
9. TX POWER. Transmitter peak output power as
measured from the POWER (F) signal by the Power
Measurement CCA.
10. TX PRF. Transmitter pulse repetition frequency
as measured from the TX PRF signal from the
Monitor A CCA.
11. TX SPAC. Transmitted pulse pair spacing. The
space between the leading edge of the 1st TX and
2nd TX pulses from the Monitor A CCA.
12. OFF. (NOTE: When the test select switch is in
the OFF position, the CPU CCA microprocessor is
enabled to poll or sample those switch parameters
shown in ITALICS, above.)
RESET S2 Momentary switch - Used to turn ON the system
after a Monitor shutdown has occurred.
MODEL 1119 DME
3-4 Rev. D December, 2002
Table 3-1. Test Panel Assembly (1A1) Controls and Indicators.(Continued)
Item Name Reference
or Marking Symbol Function
DISPLAY S3 Momentary switch - used to increase the
refresh rate of the LED Display when the
TEST SELECT switch is in the S.G. SPAC,
S.G. LEVEL, % EFF or DELAY positions.
STATUS NORMAL INDICATOR DS1 A green LED - Illuminates when all switches
are in their NORMAL position and the
Monitor is operating within acceptable
parameters.
BYPASS INDICATOR DS2 A red LED - Illuminates when any system
critical operational switch is not in its
NORMAL position.
SHUTDOWN INDICATOR DS3 A red LED - Illuminates when the Monitor
has turned OFF the equipment.
TEST NORMAL INDICATOR DS4 A green LED - Illuminates when all critical
operational switches are in the NORMAL
position.
TEST INDICATOR DS5 A red LED - Illuminates when any critical
operational switch is remove from its
NORMAL position.
DC POWER INDICATOR DS6 A green LED - Illuminates when the +28
Vdc Power Supply (1A30) is turned on.
MODEL 1119 DME
Rev. D December, 2002 3-5
Figure 3-2. Monitor Control Assembly (1A2) Controls and Indicators.
MODEL 1119 DME
3-6 Rev. D December, 2002
Table 3-2. Monitor Control Assembly (1A2) Controls and Indicators.
Item Name Reference
or Marking Symbol Function
MONITOR
NORMAL INDICATOR DS1 A green LED - Illuminates when the Monitor
is operating within established parameters.
FAULT INDICATOR DS2 A red LED - Illuminates when the Monitor
has detected an out of tolerance or a fault
condition in the system.
ON INDICATOR DS3 Green LED - Illuminates when the monitor
Power Supply is activated.
CAL. ATTEN. A3 Variable attenuator that varies the RF output
level of the Diode Modulator. Effective only
when efficiency interrogations are being
generated.
SIGNAL GENERATOR
PRF {SWITCH} S1 Selects either fixed or variable interrogation
PRF.
PRF {CONTROL} R1 Varies the Signal Generator PRF when the
PRF switch is placed in the up position.
SPAC {SWITCH} S2 Selects either normal or variable
interrogation pulse pair spacing.
SPAC {CONTROL} R2 Varies the Signal Generator interrogation
pulse spacing when the SPAC switch is in
the up position.
CW S3 Provides a means of calibrating the Diode
Modulator RF output. When placed in the
CW position, a DC level is provided which
is used to set the 0dBm reference output
level of the Diode Modulator Assy.
MODEL 1119 DME
Rev. D December, 2002 3-7
Table 3-2. Monitor Control Assembly (1A2) Controls and Indicators (Continued).
Item Name Reference
or Marking Symbol Function
FREQ S4 Used to check the bandpass characteristics of
the receiver. The normal position for this
switch is FO; however, for testing purposes,
it can be used to set the monitor interrogator
200-kHz or 900-kHz above or below the
operating frequency.
MONITOR TEST
ON/NORMAL S5 When placed in the NORMAL position,
detected transmitter pulses are routed to the
Monitor for evaluation of spacing and reply
delay. When placed in the ON position, the
transmitter pulses are replaced by test pulses
whose spacing and reply delay are
adjustable.
DISPLAY S6 When placed to the ON position, the LED
Display is enabled. In the NORMAL
position, the LED Display is blanked.
DELAY R3 Provides a variable delay for the monitor test
pulse pair. Active only when MONITOR
TEST switch is in the ON position.
SPAC R4 Provides variable reply pulse spacing for the
monitor test pulse pair. Active only when
MONITOR TEST switch is in the ON
position.
3.2.2 Monitor Control Assembly (1A2) Controls and Indicators.- Refer to Figure 3-2 and Table 3-2.
3.2.3 Transponder Control Panel Assembly (1A19) Controls and Indicators.- Refer to Figure 3-3 and
Table 3-3.
MODEL 1119 DME
3-8 Rev. D December, 2002
Figure 3-3. Transponder Control Panel Assembly (1A19) Controls and Indicators.
MODEL 1119 DME
Rev. D December, 2002 3-9
Table 3-3. Transponder Control Panel Assembly (1A19) Controls and Indicators.
Item Name Reference
or Marking Symbol Function
CHASSIS POWER S1 When placed in the OFF position, removes +28 Vdc
from all assemblies except: the Monitor B CCA
(1A12); the RMM (1A15 & 1A17 CCA's); the
Keyer CCA (1A26); for dual DME's, the Monitor
Transfer Assy (1A7); and when used with an RSCU,
the RSCU interface CCA's (1A16 & 1A18). When
placed to the NORMAL position, monitor control is
retained. When placed to the ON position, monitor
control is bypassed.
POWER INDICATOR DS1 Green LED - illuminates when DC power is applied.
FINAL HV S2 Turns ON the High Voltage Power Supply.
FINAL HV INDICATOR DS2 Green LED - illuminates when the Final High
Voltage Power Supply is activated.
IDENT/CONST/OFF S3 Provides the capability to produce a coded 1350-Hz
tone, a constant 1350-Hz tone, or no identification
tone.
3.2.4 Power Panel Assembly (1A29) Controls and Indicators.- Refer to Figure 3-4 and Table 3-4.
MODEL 1119 DME
3-10 Rev. D December, 2002
Figure 3-4. Power Panel Assembly (1A29) Controls and Indicators.
Table 3-4. Power Panel Assembly (1A29) Controls and Indicators.
Item Name Reference
or Marking Symbol Function
AC CB1 10 ampere circuit breaker in the 115/230
Vac input line.
DC CB2 15 ampere circuit breaker in the +28 Vdc
input line.
LOW BATT VOLTAGE DS1 Red LED - Illuminates when battery voltage
drops to +21.5 Vdc.
MODEL 1119 DME
Rev. D December, 2002 3-11
3.2.5 Remote Control Interface (1A18) Controls and Indicators (Optional).- Refer to Figure 3-5 and Table
3-5.
Figure 3-5 Remote Control Interface (1A18) Controls and Indicators.
MODEL 1119 DME
3-12 Rev. D December, 2002
Table 3-5. Remote Control Interface (1A18) Controls and Indicators.
Item Name Reference
or Marking Symbol Function
LOCAL/NO DATA DS1 A yellow LED - Illuminates when S1 is in
the LOCAL setting or when S1 is in the
REMOTE setting and the RSCU data is not
being received properly.
LOCAL/REMOTE S1 When placed to the LOCAL position, the
RCSU control ability is disabled. In the
REMOTE position, the RCSU remote
control is enabled.
1 ON/OFF S2 Momentary switch - When held in the 1 ON
position, DME transmitter 1 is turned on.
When held in the OFF position, both
transmitter 1 and 2 are turned off (just
transmitter 1 if single equipment).
2 ON/ALARM SILENCE S3 Momentary switch - When held in the 2 ON
position, DME transmitter 2 is turned on
(dual equipment only). When held in the
ALARM SILENCE position, the on-board
audible alarm is silenced.
3.3 TURN ON AND CHECKOUT.- There are two possible separate indications when a DME is turned
on. The first indication is independent of any type of communications device, such as a video terminal.
The second indication is the visual display that appears on a communications device such as a video
terminal or a computer.
NOTE
For the purpose of this manual, only the events and displays of a communications device
are discussed. Even though the manual will often refer to the Video Terminal, it is not the
purpose of this manual to discuss the setup and/or the special operational characteristics of
the multiple video terminals that can be used with the DME. Also, it is beyond the scope
of this manual to discuss any of the characteristics of computers and the many types of
possible software programs that can be used to allow a computer to communicate with the
DME. Please refer to your individual computer and software reference manuals for specific
information.
MODEL 1119 DME
Rev. D December, 2002 3-13
3.3.1 Independent (without Video Terminal) Turn On and Checkout.- The DME may be turned on without
any communications device attached. Refer to Figure 3-4. Set DME system AC and DC circuit breakers
to the ON position. Normal operation can be confirmed by placing Display switch 1A2S6 to the ON
position (refer to Figure 3-2), and insuring that the Test Select switch, 1A1S1 (refer to Figure 3-1), is set
to the OFF position. With all other switches set to their normal position, the LED Display will be showing
a sequenced display of the measured operational parameters of the DME.
NOTE
The 1A15 CPU CCA microprocessor will, when it is enabled, selectively poll certain Test
Select switch parameters so that it can store the measured data for future display to a local
video terminal or Remote Maintenance Monitor Terminal. The microprocessor will poll
the switch only if the system is not in BYPASS or TEST mode. The polling action takes
approximately 30 seconds to complete one sample of all measured parameters. However,
when the DME is transmitting the identity code, polling and measurement action is
temporarily halted.
3.3.1.1 Dual System.- In a dual DME system, the transponder that has its DC circuit breaker turned on
first will capture the antenna and automatically become the main transponder. If the transponder switches
are set, as in 3.3.1 above, the LED Display will show the polling action of the CPU CCA microprocessor.
NOTE
The CPU CCA microprocessor in the standby DME will poll the Test Select switch, as
described, regardless if it is selected to operate in Hot Standby (on and operating while the
Main Transponder is on the air) or Warm Standby. If programmed for Hot Standby, the
microprocessor will poll the standby transponder constantly. If the main transponder has
an alarm and shuts down, the standby transponder will capture the antenna as long as the
its microprocessor found all parameters to be within limits. However, if the standby
transponder is programmed to operate in Warm Standby, the microprocessor will poll the
Test Select switch to insure that the sampled parameters are within the programmed limits
and it will then place the transponder into a shutdown condition (Warm Standby). When
the main transponder has an alarm and shuts down, the microprocessor in the standby
transponder will turn on the standby transponder and then poll the Test Select switch. If
it is inhibited from polling the switch (system was left in Test Mode or Bypass condition)
or if it finds an out of limits parameter, it will not capture the antenna and allow the
transponder to radiate. If the polling check finds all parameters within limits, the standby
transmitter will be connected to the antenna.
MODEL 1119 DME
3-14 Rev. D December, 2002
3.3.2 Video Terminal Initial Setup.- The Video Terminal must be initially set up before it can be used
with the DME system. All Video Terminals (or computer software) must have the minimum configuration
setup established to allow communications with the DME. This protocol is: Baud = 1200 bps, Bits = 8,
Parity = None, Stop Bit = 1, Emulation = ANSI, VT-100 or equivalent. Once properly configured, the
Video Terminal should retain the setup configuration data even after power is removed. There are several
different types of Video Terminals that have been supplied for use with the DME. Please refer to the
specific Alenia Marconi Systems (ASI) Inc. instruction document that was supplied with your specific
Video Terminal for setup and additional programming information.
3.3.2.1 Dependent (with Video Terminal) Turn On and Checkout.-
a. Insure the RS-232 communications cable is properly connected to the correct port on the Video
Terminal and to the DB-25 connector on the front of the Power Control Panel of the DME.
b. Place the Video Terminal POWER switch to the ON position. The screen should be blank with
a blinking cursor in the upper left portion of the video display. Insure the terminal is in CAPS
LOCK mode. The Video Terminal is now ready to function with the DME station.
c. Refer to Figure 3-4. Set DME system AC and DC circuit breakers to the ON position. The Remote
Maintenance Monitor (RMM) will send the following message (dependent on software version)
to the Video Terminal:
Airport Systems International, Inc.
DME Model 1118/1119
Version X.XX MM/DD/YY
Copyright 1988-97
where X.XX = Version Number
MM = Two Digit Month
DD = Two Digit Day
YY = Two Digit Year
NOTE
To clarify the entry of keyboard data on the Video Terminal, the following format
is followed: Characters shown between brackets [ ] must be typed as shown. Do
not enter the brackets as part of the keyboard entry. There are three exceptions. To
indicate the keyboard entry of the "spacebar", the directive [SPACE] is used. To
indicate the keyboard entry of the "enter" or return key, the directive [ENTER]
is used. To indicate the keyboard entry of a variable of your choosing the text
between the brackets will be in lower case format, such as: [Your new Hello
password].
MODEL 1119 DME
Rev. D December, 2002 3-15
d. Type:[HELLO][SPACE][DME] then press [ENTER]. The DME will respond with the message;
DME>
e. Access to the Quest vocabulary is now complete. No control of the DME is possible from the
Quest vocabulary. Refer to paragraph 3.6.3 for a list of control words and their explanations that
can be accessed from the Quest vocabulary. Enter the Service vocabulary by typing:[PASSWORD]
and press [ENTER]. The DME will respond with the message;
ENTER PASSWORD>
f. Enter the default password by typing:[YELLOW] and press [ENTER]. Access to the Service
vocabulary is now complete. Refer to paragraph 3.6.4 for a list of additional control words and
their explanations that can be accessed while in the Service vocabulary.
g. Enter the System vocabulary by typing:[PASSWORD] and press [ENTER]. The DME will
respond with the message;
ENTER PASSWORD>
h. Enter the default password by typing:[GREEN] and press [ENTER]. Access to the System
vocabulary is now complete. Refer to paragraph 3.6.5 for a list of additional system control words
and their explanations that can be accessed while in the System vocabulary.
3.3.3 Changing Password.- The system security is established by the use of three (3) passwords. The
default passwords are: "DME", "YELLOW", and "GREEN". Insure that new passwords are entered and
recorded correctly. If passwords are lost, users will be unable to access DME control functions. To change
these passwords, use the following procedure.
NOTE
A maximum of 11 characters are available for each password.
a. Place DME system AC and DC circuit breakers to the ON position. The Remote Maintenance
Monitor (RMM) will send the following message to the Video Terminal;
Airport Systems International, Inc.
DME Model 1118/1119
Version X.XX MM/DD/YY
Copyright 1988-97
MODEL 1119 DME
3-16 Rev. D December, 2002
NOTE
If you are already logged-on to the system proceed directly to step e.
b. Type:[HELLO][SPACE][DME] then press [ENTER]. The DME will respond with the message;
DME>
c. Type:[PASSWORD] then press [ENTER]. The DME will respond with the message;
ENTER PASSWORD>
d. Enter system level default password by typing:[GREEN] and press [ENTER]. DME will respond
with;
DME>
e. Type:[SET.PASS] then press [ENTER]. DME will respond with;
ENTER HELLO PASSWORD>
NOTE
Do not type "HELLO" as part of your response. "HELLO" is a special word used
by the DME that tells the system that the following text is the unique log-on
password. If the password is incorrect, an "Access Denied" statement is displayed.
f. Type:[Your new Hello password] and press [ENTER]. DME will respond with;
ENTER SERVICE PASSWORD>
g. Type:[Your new Service password] and press [ENTER]. DME will respond with;
ENTER SYSTEM PASSWORD>
h. Type:[Your new System password] and press [ENTER]. DME will respond with;
[New Hello Password]
[New Service Password]
[New System Password]
OK? YES/NO
MODEL 1119 DME
Rev. D December, 2002 3-17
i. Check new passwords. If passwords are not correct, type:[N] press [ENTER], and repeat steps e.
through h. If passwords are correct type:[Y] and press [ENTER]. DME will respond with;
TRY OUT YOUR PASSWORDS NOW
If problems, use SET.PASS again
DME>
j. Try new passwords. If correct, password change is complete. If passwords are incorrect use
SET.PASS command and repeat this procedure.
3.3.4 Changing Station Identifiers.- A maximum of 39 characters are available for your station identifier.
Abbreviate, if necessary.
a. Verify you have obtained access to the Service vocabulary type:[SET.ID] and press [ENTER].
DME will respond with
ENTER DME IDENTIFICATION>
b. Enter the new station identifier by typing:[AMS(ASI)][SPACE][INC][SPACE][001119-0102]
[S/N12345][SPACE][CH.89X] and pressing [ENTER].
c. Type:[.DME.ID] then press [ENTER]. DME will respond by displaying the new station identifier.
AMS(ASI) INC 001119-0102 S/N 12345 CH.89X
3.3.5 Changing Station Phone Numbers.-
a. Verify you have obtained access to the Service vocabulary type:[SET.PHONE#] and press
[ENTER]. DME will respond with:
ENTER MODEM COMMAND & PHONE#>
b. Type:[The new modem command and phone number] then press [ENTER]. Example
[ATDT19138883348]. An alternative form is [ATDT][SPACE][1][SPACE][913][SPACE][888]
[SPACE][3348].
NOTE
The characters "ATDT" shown above are to be used if you have a touch-tone
dialing system. If you have a rotary dial system, use "ATDP". Spaces are ignored
when dialing.
MODEL 1119 DME
3-18 Rev. D December, 2002
c. Type:[.PHONE#] then press [ENTER]. DME will display modem command and phone number.
ATDT19135551212
3.3.6 Changing Input Power (Analog) Parameter Service Limits.- Verify you have obtained access to the
Service or System Level, as this action can only be performed at this level.
a. At the DME prompt type:[.AD.LIMITS] then press [ENTER]. The DME will respond with a
display that is similar to the example below:
ANALOG INPUT SERVICE LIMITS
INPUT MIN MAX
AC.volts 125.5 100.0 140.0
DC.volts 28.5 23.0 29.0
BAT.amps 0.04 -0.05 12.00
DC.amps 4.99 2.25 14.00
TEMP.C 25.0 -20.0 55.0
b. To change the minimum limit of any analog parameters type:[the command word for the Analog
Parameter to be changed] [SPACE] [the new value] [SPACE] [SET.AD.MIN] then press
[ENTER]. Refer to Table 3-16 for a complete list of Analog Parameter command words. For
example: [AC.V][SPACE][1036] [SPACE][SET.AD.MIN] then press [ENTER]. Notice the value
to be entered has no decimal points.
At the DME prompt, Type: [.AD.LIMITS] then press [ENTER]. DME will display the new input
power parameter.
c. To change the maximum limit of any analog parameters type:[the command word for the Analog
Parameter to be changed] [SPACE] [the new value] [SPACE] [SET.AD.MAX] then press
[ENTER]. Refer to Table 3-16 for a complete list of Analog Parameter command words. For
example: [AC.V][SPACE][1255] [SPACE][SET.AD.MAX] then press [ENTER]. Notice the
value to be entered has no decimal points.
At the DME prompt, Type: [.AD.LIMITS] then press [ENTER]. DME will display the new input
power parameter.
3.3.7 Changing Low Power Shutdown Level.- Verify you have obtained access to the Service or System
Level, as this action can only be performed at this level.
MODEL 1119 DME
Rev. D December, 2002 3-19
a. At the DME prompt: Type:[.PWR.LL] then press [ENTER]. The DME will respond with a
message that will indicate the low power shutdown limit. This message is similar to example
below;
Power Lower Limit -- 500
b. If low power shutdown level needs to be changed, type:[the new low power shutdown limit]
[SPACE] [SET.PWR.LL] then press [ENTER]. For example:[300][SPACE][SET.PWR.LL] then
press [ENTER]. The new low power shutdown limit is now entered into station memory. Notice
that this value must be a whole number. It has no decimal points.
At the DME prompt Type: [.PWR.LL] then press [ENTER]. The DME will display the new low
power shutdown limit.
3.3.8 Changing System Test Parameter Service Limits.- Verify you have obtained access to the Service
or System Level, as this action can only be performed at this level.
a. At the DME prompt, type:[.TST.LIMITS] then press [ENTER]. The DME will respond with a
display that is similar to the example below:
TEST INPUT SERVICE LIMITS
INPUT MIN MAX
SG.SPAC 12.03 11.50 12.50
SG.PRF 104 90 110
SG.LEVEL 01.07 00.70 01.30
TX.EFF 97 60 100
TX.DELAY 50.04 49.80 50.20
TX.POWER 933 500 1100
TX.PRF 1018 750 2600
TX.SPAC 12.00 11.80 12.20
b. To change the minimum limit of any test parameter type:[the command word for the Test
Parameter to be changed] [SPACE] [the new value] [SPACE] [SET.TST.MIN] then press
[ENTER]. Refer to Table 3-14 for a complete list of Test Parameter command words. For
example: [SG.S][SPACE] [1150][SPACE] [SET.TST.MIN] then press [ENTER]. Notice the value
to be entered has no decimal point.
At the DME prompt, Type: [.TST.LIMITS] then press [ENTER]. DME will display new limit.
c. To change the maximum limit of any test parameters type:[the command word for the Test
Parameter to be changed] [SPACE] [the new value] [SPACE] [SET.TST.MAX] then press
[ENTER]. Refer to Table 3-14 for a complete list of Test Parameter command words. For
example: [SG.S][SPACE] [1250][SPACE] [SET.TST.MAX] then press [ENTER].
At the DME prompt, Type: [.TST.LIMITS] then press [ENTER]. DME will display new limit.
MODEL 1119 DME
3-20 Rev. D December, 2002
3.3.9 Entering/Exiting the FORTH Mode.- The FORTH mode of operation is used if the station is to be
turned OFF for several hours (or days). The FORTH mode disables the auto-restart feature and stops the
CPU CCA microprocessor from executing its program. This command allows for testing or extended DC
"power-on" shutdowns.
NOTE
Pressing [ENTER] by itself should always cause the DME transponder to reply with
the prompt:
DME>
If the DME Transponder is in Forth mode, pressing [ENTER] will cause the DME
Transponder to reply with the prompt:
{OK}
Attempting to force the DME to operate normally while in the Forth mode will produce
unsatisfactory results. Normal operation can only be achieved from the normal (DME>)
prompt.
a. To enter the FORTH mode type:[GO.FORTH] then press [ENTER]. The DME will shut down and
the Shutdown and DC Power indicators will be illuminated. (See Figure 3-1).
b. To exit the FORTH mode type:[GO.DME] then press [ENTER]. Status/Normal and Test/Normal
indicators will illuminate and the DME will start up and operate normally. (See Figure 3-1).
3.4 REMOTE MONITORING AND CONTROL.- Remote monitoring and control capabilities may be
accomplished by two methods: an RSCU or an RMM system. The RSCU is designed to provide limited
control of the DME as well as visual and aural status information of the DME system. The RMM system
is designed to provide status information and control capability equivalent to the local Video Terminal.
3.4.1 Remote Status and Control Signals.- The DME is designed to interface with a RSCU to provide
remote status information and control capabilities. The DME sends the following status signals to a
RSCU: System 1 Normal, Alarm, Bypass, and Antenna Capture; System 2 Normal, Alarm, Bypass, and
Antenna Capture; and Transfer. The DME receives the following control signals from a RSCU: turn on
transmitter 1 and apply output signal to antenna, turn on transmitter 2 and apply output signal to antenna,
turn off both transmitters, and reset alarm (transfer) condition.
MODEL 1119 DME
Rev. D December, 2002 3-21
3.4.2 Remote Maintenance Monitor System.- The DME utilizes an external modem which allows
communications with the RMM system. The RMM system consists of a Video Terminal (identical in
performance to the local Video Terminal) and a modem. An optional printer may be included. A RMM
system has the same capabilities of monitoring and controlling the DME as the local Video Terminal. Both
the RMM Video Terminal and modem must be configured for a signal transmission rate of 1200 baud.
The RMM system allows an operator to exercise full control of the DME system in a manner that is equal
to operation from the local Video Terminal. All features of the local Video Terminal are fully
implemented so that any action taken locally may also be accomplished remotely.
Only one operator, either remote through the modem or locally through the Video Terminal, but not both
simultaneously, can communicate with the DME.
NOTE
While the RMM system is capable of executing all commands that can be executed
through the local Video Terminal, it is not recommended that changes to the DME
passwords be made via the RMM system. Noisy telephone lines and/or
disconnections may cause the passwords to be corrupted before you have a chance
to correct them. It is recommended that only the local video terminal be used to
change passwords.
3.4.2.1 Modem Configuration.- The modem used must be compatible with the Hayes "AT" command set
and must be configured to properly communicate instructions to the DME. In general, the modem must
be capable of communicating at 1200 baud. Also, the modem must have certain default configuration
settings that will allow the DME to react to the communications from the modem. These default
configuration values are:
a. DTR must be Bypassed. (Data Terminal Ready (DTR) light always on.)
b. Result Codes must be VERBOSE.
c. Result Codes must be ON.
d. Echo Characters must be OFF.
e. Auto Answer must be ON.
f. Carrier Detect (CD) must be TRUE.
For modems supplied by Alenia Marconi Systems (ASI) Inc., please refer to the appropriate information
and set-up instruction bulletin included with each modem kit. Also, refer to the manufacturer's handbook
for specific modem set-up and operation instructions.
3.5 EQUIPMENT SHUTDOWN.
a. If a Video Terminal is in use, place the Video Terminal POWER switch to the OFF position.
MODEL 1119 DME
3-22 Rev. D December, 2002
b. Refer to Figure 3-4. Place system AC and DC circuit breakers to the OFF position.
3.6 COMMAND WORDS and DEFINITIONS.- Command words for controlling the 1119 DME Remote
Maintenance Monitor are contained in five vocabularies.
1. COMM -- modem communication words.
2. PASS -- sign on.
3. QUEST -- data recovery.
4. SERVICE -- calibration, limits, control and etc.
5. SYSTEM -- contains the security password control.
The use of vocabularies is a way to control the security of the DME RMM system.
The Pass vocabulary contains all of the necessary words to sign on to the RMM. No information or control
words are in this vocabulary. You may notice the word COMM in the PASS vocabulary. This, if run, will
allow you to see the COMM vocabulary. These are the words the MODEM uses to talk to the RMM.
Because these are primarily modem response words that will do nothing when executed from the keyboard,
they are normally hidden from sight.
To gain access to the QUEST vocabulary, the HELLO password must be entered. Then you can ask any
questions of the DME through words in the QUEST vocabulary. No DME control is possible in this
vocabulary.
To gain access to the SERVICE vocabulary, the SERVICE PASSWORD must be entered. All DME
control and maintenance words are contained in the SERVICE vocabulary. The SERVICE vocabulary
includes the lower level QUEST vocabulary.
To gain access to the SYSTEM vocabulary, the SYSTEM PASSWORD must be entered. Only the
command words SET.PASS and SHOW. PASS are in this vocabulary; however, it includes all of the lower
level SERVICE and QUEST vocabularies. The SET.PASS command allows all of the PASSWORDS to
be changed and the SHOW.PASS command displays the HELLO, SERVICE and SYSTEM passwords.
3.6.1 COMM Vocabulary.- The words of the COMM vocabulary are available only after issuing the
COMM command. The primary function of the COMM vocabulary is to allow the DME to initiate
communications via a modem and understand the status condition of that communications, or to respond
to an incoming communications message via the modem. The secondary function is for factory testing.
Issuing COMM vocabulary command words from the keyboard is not beneficial to the maintenance
technician; however, Table 3-6 is a listing of the Comm vocabulary command words and is provided for
information.
MODEL 1119 DME
Rev. D December, 2002 3-23
Table 3-6. Pass Vocabulary Command Words and Explanations.
Command Word Explanation
INIT.DME Initializes the DME. Causes the DME software program to restart.
Airport Systems International, Inc.
DME Model 1118/1119
Version 2.4 02/17/97
(c) Copyright 1988-97
+++ A command from the DME to the Modem. This is the escape code to go
from online state to command state.
NO First two characters of the modem message "NO CARRIER". This is a
result of the DME attempting to dial out and send a message. The DME
will recognize that the modem was not able to establish communications
with a remote device and react according to its programming.
CONNECT A modem message. This is a result of the DME attempting to dial out and
send a message. The DME will recognize that the modem has established
communications with a remote device, and will now transmit its message
to the remote communications device.
RING A modem message. This is a result of the DME attempting to dial out and
send a message. The modem will send the word RING to the DME to let
it know that the remote communications device is being called.
HANGUP A modem message. When the modem goes on hook it sends the word
HANGUP to the DME.
TASK Not used.
CARRIER A partial modem message. This is a result of the DME attempting to dial
out and send a message.
ERROR A modem message. Modem cannot effect command because of an error in
the data string.
OK A modem message. Command executed.
MODEL 1119 DME
3-24 Rev. D December, 2002
3.6.2 PASS Vocabulary.- The words of the PASS vocabulary are the only commands available when the
system is turned on or when calling in from an external modem. After turning on the DME system if you
type "WORDS", the following words (commands) will be output to terminal. Refer to Table 3-7 for a list
of command words and explanation available in the PASS vocabulary.
Table 3-7. Pass Vocabulary Command Words and Explanations.
Command Word Explanation
WORDS Use of this command provides a list of words in the active vocabularies.
HELLO This is a pass command word and is to be followed by the HELLO
[password] such as [HELLO][SPACE][DME]. The HELLO password
supplied by the factory is "DME". After entering the correct password here
access to the QUEST vocabulary will be granted.
BYE Invokes the HANGUP command from the COMM vocabulary. This
command will seal access to all vocabularies except the initial PASS
vocabulary and, if talking thru a modem, will cause the modem to hang up.
GOODBYE Same as BYE. Invokes the HANGUP command from the COMM
vocabulary. This command will seal access to all vocabularies except the
initial PASS vocabulary and, if talking thru a modem, will cause the modem
to hang up.
COMM Unseals the COMM vocabulary words. The COMM vocabulary is not
available until the COMM command is issued.
3.6.3 Quest Vocabulary.- This vocabulary contains all of the necessary commands to obtain the status and
records of the 1119 DME Equipment. Refer to Table 3-8 for a list of command words and explanation
available in the QUEST vocabulary.
MODEL 1119 DME
Rev. D December, 2002 3-25
Table 3-8. Quest Vocabulary Command Words and Explanations.
Command Word Explanation
VERSION Displays the version number of the software.
Airport Systems International, Inc.
DME Model 1118/1119
Version 2.4 02/17/97
(c) Copyright 1988-97
PASSWORD Command which will ask for your password. Turns off echo so password
will not display. Either of two passwords may be entered here. The service
password set at factory is "YELLOW". This password allows access to the
SERVICE vocabulary commands. All maintenance and control words for
the DME Equipment are available in this vocabulary. The system password
set at factory is "GREEN". This password allows access to the SYSTEM
vocabulary command "SET.PASS". This password is the highest level
password and allows the passwords to be changed.
.RECORD Displays the last Record. A Record is a stored message that is used to
convey status information pertaining to a fault condition. This is the last
history fault message that was created by the DME. The maximum number
of records is 50.
AMS(ASI)INC 001119-0102 S/N 12345 CH. 89X
DATE: 5/22/01 TIME: 16:06:15
MESSAGE # 2
5/22/01 14:58:18
TRANSMITTER LOW POWER SHUTDOWN
AD.FLAGS are clear
TST.FLAGS > TS TF TP TD TE SL SF SS
Lower 0 0 1 0 0 0 0 0
Upper 0 0 0 0 0 0 0 0
TEMP.C 24.7
POWER
AC.volts 125.7 BAT.amps 0.05
DC.volts 28.5 DC.amps 4.99
MODEL 1119 DME
3-26 Rev. D December, 2002
Table 3-8. Quest Vocabulary Command Words and Explanations.(Continued)
SIGNAL GENERATOR
SG.SPAC 12.01 SG.PRF 104
SG.LEVEL 01.07
TRANSMITTER
TX.EFF 93 TX.DELAY 50.03
TX.POWER 923 TX.PRF 1007
TX.SPAC 12.01
.RECORDS Displays all available Records. All of the history fault messages will be
displayed. Requesting a [.RECORDS] does not erase the records from
memory. After 50 messages have been stored, a new fault message will be
stored as number 50 and the oldest message will be erased. To clear all
messages from memory, dc power must be removed from the CPU CCA.
AMS(ASI)INC 001119-0102 S/N 12345 CH. 89X
DATE: 5/22/01 TIME: 16:06:26
MESSAGE # 2
5/22/01 14:58:18
TRANSMITTER LOW POWER SHUTDOWN
AD.FLAGS are clear
TST.FLAGS > TS TF TP TD TE SL SF SS
Lower 0 0 1 0 0 0 0 0
Upper 0 0 0 0 0 0 0 0
TEMP.C 24.7
POWER
AC.volts 125.7 BAT.amps 0.05
DC.volts 28.5 DC.amps 4.99
SIGNAL GENERATOR
SG.SPAC 12.01 SG.PRF 104
SG.LEVEL 01.07
TRANSMITTER
TX.EFF 93 TX.DELAY 50.03
TX.POWER 390 TX.PRF 1007
TX.SPAC 12.01
MODEL 1119 DME
Rev. D December, 2002 3-27
Table 3-8. Quest Vocabulary Command Words and Explanations. (Continued)
MESSAGE # 1
5/22/01 14:52:41
TRANSMITTER LOW POWER SHUTDOWN
AD.FLAGS are clear
TST.FLAGS > TS TF TP TD TE SL SF SS
Lower 0 0 1 0 0 0 0 0
Upper 0 0 0 0 0 0 0 0
TEMP.C 25.0
POWER
AC.volts 125.8 BAT.amps 0.05
DC.volts 28.5 DC.amps 4.99
SIGNAL GENERATOR
SG.SPAC 12.03 SG.PRF 104
SG.LEVEL 01.07
TRANSMITTER
TX.EFF 98 TX.DELAY 50.05
TX.POWER 100 TX.PRF 1022
TX.SPAC 12.01
DME>.SG
SIGNAL GENERATOR
SG.SPAC 12.01 SG.PRF 105
SG.LEVEL 01.07
STATUS Displays the present status of the DME as well as the station identifier.
(See TERSE and VERBOSE commands below for examples)
TERSE Sets the STATUS display to short form format. This results in a displayed
message that includes only the station identifier, date, time, system status,
AD.FLAGS information and TST.FLAGS information whenever a
STATUS command is issued.
AMS(ASI)INC 001119-0102 S/N 12345 CH. 89X
DATE: 5/22/01 TIME: 16:11:40
STATION: NORMAL
AD.FLAGS are clear
TST.FLAGS are clear
MODEL 1119 DME
3-28 Rev. D December, 2002
Table 3-8. Quest Vocabulary Command Words and Explanations. (Continued)
VERBOSE Sets the STATUS display to long form format. This results in a displayed
message that includes the station identifier, date, time, system status,
AD.FLAGS information, TST.FLAGS information, temperature, RMM
power readings, RMM signal generator readings, and RMM transmitter
readings, whenever a STATUS command is issued.
AMS(ASI)INC 001119-0102 S/N 12345 CH. 89X
DATE: 5/22/01 TIME: 16:11:09
STATION: NORMAL
AD.FLAGS are clear
TST.FLAGS are clear
TEMP.C 25.2
POWER
AC.volts 125.9 BAT.amps 0.04
DC.volts 28.5 DC.amps 4.99
SIGNAL GENERATOR
SG.SPAC 11.94 SG.PRF 104
SG.LEVEL 01.07
TRANSMITTER
TX.EFF 94 TX.DELAY 50.02
TX.POWER 933 TX.PRF 1027
TX.SPAC 12.02
.STAT Use of this command word prompts the DME to issue a one word description of the
status of the system. If the system is operating within acceptable limits, the display
will read NORMAL. If the monitor detects an out-of-tolerance condition, the
display will read ABNORMAL. If the TEST SELECT Switch is set to monitor a
system parameter, the display will be TEST MODE. If the system has shutdown,
the display will read SHUTDOWN. If the system is in bypass, the display will read
BYPASS.
MODEL 1119 DME
Rev. D December, 2002 3-29
Table 3-8. Quest Vocabulary Command Words and Explanations. (Continued)
NORMAL
.DATA Displays the temperature, RMM power readings, RMM signal generator
readings, and RMM transmitter readings. No DME station identifier, date,
time, system status, AD.FLAGS information, or TST.FLAGS information
is displayed.
TEMP.C 25.0
POWER
AC.volts 125.2 BAT.amps 0.05
DC.volts 28.5 DC.amps 4.97
SIGNAL GENERATOR
SG.SPAC 12.03 SG.PRF 104
SG.LEVEL 01.07
TRANSMITTER
TX.EFF 97 TX.DELAY 50.08
TX.POWER 933 TX.PRF 1020
TX.SPAC 12.02
3.6.4 Service Vocabulary.- All maintenance and control words for the DME Equipment are available in
this vocabulary. Refer to Tables 3-9 thru 3-20 for additional command words available in the service
vocabulary.
Table 3-9. Service Vocabulary System Control Words and Explanations.
Command Word Explanation
STARTUP Commands a controlled startup of the DME and RMM. When used in
FORTH mode, it enables the operator to turn ON the DME to look at and/or
test DME parameters, but does not allow the CPU CCA microprocessor to
execute its program.
NORMAL Clears BYPASS and enables software low-power auto-shutdown and record
logging.
SHUTDOWN Commands a controlled shutdown of the DME. System will not restart.
SHUTDOWN- Commands a controlled shutdown of the DME and decrements the number
of auto restarts by 1.
MODEL 1119 DME
3-30 Rev. D December, 2002
Table 3-9. Service Vocabulary System Control Words and Explanations. (Continued)
GO.DME Changes from FORTH to DME mode. Also executes the STARTUP
command and allows the CPU microprocessor to execute the program.
GO.FORTH Changes from DME to FORTH mode. Entering FORTH removes the DME
from operation and prevents logging-on to the system through a modem.
This command also executes the SHUTDOWN command and halts the
CPU CCA micropressor from executing its program. This is used for
testing or extended "power-on" shutdowns.
DME.OFF Strobes VIA #1, Port B, bit 2, to turn off the transmitter.
DME.ON This command is used when in FORTH mode. It enables the operator to
turn ON the DME to look at and/or test DME parameters, but does not
allow the CPU CCA microprocessor to execute its program.
BYPASS Disables software low-power auto-shutdown and record logging. Does not
bypass the Monitor B shutdown feature.
3.6.4.1 Service Vocabulary Dual DME System Control Words.- Refer to Table 3-10 for a list of dual
DME system control words and explanations. The dual DME control words are not functional on single
DME systems.
Table 3-10. Service Vocabulary Dual DME System Control Words and Explanations.
System Control Word Explanation
ANT.CAP Commands the DME receiving this instruction to capture the antenna,
placing it on the air.
DUAL.ON Enables DME DUAL MODE. Both transponders must be programmed
with the DUAL.ON command for proper operation of the dual system.
DUAL.OFF Disables DME DUAL MODE.
HOT.ON When in DUAL MODE, this command places the standby DME into Hot
Standby mode causing it to radiate into an attenuator and load network in
the Monitor Transfer Assembly. The RMM system is constantly evaluating
the DME in this mode. If the CPU microprocessor detects an out-of-
tolerance parameter, it will not allow the transponder to capture the antenna
in the event the main transponder has failed.
MODEL 1119 DME
Rev. D December, 2002 3-31
Table 3-10. Service Vocabulary Dual DME System Control Words and Explanations. (Continued)
HOT.OFF When in DUAL MODE, this command places the standby DME into Warm
Standby mode. In the event the main transponder has failed, the CPU CCA
microprocessor will allow the standby DME to turn on but it will not
capture the antenna until after it has polled all parameters and determined
that the transponder is capable of normal operation.
3.6.4.2 Service Vocabulary Hardware Debugging Command Words.- Refer to Table 3-11 for a list of
hardware debugging command words and explanations.
Table 3-11. Service Vocabulary Hardware Debugging Command Words and Explanations.
Command Word Explanation
TEST.A The TEST.A command polls the TEST SELECT switch one time in
"BYPASS" mode to test system status. The test begins at the S.G. PRF
position (TST.CHAN#1) and continues around the TEST SELECT switch
in a clockwise direction until the S.G. SPAC (TST.CHAN#0) is measured.
The 1 KHZ, IDENT, and EXT positions of the TEST SELECT switch are
not measured. The TEST.A command TAKES one set of measurements
then shuts down the system. In order to perform a TEST.A command, the
TEST SELECT switch must be in the OFF position and the system must not
be in the Bypass mode of operation.
Malfunctions for the TEST.A command indicate faulty modules or transmitter parameters. The following
is a list of the Malfunction Test Channel definitions:
MODEL 1119 DME
3-32 Rev. D December, 2002
NOTE
Use of the TEST.A command shuts down the transmitter and removes the DME from
service. Notify the appropriate ATC facility prior to issuing TEST.A.
MALFUNCTION TST.CHAN#1: Indicates a S.G PRF fault.
MALFUNCTION TST.CHAN#2: Indicates a S.G LEVEL fault.
MALFUNCTION TST.CHAN#3: Indicates a % EFF fault.
MALFUNCTION TST.CHAN#4: Indicates a DELAY fault.
MALFUNCTION TST.CHAN#5: Indicates a TX PWR fault.
MALFUNCTION TST.CHAN#6: Indicates a TX PRF fault.
MALFUNCTION TST.CHAN#7: Indicates a TX SPAC fault.
MALFUNCTION TST.CHAN#0: Indicates a S.G. SPAC fault.
Figure 3-6A shows an example of the information obtained during a TEST.A command with no fault.
Figure 3-6B shows an example of the information obtained during a TEST.A command when a
malfunction TST.CHAN#1 fault is detected. Notice that the data obtained reads zero. This is because the
test starts with S.G. PRF and is halted as a soon as a fault is detected; in this case S.G. PRF. All
measurements that are not completed when a fault is detected will read zero.
TEST.A TEST.A TEST.A TEST.A
MEAS. COMPLETED OK MEAS. COMPLETED OK MEAS. COMPLETED OK MEAS. COMPLETED OK
TEMP.C TEMP.C TEMP.C TEMP.C 24.0 24.0 24.0 24.0
POWER POWER POWER POWER
AC.volts AC.volts AC.volts AC.volts 121.0 121.0 121.0 121.0 BAT.amps BAT.amps BAT.amps BAT.amps 0.05 0.05 0.05 0.05
DC.volts DC.volts DC.volts DC.volts 28.1 28.1 28.1 28.1 DC.amps DC.amps DC.amps DC.amps 6.01 6.01 6.01 6.01
SIGNAL GENERATOR SIGNAL GENERATOR SIGNAL GENERATOR SIGNAL GENERATOR
SG.SPAC SG.SPAC SG.SPAC SG.SPAC 12.00 12.00 12.00 12.00 SG.PRF SG.PRF SG.PRF SG.PRF 100 100 100 100
SG.LEVEL SG.LEVEL SG.LEVEL SG.LEVEL 01.02 01.02 01.02 01.02
TRANSMITTER TRANSMITTER TRANSMITTER TRANSMITTER
TX.EFF TX.EFF TX.EFF TX.EFF 92 92 92 92 TX.DELAY TX.DELAY TX.DELAY TX.DELAY 50.02 50.02 50.02 50.02
TX.POWER TX.POWER TX.POWER TX.POWER 933 933 933 933 TX.PRF TX.PRF TX.PRF TX.PRF 1059 1059 1059 1059
TX.SPAC TX.SPAC TX.SPAC TX.SPAC 12.01 12.01 12.01 12.01
Figure 3-6A. Typical TEST.A Command Readout.
MODEL 1119 DME
Rev. D December, 2002 3-33
TEST.A TEST.A TEST.A TEST.A
MALFUNCTION TST.CHAN#1 MALFUNCTION TST.CHAN#1 MALFUNCTION TST.CHAN#1 MALFUNCTION TST.CHAN#1
TEMP.C TEMP.C TEMP.C TEMP.C 24.0 24.0 24.0 24.0
POWER POWER POWER POWER
AC.volts AC.volts AC.volts AC.volts 121.2 121.2 121.2 121.2 BAT.amps BAT.amps BAT.amps BAT.amps 0.06 0.06 0.06 0.06
DC.volts DC.volts DC.volts DC.volts 28.1 28.1 28.1 28.1 DC.amps DC.amps DC.amps DC.amps 6.02 6.02 6.02 6.02
SIGNAL GENERATOR SIGNAL GENERATOR SIGNAL GENERATOR SIGNAL GENERATOR
SG.SPAC SG.SPAC SG.SPAC SG.SPAC 00.00 00.00 00.00 00.00 SG.PRF SG.PRF SG.PRF SG.PRF 000 000 000 000
SG.LEVEL SG.LEVEL SG.LEVEL SG.LEVEL 00.00 00.00 00.00 00.00
TRANSMITTER TRANSMITTER TRANSMITTER TRANSMITTER
TX.EFF TX.EFF TX.EFF TX.EFF 00 00 00 00 TX.DELAY TX.DELAY TX.DELAY TX.DELAY 00.00 00.00 00.00 00.00
TX.POWER TX.POWER TX.POWER TX.POWER 0000 0000 0000 0000 TX.PRF TX.PRF TX.PRF TX.PRF 0000 0000 0000 0000
TX.SPAC TX.SPAC TX.SPAC TX.SPAC 00.00 00.00 00.00 00.00
Figure 3-6B. Typical TEST.A Command Readout with Malfunction Test Channel #1.
Table 3-11. Service Vocabulary Hardware Debugging Command Words and Explanations.(Continued)
Command Word Explanation
TEST.B The TEST.B command is similar to the TEST.A command. It polls the
TEST SELECT switch one time after turning "ON" the transmitter in
"BYPASS". The TEST.B tests system status and shuts down the system.
The test begins at the S.G. PRF position (TST.CHAN#1) and continues
around the TEST SELECT switch in a clockwise direction until the S.G.
SPAC (TST.CHAN#0) is measured. The 1 KHZ, IDENT, and EXT
positions of the TEST SELECT switch are not measured. The TEST.B
command takes one set of measurements then shuts down the system. In
order to perform a TEST.B command, the TEST SELECT Switch must be
in the OFF position and the system must not be in the Bypass mode of
operation.
Malfunctions for the TEST.B command indicate faulty modules or transmitter parameters. The following
is a list of the Malfunction Test Channel definitions:
MODEL 1119 DME
3-34 Rev. D December, 2002
NOTE
Use of the TEST.B command shuts down the transmitter and removes the DME from
service. Notify the appropriate ATC facility prior to issuing TEST.B.
MALFUNCTION TST.CHAN#1: Indicates a S.G PRF fault.
MALFUNCTION TST.CHAN#2: Indicates a S.G LEVEL fault.
MALFUNCTION TST.CHAN#3: Indicates a % EFF fault.
MALFUNCTION TST.CHAN#4: Indicates a DELAY fault.
MALFUNCTION TST.CHAN#5: Indicates a TX PWR fault.
MALFUNCTION TST.CHAN#6: Indicates a TX PRF fault.
MALFUNCTION TST.CHAN#7: Indicates a TX SPAC fault.
MALFUNCTION TST.CHAN#0: Indicates a S.G. SPAC fault.
Figure 3-6C shows an example of the information obtained during a TEST.B command with no fault.
Figure 3-6D shows an example of the information obtained during a TEST.B command when a
malfunction TST.CHAN#3 fault is detected. Notice that the data obtained reads zero. This is because the
test starts with S.G. PRF and is halted as a soon as a fault is detected; in this case % EFF. All
measurements that are not completed when a fault is detected will read zero.
TEST.B
MEAS. COMPLETED OK
TEMP.C 24.0
POWER
AC.volts 121.0 BAT.amps 0.05
DC.volts 28.1 DC.amps 4.05
SIGNAL GENERATOR
SG.SPAC 12.00 SG.PRF 101
SG.LEVEL 01.03
TRANSMITTER
TX.EFF 95 TX.DELAY 50.01
TX.POWER 933 TX.PRF 1059
TX.SPAC 12.00
Figure 3-6C. Typical TEST.B Command Readout.
MODEL 1119 DME
Rev. D December, 2002 3-35
TEST.B
MALFUNCTION TST.CHAN#3
TEMP.C 24.0
POWER
AC.volts 121.0 BAT.amps 0.05
DC.volts 28.1 DC.amps 4.01
SIGNAL GENERATOR
SG.SPAC 00.00 SG.PRF 100
SG.LEVEL 1.02
TRANSMITTER
TX.EFF 0000 TX.DELAY 00.00
TX.POWER 0000 TX.PRF 0000
TX.SPAC 00.00
Figure 3-6D. Typical TEST.B Command Readout with Malfunction Test Channel #3.
Table 3-11. Service Vocabulary Hardware Debugging Command Words and Explanations.(Continued)
Command Word Explanation
WD.TEST Tests the Watchdog shutdown circuit. This command shuts down the
DME. The system will restart with the next entry of the Video Terminal
keyboard.
.VIA There are two VIA's on the CPU CCA. Each has 2 dedicated 8-bit ports
designated Port A (PA) and Port B (PB). Each bit can be either an input or
output. The Data Direction Register for PA (DDRA) or PB (DDRB)
indicates whether the bit is an input (0) or an output (1). When the
command .VIA is entered the DME will respond with:
VIA1 VIA2
DDRA10111111 00000000
PA 01000000 11111000
DDRB10000111 00100001
PB 00000010 11001111
Refer to Figure 3-7A and 3-7B for explanations of VIA1 Port Data Format and 3-8A and 3-8B for
explanations of VIA2 Port Data Format.
MODEL 1119 DME
3-36 Rev. D December, 2002
VIA1
DDRA 1 0 1 1 1 1 1 1
PA DATA 0 1 0 0 0 0 0 0
PA BIT# 7 6 5 4 3 2 1 0
1A15 Connector J1-8 J1-7 J1-6 J1-5 J1-4 J1-3 J1-2 J1-1
| | | | | | | |__S.D. INHIBIT (Relay)
| | | | | | |__FP BYPASS (Relay)
| | | | | |__S0 (TEST SELECT Switch Position)
| | | | |__S2 (TEST SELECT Switch Position)
| | | |__S4 (TEST SELECT Switch Position)
| | |__SEN (TEST SELECT Switch Position)
| |__&DET. IDENT KEYING
|__WATCHDOG
PA0= Shutdown inhibit (output), used for TEST.A.
PA1= Microprocessor bypass (output), used for TEST.B.
PA2= HEX "1" (output), to Interface CCA used for polling the TEST SELECT switch.
PA3= HEX "2" (output), to Interface CCA used for polling the TEST SELECT switch.
PA4= HEX "4" (output), to Interface CCA used for polling the TEST SELECT switch.
PA5= Select Enable.
PA6= &Detected Ident Keying (input), detected keying from the Interface CCA.
PA7= WATCHDOG (output), external watchdog circuit will cause the DME station to shutdown, in 2 seconds, if
it does not receive these pulses (from the CPU microprocessor).
Figure 3-7A. VIA1 Port A Data and Explanation.
DDRB 1 0 0 0 0 1 1 1
PB DATA 0 0 0 0 0 0 1 0
PB BIT# 7 6 5 4 3 2 1 0
1A15 Connector P1-32c P1-25A P1-15A P1-14A P1-16A J1-16 J1-15 J1-14
| | | | | | | |__DME ON
| | | | | | |__/REMOTE COM. SET
| | | | | |__DME OFF
| | | | |__NC
| | | |__COM. LOC/REMOTE
| | |__NC
| |__1 & 2 CB1 (Not Used)
|__WATCHDOG (INTERNAL) (Not Used)
PB0= DME ON (output), a positive pulse that turns the DME on.
PB1= &REMOTE COM.SET (output), a negative pulse that sets the communication mode to Remote port (1A29-J4).
PB2= DME OFF (output), a positive pulse that turns the DME off.
PB3= No connection, not used.
PB4= COMMUNICATION LOCAL/REMOTE (input), 0=Local mode, communicating through the Local port
(1A29-J5). 1=Remote mode, communicating through the Remote port (1A29-J4).
PB5= No connection, not used.
PB6= VIA 1&2, CB1 (Interrupt input), not used.
PB7= WATCHDOG Internal (output), not used.
Figure 3-7B. VIA1 Port B Data and Explanation.
MODEL 1119 DME
Rev. D December, 2002 3-37
VIA2
DDRA 0 0 0 0 0 0 0 0
PA DATA 1 1 1 1 1 0 0 0
PA BIT# 7 6 5 4 3 2 1 0
1A15 Connector J2-9 J2-10 J2-11 J2-12 J2-13 J2-14 J2-15 J2-16
| | | | | | | |__TX. CONTROL
| | | | | | |__TEST (1)
| | | | | |__&DUAL INTERLOCK
| | | | |__ANT. SWITCH POSITION
| | | |__NOT USED
| | |__+5V TX2
| |__+5V TX1
|__NOT USED
PA0= TX. CONTROL (input), 1=Transmitter in search mode. 0=Transmitter ON, Normal mode.
PA1= TEST (1) (input), 0=All TEST switches normal. 1=A TEST switch is not in NORMAL position.
PA2= &DUAL INTERLOCK (input), 0=Dual station. 1=Single station.
PA3= ANTENNA SWITCH POSITION (input), 0=This station has the Antenna. 1=This station does not have the
Antenna.
PA4= No connection (input), not used.
PA5= +5 VOLT TX2 (input), 0=DME #2 is off. 1=DME #2 is on.
PA6= +5 VOLT TX1 (input), 0=DME #1 is off. 1=DME #1 is on.
PA7= No connection (input), not used.
Figure 3-8A. VIA2 Port A Data and Explanation.
MODEL 1119 DME
3-38 Rev. D December, 2002
DDRB 0 0 1 0 0 0 0 1
PB DATA 1 1 0 0 1 1 1 1
PB BIT# 7 6 5 4 3 2 1 0
1A15 Connector J2-1 P1-13C J2-3 J2-4 J2-5 J2-6 J2-7 J2-8
| | | | | | | |__&SHUTDOWN
| | | | | | |__R. OFF
| | | | | |__E22 BAUD RATE SELECT
| | | | |__NOT USED
| | | |__E20 BAUD RATE SELECT
| | |__ANT. CAP
| |__DISPLAY CLOCK
|__DUAL COMPATIBLE
PB0= &SHUTDOWN (output), Dual only, used for Remote Control Status. 0=Station is shutdown. 1= Station ON
or Cold Standby
PB1= REMOTE OFF (input), Buffered OFF command from the Remote Control Status Unit. 0=Turns DME off.
PB2= E21 BAUD RATE SELECT (input), 0=300 Baud.
PB3= No connection (input), not used.
PB4= E20 BAUD RATE SELECT (input), 0=1200 Baud.
PB5= ANTENNA CAPTURE (output), 100 ms positive pulse, used to change the transfer switch to this DME.
PB6= DISPLAY CLOCK (input), clock input from TEST Unit Display Board.
PB7= DUAL COMPATIBLE (input), 0=DME is capable of being hooked up in a DUAL configuration. 1=Old
configuration not DUAL compatible.
Figure 3-8B. VIA2 Port B Data and Explanation.
3.6.4.3 Service Vocabulary Communications Control Words.- Refer to Table 3-11 for a list of
Communications Control words and explanations. These command words are not the same as the COMM
vocabulary command words. These words will determine whether a DME transponder will initiate a call,
and the number that it will call.
Table 3-12. Service Vocabulary Communications Command Words and Explanations.
Communications Control Word Explanation
CALL.OFF Turns OFF outgoing Phone Calls.
CALL.ON Turns ON outgoing Phone Calls.
.DIAL Same as .PHONE#
ATDT19135551212
.PHONE# Displays the modem command, remote location area code, and telephone
number.
ATDT19135551212
MODEL 1119 DME
Rev. D December, 2002 3-39
Table 3-12. Service Vocabulary Communications Command Words and Explanations. (Continued)
SET.PHONE# This command enables the operator to change/set the station telephone the DME
is to call. The 1119 DME requires a modem compatible with the Hayes "AT"
Command Set. Character spaces are optional and will not affect the execution of
the command. Example of a SET. PHONE# with spaces:
[ATDT][SPACE][1][SPACE][913][SPACE][555][SPACE][1212]. Example of a
SET.PHONE# without spaces: [ATDT19135551212].
SET.REMOTE Use this comand from the local terminal to force connection to the remote (modem)
port without waiting for the Remote Time Delay Timeout function to execute.
3.6.4.4 Service Vocabulary RMM System Identification Command Words.- Refer to Table 3-13 for a list
of RMM Calibration command words and explanations.
Table 3-13. Service Vocabulary RMM System Identification Command Words and Explanations.
Command Word Explanation
.DME.ID Displays the DME Identification.
AMS(ASI)INC 001119-0102 S/N 12345 CH. 89X
SET.ID This command will prompt for a new DME Identification.
3.6.4.5 Service Vocabulary Test Words.- Refer to Table 3-14 for a list of Test Command words and
explanations.
MODEL 1119 DME
3-40 Rev. D December, 2002
Table 3-14. Service Vocabulary Test Command Words and Explanations.
Command Word Explanation
.TX Displays the Transmitter parameters of TX.EFF, TX.DELAY, TX.POWER,
TX.PRF, and TX.SPAC
TRANSMITTER
TX.EFF 97 TX.DELAY 50.04
TX.POWER 933 TX.PRF 1013
TX.SPAC 12.01
.SG Displays Signal Generator parameters of SG.SPAC, SG.PRF, and
SG.LEVEL.
SIGNAL GENERATOR
SG.SPAC 12.01 SG.PRF 105
SG.LEVEL 01.07
.PWR.LL Displays RF Power Shutdown Lower Limit.
Power Lower Limit -- 500
.TST.FLAGS Use of this command directs the DME to check the Test Flags of
Transmitter Spacing (TS), Transmitter PRF (TF), Transmitter Power (TP),
Transmitter Delay (TD), Transmitter Efficiency (TE), Signal Generator
Level (SL), Signal Generator PRF (SF), and Signal Generator Spacing (SS).
If all Test Flags are within acceptable limits, the system will respond with
a "TST.FLAGS are clear" message. If an out-of-tolerance condition exists,
the system will respond with a display similar to the example shown in
Figure 3-8. A "0" in any column indicates parameter is within acceptable
limits. A "1" in any column indicates an out-of-tolerance condition exists
in the flagged column and row.
TST.FLAGS > TS TF TP TD TE SL SF SS
Lower 0 0 1 0 0 0 0 0
Upper 0 0 0 0 0 0 0 0
.TST.LIMITS Displays the current Signal Generator and Transponder readings as well as
their minimum and maximum service limits.
MODEL 1119 DME
Rev. D December, 2002 3-41
Table 3-14. Service Vocabulary Test Command Words and Explanations. (Continued)
TEST INPUT SERVICE LIMITS
INPUT MIN MAX
SG.SPAC 12.03 11.50 12.50
SG.PRF 104 90 110
SG.LEVEL 01.07 00.70 01.30
TX.EFF 97 60 100
TX.DELAY 50.04 49.80 50.20
TX.POWER 933 500 1100
TX.PRF 1018 750 2600
TX.SPAC 12.00 11.80 12.20
.FLAGS Use of this command directs the DME to check the Test Flags, the Analog
Flags, and display all Alarm Flags. If all the Test Flags and Analog Flags
are within acceptable limits, the system will respond with a "TST.FLAGS
are clear AD.FLAGS are clear" message. If an out-of-tolerance condition
exists, the system will respond with a display that indicates which flags are
out-of-tolerance. A "0" in any column indicates parameter is within
acceptable limits. A "1" in any column indicates an out-of-tolerance
condition exists in the flagged column and row.
AD.FLAGS are clear
TST.FLAGS are clear
SET.TST.MAX <t1> < n1> SET.TST.MAX is the command to set TEST PARAMETER
<t1> to MAXIMUM SERVICE LIMIT <n1>. Test parameter command
words are found in Table 3-14. To set the Signal Generator Spacing
Maximum Service Limit to 1250, for example, use the following syntax:
[SG.S][SPACE] [1250][SPACE][SET.TST.MAX], then press [ENTER].
Notice the value to be entered has no decimal points.
SET.TST.MIN <t1> <n1> SET.TST.MIN is the command to set TEST PARAMETER <t1> to
MINIMUM SERVICE LIMIT <n1>. Test parameter command words are found in
Table 3-14. To set the Signal Generator Spacing Minimum Service Limit to 1150,
f or exampl e, use t he f ol l owi ng synt ax: [ SG. S] [ SPACE]
[1150][SPACE][SET.TST.MIN] then press [ENTER]. Notice the value to be
entered has no decimal points.
SET.PWR.LL <n1> SET.PWR.LL is the command to set RF Power Shutdown Lower Limit to
<n1>. To set the RF Power Shutdown Lower Limit to 500, use the following
syntax: [500][SPACE][SET.PWR.LL] then press [ENTER]. Notice the value to
be entered has no decimal points.
MODEL 1119 DME
3-42 Rev. D December, 2002
3.6.4.6 Service Vocabulary Test Parameters.- Refer to Table 3-15 for a list of Test Parameter words and
explanations. Note the words are the t1 parameter referenced in the SET.TST MAX and SET.TST.MIN
commands.
Table 3-15. Service Vocabulary Test Parameter Words and Explanations.
Parameter Word Explanation
TX.S Transmitter Spacing.
TX.F Transmitter PRF.
TX.P Transmitter Power.
TX.D Transmitter Delay.
TX.E Transmitter Efficiency.
SG.L Signal Generator Level.
SG.F Signal Generator PRF.
SG.S Signal Generator Spacing.
3.6.4.7 Service Vocabulary Analog Command Words.- Refer to Table 3-16 for a list of Analog command
words and explanations.
Table 3-16. Service Vocabulary Analog Command Words and Explanations.
Command Word Explanation
.AD.LIMITS Displays analog readings and service limits.
ANALOG INPUT SERVICE LIMITS
INPUT MIN MAX
AC.volts 125.5 100.0 140.0
DC.volts 28.5 23.0 29.0
BAT.amps 0.04 -0.05 12.00
DC.amps 4.99 2.25 14.00
TEMP.C 25.0 -20.0 55.0
POWER Displays Power readings. (analog)
MODEL 1119 DME
Rev. D December, 2002 3-43
Table 3-16. Service Vocabulary Analog Command Words and Explanations. (Continued)
POWER
AC.volts 125.2 BAT.amps 0.04
DC.volts 28.5 DC.amps 5.13
.AD.FLAGS Use of this command directs the DME to check the Analog Flags of
Temperature (TP), DC Volts (DV), Battery Amps (BA), DC Amps (DA),
and AC Volts (AV). If all Test Flags are within acceptable limits, the
system will respond with an "AD.FLAGS are clear" message. If an out-of-
tolerance condition exists, the system will respond with a display similar to
the example shown in below. A "0" in any column indicates parameter is
within acceptable limits. A "1" in any column indicates an out-of-tolerance
condition exists in the flagged column.
AD.FLAGS> TP DV BA DA AV
Lower 0 0 0 0 1
Upper 0 0 0 0 0
SET.AD.MAX <a1> <n1> SET.AD.MAX is the command to set ANALOG PARAMETER
<a1> to MAXIMUM SERVICE LIMIT <n1>. Analog parameter command
words are found in Table 3-16. For example, to set the AC volts Maximum
Servi ce Li mi t t o 125. 5, use t he fol l owi ng synt ax:
[AC.V][SPACE][1255][SPACE] [SET.AD.MAX] then press [ENTER].
Notice the value to be entered has no decimal points.
SET.AD.MIN <a1> <n1> SET.AD.MIN is the command to set ANALOG PARAMETER
<a1> to MINIMUM SERVICE LIMIT <n1>. Analog parameter command
words are found in Table 3-16. For example, to set the AC volts Minimum
Servi ce Li mi t t o 103. 6, use t he fol l owi ng synt ax:
[AC.V][SPACE][1036][SPACE] [SET.AD.MIN] then press [ENTER].
Notice the value to be entered has no decimal points.
3.6.4.8 Service Vocabulary Analog Parameters.- Refer to Table 3-17 for a list of Analog Parameter words
and explanations. Note the words are the a1 parameter referenced in SET.AD.MAX, SET.AD.MIN,
AD.ZERO and AD.SCALE commands.
MODEL 1119 DME
3-44 Rev. D December, 2002
Table 3-17. Service Vocabulary Analog Parameter Words and Explanations.
Parameter Explanation
TEMP Temperature of cabinet of DME in Degrees C.
DC.V DC volts.
BAT.A Battery Amps.
DC.A DC amps.
AC.V AC volts.
3.6.4.9 Service Vocabulary RMM Calibration Control Words.- Refer to Table 3-18 for a list of RMM
Calibration command words and explanations. During RMM calibration, all numbers are entered without
decimal points. For example to set the AC volts to 121.3, you must enter [1213].
Table 3-18. Service Vocabulary RMM Calibration Words and Explanations.
Command Word Explanation
AD.ZERO <a1> <n1> <n2> AD.ZERO is the command to set ANALOG
PARAMETER <a1> to zero when the proper input is shorted to ground (via
jumpers on the Interface CCA (1A17)). <n1> is the desired input reading
and this must be zero; <n2> is the present screen displayed reading. Analog
parameter command words are found in Table 3-16. For example, to zero
the AC volts, use the following syntax: [AC.V][SPACE][0][SPACE] [The
current displayed AC.V value with shorting jumper installed][SPACE]
[AD.ZERO], then press [ENTER]. This command is used while calibrating
the RMM to recognize a zero volt input.
AD.SCALE <a1> <n1> <n2> AD.SCALE is the command used to calibrate ANALOG
PARAMETER <a1>. Numeric value <n1> is the measured value (as
determined with external test equipment); numeric value <n2> is the value
displayed on the Video Terminal. Analog parameter command words are
found in Table 3-16. For example, to scale the AC volts, use the following
syntax: [AC.V][SPACE][The measured AC voltage][SPACE][The AC
voltage shown on the Video Terminal][SPACE][AD.SCALE], then press
[ENTER]. This command is used while calibrating the RMM so that the
displayed value is approximately equal to the measured value.
MODEL 1119 DME
Rev. D December, 2002 3-45
3.6.4.10 Service Vocabulary RMM Time Delay Command Words.- Refer to Table 3-19 for a list of RMM
Time Delay Command words and explanations.
Table 3-19. Service Vocabulary RMM Time Delay Control Words and Explanations.
Command Word Explanation
.DELAYS Displays all system time delays in seconds.
Time in seconds
Auto Restart Delay -- 300
Auto Restart Tries -- 5
Call Time Delay -- 3600
Remote Switch Delay -- 1800
Record Time Delay -- 3600
.UNLOCKS Displays the last 12 time periods/slots as an UNLOCK History record. The
program will capture and store DME unlock conditions which might not
cause the DME to shutdown. For example, if the UNLOCK time slot is set
for 6 minutes, and the number 3 appears in three of the time slots, that
means that each of those 6 minute time slots recorded three DME unlock
conditions. This history can be used to determine the quality of the DME.
UNLOCK HISTORY -- 3600secs/slot
(Oldest History slot) --> 0 3 0 0 0 0
0 3 0 3 0 0 <-- (Newest History slot)
SET.RESTART# Set auto restart attempts. The command <n1> SET.RESTART# will set the
number of times the system will attempt an auto restart after a shutdown to
<n1> tries. Selectable values are 0 to 24. For example, to set the number
of auto restart attempts to 10, use the following syntax: [10][SPACE]
[SET.RESTART#], then press [ENTER].
SET.REC.DLY Set record delay time. The record delay is the time between records
(messages). <n1> SET.REC.DLY is the command to set the record delay
time to <n1> seconds. The recommended setting is 1800. For example, to
set the record delay time to 1800 seconds, use the following syntax:
[1800][SPACE][SET.REC.DLY], then press [ENTER].
SET.REM.DLY Set remote delay time. This is the delay time the system waits to switch to
remote after receiving the last local entry. <n1> SET.REM.DLY is the
command to set remote delay time to <n1> seconds. The recommended
setting is 900. For example, to set the remote delay time to 900 seconds,
use the following syntax: [900][SPACE][SET.REM.DLY], then press
[ENTER].
MODEL 1119 DME
3-46 Rev. D December, 2002
Table 3-19. Service Vocabulary RMM Time Delay Control Words and Explanations. (Continued)
SET.OFF.DLY Set off time delay. <n1> SET.OFF.DLY is the command to set the off time
between shutdown and auto restart to n1 seconds. The recommended
setting is 300. For example, to set the off time delay time to 300 seconds,
use the following syntax: [300][SPACE] [SET.OFF.DLY], then press
[ENTER].
SET.CALL.DLY Set call delay. <n1> SET.CALL.DLY is the command to set the delay
between outgoing phone calls to <n1> seconds. If the call delay is set
significantly longer than the records delay time, several records may be
accumulated before another outgoing call is placed. The recommended
setting is 1800. For example, to set the call delay time to 1800 seconds, use
the following syntax: [1800][SPACE][SET.CALL.DLY], then press
[ENTER].
SET.UNLOCK.T Set unlocks time slot. <n1> is the command to set the time duration for
each time slot displayed in the UNLOCK History. Selectable values are 0
to 7200. For example, to set the unlock time duration to 3600 seconds, use
the following syntax: [3600][SPACE][SET.UNLOCK.T], then press
[ENTER].
3.6.4.11 Service Vocabulary Calendar and Clock Command Words.- Refer to Table 3-20 for a list of
Calendar and Clock command words and explanations.
MODEL 1119 DME
Rev. D December, 2002 3-47
Table 3-20. Service Vocabulary Calendar and Clock Command Words and Explanations.
Command Word Explanation
.UP.WATCH Displays time and date of station power up.
Power Up
DATE: 5/22/01 TIME: 14:15:29
SET.WATCH Set all calendar and clock parameters. NOTE: This feature is an auto
return, auto advance entry. When executed, the DME will prompt you to
supply a two digit value for the following parameters: Year; Month; Day;
Date; Hour; Minutes; and Seconds. For each entry, you must supply two
numeric digits without pressing the [ENTER] key. The system will
automatically respond to the second digit entered and advance to the next
parameter to be entered. If [ENTER] is pressed, that parameter will have
a value of zero (0) stored. If an error is made, you may choose to again
issue the SET.WATCH command or you may choose to correct the
incorrect parameter directly by issuing one of the following set calendar or
set clock commands.
Enter Year 00-99 = 01
Enter Month 01-12 = 05
Enter Date 01-31 = 22
Enter Day 01-07 = 03
Enter hour 00-23 = 16
Enter minutes 00-59 = 10
Enter seconds 00-59 = 00
SET.SECONDS Allows operator to set the seconds value of the internal clock. Acceptable
values are [00] to [59].
SET.MINUTES Allows operator to set the minutes value of the internal clock. Acceptable
values are [00] to [59].
SET.HOUR Allows operator to set the hours value of the internal clock. Acceptable
values are [00] to [24].
SET.DAY Allows operator to set the day of the week value of the internal clock. Use
[01] for Sunday, [02] for Monday, etc. Acceptable values are [01] to [07].
SET.DATE Allows operator to set the date value of the internal clock. This is the day
of the month. Acceptable values are [01] to [31].
MODEL 1119 DME
3-48 Rev. D December, 2002
Table 3-20. Service Vocabulary Calendar and Clock Command Words and Explanations. (Continued)
SET.MONTH Allows operator to set the month value of the internal clock. Use [01] for
January, [02] for February, etc. Acceptable values are [01] to [12].
SET.YEAR Allows operator to set year of the internal clock. Acceptable values are [00]
to [99].
DISABLE.WATCH Disables the watch (SYSTEM WILL NOT RUN)
ENABLE.WATCH Enables the watch (Similar to the SET.WATCH command)
Enter Year 00-99 = 01
Enter Month 01-12 = 05
Enter Date 01-31 = 22
Enter Day 01-07 = 03
Enter hour 00-23 = 16
Enter minutes 00-59 = 10
Enter seconds 00-59 = 00
.WATCH Display the Date and Time.
DATE: 5/22/01 TIME: 16:07:37
.DATE Displays the Date.
DATE: 5/22/01
.TIME Displays the Time.
TIME: 16:07:37
3.6.5 System Vocabulary.- The System vocabulary is available only after the system password has been
entered. While in the System Vocabulary, all service vocabulary command words and the additional
System Vocabulary command words may be accessed. Refer to Table 3-21 for a list and explanation of
the System Vocabulary command words.
MODEL 1119 DME
Rev. D December, 2002 3-49
Table 3-21. System Vocabulary Command Words and Explanations.
Command Word Explanation
SET.PASS Prompts for all passwords
Example is shown in paragraph 3.3.3
SHOW.PASS Shows Quest, Srvice & System Passwords.
Hello: [DME]
Service:[YELLOW]
System: [GREEN]
3.6.6 Alphabetical Listing of 1119 DME Vocabulary Words and Definitions - Table 3-22 lists
alphabetically all of the vocabulary words and definitions along with their associated Vocabulary
that are available in the 1119 DME.
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations.
Word Vocabulary Explanation
.AD.FLAGS SERVICE Use of this command directs the DME to check the Analog
Flags of Temperature (TP), DC Volts (DV), Battery Amps
(BA), DC Amps (DA), and AC Volts (AV). If all Test Flags
are within acceptable limits, the system will respond with an
AD.FLAGS are clear message. If an out-of-tolerance
condition exists, the system will respond with a display that
indicates which flags are out-of-tolerance. A 0" in any
column indicates parameter is within acceptable limits. A
1" in any column indicates an out-of-tolerance condition
exists in the flagged column.
.AD.LIMITS SERVICE Displays analog readings and service limits.
.DATA QUEST Displays the temperature, RMM power readings, RMM
signal generator readings, and RMM transmitter readings.
No DME station identifier, date, time, system status,
AD.FLAGS information, or TST.FLAGS information is
displayed.
.DATE SERVICE Displays the Date.
MODEL 1119 DME
3-50 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
.DELAYS SERVICE Displays all system time delays in seconds.
.DIAL SERVICE Same as .PHONE#
.DME.ID SERVICE Displays the DME Identification.
.FLAGS SERVICE Use of this command directs the DME to check the Test and
Analog Flags, and to display all Alarm Flags. If all the Test
and Analog Flags are within acceptable limits, the system
will respond with a TST.FLAGS are clear AD.FLAGS are
clear message. If an out-of-tolerance condition exists, the
system will respond with a display that indicates which flags
are out-of-tolerance. A 0" in any column indicates
parameter is within acceptable limits. A 1" in any column
indicates an out-of-tolerance condition exists in the flagged
column and row.
.PHONE# SERVICE Displays the modem command, remote location area code,
and telephone number.
.PWR.LL SERVICE Displays RF Power Shutdown Lower Limit.
.RECORD QUEST Displays the last Record. A Record is a stored message that
is used to convey status information pertaining to a fault
condition. This is the last history fault message that was
created by the DME. The maximum number of records is
50.
.RECORDS QUEST Displays all available Records. All of the history fault
messages will be displayed. Requesting a [.RECORDS]
does not erase the records from memory. After 50 messages
have been stored, a new fault message will be stored as
number 50 and the oldest message will be erased. To clear
all messages from memory, DC power must be removed
from the CPU CCA.
.SG SERVICE Displays Signal Generator parameters of SG.SPAC,
SG.PRF, and SG. LEVEL.
MODEL 1119 DME
Rev. D December, 2002 3-51
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
.STAT QUEST Use of this command word prompts the DME to issue a one
word description of the status of the system. If the system
is operating within acceptable limits, the display will read
NORMAL. If the monitor detects an out-of-tolerane
condition, the display will read ABNORMAL. If the TEST
SELECT Switch is set to monitor a system parameter, the
display will be TEST MODE. If the system has a shutdown,
the display will read SHUTDOWN. If the system is in
bypass, the display will read BYPASS.
.TIME SERVICE Displays the Time.
.TST.FLAGS SERVICE Use of this command directs the DME to check the Test
Flags of Transmitter Spacing (TS), Transmitter PRF (TF),
Transmitter Power (TP), Transmitter Delay (TD),
Transmitter Efficiency (TE), Signal Generator Level (SL),
Signal Generator PRF (SF), and Signal Generator Spacing
(SS). If all Test Flags are within acceptable limits, the
system will respond with a TST.FLAGS are clear
message. If an out-of-tolerance condition exists, the system
will respond with a display that indicates which flags are
out-of-tolerance. A 0" in any column indicates parameter
is within acceptable limits. A 1" in any column indicates an
out-of-tolerance condition exists in the flagged column and
row.
.TST.LIMITS SERVICE Displays the current Signal Generator and Transponder
readings as well as their minimum and maximum service
limts.
.TX SERVICE Displays the Transmitter parameters of TX.EFF,
TX.DELAY, TX.POWER, TX.PRF, and TX.SPAC.
.UNLOCKS SERVICE Displays the last 12 time periods/slots as an UNLOCK
History record. The program will capture and store DME
unlock conditions which might not use the DME to
shutdown. For example, if the UNLOCK time slot is set for
6 minutes, and the number 3 appears in three of the time
slots, that means that each of those 6 minute time slots
recorded three DME unlock conditions. This history can be
used to determine the quality of the DME.
.UP.WATCH SERVICE Displays time and date of station power up.
MODEL 1119 DME
3-52 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
.VIA SERVICE There are two VIAs on the CPU CCA. Each has 2
dedicated 8-bit ports designated Port A (PA) and Port B
(PB). Each bit can be either an input or output. The Data
Direction Register for PA (DDRA) or PB (DDRB) indicates
whether the bit is an input (0) or an output (1).
.WATCH SERVICE Display the Date and Time.
+++ COMM A command from the DME to the Modem. This is the
escape code for the modem to go from online state to
command state.
AC.V SERVICE AC VOLTS. a1 parameter used with AD.SCALE,
AD.ZERO, SET.AD.MIN and SET.AD.MAX commands.
AD.SCALE SERVICE <a1> <n1> <n2> AD.SCALE is the command used to
calibrate ANALOG PAREMETER <al>. Numeric value
<n1> is the measured value (as determined with external test
equipment); numeric value <n2> is the value displayed on
the Video Terminal. Analog parameter command words are
found in Table 3-16.
AD.ZERO SERVICE <a1> <n1> <n2> AD.ZERO is the command to set
ANALOG PARAMETER <a1> to zero when the proper
input is shorted to ground (via jumpers on the Interface
CCA (1A17)). <n1> is the desired input reading and this
must be zero; <n2> is the present screen displayed reading.
Analog parameter command words are found in Table 3-16.
ANT.CAP SERVICE Commands the DME receiving this instruction to capture
the antenna, thus placing it on the air.
BAT.A SERVICE BATTERY AMPS. a1 parameter used with AD.SALE,
AD.ZERO, SET.AD.MIN and SET.AD.MAX commands.
BYE PASS Invokes the HANGUP command from the COMM
vocabulary. This command will seal access to all
vocabularies except the initial PASS vocabulary and, if
talking thru a modem, will cause the modem to hang up.
BYPASS SERVICE Disables software low-power auto-shutdown and record
logging. Does not bypass the Monitor B hardware shutdown
feature.
MODEL 1119 DME
Rev. D December, 2002 3-53
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
CALL.OFF SERVICE Turns OFF outgoing Phone Calls.
CALL.ON SERVICE Turns ON outgoing Phone Calls.
CARRIER COMM A partial modem message. This is a result of the DME
attempting to dial out and send a message.
COMM PASS Unseals COMM vocabulary words. This command must be
used before any of the COMM vocabulary words are
available.
CONNECT COMM A modem message. This is a result of the DME attempting
to dial out and send a message. The DME will recognize
that the modem has established communications with a
remote device, and will now transmit its message to the
remote communications device.
DC.A SERVICE DC AMPS. a1 parameter used with AD.SCALE,
AD.ZERO, SET.AD.MIN and SET.AD.MAX commands.
DC.V SERVICE DC VOLTS. a1 parameter used with AD.SCALE,
AD.ZERO, SET.AD.MIN and SET.AD.MAX commands.
DISABLE.WATCH SERVICE Disables the watch (SYSTEM WILL NOT RUN)
DME.OFF SERVICE Strobes VIA #1, Port B, bit 2, to turn off the transmitter.
DME.ON SERVICE This command is used when in FORTH mode. It enables
the operator to turn ON the DME to look at and/or test DME
parameters, but does not allow the CPU CCA
microprocessor to execute its program.
DUAL.OFF SERVICE Disables DME DUAL MODE.
ENABLE.WATCH SERVICE Enables the watch (Similar to the SET.WATCH command).
ERROR COMM A modem message. Modem cannot effect command
because of an error in the data string.
GO.DME SERVICE Changes from FORTH to DME mode. Also executes the
STARTUP command and allows the CPU microprocessor
to execute the program.
MODEL 1119 DME
3-54 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
GO.FORTH SERVICE Changes from DME to FORTH mode. Entering FORTH
removes the DME from operation and prevents logging-on
to the system through a modem. This command also
executes the SHUTDOWN command and halts the CPU
CCA micropresser from executing its program. This is used
for testing or extended power-on shutdowns.
GOODBYE PASS Same as BYE. Invokes the HANGUP command from the
COMM vocabulary. This command will seal access to all
vocabularies except the initial PASS vocabulary and, if
talking thru a modem, will cause the modem to hang up.
HANGUP COMM A modem message. When the modem goes on hook it sends
the word HANGUP to the DME.
HELLO PASS This is a pass command word and is to be followed by the
HELLO [password] such as [HELLO][SPACE][DME]. The
HELLO password supplied by the factory is DME. After
entering the correct password here access to the QUEST
vocabulary will be granted.
HOT.OFF SERVICE When in DUAL MODE, this command places the standby
DME into Warm Standby mode. In the event the main
transponder has failed, the CPU CCA microprocessor will
allow the standby DME to turn on but it will not capture the
antenna until after it has polled all parameters and
determined that the transponder is capable of normal
operation.
HOT.ON SERVICE When in DUAL MODE, this command places the standby
DME into Hot Standby mode causing it to radiate into an
attenuator and load network in the Monitor Transfer
Assembly. The RMM system is constantly evaluating the
DME in this mode. If the CPU microprocessor detects an
out-of-tolerance parameter, it will not allow the transponder
to capture the antenna in the event the main transponder has
failed.
INIT.DME COMM Initializes the DME. Causes the DME software program to
restart.
MODEL 1119 DME
Rev. D December, 2002 3-55
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
NO COMM First two charaters of the modem message NO CARRIER.
This is a result of the DME attempting to dial out and send
a message. The DME will recognize that the modem was
not able to establish communications with a remote device
and issue the HANGUP command.
NORMAL SERVICE Clears BYPASS and enables software low-power auto-
shutdown and record logging.
OK COMM A modem message. Command executed.
PASSWORD QUEST Comand which will ask for your password. Turns off echo
so password will not display. Either of two passwords may
be entered here. The service password set at factory is
YELLOW. This password allows access to the SERVICE
vocabulary commands. All maintenance and control words
for the DME Equipent are available in this vocabulary. The
system password set at factory is GREEN. This password
allows access to the SYSTEM vocabulary command
SET.PASS. This password is the highest level password
and allows the passwords to be changed.
POWER SERVICE Displays AC Voltage and DC Voltages and Currents.
RING COMM Part of the COMM vocabulary. A modem message. This is
a result of the DME attempting to dial out and send a
message. The modem will send the word RING to the DME
to let it know that the remote communications device is
being called.
SET.AD.MAX SERVICE <a1> <n1> SET.AD.MAX is the command to set
ANALOG PARAMETER <a1> to MAXIMUM LIMIT
<n1>. Analog parameter command words are found in
Table 3-16. For example, to st the AC volts Maximum
Limit to 125.5, use the following syntax:
[AC.V][SPACE][1255][SPACE][SET.AD.MAX] then
press [ENTER]. Notice the value to be entered has no
decimal points.
MODEL 1119 DME
3-56 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
SET.AD.MIN SERVICE <a1> <n1> SET.AD.MIN is the command to set
ANALOG PARAMETER <a1> to MINIMUM LIMIT
<n1>. Analog parameter command words are found in
Table 3-16. For example, to st the AC volts Minimum
Limit to 103.6, use the following syntax:
[AC.V][SPACE][1036][SPACE][ST.AD.MIN]then press
[ENTER]. Notice the value to be entered has no decimal
points.
SET.CALL.DLY SERVICE Set call delay. <n1> SET.CALL.DLY is the command to
set the delay between outgoing phone calls to <n1>
seconds. If the call delay is set significantly longer than
the records delay time, several records may be
accumulated before another outgoing call is placed. The
recommended setting is 1800. For example, to st the call
delay time to 1800 seconds, use the following syntax:
[1800][SPACE][SET.CALL.DLY], then press [ENTER].
SET.DATE SERVICE Used to set the date value of the internal clock. This is the
day of the month. Acceptable values are [01] to [31].
SET.DAY SERVICE Used to set the day of the week value of the internal clock.
Use [01] for Sunday, [02] for Monday, etc. Acceptable
values are [01] to [07].
SET.HOUR SERVICE Used to set the hours value of the internal clock. Acceptable
values are [00] to [24].
SET.ID SERVICE This command will prompt for a new DME Identification.
SET.MINUTES SERVICE Used to set the minutes value of the internal clock.
Acceptable values are [00] to [59].
SET.MONTH SERVICE Used to set the month value of the internal clock. Use [01]
for January, [02] for February, etc. Acceptable values are
[01] to [12].
SET.OFF.DLY SERVICE Used to set the restart time delay. <n1> SET.OFF.DLY is
the command to set the off time between shutdown and auto
restart to n1 seconds. The recommended setting is 300. For
example, to set the off time delay time to 200 seconds, use
the following syntax: [300][SPACE][ST.OFF.DLY], then
press [ENTER].
MODEL 1119 DME
Rev. D December, 2002 3-57
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
SET.PASS SYSTEM Prompts for all passwords.
SET.PHONE# SERVICE Used to change/set the remote telephone number the DME
is to call. The 1119 DME requires a modem compatible
with the Hayes AT Command Set. Character spaces are
optional and will not affect the execution of the command.
Exampl e of a SET. PHONE# wi t h spaces:
[ATDT][SPACE][1][SPACE][913][SPACE][492][SPAC
E][8928]. Example of a SET.PHONE# without spaces:
[ATDT19134928928].
SET.PWR.LL SERVICE <n1>SET.PWR.LL is the command to set RF Power
Shutdown Lower Limit to <n1>. To set the RF Power
Shutdown Lower Limit to 500, use the following syntax:
[500][SPACE][SET.PWR.LL] then press [ENTER]. Notice
the value to be entered has no decimal points.
SET.REC.DLY SERVICE Set RECORD DELAY delay time. The record delay is the
time between records (messages). <n1> SET.REC.DLY is
the command to set the record delay time to <n1> seconds.
The recommended setting is 1800. For example, to set the
record delay time to 1800 seconds, use the following syntax:
[1800][SPACE][SET.REC.DLY], then press [ENTER].
SET.REM.DLY SERVICE Set REMOTE DELAY time. This is the delay time the
system waits to automatically switch to remote (modem)
port after receiving the last local entry. <n1>
SET.REM.DLY is the comand to set remote delay time to
<n1> seconds. The recommended setting is 900. For
example, to set the remote delay time to 900 seconds, use
the following syntax: [900][SPACE][SET.REM.DLY], then
press [ENTER].
SET. REMOTE SERVICE Use this command from the local terminal to force
connection to the remote (modem) port without waiting for
the Remote Delay Timeout function to execute.
SET.RESTART# SERVICE Set auto restart attempts. The command <n1>
SET.RESTART# will set the number of times the system
will attempt an auto restart after a shutdown to <n1> tries.
Selectable values are 0 to 24. For example, to set the
number of auto restart attempts to 10, use the following
syntax: [10][SPACE][SET.RESTART#], then press
[ENTER].
MODEL 1119 DME
3-58 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
SET.SECONDS SERVICE Used to set the seconds value of the internal clock.
Acceptable values are [00] to [59].
SET.TST.MAX SERVICE <t1><n1> SET.TST.MAX is the command to set TEST
PARAMETER <t1> to MAXIMUM LIMIT <n1>. Test
parameter command words are found in Table 3-14. To set
the Signal Generator Spacing Maximum Limit to 1250, for
e x a mp l e , u s e t h e f o l l o wi n g s y n t a x :
[SG.S][SPACE][1250][SPACE][SET.TST.MAX], then
press [ENTER]. Notice the value to be entered has no
decimal points.
SET.TST.MINSERVICE <t1> <n1> SET.TST.MIN is the command to set TEST
PARAMETER <t1> to MINIMUM SERVICE LIMIT <n1>.
Test parameter command words are found in Table 3-14.
To set the Signal Generator Spacing Minimum Service
Limit to 1150, for example, use the following syntax:
[SG.S][SPACE] [1150][SPACE][SET.TST.MIN] then press
[ENTER]. Notice the value to be entered has no decimal
points.
SET.UNLOCK.T SERVICE Set unlocks time slot. <n1> is the command to set the time
duration for each time slot displayed in the UNLOCK
History. Selectable values are 0 to 7200. For example, to
set the unlock time duration to 3600 seonds, use the
following syntax: [3600][SPACE][SET.UNLOCK.T], then
press [ENTER].
SET.WATCH SERVICE Set all calendar and clock parameters. NOTE: This feature
is an auto return, auto advance entry. When executed, the
DME will prompt you to supply a two digit value for the
following parameters: Year; Month; Day; Date; Hour;
Minutes; and Seconds. For each entry, you must supply two
numeric digits without pressing the [ENTER] key. The
system will automatically respond to the second digit
entered and advance to the next parameter to be entred. If
[ENTER] is pressed, that parameter will have a value of
zero (0) stored. If an error is made, you may choose to again
issue the SET.WATCH command or you may choose to
correct the incorrect parameter directly by issuing one of the
set calendar or set clock commands.
SET.YEAR SERVICE Used to set year of the internal clock. Acceptable values are
[00] to [99].
MODEL 1119 DME
Rev. D December, 2002 3-59
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
SG.F SERVICE Signal Generator PRF. t1 parameter used with
SET.TST.MAX and SET.TST.MIN commands.
SG.L SERVICE Signal Generator Output Level. t1 parameter used with
SET.TST.MAX and SET.TST.MIN commands.
SG.S SERVICE Signal Generator Spacing. t1 parameter used with
SET.TST.MAX and SET.TST.MIN commands.
SHOW.PASS SYSTEM Shows Quest, Service and System passwords.
SHUTDOWN SERVICE Commands a controlled shutdown of the DME. System will
not restart.
SHUTDOWN- SERVICE Commands a controlled shutdown of the DME and
decrements the number of auto restarts by 1.
STARTUP SERVICE Commands a controlled startup of the DME and RMM.
When used in FORTH mode, it enables the operator to turn
ON the DME to look at and/or test DME parameters, but
does not allow the CPU CCA microprocessor to execute its
program.
STATUS QUEST Displays the present status of the DME as well as the station
identifier.
TASK COMM Not used.
TEMP SERVICE Temperature of cabinet of DME in Degrees C. a1 parameter
used with AD.SCALE, AD.ZERO, SET.AD.MIN and
SET.AD.MAX commands.
TERSE QUEST Sets the STATUS display to short form format. This results
in a displayed message that includes only the station
identifier, date, time, system status, AD.FLAGS information
and TST.FLAGS information whenever a STATUS
command is used.
TEST.A SERVICE The TEST.A. command polls the TEST SELECT switch
one time in BYPASS mode to test system status. The test
begins at the S.G.PRF position (TST.CHAN#1) and
continues around the TEST SELECT switch in a clockwise
direction until the S.G.SPA (TST.CHAN#0) is measured.
MODEL 1119 DME
3-60 Rev. D December, 2002
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
The 1 KHZ, IDENT, and EXT positions of the TEST
SELECT switch are not measured. The TEST.A command
TAKES one set of measurements then shuts down the
system. In order to perform a TEST.A command, the TEST
SELECT switch must be in the OFF position and the system
must not be in the Bypass mode of operation.
TEST.B SERVICE The TEST.B command is similar to the TEST.A command.
It polls the TEST SELECT switch one time after turning
ON the transmitter in BYPASS. The TEST.B tests
system status and shuts down the system. The test begins at
the S.G. PRF position (TST.CHAN#1) and continues
around the TEST SELECT switch in a clockwise direction
until the S.G.SPA (TST.CHAN#0) is measured. The 1
KHZ, IDENT, and EXT positions of the TEST SELECT
switch are not measured. The TEST.B command takes one
set of mesurements then shuts down the system. In order to
perform a TEST.B command, the TEST SELECT Switch
must be in the OFF position and the system must not be in
the Bypass mode of operation.
TX.D SERVICE Transmitter Delay. t1 parameter used with SET.TST.MAX
and SET.TST.MIN commands.
TX.E SERVICE Transmitter Efficiency. t1 parameter used with
SET.TST.MAX and SET.TST.MIN commands.
TX.F SERVICE Transmitter PRF. t1 parameter used with SET.TST.MAX
and SET.TST.MIN commands.
TX.P SERVICE Transmitter Power. t1 parameter used with SET.TST.MAX
and SET.TST.MIN commands.
TX.S SERVICE Transmitter Spacing. t1 parameter used with
SET.TST.MAX and SET.TST.MIN commands.
VERBOSE QUEST Sets the STATUS display to long form format. This results
in a displayed message that includes the station identifier,
date, time, system status, AD.FLAGS and TST.FLAGS
information, temperature, RMM power readings, RMM
signal generator and transmitter readings, whenever a
STATUS command is issued.
MODEL 1119 DME
Rev. D December, 2002 3-61
Table 3-22. Alphabetical Listing of 1119 DME Vocabulary Words and Explanations (Continued)
VERSION QUEST Displays copyright information and the version of the
software.
WD.TEST SERVICE Tests the Watchdog shutdown circuit. This command shuts
down the DME. The system will restart with the next entry
of the Voice Terminal keyboard.
WORDS PASS Provides a list of words in the active vocabularies.
MODEL 1119 DME
3-62 Rev. D December, 2002
THIS SHEET INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 4-1
SECTION 4. STANDARDS AND TOLERANCES
4.1 INTRODUCTION.- Standards and tolerances for the 1119 DME are listed in Table 4-1. Table 4-2 lists
threshold levels for remote monitor and alarm circuits.
4.2 STANDARDS AND TOLERANCES.- Table 4-1 provides standards and tolerances for the
performance checks and maintenance tasks scheduled in section 5 and performed in section 6. Longer
periods of uninterrupted service can be achieved if these parameters are checked at the recommended
intervals and all other maintenance procedures are performed on schedule.
Table 4-1 System Standards and Tolerances
System Nominal Tolerance Limit Reference
Parameter Value Intitial Operating Paragraph
A. TRANSMITTER
(1) Pulse Shape
(a) Width @ Half-Amplitude
(b) Rise Time
(c) Decay Time
(d) Amplitude
3.5 Fs
2.5 Fs
2.5 Fs
1.5 Vp
3.5 0.5 Fs
1.5 - 3.0 Fs
1.5 - 3.0 Fs
1.5 Vp- unclipped
3.5 0.5 Fs
1.5 - 3.0 Fs
1.5 - 3.5 Fs
1.0 Vp- unclipped
6.4.13
6.4.13
6.4.13
6.4.13
(2) Identification
(a) Rate
(b) Equalizing Pulse Pair
Spacing
(c) Spacing Between
Equalizing Pulse Pairs
1350 PPS
100 Fs
740.7 Fs
10 PPS
10 Fs
5.4 Fs
10 PPS
10 Fs
5.4 Fs
6.4.11
6.4.11
6.4.11
(3) Video Pulse Width
(a) First
(b) Second
6.75 Fs
6.75 Fs
6.75 0.5 Fs
6.75 0.5 Fs
6.75 0.5 Fs
6.75 0.5 Fs
6.4.11
6.4.11
(4) System Delay
*Y-Channel, 1st Pulse Timing
50 Fs
*56 Fs
50 0.25 Fs
*56 0.25 Fs
50 0.5 Fs
*56 0.5 Fs
6.4.11
6.4.11
(5) Rated Power Output

750 W 595 to 944 W 595 to 944 W 6.4.13
MODEL 1119 DME
Table 4-1 System Standards and Tolerances
System Nominal Tolerance Limit Reference
Parameter Value Intitial Operating Paragraph
4-2 Rev. D December, 2002
(6) Frequency Assigned 0.001 % 0.002 % 6.4.1.1
(7) Pulse Pair Spacing
(a) X-Channel
(b) Y-Channel
12 Fs
30 Fs
12 0.1 Fs
30 0.1 Fs
12 0.25 Fs
30 0.25 Fs
6.4.11
6.4.11
(8) Pulse Count
(a) PRF
(b) PRF Range
1. Lower
2. Upper
1000 PPS
1000 PPS
2700 PPS
1000 100 PPS
1000 100 PPS
2700 90 PPS
1000 150 PPS
1000 150 PPS
2700 100 PPS
6.4.9
6.4.9
6.4.9
B. MONITOR ALARMS
(1) Pulse Spacing
(a) X-Channel
1. Lower
2. Upper
(b) Y-channel
1. Lower
2. Upper
11.25 Fs
12.75 Fs
29.25 Fs
30.75 Fs
11.25 0.25 Fs
12.75 0.25 Fs
29.25 0.25 Fs
30.75 0.25 Fs
11.25 0.25 Fs
12.75 0.25 Fs
29.25 0.25 Fs
30.75 0.25 Fs
6.4.4
6.4.4
6.4.4
6.4.4
(2) System Delay
(a) X-channel
1. Lower
2. Upper
(b) Y-channel
(1st Pulse Timing)
1. Lower
2. Upper
49.65 Fs
50.35 Fs
55.65 Fs
56.35 Fs
49.65 0.15 Fs
50.35 0.15 Fs
55.65 0.15 Fs
56.35 0.15 Fs
49.65 0.15 Fs
50.35 0.15 Fs
55.65 0.15 Fs
56.35 0.15 Fs
6.4.4
6.4.4
6.4.4
6.4.4
(3) Half Power -3 dB -3 0.2 dB -3 0.5 dB 6.4.14
(4) Efficiency $ 70 % $ 70% $ 70% 6.4.7
MODEL 1119 DME
Table 4-1 System Standards and Tolerances
System Nominal Tolerance Limit Reference
Parameter Value Intitial Operating Paragraph
Rev. D December, 2002 4-3
(5) PRF
(a) Lower
(b) Overload
725 PPS
2600 PPS
725 25 PPS
2600 1000 PPS
725 25 PPS
2600 1000 PPS
6.4.14
6.4.14
(6) Identification
1. Constant Ident
2. Lack of Ident
5 seconds
75 seconds
5 1 second
75 5 seconds
5 1 second
75 5 seconds
6.4.14
6.4.14
C. RECEIVER
(1) Receive Frequency Assigned 0.001 % 0.002 % 6.4.1
(2) Receiver Sensitivity -87 dBm for
70 %
Replies
$ -87 dBm for 70
% Replies
$ -87 dBm for 70
% Replies
6.4.7
(3) Adjacent Channel Rejection
(a) 200 kHz
(b) 900 kHz
$ 87 dB
$ 87 dB
$ 70 % replies @
200 kHz @ $ 84
dBm
< 5 % replies @
900 kHz @ 0 dBm
$ 70 % replies @
200 kHz @ $ 84
dBm
< 5 % replies @
900 kHz @ 0 dBm

6.4.7
6.4.7
(4) Short Distance Echo
Suppression Negative
Pulse Width
(a) X-Channel
(b) Y-Channel
5.5 Fs
19.0 Fs
5.5 0.25 Fs
19.0 0.50 Fs
5.5 0.25 Fs
19.0 0.50 Fs
6.4.8
6.4.8
D. DECODER APERTURE
(1) Acceptance
(a) X-Channel
(b) Y-Channel
12 Fs
36 Fs
12 0.6 Fs
36 0.6 Fs
12 0.6 Fs
36 0.6 Fs
6.4.9
6.4.9
MODEL 1119 DME
Table 4-1 System Standards and Tolerances
System Nominal Tolerance Limit Reference
Parameter Value Intitial Operating Paragraph
4-4 Rev. D December, 2002
(2) Rejection
(a) X-Channel, Lower Limit
(b) X-Channel, Upper Limit
(c) Y-Channel, Lower Limit
(d) Y-Channel, Upper Limit
10.5 Fs
13.5 Fs
34.5 Fs
37.5 Fs
$ 10 - < 11 Fs
> 13 - # 14 Fs
$ 34 - < 35 Fs
> 37 - # 38 Fs
$ 10 - < 11 Fs
> 13 - # 14 Fs
$ 34 - < 35 Fs
> 37 - # 38 Fs
6.4.9
6.4.9
6.4.9
6.4.9
E. MONITOR INTERROGATION SIGNAL CHARACTERISTICS
(1) Pulse Spacing
(a) X-Channel
(b) Y-Channel
12 Fs
36 Fs
12 0.2 Fs
36 0.2 Fs
12 0.2 Fs
36 0.2 Fs
6.4.3
6.4.3
(2) Pulse Width 3.5 Fs 3.5 0.5 Fs 3.5 0.5 Fs 6.4.3
F. SUPPLY VOLTAGES
(1) AC Line Voltage 115/60 Hz
230/50 Hz
10 %
10 %
10 %
10 %
6.2.17
6.2.17
(2) DC Supply Voltage + 28 V + 28 0.5 V + 28 0.6 V 6.2.15
(3) HVPS (1A14)
(a) TP1
(b) TP2
(c) TP3
+50 Vdc
ground
+63 Vdc
+ 50 + 2, -0 Vdc
ground
+ 62 + 2, -0 Vdc
+ 50 + 2, -0 Vdc
ground
+ 62 + 2, -0 Vdc
6.2.14
6.2.14
(4) LVPS (1A13/1A28
(a) TP1
(b) TP2
(c) TP3
(d) TP4
(e) TP5
(f) TP6
+ 28 Vdc
+ 12 Vdc
- 12 Vdc
ground
+ 28 Vdc
+ 5.2 Vdc
+ 28 0.5 Vdc
+ 12 0.25 Vdc
- 12 0.25 Vdc
ground
+ 28 0.5 Vdc
+ 5.2 0.2 Vdc
+ 28 0.6 Vdc
+ 12 0.25 Vdc
- 12 0.25 Vdc
ground
+ 28 0.6 Vdc
+ 5.2 0.2 Vdc
6.2.3
6.2.3
6.2.3
6.2.3
6.2.3
G. MISCELLANEOUS
MODEL 1119 DME
Table 4-1 System Standards and Tolerances
System Nominal Tolerance Limit Reference
Parameter Value Intitial Operating Paragraph
Rev. D December, 2002 4-5
(1) 50 MHz Clock 50 MHz 0.01 % 0.01% 6.4.3
(2) A/D Converter 1A17U14
Ref. Voltage (pin 12)
+ 5 Vdc + 5 0.25 Vdc + 5 0.25 Vdc Table 7-4
(3) Shutdown Time Delay 7 sec 7 3 sec 7 3 sec 6.4.14
MODEL 1119 DME
4-6 Rev. D December, 2002
4.3 REMOTE MONITOR ALARM THRESHOLDS.- Table 4-2 lists threshold levels for remote monitor and
alarm circuits. The levels are minimum standard operating parameters. Alarms are activated before the
minimum (or maximum in certain cases) operating tolerance of any critical parameter of the equipment is
exceeded.
Table 4-2. Remote Monitor Alarm Thresholds
System Nominal Tolerance Limit Reference
Parameter Input Value Minimum Maximum Paragraph
ANALOG INPUT SERVICE LIMITS
AC.volts 120 VAC
240 VAC
100 VAC
200 VAC
140 VAC
260 VAC
3.3.6
DC.volts + 28 Vdc + 23 Vdc + 29 Vdc 3.3.6
BAT.amps Variable - 0.05 A + 12.00 A 3.3.6
DC.amps 4.0 A approx. 2.25 A 14.00 A 3.3.6
TEMP.c Ambient - 20.0EC + 55.0EC 3.3.6
TEST INPUT SERVICE LIMITS
SG.SPC X-Channel
Y-Channel
12.0 Fsec
36.0 Fsec
11.5 Fsec
35.5 Fsec
12.5 Fsec
36.5 Fsec
3.3.8
SG.PRF 100 PPS 90 PPS 110 PPS 3.3.8
SG.LEVEL 1.00 0.70 1.30 3.3.8
TX.EFF $ 80 % 60 % 100% 3.3.8
TX.DELAY X-Channel
Y-Channel
50.0 Fsec
56.0 Fsec
49.8 Fsec
55.80 Fsec
50.2 Fsec
56.2 Fsec
3.3.8
MODEL 1119 DME
Table 4-2. Remote Monitor Alarm Thresholds
System Nominal Tolerance Limit Reference
Parameter Input Value Minimum Maximum Paragraph
Rev. D December, 2002 4-7
TX.POWER 900 W 550 W 1000 W 3.3.8
TX.PRF 1000 PPS 750 PPS 2600 PPS 3.3.8
TX.SPAC X-Channel
Y-Channel
12.0 Fsec
30.0 Fsec
11.8 Fsec
29.8 Fsec
12.2 Fsec
30.2 Fsec
3.3.8
MODEL 1119 DME
4-8 Rev. D December, 2002
THIS SHEET INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 5-1
SECTION 5. PERIODIC MAINTENANCE
NOTE
Maintenance of the Model 1119 DME is facilitated by the Enhanced RMM Option. If your
Model 1119 is equipped with the Enhanced RMM, please refer to the Enhanced RMM
Operations Manual Supplement (Part Number 561119-0002) for automated fault isolation,
trend data collection, and remote certification procedures.
5.1 INTRODUCTION.- This section contains the schedule for performance checks and other maintenance
tasks required to maintain the 1119 DME. The use of remote monitoring equipment minimizes the need for
periodic equipment performance checks. However; the performance checks and maintenance tasks listed
in Tables 5-1 and 5-2 shall be performed immediately after initial installation or modification of installed
equipment, after completion of any corrective maintenance, and following the return to service of any
module or unit removed for repair. Refer to Sections 3, 4, and 6 for specific instructions, tolerances, and
maintenance procedures, and to the tables referenced in this section.
5.2 PERFORMANCE CHECKS.- Table 5-1 is a list of required performance checks. Supervisory
personnel are responsible for scheduling based on the recommended intervals. Information contained in
Table 5-1 is limited to equipment specifically covered in this manual. Refer to the appropriate instruction
manuals for other units or components of the 1119 DME.
Table 5-1. Performance Checks
Reference
Paragraph
Standards & Maintenance
Performance Checks Tolerances Procedures
Quarterly
a. 1119 DME Minimum Performance Check Table 4-1 6.2.2
b. Transfer Performance Check
(Dual 1119 Systems Only) Table 4-1 6.2.18
c. Battery Performance Check Table 4-1 6.2.16
Annually
d. Power Control Performance Check Table 4-1 6.2.17
e. Test Unit Performance Check Table 4-1 6.2.4
MODEL 1119 DME
5-2 Rev. D December, 2002
Table 5-1. Performance Checks (Cont).
Reference
Paragraph
Standards & Maintenance
Performance Checks Tolerances Procedures
f. Monitor RF Signal Generator
Performance Check Table 4-1 6.2.5
g. Transmitter Video CCA (1A27)
Performance Check Table 4-1 6.2.12
h. RF Signal Generator Monitor Performance Check Table 4-1 6.2.8
i. Low Voltage Power Supply (1A13/1A28)
Performance Check Table 4-1 6.2.3
j. High Voltage Power Supply (1A14)
Performance Check Table 4-1 6.2.14
k. Monitor A and Signal Generator Video
Performance Check Table 4-1 6.2.6
l. IF Amplifier Assembly (1A24)
Performance Check Table 4-1 6.2.9
m. Decoder CCA (1A25) Performance Check Table 4-1 6.2.10
n. Monitor B CCA (1A12) Performance Check Table 4-1 6.2.7
o. Keyer CCA (1A26) Performance Check Table 4-1 6.2.11
p. +28 VDC Power Supply (1A30)
Performance Check Table 4-1 6.2.15
q. Transfer Performance Check
(Dual 1119 Systems Only) Table 4-1 6.2.18
r. Battery Performance Check Table 4-1 6.2.16
s. Power Amplifier (1A32) Table 4-1 6.2.13
Performance check
MODEL 1119 DME
Rev. D December, 2002 5-3
5.3 OTHER ONSITE MAINTENANCE. - Table 5-2 is a list of other maintenance tasks for the DME
station. These include inspections necessary to insure continued equipment operation and reliability.
Table 5-2. Other Maintenance Tasks
Reference
Maintenance Procedure Paragraph
Quarterly.-
a. Visual Inspection of the DME System. 6.3.1
Annually.-
a. Visual Inspection of the DME System. 6.3.1
b. Visual Inspection of DME Antenna System. 6.3.2
c. Visual Inspection of DME Cabinet. 6.3.3
5.4 OFFSITE MAINTENANCE.- The 1119 DME has no assemblies that require off-site maintenance.
MODEL 1119 DME
5-4 Rev. D December, 2002
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 6-1
SECTION 6. MAINTENANCE PROCEDURES
NOTE
Maintenance of the Model 1119 DME is facilitated by the Enhanced RMM Option. If
your Model 1119 is equipped with the Enhanced RMM, please refer to the Enhanced
RMM Operations Manual (Part Number 561119-0002) for automated fault isolation,
trend data collection, and remote certification procedures.
6.1 INTRODUCTION.- This section contains procedures for the performance checks and other
maintenance tasks listed in Section 5. Standards and tolerances are listed in Section 4.
In order to assure the safety of aviation users of the facility, only properly trained and certified technicians
may be allowed to make adjustments to this equipment. Should non-certified personnel make repairs or
adjustments to the equipment, a properly certified technician must verify that the facility is functioning
properly before it can be returned to service.
6.2 PERFORMANCE CHECK PROCEDURES.- Performance checks use both built-in test and external
test equipment. Some procedures call for the use of the Video Terminal, but this is optional. An alternate
method is given for these procedures. The cabinet door should be opened and removed. Each procedure
starts with the DME operating in BYPASS condition with Monitor NORMAL and ends with the DME in
normal operation. When abnormal performance conditions are indicated during performance check
procedures, refer to the appropriate alignment and adjustment procedures found in paragraph 6.4 of this
section.
NOTE
Portions of the following procedures remove the DME from service. Notify
the appropriate ATC facility prior to proceeding.
6.2.1 Performance Check Test Equipment and Switch Position Settings. - Refer to Table 6-1 for a list of
test equipment required to accomplish performance check procedures. Refer to Table 6-2 for a list of switch
position settings required for normal operation of the 1119. Refer to Table 6-3 for a list of initial switch
position settings required for performance checks of the 1119. Refer to Table 6-4 for a list of Extender
Cables and Extender CCAs required to accomplish performance check or alignment procedures. These
Extender Cables and CCAs are found in the DME Accessory Kit (Part No. 470026-0004).
MODEL 1119 DME
6-2 Rev. D December, 2002
Table 6-1. Equipment Required for Performance Check Procedures.
(Equivalent equipment may be used in place of that listed.)
1. Oscilloscope, Dual Channel, Type 2225 (Tektronix)
2. Multimeter, Digital, Model 77 (Fluke)
3. Peak Power Meter with Sensor, Model 8900C & 84811A (Hewlett Packard)
4. Frequency Counter to 1.3GHz, B&K 1596
5. Power Meter with Mount, Model 432A & 478A (Hewlett Packard)
Table 6-2. Switch Positions for Normal Operation.
Switch Position
Test Unit:
TEST SELECT OFF
Monitor Control Panel:
CALIBRATED ATTENUATOR Setting 51 dBm
SIGNAL GENERATOR PRF NORMAL
SIGNAL GENERATOR SPACING NORMAL
SIGNAL GENERATOR CW NORMAL
SIGNAL GENERATOR FREQ FO
MONITOR TEST NORMAL
DISPLAY NORMAL
Transponder Control Panel:
CHASSIS POWER NORMAL
FINAL HV NORMAL
IDENTIFICATION NORMAL
Power Control Panel:
AC Breaker ON
DC Breaker ON
MODEL 1119 DME
Rev. D December, 2002 6-3
Table 6-3. Switch Positions for Performance Checks.
Switch Position
Test Unit:
TEST SELECT OFF
Monitor Control Panel:
CALIBRATED ATTENUATOR Setting 20 dBm
SIGNAL GENERATOR PRF NORMAL
SIGNAL GENERATOR SPACING NORMAL
SIGNAL GENERATOR CW NORMAL
SIGNAL GENERATOR FREQ FO
MONITOR TEST NORMAL
DISPLAY NORMAL
Transponder Control Panel:
CHASSIS POWER ON
FINAL HV NORMAL
IDENTIFICATION NORMAL
Power Control Panel:
AC Breaker ON
DC Breaker ON
CAUTION
The transponder CHASSIS POWER switch does not remove +28 Vdc from the
Monitor B (1A12), CPU CCA (1A15), Interface CCA (1A17), or the Keyer CCA (1A26).
Consequently, the DC circuit breaker located on the Power Panel Assembly must be
switched OFF before inserting or removing these. CHASSIS POWER must be removed
before any other Assembly or CCA is being removed or inserted into the chassis.
CAUTION
Insure that the antenna and monitor RF input connections have been properly made.
MODEL 1119 DME
6-4 Rev. D December, 2002
Table 6-4. Extender Cables and Extender CCAs Required for Performance Check
and Alignment Procedures.
PART NUMBER DESCRIPTION QTY USE
012446-0000 CCA, Extender 1 For extending the following CCAs:
Signal Generator Video (1A10),
Monitor A (1A11), Monitor B (1A12),
Low Voltage Power Supply
(1A13/1A28), Transmitter Video
(1A27), Keyer (1A26), and Decoder
(1A25).
070092-0000 Cable Assembly 5 For extending the RF connections of
the following assemblies RF
Generator (1A8/1A23), Diode
Modulator (1A9), and IF Amplifier
(1A24).
070093-0001 Cable Assembly, Extender 1 For extending the electrical/data
connections of the following
a s s embl i e s : RF Ge ne r a t or
(1A8/1A23), Diode Modulator (1A9),
and IF Amplifier (1A24).
012513-0001 CCA, Extender Board 1 For extending the following CCAs:
CPU (1A15), DME System Interface
(1A16) (Optional CCA), Interface
(1A17), and Control Interface (1A18)
(Optional).
070185-0001 Cable Assembly, Extender 2 For extending the electrical/data
connections of the following CCAs:
CPU (1A15), DME System Interface
(1A16) (Optional CCA), Interface
(1A17), and Control Interface (1A18)
(Optional).
MODEL 1119 DME
Rev. D December, 2002 6-5
6.2.2 1119 DME Minimum Performance Check.-
Equipment and tools required:
Oscilloscope
Multimeter
Frequency Counter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place digital multimeter common lead on 1A13-TP4.
c. Check voltage at test point 1A13-TP5. Verify reading is +280.5Vdc.
d. Check voltage at test point 1A13-TP2. Verify reading is +120.25Vdc.
e. Check voltage at test point 1A13-TP3. Verify reading is -120.25Vdc.
f. Check voltage at test point 1A13-TP6. Verify reading is +5.20.2Vdc.
g. Place digital multimeter common lead on 1A28-TP4.
h. Check voltage at test point 1A28-TP5. Verify reading is +280.5Vdc.
i. Check voltage at test point 1A28-TP2. Verify reading is +120.25Vdc.
j. Check voltage at test point 1A28-TP3. Verify reading is -120.25Vdc.
k. Check voltage at test point 1A28-TP6. Verify reading is +5.20.2Vdc.
l. Place CHASSIS POWER switch to the NORMAL position.
m. Insure all LED indicators on Test Panel Assembly (1A1) are operating in the NORMAL (green)
condition.
n. Turn the TEST SELECT switch to the IDENT position. Verify that within 40 seconds the proper
Morse Code Station Identification is heard on the speaker.
o. Turn the TEST SELECT switch to the S.G. SPAC position. Verify LED Display indicates 12.00 .25
Fs, for X-Channel operation, or 36.00 0.25 Fs, for Y-Channel operation.
p. Turn the TEST SELECT switch to the S.G. PRF position. Verify LED Display reads 100 10.
q. Turn the TEST SELECT switch to the DELAY position. Verify LED Display indicates 50.00 .25
Fs, for X-Channel operation, or 56.00 0.25 Fs, for Y-Channel operation.
MODEL 1119 DME
6-6 Rev. D December, 2002
r. Turn the TEST SELECT switch to the TX PWR position. On the LED Display, verify output power
indicated is within 10W of actual station power.
s. Turn the TEST SELECT switch to the TX PRF position. On the LED Display, verify TX PRF is
1000 100.
t. Turn the TEST SELECT switch to the TX SPAC position. Verify LED Display indicates 12.00 .25
Fs, for X-Channel operation, or 30.00 0.25 Fs, for Y-Channel operation.
u. Turn the TEST SELECT switch to the S.G. LEVEL position. Verify LED display indicates 1.00
0.1.
v. Connect oscilloscope probe to Diode Modulator Assembly 1A9-TP2. Connect oscilloscope external
trigger input to SG TRIG output and set oscilloscope trigger source to external.
w. Verify both interrogation pulses have a smooth leading edge from baseline and amplitude is
approximately +1.5Vdc. Set peak of pulses to a reference level on scope display.
x. Place the SIGNAL GENERATOR CW switch to the CW position.
y. Verify that CW DC level on the scope display is within 0.1V of the peak level of interrogation
pulses.
z. Verify that the LED Display indicates 1.00 0.1 and reads approximately the same for both positions
of SIGNAL GENERATOR CW switch.
aa. Return the SIGNAL GENERATOR CW switch to the NORMAL position.
ab. Place FINAL HV switch to the OFF position and place MONITOR TEST switch to the ON position.
ac. Connect oscilloscope to Monitor A CCA 1A11-TP3. Oscilloscope triggered externally with SG
TRIG from DME.
NOTE
All Spacing and Delay Measurements are made at the 50% points on the
pulses.
ad. Set Test Select switch to TX SPAC. Verify LED Display indicates 12.00 .25 Fs, for X-Channel
operation, or 30.00 0.25 Fs, for Y-Channel operation. Adjust variable MONITOR TEST SPAC
control on Monitor Panel as necessary. The SPC LED on the Monitor B CCA (1A12) should be
extinguished.
ae. Observe the oscilloscope display and adjust MONITOR TEST SPAC control to the two spacing
values listed in Table 6-5, Column A for the appropriate channel and verify that the SPC LED
remains extinguished at each setting.
MODEL 1119 DME
Rev. D December, 2002 6-7
af. Adjust the MONITOR TEST SPAC control to the two spacing values listed in Table 6-5, Column
B for the appropriate channel and verify that the SPC LED is illuminated for each setting.
Table 6-5. Monitor Test Spac.
X Channel Spacing Y Channel Spacing
Column A Column B Column A Column B
11.5 11.0 29.5 29.0
12.5 13.0 30.5 31.0
ag. Return MONITOR TEST SPAC control to nominal for appropriate channel.
ah. Turn the TEST SELECT switch to the DELAY position. Verify LED Display indicates 50.00 .25
Fs, for X-Channel operation, or 56.00 0.25 Fs, for Y-Channel operation. Adjust variable
MONITOR TEST DELAY control on Monitor Panel as necessary. The DLY LED on the Monitor
B CCA (1A12) should be extinguished.
ai. Observe the oscilloscope display and adjust MONITOR TEST DELAY control to the two delay
values listed in Table 6-6, Column A for the appropriate channel and verify that the DLY LED
remains extinguished at each setting.
aj. Adjust the MONITOR TEST DELAY control to the two delay values listed in Table 6-6, Column
B for the appropriate channel and verify that the DLY LED is illuminated for each setting.
Table 6-6. Monitor Test Delay.
X Channel Delay Y Channel Delay
Column A Column B Column A Column B
49.8 49.5 55.8 55.5
50.2 50.5 56.2 56.5
ak. Return MONITOR TEST DELAY control to nominal for appropriate channel.
al. Return MONITOR TEST switch and HV switch to NORMAL.
am. Turn the TEST SELECT switch to the % EFF position. Verify LED Display indicates a reading of
80% or higher.
an. Turn the TEST SELECT switch to the 1-KHz position. Check for a reading of 1000 on the LED
Display.
MODEL 1119 DME
6-8 Rev. D December, 2002
ao. Turn the TEST SELECT switch to the EXT position.
ap. Using a BNC test cable, connect SG TRIG output to the COUNTER input (both on the Transponder
Control Panel Assembly). Check for a reading of 50 10 at the LED Display.
aq. Reconnect SG TRIG to oscilloscope external trigger.
ar. Turn the TEST SELECT switch to the S.G. PRF position.
as. Set the SIGNAL GENERATOR PRF switch to the PRF position.
at. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer maximum clockwise.
au. Verify clockwise reading is $3600 PPS.
av. Set SIGNAL GENERATOR VARIABLE PRF control potentiometer to maximum counterclockwise
position. Verify counterclockwise reading is #25.
aw. Return the SIGNAL GENERATOR PRF switch to the NORMAL position.
ax. Turn the TEST SELECT switch to the OFF position.
ay. Connect oscilloscope external trigger input to SG TRIG output and set oscilloscope trigger to
external.
az. Connect the oscilloscope probe to the IF Amplifier 1A24-TP12.
ba. Adjust the oscilloscope sync and time base controls to display an interrogation pulse pair.
NOTE
Pulses are positioned on a -8Vdc offset.
bb. Verify that the oscilloscope is synchronized on the variable amplitude pulses by changing the
CALIBRATED ATTENUATOR setting and noting a corresponding change in pulse amplitude.
bc. Move oscilloscope probe No.1 to Decoder Trigger test point 1A24-TP1 and verify that the pulse
width is 1 0.1 Fs.
bd. Move oscilloscope probe No.1 to Short Distance Echo Suppression Duration test point 1A24-TP2.
Observe a 5.5 0.5 Fs negative-going pulse for X-channel, 19.0 0.5 Fs negative-going pulse for Y-
channel.
be. Connect oscilloscope probe No.1 to Decoder Clock Enable test point 1A25-TP2.
MODEL 1119 DME
Rev. D December, 2002 6-9
bf. The Decoder Clock enable pulse width as measured on the oscilloscope will depend upon the method
of triggering available on the oscilloscope. The next two steps describe alternate methods. It is only
necessary to perform one of these.
bg. If the oscilloscope probe No. 2 is connected to 1A25-TP6 and oscilloscope is triggered on channel
2, then verify the clock enable pulse at TP2 is 20 0.5 Fs for X-Channel operation, or 45 0.5 Fs for
Y-Channel operation.
bh. If the oscilloscope is triggered externally with SG TRIG from the DME, then verify the clock enable
pulse at TP2 is 32 0.5 Fs for X-Channel operation, or 81 0.5 Fs for Y-Channel operation.

bi. Disconnect oscilloscope probe No.2 from DME and move oscilloscope probe No.1 to Decode Gate
test point 1A25-TP3.
bj. Verify gate width of 30.5Fs.
bk. Connect oscilloscope probe to the Dead-Time Gate test point 1A25-TP4. Set oscilloscope to trigger
externally with SG TRIG.
bl. Verify dead-time pulse length is 60 2.0 Fs.
bm. Connect oscilloscope probe No.1 to Decoder Output test point 1A25-TP6.
bn. Set oscilloscope to the alternate mode of operation and connect oscilloscope probe No.2 to Log test
point 1A24-TP12 to observe interrogations.
bo. Verify that there is one decoder output pulse for each interrogation pulse pair.
bp. Turn the TEST SELECT switch to the TX PRF position.
bq. Place SIGNAL GENERATOR PRF switch to the PRF position.
br. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer maximum
counterclockwise.
bs. Verify the count on the LED Display indicates 1000 100. (This count is primarily due to squitter
pulses.)
bt. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer maximum clockwise.
bu. Verify that the transmitter PRF count will follow the interrogation rate to 2700 then limit to
approximately 2700 90 PPS.
bv. Return the SIGNAL GENERATOR PRF switch to the NORMAL position.
bw. With the TEST SELECT switch to the TX PRF position, verify LED Display indicates 1000 100.
MODEL 1119 DME
6-10 Rev. D December, 2002
bx. Connect oscilloscope channel 1 to TX TRIG output and trigger oscilloscope on channel 1.
by. Place the IDENT switch to the CONST/IDENT position.
bz. Verify equalizing pulse pair spacing of 100 10Fs with 740 5Fs between pulse pairs.
ca. Disconnect oscilloscope and connect frequency counter to TX TRIG.
cb. Verify TX TRIG count of 27005pps.
cc. Return IDENT switch to NORMAL and allow system to lock on.
cd. Turn the TEST SELECT switch to %EFF position and place IDENT switch to OFF.
NOTE
Always achieve final CALIBRATED ATTENUATOR setting using
Clockwise rotation.
ce. Increase CALIBRATED ATTENUATOR while depressing the DISPLAY push button until the
average reading for 10 readings is 70 -0+5. EFF LED on the Monitor B CCA (1A12) will just begin
to illuminate when this point is reached.
cf. Verify CALIBRATED ATTENUATOR setting is $57dBm.
cg. Set the Sig. Gen. FREQ switch to -200 KHz. Return CALIBRATED ATTENUATOR to 20dBm.
ch. Increase CALIBRATED ATTENUATOR while depressing the DISPLAY push button until the
average reading for 10 readings is 70 -0+5.
ci. Verify CALIBRATED ATTENUATOR setting is $54dBm. Set Sig. Gen. FREQ switch to Fo.
cj. Set the Sig. Gen. FREQ switch to +200 KHz. Return CALIBRATED ATTENUATOR to 20dBm.
ck. Increase CALIBRATED ATTENUATOR while depressing the DISPLAY push button until the
average reading for 10 readings is 70 -0+5.
cl. Verify CALIBRATED ATTENUATOR setting is $54dBm. Set Sig. Gen. FREQ switch to Fo.
cm. Set CAL ATTEN to 0dB.
cn. Set Sig. Gen. FREQ switch to -900 KHz. Verify %EFF is #5%.
co. Return FREQ switch to Fo.
cp. Set Sig. Gen. FREQ switch to +900 KHz. Verify %EFF is #5%.
MODEL 1119 DME
Rev. D December, 2002 6-11
cq. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.3 Low Voltage Power Supply (1A13/1A28) Performance Check.- The following procedures are used
to test the Low Voltage Power Supplies in the equipment cabinet. The two power supplies are identical.
Repeat the same procedure for both 1A13 and 1A28.
Equipment and tools required:
Multimeter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place digital multimeter common lead on 1A13/1A28-TP4.
c. Check voltage at test point 1A13/1A28-TP5. Verify reading is +280.5Vdc.
d. Check voltage at test point 1A13/1A28-TP2. Verify reading is +120.25Vdc.
e. Check voltage at test point 1A13/1A28-TP3. Verify reading is -120.25Vdc.
f. Check voltage at test point 1A13/1A28-TP6. Verify reading is +5.20.2Vdc.
g. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.4 Test Unit Performance Check. The parameters displayed on the Test Panel Assembly (1A1) LED
Display are selected via the TEST SELECT switch on the Test Panel Assembly (1A1).
NOTE
When selecting any function other than OFF, the TEST LED will be illuminated.
The Monitor Control Assembly DISPLAY switch provides a continuous LED
Display when placed in the ON position.
Equipment and tools required:
BNC Cable
a. Place initial switch position settings to those listed in Table 6-3.
b. Turn the TEST SELECT switch to the S.G. SPAC position. Verify LED Display indicates 12.00 .25
Fs, for X-Channel operation, or 36.00 0.25 Fs, for Y-Channel operation.
c. Turn the TEST SELECT switch to the S.G. PRF position. Verify LED Display reads 100 10.
MODEL 1119 DME
6-12 Rev. D December, 2002
d. Turn the TEST SELECT switch to the DELAY position. Verify LED Display indicates 50.00 .25
Fs, for X-Channel operation, or 56.00 0.25 Fs, for Y-Channel operation.
e. Turn the TEST SELECT switch to the TX PWR position. On the LED Display, verify output power
indicated is within 20W of actual station power.
f. Turn the TEST SELECT switch to the TX PRF position. On the LED Display, verify TX PRF is
1000 100.
g. Turn the TEST SELECT switch to the TX SPAC position. Verify LED Display indicates 12.00 .25
Fs, for X-Channel operation, or 30.00 0.25 Fs, for Y-Channel operation.
h. Turn the TEST SELECT switch to the S.G. LEVEL position. Verify LED display indicates 1.00
0.1.
i. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.5 Monitor RF Signal Generator Performance Check.
Equipment and tools required:
Power Meter
Extender Cable (070093-0001)
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Set the FINAL HV switch to the OFF position.
c. Place transponder CHASSIS POWER switch to the OFF position.
d. Place RF Generator Assembly (1A8) on extender cables.
e. Connect average power meter to 1A8P1.
f. Place the transponder CHASSIS POWER switch to the ON position.
g. Verify RF Generator Assembly (1A8) power output is 250 to 275 mW.
h. Place the transponder CHASSIS POWER switch to the OFF position.
i. Remove extender cables and reinstall RF Generator Assembly (1A8).
j. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
Rev. D December, 2002 6-13
6.2.6 Monitor A and Signal Generator Video Performance Check.
Equipment and tools required:
Oscilloscope
BNC Cable
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Turn the TEST SELECT switch to the S.G. SPAC position. Verify LED Display indicates 12.00 .25
Fs, for X-Channel operation, or 36.00 0.25 Fs, for Y-Channel operation.
c. Turn the TEST SELECT switch to the S.G. PRF position. Verify LED Display reads 100 10.
d. Turn the TEST SELECT switch to the S.G. LEVEL position. Verify LED display indicates 1.00
0.1.
e. Place the FINAL HV switch to the OFF position.
f. Connect oscilloscope probe to Diode Modulator Assembly 1A9-TP2. Connect oscilloscope external
trigger input to SG TRIG output and set oscilloscope trigger source to external.
g. Verify both interrogation pulses have a smooth leading edge from baseline and amplitude is
approximately +1.5Vdc. Set peak of pulses to a reference level on scope display.
h. Place the SIGNAL GENERATOR CW switch to the CW position.
i. Verify that CW DC level on the scope display equals the peak level of interrogation pulses.
j. Verify that the LED Display indicates 1.00 0.1 and reads within 0.1 for both positions of SIGNAL
GENERATOR CW switch.
k. Return the SIGNAL GENERATOR CW switch to the NORMAL position.
l. Connect oscilloscope probe to 1A11-TP3.
m. Place MONITOR TEST switch to the ON position.
n. Set TEST SELECT switch to TX SPAC. Verify LED Display indicates 12.00 .25 Fs, for X-
Channel operation, or 30.00 0.25 Fs, for Y-Channel operation. Adjust variable MONITOR TEST
SPAC control on Monitor Panel as necessary. The SPC LED on the Monitor B CCA (1A12) should
be extinguished.
o. Observe the oscilloscope display and adjust MONITOR TEST SPAC control to the two spacing
values listed in Table 6-7, Column A for the appropriate channel and verify that the SPC LED
remains extinguished at each setting.
MODEL 1119 DME
6-14 Rev. D December, 2002
p. Adjust the MONITOR TEST SPAC control to the two spacing values listed in Table 6-7, Column
B for the appropriate channel and verify that the SPC LED is illuminated for each setting.
Table 6-7. Monitor Test Spac.
X Channel Spacing Y Channel Spacing
Column A Column B Column A Column B
11.5 11.0 29.5 29.0
12.5 13.0 30.5 31.0
q. Observe the oscilloscope display and adjust MONITOR TEST SPAC control to fully clockwise
position. Verify spacing of the reply test pulse pair indicates $31 for X-Channel, $80 for Y-
Channel.
r. Adjust the MONITOR TEST SPAC control to fully counterclockwise position. Verify reply test
pulse pair spacing indicates #11 for X-Channel, #25 for Y-Channel.
s. Return MONITOR TEST SPAC control to nominal for appropriate channel.
t. Turn the TEST SELECT switch to the DELAY position. Verify LED Display indicates 50.00 .25
Fs, for X-Channel operation, or 56.00 0.25 Fs, for Y-Channel operation. Adjust variable
MONITOR TEST DELAY control on Monitor Panel as necessary. The DLY LED on the Monitor
B CCA (1A12) should be extinguished.
u. Observe the oscilloscope display and adjust MONITOR TEST DELAY control to the two delay
values listed in Table 6-8, Column A for the appropriate channel and verify that the DLY LED
remains extinguished at each setting.
v. Adjust the MONITOR TEST DELAY control to the two delay values listed in Table 6-8, Column
B for the appropriate channel and verify that the DLY LED is illuminated for each setting.
Table 6-8. Monitor Test Delay.
X Channel Delay Y Channel Delay
Column A Column B Column A Column B
49.8 49.5 55.8 55.5
50.2 50.5 56.2 56.5
MODEL 1119 DME
Rev. D December, 2002 6-15
w. Observe the oscilloscope display and adjust MONITOR TEST DELAY control to fully clockwise
position. Verify delay between first interrogation pulse and first reply pulse indicates $58 for either
X and Y-Channel.
x. Adjust the MONITOR TEST DELAY control to fully counterclockwise position. Verify delay
between first interrogation and first reply pulse indicates #35 for either X and Y-Channel.
y. Return MONITOR TEST DELAY control to nominal for appropriate channel.
z. Return MONITOR TEST and FINAL HV switches to NORMAL.
aa. Turn the TEST SELECT switch to the % EFF position. Verify LED Display indicates a reading of
80% or higher.
ab. Turn the TEST SELECT switch to the 1-KHz position. Check for a reading of 1000 on the LED
Display.
ac. Turn the TEST SELECT switch to the EXT position.
ad. Using a test BNC cable, connect SG TRIG output to the COUNTER input (both on the Transponder
Control Panel Assembly). Check for a reading of 50 10 at the LED Display.
ae. Reconnect SG TRIG to oscilloscope external trigger.
af. Turn the TEST SELECT switch to the S.G. PRF position.
ag. Set the SIGNAL GENERATOR PRF switch to the PRF position.
ah. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer maximum clockwise.
ai. Verify clockwise reading is $3600 PPS.
aj. Set SIGNAL GENERATOR VARIABLE PRF control potentiometer to maximum counterclockwise
position. Verify counterclockwise reading is #25.
ak. Set the SIGNAL GENERATOR PRF switch to the NORMAL position.
al. Turn the TEST SELECT switch to the IDENT position.
am. Set the IDENT switch to the CONST/IDENT position.
an. The 1350-Hz IDENT tone will be audible from the speaker.
ao. Return the IDENT switch to the NORMAL position.
MODEL 1119 DME
6-16 Rev. D December, 2002
ap. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
ap. Insure all LED indicators on Test Panel Assembly (1A1) are operating in the NORMAL (green)
condition.
6.2.7 Monitor B CCA (1A12) Performance Check.- If the Dual Monitor B (012019) CCA is used, all
procedures must be performed on the upper and lower circuitry as noted. When looking for LED
indications, verify both upper and lower indicators illuminate or extinguish together.
Note: If DME is co-located and externally keyed with another Navaid, temporarily disconnect the external
keying signal from TB1-7 in the bottom of the DME cabinet.
Equipment and tools required:
Oscilloscope
Stopwatch
Clip-on test leads
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
c. Refer to Figure 6-1. Remove Monitor B CCA (1A12) from cabinet and verify jumper J3 has pins
1-2 strapped for PWR primary fault and J6 has 2-3 strapped for ID secondary fault. Reinstall into
cabinet assembly. Note: For Dual Monitor B (012019) turn ON (close) switch S4-3 and S6-3
positions and turn OFF (open) switch S4-6 and S6-6 positions.
d. Refer to Figure 6-10. Remove Keyer CCA (1A26) temporarily from the cabinet assembly. Record
the current settings of the Keyer card jumpers and switches then set all code switches to the open
position and set J5 to NORM. This inhibits all internal keying, including the letter I. Reinstall
Keyer CCA (1A26) into cabinet assembly.
MODEL 1119 DME
Rev. D December, 2002 6-17
Figure 6-1. Monitor B CCA Component Location Guide.
MODEL 1119 DME
6-18 Rev. D December, 2002
Figure 6-2. DME Cabinet with Power Panel Lowered.
MODEL 1119 DME
Rev. D December, 2002 6-19
e. Refer to Figure 6-2. Connect a pair of test leads to external keyer input terminals on terminal board
1A1-TB1, pins 7 and 8 (GND) behind the Power Control Panel Assembly in the bottom of the
cabinet.
f. Place DC circuit breaker to the ON position and transponder CHASSIS POWER switch to
NORMAL.
g. Turn the TEST SELECT switch to the IDENT position.
h. Allow the system to come up and run normally. Note: For Dual Monitor B (012019), the ident
timing must be verified for each side independently.
i. Tap the test leads together momentarily to simulate normal external keying. Separate the test leads
and start the stopwatch to time the alarm delay with the loss of keying. Stop the stopwatch when the
ID LED lights.
j. Verify the stopwatch indicates 75 5 seconds. Tap the test leads together to clear the alarm.
k. Place transponder CHASSIS POWER switch and DC circuit break to the OFF position. Turn the
TEST SELECT switch to OFF and disconnect test leads at 1A1-TB1.
l. Refer to Figure 6-10. Remove Keyer CCA (1A26) and set ident code and switches as recorded in
step d. for the proper keying sequence. Place transponder CHASSIS POWER switch and DC circuit
breaker to the ON position.
m. Press and hold switch S1 (and S2 for Dual Monitor) on the Monitor B CCA (1A12) to simulate a 3
dB loss in transmitter power.
n. Verify Monitor B PWR LED illuminates, then release switch S1 (and S2 for Dual Monitor).
o. Verify PWR LED extinguishes.
p. Place the TEST SELECT switch to the TX PRF position.
q. Adjust potentiometer 1A25R45 (located on Decoder CCA) slowly counterclockwise until PRF LED
illuminates. Verify TX PRF on LED display indicates between 725 25 PPS.
r. Adjust potentiometer 1A25R45 to indicate 1000 50 on LED Display. Verify PRF LED
extinguishes.
s. Set SIGNAL GENERATOR PRF switch to the PRF position and adjust SIGNAL GENERATOR
VARIABLE PRF control potentiometer for approximately 2600 PPS on the LED Display.
t. Verify Monitor B CCA OL (Overload) LED illuminates.
MODEL 1119 DME
6-20 Rev. D December, 2002
u. Reduce PRF control to 1000 PPS and place the SIGNAL GENERATOR PRF switch to the
NORMAL position. Verify OL LED extinguishes.
v. Place the MONITOR TEST switch to the ON position.
w. Place the TEST SELECT switch to TX SPAC position.
NOTE
The PRF LED will illuminate during this procedure due to the low PRF. This
will not affect the results of the test.
x. Connect oscilloscope probe to Delayed Pulse test point 1A11-TP3. Observe the oscilloscope display
and adjust MONITOR TEST SPAC control potentiometer to place the second MONITOR pulse
outside of the spacing tolerances for the station (e.g. for X-channel 11.00 and 13.00).
NOTE
When the MONITOR TEST SPAC and DELAY controls are adjusted to
place the Monitor signals outside of the station tolerances the Test LED
display will indicate zeroes (00.00). This is expected and does not affect the
purpose of this test.
y. Verify Monitor B CCA SPC (Spacing) LED illuminates indicating a spacing fault.
z. Adjust MONITOR TEST SPAC control to indicate nominal spacing for the station (e.g. 12.00 for
X, 30.00 for Y) on the LED Display. Verify the SPC LED extinguishes.
aa. Place the TEST SELECT switch to the TX DELAY position.
ab. Observe oscilloscope display and adjust MONITOR TEST VARIABLE DELAY control
potentiometer to place the first MONITOR pulse outside of the delay tolerances for the station (e.g.
for X-channel 49.00 and 51.00).
ac. Verify Monitor B DLY (Delay) LED illuminates indicating a delay fault.
ad. Adjust MONITOR TEST VARIABLE DELAY control to indicate nominal delay for the station (e.g.
50.00 for X, 56.00 for Y) on the LED Display. Verify DLY LED extinguishes.
ae. Return the MONITOR TEST switch to NORMAL.
af. Turn the TEST SELECT switch to the %EFF position.
ag. Press and hold the DISPLAY switch.
MODEL 1119 DME
Rev. D December, 2002 6-21
ah. Rotate CALIBRATED ATTENUATOR dial until LED Display indicates less than 70% replies.
Verify Monitor B CCA EFF (Efficiency) LED illuminates.
ai. Set the CALIBRATED ATTENUATOR to 10 dBm. Verify number of replies indicated increases
above 85% and that the EFF LED extinguishes. Release DISPLAY switch.
aj. Verify all LEDs on Monitor B CCA (1A12) are extinguished.
ak. Press and hold switch S1 (and S2 for Dual Monitor) and start the stopwatch when the MONITOR
FAULT LED illuminates. Verify the Monitor B CCA PWR LED also illuminates.
al. Stop the stopwatch and release switch S1 (and S2 for Dual Monitor) when the DME station shuts
down. Verify the shutdown time delay indicates 4-10 seconds on the stopwatch (nominal setting is
7 seconds).
am. When the DME station is in SHUTDOWN mode, press switch S2 (S3 and S5 for Dual Monitor),
Previous Fault Display (PFD) switch. The PWR LED will light indicating a power failure caused
the station shutdown. Release switch S2 (S3 and S5 for Dual Monitor). Verify PWR LED
extinguishes.
an. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
ao. Configure the jumpers on the Monitor B CCA (1A12) as required for normal station operation.
ap. Remove the Extender CCA and reinsert the Keyer CCA into the cabinet.
aq. Reconnect external keying at TB1-7 as required.
ar. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.8 RF Signal Generator Performance Check.
Equipment and tools required:
Power Meter
Extender Cable (070093-0001)
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Set the FINAL HV switch to the OFF position.
c. Place transponder CHASSIS POWER switch to the OFF position.
d. Place RF Generator Assembly (1A23) on extender cables.
MODEL 1119 DME
6-22 Rev. D December, 2002
e. Connect average power meter to 1A23P1.
f. Place the transponder CHASSIS POWER switch to the ON position.
g. Verify RF Generator Assembly (1A23) power output is 450 to 475 mW.
h. Place the transponder CHASSIS POWER switch to the OFF position.
i. Remove extender cables and reinstall RF Generator Assembly (1A23).
j. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.9 IF Amplifier Assembly (1A24) Performance Check.-
Equipment and tools required:
Oscilloscope
Multimeter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Using a multimeter, check for an AGC voltage of +4 to +5 Vdc at 1A24-TP7.
c. Turn TEST SELECT switch to the % EFF position.
d. Set CALIBRATED ATTENUATOR to 0 dBm.
e. Connect oscilloscope probe to Log amp output test point 1A24-TP12 to observe interrogation pulses.
Verify interrogation pulse amplitude is between 4-6 vp-p.
f. Verify oscilloscope is synchronized on variable pulses by changing the CALIBRATED
ATTENUATOR setting and observing a corresponding change in pulse amplitude.
g. Adjust oscilloscope sync and time base controls to display the variable pulse pair.
h. Set CALIBRATED ATTENUATOR to 80 dBm. Verify that variable signal at 1A24-TP12
essentially disappears into base line noise. Set CALIBRATED ATTENUATOR to 25 dBm.
i. Connect both oscilloscope probes to Delayed Interrogations test point 1A24-TP5.
j. Set oscilloscope to the alternate mode of operation. Set both oscilloscope channels to DC.
k. Superimpose both oscilloscope traces, and adjust the oscilloscope amplifier gains so that both are
identical. Oscilloscope time base shall be set to at least 10 Fs/div.
MODEL 1119 DME
Rev. D December, 2002 6-23
l. Move oscilloscope probe No.1 to Peak Rider test point 1A24-TP4. Verify the leading edge
crossover point of the peak rider pulse is approximately 0.30 V less than the peak of the delayed
interrogation signal at 1A24-TP5. The voltage difference between the peak levels of the two signals
will be the same as that corresponding to a difference in signal level produced by 6 dB change in
signal strength, refer to Figure 6-3.
m. Adjust the CALIBRATED ATTENUATOR to a convenient setting and note the peak amplitude of
both signals displayed.
n. Reduce the CALIBRATED ATTENUATOR setting precisely 6 dBm, and note the new levels.
o. When set correctly, the peak amplitude of the delayed signal at 1A24-TP5 after the 6 dB reduction
will be precisely the same as the peak amplitude of the peak rider signal at 1A24-TP4 before signal
reduction.
Figure 6-3. Peak Rider Pulse.
p. Move oscilloscope probe No.1 to Decoder Trigger test point 1A24-TP1.
q. Verify the output pulses are synchronous with the 6dB crossover point of the delayed interrogations
at 1A24-TP5.
r. While observing Decode Trigger test point 1A24-TP1, expand the oscilloscope trace and verify that
the pulse width is 1 0.1 Fs.
MODEL 1119 DME
6-24 Rev. D December, 2002
s. Move oscilloscope probe No.1 to Short Distance Echo Suppression Duration test point 1A24-TP2.
Observe a 5.5 0.5 Fs negative-going pulse for X-channel, 19.0 0.5 Fs negative-going pulse for Y-
channel.
t. Turn the TEST SELECT switch to %EFF position.
NOTE
Always achieve final CAL ATTEN setting using Clockwise rotation.
u. Increase CAL ATTEN while depressing the DISPLAY PUSH BUTTON until the average reading
for 10 readings is 70 -0+5. Verify CALIBRATED ATTENUATOR setting is $57dBm.
v. Set the Sig. Gen. FREQ switch to -200 KHz. Return CALIBRATED ATTENUATOR to 20dBm.
w. Increase CAL ATTEN while depressing the DISPLAY PUSH BUTTON until the average reading
for 10 readings is 70 -0+5. Verify CALIBRATED ATTENUATOR setting is $54dBm. Set Sig.
Gen. FREQ switch to Fo.
x. Set the Sig. Gen. FREQ switch to +200 KHz. Return CALIBRATED ATTENUATOR to 20dBm.
y. Increase CAL ATTEN while depressing the DISPLAY PUSH BUTTON until the average reading
for 10 readings is 70 -0+5. Verify CALIBRATED ATTENUATOR setting is $54dBm.
z. Set CAL ATTEN to 0dB. Set Sig. Gen. FREQ switch to Fo.
aa. Set Sig. Gen. FREQ switch to -900 KHz. Verify %EFF is #5%.
ab. Return FREQ switch to Fo.
ac. Set Sig. Gen. FREQ switch to +900 KHz. Verify %EFF is #5%.
ad. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.10 Decoder CCA (1A25) Performance Check.-
Equipment and tools required:
Oscilloscope
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Set the TEST SELECT switch to SG SPC. Place the Signal Generator Spacing switch on the Test
Panel to the up position. Preset the spacing as indicated on the DME display with the variable
spacing control (12.0 Fs for X-channel and 36.0 Fs for Y-channel).
MODEL 1119 DME
Rev. D December, 2002 6-25
c. Set the TEST SELECT switch to %EFF and decrease the variable spacing to the point where the
average reply efficiency drops below 5%.
d. Set the TEST SELECT Switch to SG SPC and verify that the Decoder Aperture Low reading is 10.5
0.4 Fs for X-channel or 34.5 0.4 Fs for Y-channel.
e. Set the TEST SELECT switch to %EFF and increase the variable spacing to the point where the
average reply efficiency drops below 5%.
f. Set the TEST SELECT Switch to SG SPC and verify that the Decoder Aperture High reading is 13.5
0.4 Fs for X-channel or 37.5 0.4 Fs for Y-channel.
g. Return Signal Generator Spacing switch on the test panel to the NORMAL position and set the
TEST SELECT switch to OFF.
h. Connect oscilloscope probe to Decode Gate test point 1A25-TP3.
i. Verify gate width of 30.5Fs.
j. Connect oscilloscope probe No.1 to Decoder Output test point 1A25-TP6.
k. Connect oscilloscope probe No.2 to Log output test point 1A24-TP12 to observe interrogation signal.
l. Verify that there is one output pulse at 1A25-TP6 for each interrogation pair at 1A24-TP12.
m. Disconnect oscilloscope probe No.2 from test point 1A24-TP12.
n. Turn the TEST SELECT switch to the TX PRF position.
o. Place SIGNAL GENERATOR PRF switch to the PRF position.
p. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer maximum
counterclockwise.
q. Verify the count on the LED Display indicates 1000 100. (This count is primarily due to squitter
pulses.)
r. Turn the TEST SELECT switch to the SG PRF position.
s. Adjust SIGNAL GENERATOR VARIABLE PRF control potentiometer to 3600 50.
t. Turn the TEST SELECT switch to the TX PRF position.
u. Verify that the transmitter PRF count will follow the interrogation rate up to 2700 then limit the
count to approximately 2700 90 PPS.
MODEL 1119 DME
6-26 Rev. D December, 2002
v. Return the SIGNAL GENERATOR PRF switch to the NORMAL position.
w. Connect COUNTER input to Decoder test point 1A25-TP6 using oscilloscope probe in order to
count Decoder output pulses.
x. Turn TEST SELECT switch to the EXT position. Verify LED Display reads 1000 100.
y. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.11 Keyer CCA (1A26) Performance Check.- If DME is co-located and externally keyed with another
Navaid, temporarily disconnect the external keying signal from TB1-7 in the bottom of the DME cabinet.
Equipment and tools required:
Oscilloscope
Multimeter
Stopwatch
Frequency Counter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place the transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
c. Place Keyer CCA (1A26) on Extender CCA and install into the DME cabinet.
d. Connect a pair of test leads to external keyer input terminals on terminal board 1A1-TB1, pins 7 and
8.
e. Connect oscilloscope probe to DME Keying test point 1A26-TP1.
f. Place the transponder CHASSIS POWER switch to NORMAL and DC circuit breaker to the ON
position. Allow the system to come up and operate normally.
g. Place the TEST SELECT switch to IDENT position.
h. Observe oscilloscope display and tap the test leads together to simulate external keying.
i. The signal at 1A26TP1 will go LOW and an audible tone will sound on the DME speaker.
j. Separate the test leads. Verify the signal at 1A26-TP1 goes HIGH.
k. Tap the test leads together to simulate an external keyer. Prepare to time the NO IDENT delay
period. Start timing the delay period when the test leads are separated to simulate a no-keying
condition. Stop timing when the internal keying begins as observed by changing state at TP1.
MODEL 1119 DME
Rev. D December, 2002 6-27
l. Note the elapsed time between separation of the test leads and the response of the DME Keyer (as
observed at TP1). Verify stopwatch indicates a delay period of 401.0 seconds.
m. Prepare to time the CONSTANT IDENT delay. Start timing the delay period when the test leads are
shorted together. Stop timing when the DME interrupts the constant tone.
n. Note the elapsed time between the time the leads are shorted and the time the response of the DME
Keyer is observed at TP1. Verify the stopwatch indicates a delay peiod of 5 0.5 seconds.
o. Connect oscilloscope probe to frequency counter and test point 1A26-TP3. Observe a 50-MHz 5-
KHz clock signal. Remove probe.
p. Place the transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
q. Remove the Keyer CCA (1A26) from the Extender CCA and reinsert into the chassis.
r. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.12 Transmitter Video CCA (1A27) Performance Check.
Equipment and tools required:
Oscilloscope
Multimeter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place the transponder CHASSIS POWER switch to the OFF position.
c. Place Transmitter Video CCA (1A27) on Extender CCA and reinstall into cabinet assembly.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect oscilloscope external trigger input to SG TRIG output and set oscilloscope trigger source
to external.
f. Connect oscilloscope probe No. 2 to Decodes test point 1A27-TP1.
g. Observe that a negative-going decode pulse is present.
h. Connect oscilloscope probe No.1 to Encode TRIG test point 1A27-TP2.
i. Observe that a positive-going encode trigger is present.
MODEL 1119 DME
6-28 Rev. D December, 2002
j. Verify that positive encode trigger at TP2 is present and is delayed by approximately 19.5 Fs, for X-
Channel operation, or 1.5 Fs, for Y-Channel operation, from decode trigger at TP1.
k. Turn the TEST SELECT switch to the TX SPAC position.
l. On the LED Display, verify pulse pair spacing is 12.000.05 for X-channel, or 30.000.05 for Y-
channel.
m. Connect oscilloscope external trigger input to TX TRIG output and set oscilloscope trigger source
to external.
n. Connect oscilloscope to Transmitter Video CCA (1A27) edge connector pin 33.
o. Verify 1st pulse width of 6.75 0.5 Fs.
p. Connect oscilloscope to Transmitter Video CCA (1A27) edge connector pin 34.
q. Verify 2nd pulse width of 6.75 0.5 Fs.
r. Place transponder IDENT switch to the CONST/IDENT position.
s. Connect oscilloscope to 1350-Hz test point 1A27-TP3.
t. Set the oscilloscope time base controls to 0.1ms/div and volts/div as required to display four pulses
of the Const Ident signal.
u. Verify the Const Ident signal displayed on the oscilloscope matches the following description. The
spacing from the first pulse to the second pulse is approximately 100 Fs and the spacing between the
first pulse and the third pulse is approximately 740 Fs. The spacing between the third pulse and the
fourth pulse is also 100Fs.
v. Return transponder IDENT switch to the NORMAL position.
w. Place all Monitor and Transponder operational switches to their NORMAL positions.
x. Connect oscilloscope probe to Monitor A CCA Delayed Pulse test point 1A11-TP3.
y. Observe that both interrogation and reply pulses are present.
z. While observing signal at 1A11-TP3, temporarily place IDENT switch to OFF then back to
NORMAL. Verify that the system initiates a search, then locks on again.
aa. Place the transponder CHASSIS POWER switch to the OFF position.
ab. Remove Transmitter Video CCA (1A27) from Extender CCA and reinstall into cabinet assembly.
MODEL 1119 DME
Rev. D December, 2002 6-29
ac. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.13 Power Amplifier Assembly (1A32) Performance Check.- Power Amplifier performance is
determined by looking at the system detectors. There are two detectors in the DME cabinet, both of them
are inside the Test Panel. Remove the two screws on the right-hand side of the Test Panel Assembly (1A1)
and open on the hinge for access. The "Monitor Detector" (1A4) is to the right-hand side, mounted flat next
to the CALIBRATED ATTENUATOR. The "Transmitter Detector" (1A5) is to the left-hand side, mounted
against the back wall of the DME above the Circulator.
Equipment and tools required:
Oscilloscope
Peak Power Meter and Sensor
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Connect oscilloscope probe to test point TP1 of Monitor Detector Assembly (1A4).
c. Connect oscilloscope external trigger input to TX TRIG output and set oscilloscope trigger to
external.
d. While monitoring 1A4-TP1, verify Detected Pulse Pair is present.
e. Verify that reply pulse shape parameters correspond to the parameters listed below.
Parameter Tolerance
Rise Time 2.5 (+.5, -1.0) sec
Pulse Width 3.5 (0.5) sec
Fall Time 2.5 (+.5, -1.0) sec
f. Set TEST SELECT switch to TX PWR and verify station power is greater than 700Watts. Make a
note of the power level to compare with actual power in later step.
g. If a Peak Power Meter is not available, skip to step k.
h. If a Peak Power Meter is available, disconnect the cable inside the Test Panel that connects the
Directional Coupler to the Monitor Detector (1A4). Leave the Attenuator connected to the
Directional Coupler. Connect the Peak Power Sensor to the Attenuator.
NOTE
When the cable is disconnected from the Monitor Detector, the power
measurement in the LED display will drop to 0.
MODEL 1119 DME
6-30 Rev. D December, 2002
i. The Directional Coupler has a coupling factor of 31dB. Using this and the appropriate correction
values, calculate the actual system power as indicated on the Power Meter. Compare the actual with
the Test LED Display as noted in a previous step. Verify the display is within 20Watts of actual
power.
j. Disconnect Peak Power Meter and reconnect cable to the Monitor Detector (1A4).
k. Connect oscilloscope probe to test point TP1 of Transmitter Detector Assembly (1A5).
l. Connect oscilloscope external trigger input to TX TRIG output and set oscilloscope trigger to
external.
m. While monitoring 1A5-TP1, verify Detected Pulse Pair is present and greater than 1.5Vp.
n. Set TEST SELECT switch to OFF.
o. Disconnect oscilloscope probe. Close and secure Test Panel Assembly (1A1).
p. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.14 High Voltage Power Supply (1A14) Performance Check.- The following procedures are used to test
the High Voltage Power Supply Assembly (1A14).
Equipment and tools required:
Multimeter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place digital multimeter common lead on 1A14-TP2.
c. Using a multimeter, check voltage at test point 1A14-TP1. Verify reading is 50 to 52Vdc.
d. Check voltage at test point 1A14-TP3. Verify reading is 62 to 64Vdc.
e. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.15 +28 Vdc Power Supply (1A30) Performance Check.- This procedure ensures that the +28 Vdc Power
Supply (1A30) is providing the correct voltage to the system's Low Voltage Power Supply CCAs
(1A13/1A28).
Equipment and tools required:
Multimeter
MODEL 1119 DME
Rev. D December, 2002 6-31
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Place digital multimeter common lead on 1A28-TP4.
c. Check voltage at test point 1A28-TP5. Verify reading is +280.5Vdc.
d. Place digital multimeter common lead on 1A13-TP4.
e. Check voltage at test point 1A13-TP5. Verify reading is +280.5Vdc.
f. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.16 Battery Performance Check.- This procedure uses the analog readings as found on the System RMM.
If a Video Terminal is not available, perform the alternate procedures included in parenthesis after a
reference to a Video entry.
NOTE
If the batteries are fully charged, the charged amps (BAT.A) will be less than 500
mA. If the batteries have been used recently, the charge current could well be greater
than 2.5 A. If the current is greater than 2.5 A for longer than two days, it may be an
indication of faulty or defective batteries.
Equipment and tools required:
Video Terminal
Multimeter
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. On Video terminal, type[.AD.LIMITS] then press ENTER. Note the readings for AC volts, DC
volts, Battery Amps and DC amps. (With a multimeter, measure the AC volts at the Outlet on the
Power Panel and the DC volts between 1A13-TP5 and Ground. Verify AC volts is present and DC
volts is near +28V.)
c. Place system AC circuit breaker to the OFF position.
d. Verify the DME continues in uninterrupted operation.
e. Leave the AC circuit breaker OFF for approximately 2 minutes.
MODEL 1119 DME
6-32 Rev. D December, 2002
f. Type:[.AD.LIMITS] then press ENTER. On the Video Terminal, verify the AC Volts and Battery
Amps decrease to near 0, DC.amp increases and DC.volts decreases to approximately +24 Vdc.
(With a multimeter, measure the AC volts at the Outlet on the Power Panel and the DC volts
between 1A13-TP5 and Ground. Verify AC volts is near 0 and DC volts has dropped to near +24V.)
g. Place system AC circuit breaker to the ON position.
h. Verify DME continues normal operation.
i. On the Video Terminal, type:[.AD.LIMITS] then press ENTER. Verify AC volts, DC.volts, Battery
Amps and DC.amps readings return to near original readings. (With a multimeter, measure the AC
volts at the Outlet on the Power Panel and the DC volts between 1A13-TP5 and Ground. Verify AC
and DC readings return to original values. )
j. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.17 Power Control Performance Check (optional).- The following procedure is used to check the RMM
calibration. If a Video Terminal is not available, this performance check is optional.
NOTE
For Dual Systems, perform the procedure on both cabinets. Use the appropriate video
terminal for each cabinet.
Equipment and tools required:
Video Terminal
Multimeter
Ambient Thermometer
a. Place initial switch position settings to those listed in Table 6-3.
b. Place CHASSIS POWER switch to NORMAL.
c. Insure Low Battery Voltage indicator on Power Panel is not illuminated.
d. After Log-on with the Video Terminal, type:[.AD.LIMITS] then press ENTER.
e. Verify AC volts indicates the correct line voltage for the site within 10%.
f. Verify DC volts indicates the DC voltage as measured at 1A29A2E5 (on back of the power panel)
within 0.5Vdc.
g. Verify DC amps reads between 2 to 5 A.
MODEL 1119 DME
Rev. D December, 2002 6-33
h. Type [SHUTDOWN] on the terminal and ENTER. The system will be in a shutdown condition with
only the DC Power and Shutdown LEDs illuminated.
i. On the Video Terminal, type:[.AD.LIMITS] then press ENTER.
j. Verify DC.amps reads less than .5 A.
k. Type [STARTUP] on the terminal and ENTER. Verify the System returns to NORMAL operation.
l. Place transponder IDENT switch to the CONST/IDENT position.
m. On the Video Terminal, type:[.AD.LIMITS] then press ENTER.
n. Verify DC amps now reads between 3 to 8 A.
o. Place transponder IDENT switch to the NORMAL position.
p. On the Video Terminal, type:[.AD.LIMITS] then press ENTER.
q. Verify TEMP indicates shelter temperature plus 5 degrees for cabinet rise 5. (e.g. Shelter temp is
25 degrees C, + 5 degrees = TEMP reading of 305).
r. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.2.18 Transfer Performance Check (Dual 1119 Systems Only).- In a dual DME system, the 1119-0101 (or
1119-0104 for dual monitor) is designated as the #1 system and the 1119-0102 (or 1119-0105 for dual
monitor) with the Tranfer Module (1A7) is the #2 system. The DME RMM requires the Dual Status
commands, DUAL.ON, and HOT.ON or HOT.OFF be selected. In the HOT.ON mode the standby station
is ON, and ready to transfer as soon as the main system has shutdown. In the HOT.OFF mode the standby
station is waiting (power OFF). When the main system shuts down, the standby system must turn ON and
verify its own status (approximately 45 seconds) before transferring to the antenna.
Equipment and tools required:
None
a. Place all system operation switches to the initial settings listed in Table 6-3.
b. Note which system is radiating by which green LED is illuminated on the front of the Transfer
Module (1A7). NO.1 SELECTED indicates 1119-0101 (or 1119-0104 for dual monitor), NO.2
SELECTED indicates 1119-0102 (or 1119-0105 for dual monitor).
c. Place a fault in the station radiating to the antenna by disconnecting the RF cable between the
Preselector Assembly (1A20) and the First Mixer Assembly (1A21).
MODEL 1119 DME
6-34 Rev. D December, 2002
d. After appropriate delay, operating station will shutdown and standby station will come on. Reconnect
cable on shutdown system.
e. Verify the standby system comes ON and the antenna transfers as indicated by the green LED on the
front of the Transfer Module (1A7).
f. After approximately 90 seconds, fault the transferred station by disconnecting the RF cable between
the Preselector Assembly (1A20) and the First Mixer Assembly (1A21).
g. Verify transferred system shuts down.
h. Both stations are now OFF and will remain OFF until the auto restart times out.
i. Return #1 system to normal by pressing push button RESET or typing [STARTUP] and ENTER on
the Video terminal.
j. Verify that #1 system captures the antenna in approximately 45 seconds.
k. Return #2 system to normal by pressing push button RESET or typing [STARTUP] and ENTER on
the Video terminal.
l. If #2 System is in COLD STANDBY, the unit will shut down after approximately 45 seconds and
wait in cold standby.
m. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.3 OTHER MAINTENANCE PROCEDURES.-
6.3.1 Quarterly Visual Inspection of DME System .-
a. Visually inspect connectors (ground and antenna) for corrosion, cracks, breaks, or burns.
b. Visually inspect all equipment connected to the DME for overheating.
c. Visually inspect front panel indicators and verify that the following system LEDs are illuminated:
Status LED - Normal (Green)
Test LED - (Green)
DC Power LED (Green)
d. If Status shutdown (red) LED is illuminated, go to troubleshooting section before attempting a
RESET.
MODEL 1119 DME
Rev. D December, 2002 6-35
6.3.2 Annual Visual Inspection of DME Antenna System.-
a. Check for antenna stability, and make sure it is securely affixed to its base or substructure.
b. Check cables and connections for burns, cracks or breaks, due to friction, vibrations or weathering.
c. Inspect ground cable connections insure they are secure and in good condition.
6.3.3 Annual Visual Inspection of DME Cabinet.-
a. Check for a secure mounting to structure.
b. Check RF cables and connections for corrosion, cracks or breaks, due to friction or vibrations.
c. Check for burns due to arcing and overheating.
d. Check for functional operation of all indications:
Status LED - Normal (Green)
Test LED - (Green)
DC Power LED (Green)
d. If Status shutdown (red) LED is illuminated, go to troubleshooting section before attempting a
RESET.
6.4 SPECIAL MAINTENANCE PROCEDURES.- The following instructions describe the alignment
procedure for the DME system. The alignment procedures are arranged in the required sequence to allow
for complete alignment of the DME. The order of the procedures is arranged to systematically test the Signal
Generator, Monitor and Test circuits; so they can be used in the alignment of the Transponder. Normally,
it should not be necessary to perform the entire alignment. Instead, the applicable portion can be extracted
as dictated by module repair or replacement. Table 6-10 gives the appropriate procedure(s) to be performed
based on the module replaced. If the first procedure listed after a module is the performance check and the
module passes this procedure, there is no need to perform the alignment. Table 6-9 lists the initial switch
positions for the Alignment procedures. Each procedure starts and ends with the DME in Shutdown mode.
MODEL 1119 DME
6-36 Rev. D December, 2002
Table 6-9. Switch Positions for Alignment Procedures.
Switch Position
Test Unit:
TEST SELECT OFF
Monitor Control Panel:
CALIBRATED ATTENUATOR Control 20 dBm
SIGNAL GENERATOR PRF NORMAL
SIGNAL GENERATOR SPACING NORMAL
SIGNAL GENERATOR CW NORMAL
SIGNAL GENERATOR FREQ FO
MONITOR TEST NORMAL
DISPLAY NORMAL
Transponder Control Panel:
CHASSIS POWER OFF
FINAL HV OFF
IDENTIFICATION NORMAL
Power Control Panel:
AC Breaker ON
DC Breaker ON
Most of the adjustment procedures described require only the use of an oscilloscope. However, for
adjustment of those parameters which involve disturbing critical factory-preset controls, additional
equipment may be required; and it is suggested that field adjustment not be attempted unless proper test
equipment is available. Table 6-11 contains a list of test equipment that is required for alignment and
adjustment procedures in this section.
MODEL 1119 DME
Rev. D December, 2002 6-37
Table 6-10. Maintenance Procedures vs. Assembly Replacement
After repair or placement of an assembly, perform the procedural paragraph(s) listed after
the assembly, in the order presented. Only portions of some paragraphs may require
performance, as indicated by parenthesis (). If the performance check (6.2.X) is listed first
and the assembly passes satisfactorily, then no further alignment is necessary.
Assembly Replaced Perform Procedure(s)
Test Unit (1A1)
Display (1A1A1) 012390 6.2.4
Time Interval (1A1A2) 012398 6.2.4
Power Meas (1A1A3) 012400 6.2.4, 6.4.3(j-x), 6.4.16, 6.4.17
Steering Logic (1A1A4) 012391 6.2.4
Signal Generator/Monitor
RF Generator (1A8) 030207 6.4.1.2
Modulator (1A9) 030215 6.4.2, 6.4.3
Sig. Gen. Vid. (1A10) 012394 6.2.6, 6.4.2, 6.4.3
Monitor A (1A11) 012668 6.2.6, 6.4.4
Monitor B (1A12) 012001 6.2.7, 6.4.14
L.V. Pwr Sply (1A13) 012670 6.2.3
Detector (1A4) 030204 6.4.12
Cal Attenuator (1A3) 030211 6.4.2, 6.4.3
Transponder
Low Pwr Amp (1A32) 030312 6.2.13, 6.4.13
RF Generator (1A23) 030207 6.4.1.2
Preselector (1A20) 030206 6.4.5, 6.4.7(a,c,e-j), 6.2.9
Mixer/PreAmp (1A21) 030205 6.2.9, 6.4.7(a,c,e,k)
IF Amplifier (1A24) 030210 6.2.9, 6.4.7
Decoder (1A25) 012380 6.2.10, 6.4.9
MODEL 1119 DME
6-38 Rev. D December, 2002
Table 6-10. Maintenance Procedures vs. Assembly Replacement (cont.)
Assembly Replaced Perform Procedure(s)
Keyer (1A26) 012735 6.4.10.1, 6.2.11, 6.4.10.2
Transmit Vid (1A27) 012629 6.2.12, 6.4.11
L.V. Pwr Sup (1A28) 012670 6.2.3
H.V. Pwr Sup (1A14) 012501 6.2.14
Detector (1A5) 030204 6.4.12
Directional Coupler (1A6) 030026 6.2.13, 6.2.4
Transfer Assembly (1A7) 030345 6.2.18
RMM
CPU (1A15) 012775 6.4.15
Interface (1A17) 012573 6.4.15
Main Power Control Panel (1A29)
Input Pwr Monitor (A2) 012406 6.4.16
Voltage Scaling (A1) 012547 6.2.17
Power Supply (1A30) 950572
or 950090 6.2.15, 6.4.18
MODEL 1119 DME
Rev. D December, 2002 6-39
Table 6-11. Equipment Required for Alignment and Adjustments.
(Equivalent test equipment may be substituted, as required)
1. Oscilloscope, Dual Channel, Type 2225 (Tektronix)
2. Multimeter, Digital, Model 77 (Fluke)
3. Peak Power Meter with Sensor, Model 8900C & 84811A (Hewlett Packard)
4. Frequency Counter to 1.3GHz, B&K 1596
5. Power Meter with Mount, Model 432A & 478A (Hewlett Packard)
NOTE
In some instances a BIRD MODEL 4314 power meter may be substituted for item
5 above. If this is the case, be advised that the BIRD wattmeter is not an actual peak
reading device. It is an average indicating and typically gives readings of 65 watts
for 100 watts of peak power.
6.4.1 RF Generator Assembly (1A8/1A23) Alignment.- These procedures described the necessary steps
to set the frequency and power of the RF Generators. Paragraph 6.4.1.1 is for checking the RF Generators
on existing frequency. Paragraph 6.4.1.2 is for selecting a different channel frequency.
6.4.1.1 Checking RF Generator Assembly (1A8/1A23) Channel Frequency.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place the transponder CHASSIS POWER and the FINAL H.V. switches to the OFF position.
c. Remove RF Generator Assembly (1A8) from the cabinet.
d. Place RF Generator Assembly (1A8) on the extender cable for the 15-pin D-shell connector.
e. Connect a frequency counter to 1A8P1.
f. Place the transponder CHASSIS POWER switch to the ON position.
g. Insure output of transponder RF Generator (1A8) is the station frequency 0.001%. If necessary,
while monitoring frequency counter adjust 1A8Y1 to assigned channel frequency 0.001%. Make
slight adjustments only and allow counter to stabilize. Note: The cover may need to be removed to
access the crystal oscillator adjustment.
h. Disconnect frequency counter from RF Generator.
i. Connect a power meter to 1A8P1 through 20 dB of attenuation.
MODEL 1119 DME
6-40 Rev. D December, 2002
j. Set Monitor RF Generator (1A8) for an output level of 250 to 275 mW by adjusting Power Set
potentiometer 1A8R38.
k. Place the transponder CHASSIS POWER switch to the OFF position.
l. Insure that all cover screws are in place and tight.
m. Reinstall RF Generator Assembly (1A8).
n. Remove RF Generator Assembly (1A23) from the cabinet.
o. Place RF Generator Assembly (1A23) on the extender cable for the 15-pin D-shell.
p. Connect a frequency counter to 1A23P1.
CAUTION
The output of the RF Generator Assembly (1A23) can be 500 mW; therefore, damage
to the counter input must be considered.
q. Place the transponder CHASSIS POWER switch to the ON position.
r. Insure output of RF Generator (1A23) is station frequency 0.001%. If necessary, while monitoring
frequency counter adjust 1A23Y1 to assigned channel frequency 0.001%. Note: The cover may
need to be removed to access the crystal oscillator adjustment.
s. Disconnect frequency counter from RF Generator.
t. Connect a power meter to 1A23P1 through 20 dB attenuator.
u. Set transponder RF Generator (1A23) for an output level of 450 to 475 mW by adjusting Power Set
potentiometer 1A23R38.
v. Place the transponder CHASSIS POWER switch to the OFF position.
w. Insure that all cover screws are in place and tight.
x. Reinstall RF Generator Assembly (1A23).
y. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
Rev. D December, 2002 6-41
Figure 6-4. RF Generator Assembly Component Location Guide.
MODEL 1119 DME
6-42 Rev. D December, 2002
NOTE
If the output power of RF Generator (1A8) has changed significantly, it will be
necessary to recalibrate the CW and pulse output signals of the Modulator and Signal
Generator Video Units.
6.4.1.2 Selecting RF Generator Assembly (1A8/1A23) Channel Frequency.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place the transponder CHASSIS POWER and the FINAL H.V. switches to the OFF position.
c. Remove RF Generator Assembly (1A8) from the cabinet.
d. Refer to Table 9-4 and set switches 1A8S1, 1A8S2, and 1A8S3 accordingly for the desired channel
frequency. Access to the switches is possible through the top plate of the module without removing
covers.
e. Place RF Generator Assembly (1A8) on the extender cable for the 15-pin D-shell connector.
f. Connect a frequency counter to 1A8P1.
g. Place the transponder CHASSIS POWER switch to the ON position.
h. Insure output of transponder RF Generator (1A8) is the station frequency 0.001%. While
monitoring frequency counter adjust 1A8Y1 to assigned channel frequency 0.001%. Make slight
adjustments only and allow counter to stabilize. Note: The cover may need to be removed to access
the crystal oscillator adjustment.
i. Disconnect frequency counter from RF Generator.
j. Connect a power meter to 1A8P1 through 20 dB of attenuation.
k. Set Monitor RF Generator (1A8) for an output level of 250 to 275 mW by adjusting Power Set
potentiometer 1A8R38.
l. Place the transponder CHASSIS POWER switch to the OFF position.
m. Insure that all cover screws are in place and tight.
n. Reinstall RF Generator Assembly (1A8).
o. Remove RF Generator Assembly (1A23) from the cabinet.
MODEL 1119 DME
Rev. D December, 2002 6-43
p. Refer to Table 9-4 and set switches 1A23S1, 1A23S2, and 1A23S3 accordingly for the desired
channel frequency. Access to the switch is possible through the top plate of the module without
removing covers.
q. Place RF Generator Assembly (1A23) on the extender cable for the 15-pin D-shell.
r. Connect a frequency counter to 1A23P1.
CAUTION
The output of the RF Generator Assembly (1A23) can be 475 mW; therefore, maximum
counter input must be considered.
s. Place the transponder CHASSIS POWER switch to the ON position.
t. Insure output of RF Generator (1A23) is station frequency 0.001%. While monitoring frequency
counter adjust 1A23Y1 to assigned channel frequency 0.001%. Note: The cover may need to be
removed to access the crystal oscillator adjustment.
u. Disconnect frequency counter from RF Generator.
v. Connect a power meter to 1A23P1 through 20 dB attenuator.
w. Set transponder RF Generator (1A23) for an output level of 450 to 475 mW by adjusting Power Set
potentiometer 1A23R38.
x. Place the transponder CHASSIS POWER switch to the OFF position.
y. Insure that all cover screws are in place and tight.
z. Reinstall RF Generator Assembly (1A23).
aa. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.2 Diode Modulator Assembly (1A9) Alignment.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
c. Connect oscilloscope probe to test point 1A9-TP1.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Adjust Input Offset Adjust potentiometer 1A9R39 for ground reference.
MODEL 1119 DME
6-44 Rev. D December, 2002
f. Connect oscilloscope probe to test point 1A9-TP2.
g. Adjust Det Offset ADJ potentiometer 1A9R75 for ground reference.
h. Vary Mod Level ADJ potentiometer 1A9R12 until the switched pedestal at 1A9-TP2 disappears.
i. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.3 Signal Generator Video CCA (1A10) Alignment.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place the Signal Generator Video CCA (1A10) on Extender CCA.
c. Place the transponder CHASSIS POWER switch to the ON position.
d. Connect frequency counter to 1A10-TP5 and verify monitor clock frequency of 50-MHz 5-KHz.
e. Connect oscilloscope probe to test point 1A9-TP2.
f. Connect oscilloscope external trigger to SG TRIG output and set oscilloscope trigger source to
external.
g. Adjust MOD Level Adjust potentiometer 1A9R12 for smooth start of pulse leading edge from base
line. No leading edge spikes (pedestal feed-thru).
h. Adjust Intergate Width Adjust potentiometer 1A10R58 to the maximum clockwise position, and
adjust the pulse shape controls for the following pulse parameters for each pulse:
1A10R65 Pulse Rise Time 1.5 .75 Fs
1A10R63 Pulse Decay Time 1.5 .75 Fs
1A10R56 Pulse Width 3.5 .25 Fs
Since there is interaction between control settings, final adjustment may require repeated adjustment
between two or more controls to obtain the desired shape.
i. Place the transponder CHASSIS POWER switch to the OFF position.
j. Remove the screws on the right-hand side of the Test Panel Assembly (1A1) and open it.
k. Refer to Figures 11-1 and 11-2 (RF Interconnect Diagrams). Disconnect the coaxial cable (070083-
0007) between 1A9P1 and 1A6J4 at the Directional Coupler Assembly (1A6) ; and connect the cable
to the power meter.
l. Place the transponder CHASSIS POWER switch to the ON position.
MODEL 1119 DME
Rev. D December, 2002 6-45
m. Place the SIGNAL GENERATOR CW switch to the CW position.
n. Set the CALIBRATED ATTENUATOR to the maximum counterclockwise position.
o. Adjust CW Level Adjust potentiometer 1A10R77 for a reading of +2.5 dB on the power meter.
p. Set the CALIBRATED ATTENUATOR to 0dBm. Verify that the power meter indicates 0dBm0.5.
q. If the Power Meter does not indicate 0dBm, set the CALIBRATED ATTENUATOR dial for 0dBm
as indicated on the Power Meter. Loosen the collar on the Attenuator shaft (located behind the
Monitor Control Panel) and shift the dial as necessary to line up the "0" on the CALIBRATED
ATTENUATOR dial with the CAL ATTEN mark on the Monitor Control Panel. With an indication
of 0dBm on the Power Meter and the CALIBRATED ATTENUATOR at "0", tighten the attenuator
shaft. Be careful not to shift the dial when tightening.
r. Turn the TEST SELECT switch to the S.G. LEVEL position.
s. Verify the LED Display indicates 1.00 3 counts. Refer to Figure 6-5. If reading is not within
tolerance, adjust potentiometer 1A1A3R54 (on the Power Measurement CCA) for the correct
display. (1.00 3 indicates 1 mW of CW RF at 0 dBm on the CALIBRATED ATTENUATOR).
t. Place the SIGNAL GENERATOR CW switch to the NORMAL position.
u. Verify LED Display indicates 1.00 3 counts. If reading is not within tolerance, adjust potentiometer
1A10R72 for the correct display. (1.00 3 indicates 1 mW of pulse CW RF at 0 dBm on the
CALIBRATED ATTENUATOR.)
v. If the significant changes were made in the pulse ampltude, it might be necessary to recheck and
adjust the pulse shape controls for the following pulse parameters while viewing the pulses at 1A9-
TP2:
1A10R65 Pulse Rise Time 1.5 .75 Fs
1A10R63 Pulse Decay Time 1.5 .75 Fs
1A10R56 Pulse Width 3.5 .25 Fs
w. Place the transponder CHASSIS POWER switch to the OFF position and disconnect power meter.
x. Reconnect the cable from 1A9J1 to 1A6J4 of the Directional Coupler Assembly (1A6).
y. Place the transponder CHASSIS POWER switch to the ON position.
MODEL 1119 DME
6-46 Rev. D December, 2002
Figure 6-5. Power Measurement CCA, Rear View.
z. Place the TEST SELECT switch to the SG SPAC position.
aa. Verify the LED Display indicates a reading of 12.0 Fs, for X-Channel operation, or 36.0 Fs, for Y-
Channel operation. If reading is not within tolerance, adjust switches 1A10S1, 1A10S2, and 1A10S3
to obtain the correct spacing.
ab. Place the HV switch to NORMAL. Turn the TEST SELECT switch to the EXT position.
ac. Using a BNC test cable connect the SG TRIG output to the COUNTER input.
ad. Verify the count displayed on the LED Display is 50 10.
MODEL 1119 DME
Rev. D December, 2002 6-47
NOTE
Verify that the DME is operating normally. If the system is in the Search Mode
the LED Display will indicate approximately 900. Do not attempt to adjust the
PRF rate if the DME is in Search Mode.
ae. If necessary, adjust FXD PRF ADJ potentiometer 1A10R6 for a repetition rate of 50 as determined
from count obtained above.
af. Place the transponder CHASSIS POWER switch to the OFF position.
ag. Remove Extender CCA and reinstall Signal Generator Video CCA (1A10).
ah. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.4 Monitor A CCA (1A11) Alignment.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place the Monitor A CCA (1A11) on Extender CCA and reinstall into cabinet assembly.
c. Place the transponder CHASSIS POWER switch to the ON position.
d. Connect oscilloscope probes for channels 1 and 2 to Delayed Pulses test point 1A11-TP3.
e. Set both oscilloscope channels to DC, superimpose time traces, and adjust scope channel amplifier
gains so that both are identical. Oscilloscope shall be set to 10 Fs/div.
f. Place the MONITOR TEST switch to the ON position.
g. Move oscilloscope probe No.2 to Peak Rider test point 1A11-TP4.
h. Adjust potentiometer 1A11R35 until signal at 1A11-TP4 is half the amplitude of the signal at 1A11-
TP3.
i. Adjust Detected Transmitter Pulse Matching potentiometer 1A11R4 for reply pulse amplitude of 1
V. (The reply pulse pair is second pair of pulses displayed.)
NOTE
Amplitude of the detected transmitter pulses from the antenna is varied by changing
the in-line attenuation of the antenna monitor return line.
MODEL 1119 DME
6-48 Rev. D December, 2002
j. Refer to Figure 6-7, Half-Amplitude Finder Waveforms. If the Half-Amplitude trip point is not at
the desired point as illustrated in the figure, then it will be necessary to readjust as detailed in step
k.
k. Adjust Half-Amp Enable Pulse Trigger potentiometer 1A11R36 clockwise until disabled then back
counterclockwise until the peak rider signal is just enabled, setting the minimum signal trip point
using the 1 V reply pulses as a reference. Figure 6-7a depicts the desired waveform. Figures 6-7b
and 6-7c depict the display whenever the trigger point is too low or too high.
l. Increase the amplitude of the reply pulses with control potentiometer 1A11R4 to match the
amplitude of the interrogation pair. Half-Amp Enable Pulse Width potentiometer 1A11R40 is
adjusted so the peak rider starts to discharge at approximately the same time that the delayed pulse
reaches its peak.
m. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to INTRG Inhibit Pulse Pair test point 1A11-TP6.
n. Adjust Inhibit Pulse Delay potentiometer 1A11R49 so the trigger at 1A11-TP5 is centered in the
interrogation inhibit gate at 1A11-TP6.
o. Move oscilloscope probe No.2 to 1st INTRG Pulse Enable test point 1A11-TP9.
p. Adjust 1st Enable Pulse Position potentiometer 1A11R94 to center the gate (observed at TP9) around
the trigger pulse for the first interrogation pulse (observed at 1A11-TP5).
q. Move the oscilloscope probe No.2 to 2nd INTRG Pulse Enable test point 1A11-TP10.
MODEL 1119 DME
Rev. D December, 2002 6-49
Figure 6-6. Monitor A CCA Component Location Guide.
MODEL 1119 DME
6-50 Rev. D December, 2002
Figure 6-7. Half-Amplitude Finder Waveforms.
r. Adjust 2nd Enable Pulse Position potentiometer 1A11R98 to center the gate (observed at 1A11-
TP10) around the 0.1 Fs Half-Amp Trigger pulse at 1A11-TP5.
s. Set the TEST SELECT switch to the TX DELAY position.
t. Set the variable MONITOR TEST DELAY control to provide a delay of 50.00Fs 0.05 for X
Channel or 56.00Fs 0.05 for Y Channel and as indicated on the LED display. .
u. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to Efficiency Gate test point 1A11-TP12.
v. Adjust Efficiency Gate Width Adjust potentiometer 1A11R121 to produce a 5 0.1Fs reply
efficiency gate, as observed at 1A11-TP12.
MODEL 1119 DME
Rev. D December, 2002 6-51
w. Set gate position so first reply trigger at 1A11-TP5 lags the leading edge of reply efficiency gate at
1A11-TP12 by 2Fs 0.1Fs. The gate position is determined by the setting of switches 1A11S4,
1A11S5, and 1A11S6.
x. Move oscilloscope probe No.2 to Delay Gate test point 1A11-TP11.
y. Adjust Delay Gate Width Adjust potentiometer 1A11R118 fully clockwise.
z. Adjust Delay Gate Position Adjust potentiometer 1A11R116 to center the delay gate at TP11 about
the first reply trigger at 1A11-TP5.
aa. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 49.70
(0.05) for X Channel or 55.70 (0.05) for Y Channel.
ab. Adjust Delay Gate Position Adjust potentiometer 1A11R116 until the DLY fault LED on the
Monitor B CCA (1A12) just begins to illuminate.
ac. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 50.30
(0.05) for X channel or 56.30 (0.05) for Y Channel.
ad. Adjust Delay Gate Width Adjust potentiometer 1A11R118 until the DLY fault LED on the Monitor
B CCA (1A12) just begins to illuminate.
ae. Connect Oscilloscope to 1A11-TP3 and adjust the variable MONITOR TEST DELAY control until
the indicated delay between first interrogation and first reply pulses is 49.80 (0.05) for X Channel
or 55.80 (0.05) for Y Channel. Verify DLY LED remains extinguished.
af. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 49.50
(0.05) for X Channel or 55.50 (0.05) for Y Channel. Verify DLY LED is illuminated.
ag. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.20
(0.05) for X Channel or 56.20 (0.05) for Y Channel. Verify DLY LED remains extinguished.
ah. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.50
(0.05) for X Channel or 56.50 (0.05) for Y Channel. Verify DLY LED is illuminated.
ai. Readjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.00
(0.05) for X Channel or 56.00 (0.05) for Y Channel.
aj. Set the TEST SELECT switch to the TX SPAC position.
ak. Verify the variable MONITOR TEST SPAC control is adjusted to provide a spacing of 12.00 Fs
(0.05) for X Channel or 30.00 (0.05) for Y Channel.
al. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and probe No.2
to Transmitter Pulse Pair Spacing Gate test point 1A11-TP8.
MODEL 1119 DME
6-52 Rev. D December, 2002
am. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 fully clockwise.
an. Adjust 1A11S1, S2, and S3 to center the second reply trigger (TP5) in the accept gate at TP8.
ao. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 11.40
(0.05) for X Channel or 29.40 (0.05) for Y Channel.
ap. Adjust 1A11S1, S2, and S3 until the SPC fault LED on the Monitor B CCA (1A12) just begins to
illuminate.
aq. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 12.60
(0.05) for X Channel or 30.60 (0.05) for Y Channel.
ar. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 until the SPC fault LED on
the Monitor B CCA (1A12) just begins to illuminate.
as. Adjust the variable MONITOR TEST SPAC control until the spacing on scope at 1A11-TP3
indicates 11.50 (0.05) for X Channel or 29.50 (0.05) for Y Channel. Verify SPC LED remains
extinguished.
at. Adjust the variable MONITOR TEST SPAC control until spacing on scope indicates 11.00 (0.05)
for X Channel or 29.00 (0.05) for Y Channel. Verify SPC LED is illuminated.
au. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 12.50
(0.05) for X Channel or 30.50 (0.05) for Y Channel. Verify SPC LED remains extinguished.
av. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 13.00
(0.05) for X Channel or 31.00 (0.05) for Y Channel. Verify SPC LED is illuminated.
aw. Readjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 12.00
(0.05) for X Channel or 30.00 (0.05) for Y Channel.
ax. Place the transponder CHASSIS POWER switch to the OFF position.
ay. Place the MONITOR TEST switch to the NORMAL position.
az. Turn HV switch to NORMAL. Allow the DME to run normally.
ba. Turn the TEST SELECT switch to the IDENT position.
bb. Place the IDENT switch to CONST/IDENT position.
bc. Observe the 1350-Hz Tone at test point 1A11-TP7 on oscilloscope.
bd. Adjust Filter FO potentiometer 1A11R60 for maximum signal at 1A11-TP7.
MODEL 1119 DME
Rev. D December, 2002 6-53
be. Adjust 1350-Hz Output Level Adjust potentiometer 1A11R66 to produce 1 vp-p at pin 15 of
connector 1A11P1.
bf. Place the transponder CHASSIS POWER switch to the OFF position.
bg. Place the MONITOR TEST switch to the NORMAL position.
bh. Remove Extender CCA and reinstall Monitor A CCA (1A11).
bi. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
6-54 Rev. D December, 2002
6.4.5 Preselector Assembly (1A20) Alignment.- Refer to Figure 6-8 and 6-9. Set the Preselector to the
interrogation frequency.
NOTE
Presets are to be done only when the condition of the receiver is not known or when
changing the station frequency. Normal routine maintenance and fine tuning do not
require these presets.
Interrogation
Frequency
(MHz)
D (Measured in Inches)
A1 A2 A3
1180 1.550 1.540 1.530
1160 1.500 1.490 1.480
1140 1.450 1.440 1.430
1120 1.410 1.400 1.390
1100 1.360 1.350 1.340
1080 1.310 1.300 1.290
1060 1.250 1.250 1.240
1040 1.200 1.200 1.180
1020 1.140 1.140 1.120
1000 1.080 1.080 1.070
Figure 6-8. Preselector Alignment Presets in Inches.
MODEL 1119 DME
Rev. D December, 2002 6-55
NOTE
Presets are to be done only when the condition of the receiver is not known or when
changing the station frequency. Normal routine maintenance and fine tuning do not
require these presets.
Interrogation
Frequency
(MHz)
D (Measured in CM)
A1 A2 A3
1180 3.94 3.91 3.89
1160 3.81 3.78 3.76
1140 3.68 3.66 3.63
1120 3.58 3.56 3.53
1100 3.45 3.43 3.40
1080 3.33 3.30 3.28
1060 3.18 3.18 3.15
1040 3.05 3.05 3.00
1020 2.90 2.90 2.85
1000 2.74 2.74 2.72
Figure 6-9. Preselector Alignment Presets in Centimeters.
MODEL 1119 DME
6-56 Rev. D December, 2002
6.4.6 First Mixer Assembly (1A21) Alignment.- The First Mixer Assembly has only one adjustment. The
63-MHz amplifier is tuned as part of the IF Amplifier Assembly (1A24) alignment procedure.
6.4.7 IF Amplifier Assembly (1A24) Alignment.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Remove the If Amplifier Assembly (1A24) from the cabinet and install on extender cables. Remove
the cover from the left side of the IF Amplifier to allow access to adjustments and test points located
inside the assembly.
c. Place the transponder CHASSIS POWER switch to the ON position.
d. Preset 1A24R40 and 1A24R50 to the maximum clockwise position.
e. Connect oscilloscope probe to 1A24-TP12; volt/div set to 1.0V, time/div set to 10Fs. Signal at
1A24-TP12 has a -9V DC offset, adjust vertical position variable control as necessary to get an on-
scope display.
f. While observing oscilloscope display, peak tune the top and bottom cavities of the Preselector
Assembly (1A20) until the two interrogation pulses are maximized.
g. Peak tune the middle (second) cavity of the Preselector Assembly (1A20) for maximum amplitude
of the pulses at 1A24-TP12 then adjust at least two turns clockwise.
h. Readjust the top cavity for maximum pulse height on the scope and lock the adjustor in place.
i. Adjust the middle cavity for maximum pulse height on the scope and lock in place.
j. Adjust the bottom cavity for maximum pulse height on the scope and lock in place.
NOTE
Do NOT use a metal screwdriver to tune 1A12C5 due to the DC voltage present.
k. Peak tune the First Mixer Assembly (1A21) 63-MHz Tune capacitor 1A21C5 for maximum
amplitude of the pulses at 1A24-TP12.
l. Adjust 1A24C10 for a peak amplitude of interrogation pulses at 1A24-TP12. Pulses should peak
between 4-5V in amplitude.
m. Connect oscilloscope probe to second local-oscillator detected output 1A24-TP13. Verify +1 0.2
Vdc is present. If voltage is not within tolerance, adjust 1A24C37 for a voltage peak, and tune the
capacitor 1/8 turn clockwise of the peak response point.
MODEL 1119 DME
Rev. D December, 2002 6-57
n. Connect oscilloscope probe to Narrow Band Tuning test point 1A24-TP10. Observe two negative
pulses.
o. Tune 2nd Mixer Tuning inductor 1A24L7 and inductor 1A24L9 for maximum negative pulse
amplitude.
WARNING
DO NOT use a fine blade tuning tool to adjust inductors 1A24L7 or 1A24L9. DO NOT
adjust 1A24L7 or 1A24L9 to their extreme positions. Core damage may result from
these actions. Proper operation of inductors 1A24L7 and 1A24L9 will be in the area
that is 40% from the center position.
p. Move oscilloscope probe to ON Channel Gate Trigger test point 1A24-TP8 and observe two positive
square pulses. If pulses are not present, adjust On Channel Gate Trigger potentiometer 1A24R39
clockwise for a stable display on the oscilloscope.
NOTE
When properly adjusted, ON channel gate pulses at 1A24-TP8 should be greater than
5 Fs wide with less than 10 squitter pulses appearing in between two separate pairs.
q. Set the oscilloscope so that both probes are DC-coupled. Set the voltage scale of both channels to
0.5 V/div and set time base to 10 Fs/div. Set the oscilloscope to the alternate mode of operation and
set ground references for both channels to the same level.
r. Connect both oscilloscope probes to Delayed Interrogation test point 1A24-TP5 and use the variable
scope controls to equalize the responses.
s. Move oscilloscope probe No.2 to Peak Rider test point 1A24-TP4.
t. Set the vertical input of both channels to GND. Using the oscilloscope position controls, adjust the
CHAN 2 trace so that it is 0.2 V below the CHAN 1 trace. Set both channels to the AC-coupled
position.
u. Adjust Peak Rider Amplitude potentiometer 1A24R89 to match peak amplitudes of the peak riders
(TP4) with the delayed interrogation (TP5) signal levels. Peak Rider Amplitude potentiometer
1A24R89 is located toward the center of the left-hand side of the IF Amplifier Assembly (1A24).
v. Set both oscilloscope vertical inputs to GND and adjust vertical position controls until both traces
are superimposed.
w. Set both oscilloscope vertical inputs to DC.
x. Verify the leading edge crossover point of Peak Rider pulse 1A24-TP4 is approximately
0.4 V less than the peak of delayed interrogation signal 1A24-TP5.
MODEL 1119 DME
6-58 Rev. D December, 2002
y. Connect oscilloscope probe No.1 to Delayed Interrogation test point 1A24-TP5. Connect
oscilloscope probe No.2 to Decoder Trigger test point 1A24-TP1.
z. Observe that output pulses at TP1 are synchronized with the half-amplitude point of the delayed
interrogation at TP5. Adjust oscilloscope amplitude controls if necessary.
aa. Adjust Narrow Pulse Gate potentiometer 1A24R97 for pulse width of 1 Fs 0.1 at 1A24-TP1.
ab. Connect oscilloscope probe No.1 to Short Distance Echo Suppression Duration test point 1A24-TP2.
ac. Adjust Short Distance Echo Suppression potentiometer 1A24R103 to set the pulse width of the
negative pulses at TP2 to 5.5 Fs 0.1 for X-channel, 19.0 0.2 Fs for Y-channel.
ad. Connect oscilloscope probe No. 1 to 1A24-E28 and probe No. 2 to 1A24-E30.
ae. Adjust potentiometer 1A24R94 so the leading edge of the signal from terminal E28 lags the leading
edge of the signal from E30 by 2 Fs.
NOTE
Waveform at 1A24-E30 is a negative going pulse; 1A24-E28 is a positive
going pulse.
af. Connect oscilloscope probe to 1A24-E13. Verify the presence of a 50-60Fs negative blanking pulse.
ag. Place the transponder CHASSIS POWER switch to the OFF position.
ah. Replace the cover on the IF Amplifier and reinstall the If Amplifier Assembly (1A24) in the cabinet.
ai. Place the transponder CHASSIS POWER switch to the ON position.
aj. Place the HV switch to NORMAL. Verify system lock on and normal operation.
ak. Place the TEST SELECT switch to the TX PRF position.
al. Place the SIGNAL GENERATOR PRF switch to PRF position. Adjust SIGNAL GENERATOR
PRF control potentiometer fully counterclockwise.
am. Adjust Squitter Rate ADJ potentiometer 1A25R45 (on the Decoder CCA) maximum
counterclockwise.
an. Adjust On Channel Gate Trigger potentiometer 1A24R39 for a pulse count of 90 - 120.
MODEL 1119 DME
Rev. D December, 2002 6-59
NOTE
Potentiometer 1A24R39 affects the MAX REP Rate, % EFF, and adjacent channel
rejection. Anytime 1A24R39 is adjusted, it is necessary to verify the proper
operation of those parameters after the adjustment or alignment has been completed.
ao. Adjust Squitter Rate Adjust potentiometer 1A25R45 clockwise for a TX PRF count of 100050 on
the LED Display.
ap. Place the SIGNAL GENERATOR PRF switch to NORMAL position.
aq. Set TEST SELECT to % EFF.
ar. Increase CAL ATTEN setting while depressing the DISPLAY PUSH BUTTON until the average
reading for 10 readings is 70 -0/+5. Note that the attenuator dial setting is greater than 57dB. Return
CAL ATTEN to 20.
NOTE
Always achieve final CAL ATTEN settings using CW rotation.
as. Set the Sig. Gen. FREQ switch to -200 KHz. Increase CAL ATTEN setting while depressing the
DISPLAY PUSH BUTTON until the average reading for 10 readings is 70 -0/+5. The attenuator dial
setting must be greater than 54dB. Set Sig. Gen. FREQ switch to F0 and CAL ATTEN to 20.
at. Set the Sig. Gen. FREQ switch to +200 KHz. Increase CAL ATTEN setting while depressing the
DISPLAY PUSH BUTTON until the average reading for 10 readings is 70 -0/+5. The attenuator dial
setting must be greater than 54dB.
au. Set CAL ATTEN to 0dB. Set Sig. Gen. FREQ switch to F0. Allow system to achieve normal status.
av. Set Sig. Gen. FREQ switch to -900 KHz. Verify reply efficiency is less than 5%. Return FREQ
switch to F0.
aw. Set Sig. Gen. FREQ switch to +900 KHz. Verify reply efficiency is less than 5%. Return FREQ
switch to F0.
If an average reading of less than 5% replies cannot be obtained (i.e., one side may display
40% replies and the other side may display 1% replies), the tuning of the Narrow Band Filter
is probably unbalanced. The following procedures provide instructions to correct this
problem. IF +900 AND -900 WERE LESS THAN 5%, SKIP TO STEP bd.
MODEL 1119 DME
6-60 Rev. D December, 2002
ax. Turn the SIGNAL GENERATOR FREQ Switch to the Fo position. Set the CALIBRATED
ATTENUATOR to 20 dBm. Observe the signal at Narrow Band Tuning test point 1A24-TP10 (use
AC coupling to eliminate the DC component of the signal).
ay. Observe and note the amplitude of the pulse pair when the SIGNAL GENERATOR FREQ Switch
is set to the Fo, +200, +900, -200, and -900 positions.
az. The amplitude of the pulse at the +200 and -200 positions should be approximately equal. If they
are not, then the Narrow Band Filter Tuning inductor 1A24L9 and Second Mixer Tuning inductor
1A24L7 need retuned, the on-channel operation point is not in the center of filter.
WARNING
DO NOT use a fine blade tuning tool to adjust inductors 1A24L7 or 1A24L9. DO NOT
adjust 1A24L7 or 1A24L9 to their extreme positions. Core damage may result from
these actions. Proper operation of inductors 1A24L7 and 1A24L9 will be in the area
that is 40% from the center position.
ba. While observing the pulses at the +200 and -200 positions, make small adjustments to 1A24L7 and
1A24L9 to balance the signals.
NOTE
To ensure the integrity of your adjustments, keep notes that reference the SIGNAL
GENERATOR FREQ Switch position, which inductor was adjusted, which direction
it was adjusted, and the waveform it produced. The shape of the pulse may not be
identical at the +200 and the -200 switch setting during this alignment.
bb. After each adjustment, observe the pulses at the +200 and -200 switch positions. If the pulses appear
to be balanced, then change to the +900 and -900 switch positions. Pulses should be barely
discernable from the background noise pulses and about equal in amplitude.
bc. Repeat steps to verify correct adjacent channel rejection operation.
bd. Unless field experience indicates the existence of a specific CW problem (where it is possible to
adjust the CW rejection sensitivity while observing the effects of an interfering signal), the following
adjustment procedure is recommended:
be. Connect oscilloscope probe to AGC test point 1A24-TP7, and note the DC voltage present.
bf. Turn the TEST SELECT switch to the TX PRF position. On the LED Display, verify TX PRF is
1000100. If not, readjust 1A25R45 to achieve the correct value.
bg. Insure that the transponder load is significantly less than 2700 ps (about 2000 ps).
MODEL 1119 DME
Rev. D December, 2002 6-61
bh. Adjust CW AGC Adjust potentiometer 1A24R50 to maximum clockwise position, then slowly turn
it counterclockwise until the voltage at 1A24-TP7 starts to decrease. Leave control potentiometer
1A24R50 set at the point where the AGC static voltage starts to (but does not) decrease. Verify the
AGC voltage is +4 to +5 Vdc, unless affected by CW rejection or maximum ARRC.
bi. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.8 IF Amplifier Assembly (1A24) Echo Suppression Alignment.- It is recommended that the adjustment
controls for both the Short Distance Echo Suppression (SDES) and the Long Distance Echo Suppression
(LDES) circuits be left at the factory preset (inactive) positions until a flight test is made, and evidence of
echoes and the need for necessary corrective action are established.
The SDES jumper is normally set to the "Enable" position (1A24E23 is jumpered to E24), but the
potentiometers are set to minimum settings. To totally disable the SDES circuit, the jumper must be placed
between terminals 1A4E24 and E25, If there is no absolute need to completely disable the SDES circuit,
it is recommended that the jumper remain in the factory set position. The SDES will operate with minimal
adverse effect to the signal.
The LDES circuit has two adjustment controls. The suppression action of the circuit is dependent upon the
signal strength of the direct path signal. For levels above a presettable threshold level, the output blanking
pulse observed at L.D. Gate Width and Time Constant test point 1A24-TP6 responds by an increase in pulse
width as the direct path signal level increases. Time Constant adjust potentiometer 1A24R66 is used to
control the discharge time of an RC circuit, while Gate Width potentiometer 1A24R68 is used to set the
trigger level of comparator U16. Consequently, the blanking interval is dependent upon signal strength; and
it increases as the direct signal level increases.
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place CHASSIS POWER switch to the ON position.
c. Connect oscilloscope probe No.1 to Delayed Interrogation test point 1A24-TP5. Connect
oscilloscope probe No.2 to Short Distance Echo Suppression Duration at test point 1A24-TP2.
d. Adjust Short Distance Echo Suppression potentiometer 1A24R103 to set the blanking pulse for the
desired width ranging from approximately 5.5 Fs for X channel, 19.0 for Y channel, up to the
decoding point on the second pulse of an interrogation pair. If more range is needed for Y-Channel
mode, connect a jumper between terminals E21 - E22.
e. Adjust potentiometers 1A24R66 and 1A24R68 fully counterclockwise.
f. Connect an oscilloscope probe to L.D. Gate Width and Time Constant test point 1A24-TP6. Set
CALIBRATED ATTENUATOR to 50 dBm.
g. Turn the TEST SELECT switch to the % EFF position.
MODEL 1119 DME
6-62 Rev. D December, 2002
h. Adjust Gate Width potentiometer 1A24R68 clockwise until a signal just begins to appear on the
oscilloscope. The pulse should be a about 2 vp.
i. Change the CALIBRATED ATTENUATOR setting from 50 to 0 dBm.
j. Adjust Time Constant potentiometer 1A24R66 clockwise until the average pulse width is 350 to 400
Fs.
k. Change the CALIBRATED ATTENUATOR setting from 0 to 50 dBm. Verify the average pulse
width is less than 50 Fs.
l. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
NOTE
To disable the LDES circuit, set Time Constant potentiometer 1A24R66 and Gate
Width potentiometer 1A24R68 to their counterclockwise position. When the LDES
circuit is diabled, there should be no pulses present at Time Constant test point 1A24-
TP6 when the CALIBRATED ATTENUATOR is set to 0 dBm.
6.4.9 Decoder CCA (1A25) Alignment.
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place CHASSIS POWER switch to the ON position.
c. Set the TEST SELECT switch to SG SPC. Place the Signal Generator Spacing switch on the Test
Panel to the up position. Preset the spacing as indicated on the DME display with the variable
spacing control (12.0 Fs for X-channel and 36.0 Fs for Y-channel).
d. Set the TEST SELECT switch to %EFF and decrease the variable spacing to the point where the
average reply efficiency drops below 5%.
e. Set the TEST SELECT Switch to SG SPC and verify that the Decoder Aperture Low reading is 10.5
0.4 Fs for X-channel or 34.5 0.4 Fs for Y-channel.
f. Set the TEST SELECT switch to %EFF and increase the variable spacing to the point where the
average reply efficiency drops below 5%.
g. Set the TEST SELECT Switch to SG SPC and verify that the Decoder Aperture High reading is 13.5
0.4 Fs for X-channel or 37.5 0.4 Fs for Y-channel.
h. Return Signal Generator Spacing switch on the test panel to the NORMAL position and set the
TEST SELECT switch to OFF.
i. Connect oscilloscope probe to Decode Gate test point 1A25-TP3.
MODEL 1119 DME
Rev. D December, 2002 6-63
j. Verify gate width of 30.5Fs. If Decoder Aperture is out of tolerance, adjust Decode Gate Width
ADJ potentiometer 1A25R10 and repeat the procedure starting at step c.
k. Connect oscilloscope probe No.1 to Decoder Output test point 1A25-TP6.
l. Connect oscilloscope probe No.2 to Log output test point 1A24-TP12 to observe interrogation signal.
m. Verify that there is one output pulse at 1A25-TP6 for each interrogation pair at 1A24-TP12.
n. Disconnect oscilloscope probe No.2 from test point 1A24-TP12.
o. Place the HV switch to the NORMAL position. Verify System operates normally.
p. Turn TEST SELECT switch to the TX PRF position. Verify LED Display reads 1000 100.
q. Slowly adjust Squitter Rate ADJ potentiometer 1A25R45 clockwise for a count of 1000 90, as
displayed on the LED Display.
NOTE
The transmitter is ON and relies on MAX PRF for protection, do not operate at high
PRF for more than a few seconds.
r. Place the TEST SELECT switch to S.G. PRF position.
s. Adjust SIGNAL GENERATOR PRF control potentiometer for a count of 3600 50 PPS on the LED
Display.
t. Place the TEST SELECT switch to the TX PRF position.
u. Adjust Max ARRC AGC potentiometer 1A25R27 for a count of 2700 90PPS.
v. Place the SIGNAL GENERATOR PRF switch to the NORMAL position.
w. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.10 Keyer CCA (1A26) Alignment.- Paragraph 6.4.10.1 describes how to set the switches on the Keyer
CCA for the proper station keying sequence. Paragraph 6.4.10.2 gives the steps for proper alignment of the
Keyer CCA. The timing adjustments are set at the factory and should not require adjustment unless the
assembly has been repaired or readjusted. If the DME is colocated and keyed with another Navaid, this
connection will need to be temporarily removed from 1A1-TB1-7 in order to perform this alignment.
MODEL 1119 DME
6-64 Rev. D December, 2002
6.4.10.1 Keyer CCA (1A26) Programming.- This procedure contains specific instructions for programming
the Keyer CCA with the morse code using encoding switches S1 through S6. Refer to Table 6-12 for morse
code.
Table 6-12. Morse Code Chart.
A .- H .... O --- V ...- 3 ...--
B -... I .. P .--. W .-- 4 ....-
C -.-. J .--- Q --.- X -..- 5 .....
D -.. K -.- R .-. Y -.-- 6 -....
E . L .-.. S ... Z --.. 7 --...
F ..-. M -- T - 1 .---- 8 ---..
G --. N -. U ..- 2 ..--- 9 ----.
0 -----
NOTE
J5 on the Keyer CCA may be jumpered to the ILS position, if it is desired to preface
the selected Morse Code with an I. This may be a requirement, if the DME is
collocated with an ILS. To remove the Morse Code I, place jumper to the NORM
position.
a. The dots and dashes that make up a letter or number are called code elements. The spaces between
elements of a letter or number are equal to one dot. To produce a dot element, you must close one
switch. To produce a dash element, you must close three switches in succession. To produce an
inter-element space, you must leave a switch open. For example, following are the steps to produce
the letter K, which is dash-dot-dash:
b. For the first element of K (a dash), close the first three switches of S1.
c. For the inter-element space, skip the fourth switch.
d. For the second element of K (a dot), close the fifth switch.
e. For the inter-element space, skip the sixth switch.
f. For the third element of K (a dash), close the seventh switch of S1 and the first and second switches
of S2.
g. For the space between a letter or a number (equal to a dash), leave the third, fourth, and fifth
switches of S2 open to allow for the space after the letter K.
MODEL 1119 DME
Rev. D December, 2002 6-65
h. The example above illustrates the makeup of an entire code group. Proceed after the space following
the example K with the next code character, followed by a space again, etc., until the entire code
group has been programmed. Always start with the first switch of S1 closed. At the end of the
program, leave the remaining switches open.
6.4.10.2 Keyer (1A26) Alignment Procedures.-
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place DC circuit breaker to the OFF position.
c. Refer to Figure 6-1. Remove Monitor B CCA (1A12) from cabinet assembly and place jumper J6
(Transmitter Ident) between pins 1 and 2 to select Ident as a primary fault. Reinstall Monitor B CCA
(1A12) into cabinet assembly. Note: For Dual Monitor B (012019) turn ON (close) switch S4-6 and
S6-6 positions.
d. Place Keyer CCA (1A26) on Extender CCA and insert assembly into the cabinet assembly.
e. Refer to Figure 6-10. Set jumpers as shown below to configure the Keyer for internal keying mode.
J1-NORM J2-NORM J3-NORM J4-NORM
J5-NORM J6-NORM J7-INTERNAL J8-NORM
f. Refer to Figure 6-2. Connect a pair of test leads to external keyer input terminals on terminal board
1A1-TB1, pins 7 and 8 (behind Power Control Panel Assembly).
g. Place DC circuit breaker to the ON position.
h. Place the transponder CHASSIS POWER and HV switches to the NORMAL position and allow the
system to come up and run normally. After approximately 30 second delay internal keying sequence
will begin.
i. Place the TEST SELECT switch to the IDENT position.
j. Verify that the keying sequence is not prefaced with the Morse code letter I.
k. Refer to Figure 6-10. Set Jumper J5 to ILS position. Allow the system to key again. Verify that the
Morse code letter "I" precedes the sequence.
l. Connect oscilloscope to 1A26TP1. Observe oscilloscope display and tap the test leads together to
simulate external keying.
m. The signal at 1A26TP1 will go LOW and an audible tone will sound on the DME speaker.
n. Separate the test leads. Verify the signal at 1A26-TP1 goes HIGH.
MODEL 1119 DME
6-66 Rev. D December, 2002
o. Set Jumpers J1 and J6 to INVERT position. Hold the test leads together. Separate the test leads to
simulate inverted (or HIGH) external keying. Verify the station keys with inverted signal.
p. Set jumpers J1 and J6 to the NORM position and jumpers J2, J3, J4 to TRIG position to configure
the Keyer for external trigger mode.
q. Tap the test leads together once to simulate an external trigger.
r. Verify the station initiates the internal keying sequence with the presence of an external trigger.
NOTE
The Keyer CCA (1A26) places a minimum of 16 seconds of delay between
external triggers.
s. Set Jumper J7 to RESTART and J8 to TRIG. Leave J2, J3, J4 in TRIG position. Allow the station
to run without an external trigger. The Keyer CCA (1A26) will detect the absence of a trigger. An
alarm condition will be initiated in the Monitor B CCA (1A12) and the station will shutdown.
t. Verify station shutdown. Allow a 30 second delay after shutdown then tap the leads together to
simulate an external trigger.
u. Verify the station restarts with the presence of the external trigger.
v. Set J7 to INTERNAL, and J2, J3, J4, J8 to NORM.
w. Simultaneously hold the test leads together and start the stopwatch. Verify a continuous tone on the
DME speaker.
x. Observe the oscilloscope display and stop the stopwatch when the signal at 1A26-TP1 goes HIGH.
y. Separate the test leads. Verify the stopwatch indicates 5 0.5 seconds. If the time is out of tolerance,
adjust 5 Second Adjust potentiometer 1A26R23 then repeat timing sequence until a continuous tone
of 5 seconds is obtained.
MODEL 1119 DME
Rev. D December, 2002 6-67
z. Tap the test leads together to simulate normal external keying. Simultaneously, separate the test
leads and start the stopwatch to time the no-keying period.
aa. Stop the stopwatch when the internal keying sequence begins (TP1 goes LOW).
ab. Verify the stopwatch indicates 40 1.0 seconds. If the time is out of tolerance, adjust 40 Second
Adjust potentiometer 1A26R18 then repeat timing sequence until a delay period of 40 seconds is
obtained.
Figure 6-10. Keyer CCA Component Location Guide.
MODEL 1119 DME
6-68 Rev. D December, 2002
ac. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
Disconnect test leads at terminal board TB1. Disconnect oscilloscope probe from TP1.
ad. Refer to Figure 6-10. Remove Extender CCA. Set the Keyer CCA jumpers and code switches to
the proper settings for the station. Install Keyer CCA (1A26) into cabinet assembly.
ae. Reset jumpers on Monitor B CCA (1A12) to the proper settings for the station.
af. Secure Power Panel Assembly (1A29).
ag. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.11 Transmitter Video CCA (1A27) Alignment.
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Remove Transmitter Video CCA (1A27) from DME cabinet assembly.
c. Place the Transmitter Video CCA (1A27) on an extender card and reinstall into the cabinet assembly.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect oscilloscope probe to Decodes test point 1A27-TP1. Insure a decode pulse is present.
f. Move oscilloscope probe to Encode TRIG test pint 1A27-TP2. Insure encode trigger is present.
g. Place the transponder IDENT switch to the CONST/IDENT position.
h. Connect oscilloscope probe to 1350 Hz test point 1A27-TP3. Connect the oscilloscope trigger input
to the TX TRIG connector (1A19J1) and set the oscilloscope to external trigger.
i. Set the oscilloscope time base controls to 0.1ms/div and volts/div as required to display four pulses
of the Const Ident signal.
j. Verify the Const Ident signal displayed on the oscilloscope matches the following description. The
spacing from the first pulse to the second pulse is approximately 100 Fs and the spacing between the
first pulse and the third pulse is approximately 740 Fs. The spacing between the third pulse and the
fourth pulse is also 100Fs. There are no adjustments for these spacing parameters.
k. Place the IDENT switch to the NORMAL position.
l. Connect the oscilloscope probe 1 to the card edge connector, P1, pin 33. Verify the gate width for
the pulse is for 6.75 .5 Fs. Adjust Pulse No.1 Width ADJ potentiometer 1A27R46 as required.
MODEL 1119 DME
Rev. D December, 2002 6-69
m. Connect the oscilloscope probe 2 to the card edge connector, P1, pin 34. Verify the gate width for
the pulse is for 6.75 .5 Fs. Adjust Pulse No.2 Width ADJ potentiometer 1A27R48 as required.
n. Using Dual Channel function on the oscilloscope, display both pulses. Verify the spacing between
the leading edge of pulse at pin 33 and the leading edge of the pulse at pin 34 is close to nominal for
the system channel (e.g. 12Fs for X-channel, or 30 for Y-channel). Switches 1A27S2, 1A27S3 and
1A27S4, are used to adjust the transmitter pulse pair spacing and will be adjusted to a tighter
tolerance in the next steps.
o. Place FINAL H.V. switches to the NORMAL position and CHASSIS POWER to ON position.
p. Place the TEST SELECT switch to the TX SPAC position.
q. Verify the system is operating normally.
r. Verify the transmitter spacing is 12.00 0.05sec for X-channel, or 30.000.05sec for Y-channel.
Adjust switches 1A27S2, 1A27S3 and 1A27S4, as required, to meet transmitter pulse pair spacing
requirements.
s. Place the TEST SELECT switch to the DELAY position.
t. Verify the system is operating normally.
u. Verify the system is 50.00 0.05sec for X-channel, or 56.000.05sec for Y-channel. Verify the
Thumbwheel switch S1 is set correctly, 5000 for X-channel, or 5600 for Y-channel.
v. Place the transponder CHASSIS POWER switch to the OFF position.
w. Remove Transmitter Video CCA (1A27) from extender card and reinstall into DME cabinet
assembly.
x. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.12 Detector (1A4/1A5) Alignment.- There are two detectors in the DME cabinet, located behind the
Test Panel. Remove the two screws on the right-hand side of the Test Panel Assembly (1A1) and open for
access. The "Monitor Detector" (1A4) is to the right-hand side, mounted flat next to the CALIBRATED
ATTENUATOR. The "Transmitter Detector" (1A5) is to the left-hand side, mounted against the back wall
of the DME above the Circulator.
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. With the power off, connect oscilloscope probe to detector output test point 1A5-TP1 and note DC
level.
MODEL 1119 DME
6-70 Rev. D December, 2002
c. Place the transponder CHASSIS POWER switch to the ON position. Observe the DC level shift.
Set offset null of the Detector Amplifier by adjusting potentiometer 1A5R6 so that level shift is 0
Vdc.
d. Place the FINAL HV switch to NORMAL. Verify the system is operating normally.
e. Connect oscilloscope external trigger input to TX TRIG output and set oscilloscope trigger to
external.
f. With oscilloscope connected to 1A5-TP1, verify Detected Pulse Pair amplitude is greater than
+1.5Vp but not clipped. The amplitude is dependent upon the loss in the return cable from the
Antenna and which monitor pick-off is used on the Antenna.
g. If Detected Pulse Pair amplitude is clipped, change attenuator AT2 (refer to Figures 11-1 and 11-2)
in the Antenna monitor line to a greater value. If Detected Pulse Pair amplitude is below tolerance,
change AT2 to a lesser value. Spare attenuators are found in the DME Accessory Kits part No.
470026-0004, for single systems, and part No. 470026-0005, for dual systems.
h. Place the transponder CHASSIS POWER and FINAL HV switches to the OFF position.
i. With the power off, connect oscilloscope probe to detector output test point 1A4-TP1 and note DC
level.
j. Place the transponder CHASSIS POWER switch to the ON position. Observe the DC level shift.
Set offset null of the Detector Amplifier by adjusting potentiometer 1A4R6 so that level shift is 0
Vdc.
k. Place the FINAL HV switch to NORMAL. Verify the system is operating normally.
l. Connect oscilloscope external trigger input to TX TRIG output and set oscilloscope trigger to
external.
m. With oscilloscope connected to 1A4-TP1, verify Detected Pulse Pair amplitude is greater than
+1.5Vp but not clipped. This amplitude is set at the factory and should not require any changes
unless significant changes are made in the output power from the Power Amplifier.
n. If Detected Pulse Pair amplitude is clipped, change attenuator AT1 (refer to Figures 11-1 and 11-2)
in the Antenna monitor line to a greater value. If Detected Pulse Pair amplitude is below tolerance,
change AT1 to a lesser value. Spare attenuators are found in the DME Accessory Kits part No.
470026-0004, for single systems, and part No. 470026-0005, for dual systems.
o. Place transponder CHASSIS POWER switch to the OFF position.
p. Close and secure Test Panel Assembly (1A1).
q. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
Rev. D December, 2002 6-71
Figure 6-11. Equipment Setup for Peak Power Measurements.
MODEL 1119 DME
6-72 Rev. D December, 2002
6.4.13 Power Amplifier Assembly (1A32) Detailed Field Alignment Procedure.- Use this procedure when
there is difficulty in achieving minimum power output, when a defective component has been replaced, or
when pulse distortion is present. It is assumed that all necessary pulses and/or signals for the Amplifier to
operate normally are present.
NOTE
On some frequencies, the amplifier may deliver more than the specified minimum power.
Do Not attempt to decrease the output power by detuning the amplifier or by misadjusting
any controls.
NOTE
If the Power Amplifier Assembly (1A32) is removed from the cabinet and tuned on a bench,
all cable losses must be considered when setting power levels.
Equipment and tools required
Oscilloscope
Multimeter
Peak Power Meter
Average Power Meter
Directional Coupler
Dummy Load (50Watt)
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Place the transponder CHASSIS POWER and the FINAL H.V. switches to the OFF position.
c. Place the system AC and DC circuit breakers to the OFF position.
d. Remove Power Amplifier Assembly (1A32) from cabinet assembly and remove its cover.
e. Reinstall Power Amplifier Assembly (1A32) into cabinet assembly.
f. Connect equipment as shown in Figure 6-11.
g. Connect power meter to the cable to measure the average RF power going into Power Amplifier
Assembly (1A32) at connector A3J1 of Power Amplifier Assembly (1A32).
h. Place system AC and DC system circuit breakers to the ON position.
i. Place the transponder CHASSIS POWER switch to the ON position.
j. Check for 450 to 475 mW. If input power is not within tolerance perform RF Generator Assembly
(1A23) Alignment as described in paragraph 6.4.1.1.
k. Disconnect Power Meter and connect cable to the input (A3J1) of the Power Amplifier.
MODEL 1119 DME
Rev. D December, 2002 6-73
l. Refer to Figure 6-12. Place the TEST/RUN switch on the Power Amplifier (1A32A3S2) to the
TEST position. This provides a fixed modulation pulse to the RF transistors.
m. Connect oscilloscope probe No.1 to 1A32A1R19. While viewing the modulation waveform at
1A32A1R19, adjust Pulse Amplitude Set potentiometer 1A32A3R43 for 48 to 50 volts of peak
modulation. Do not set the peak modulation voltage above 50 volts or the point where distortion
occurs following the peak of the pulse at 1A32A1R19.
CAUTION
Setting the peak modulation voltage above 50 volts will damage the finals in the Power
Amplifier Assembly (1A32).
n. Connect oscilloscope probe to TP1 of TX Power Detector (1A4).
o. Adjust Pedestal Adjust potentiometer 1A32A3R38 and potentiometer 1A32A3R84 so that the
trailing edge of the pulse matches the leading edge of the pulse.
MODEL 1119 DME
6-74 Rev. D December, 2002
Figure 6-12. Power Amplifier Assembly Component Location Diagram.
MODEL 1119 DME
Rev. D December, 2002 6-75
p. If it is not possible to match the amplitude of the trailing edge pedestal to the amplitude of the
leading edge pedestal by adjusting Pedestal Adjust potentiometer 1A32A3R38 without distorting the
skirt of the detected pulse, slightly decrease the amplitude of the modulation waveform 1A32A1R19
by turning pulse amplitude set potentiometer 1A32A3R43 slightly counterclockwise.
q. Adjust 1A32A3R38 until the modulation envelope pedestal (trailing edge of the first pulse) matches
the amplitude of the leading edge pedestal without distorting the skirt of the detected pulse. It might
be necessary to repeat this step several times to obtain satisfactory results.
r. Refer to Figure 6-11. Connect the appropriate test equipment to make Peak Power measurements.
RF Tuning
s. On the Exciter CCA (012568-0001), begin at the front end and adjust the variable caps in sequence
and watch for power indication on the Peak Power Meter. Use slight adjustments and progress from
front end to last stage. Sequence of cap adjustment should be: C4, C5, C16, C17, C10, C9, C12,
C13.
t. After the caps have been adjusted, repeat the sequence on the Exciter with minor adjustments to
maximize power output.
u. Move to the Final Amplifier CCA (012567-0001). Adjust the caps for maximum output: C1, C2,
C3, C4, C10, C11, C12, C13.
NOTE
Some caps have two separate "peaks". Adjust until maximum peak is found.
v. After the caps have been adjusted, repeat the sequence on the Final Amplifier with minor
adjustments to maximize power output.
w. Continue adjustments until maximum output power is greater than 750W.
Pulse Parameters
x. Position one of the two pulses from the detected video from the meter for measurement on the
oscilloscope.
y. Measure the rise-time. It should measure 2.5Fs +0.5, -1.5Fs. If rise time is not within tolerance,
adjust 1A32A3R38 as necessary.
z. Measure the fall-time. It should measure 2.5Fs +0.5, -1.5Fs. If fall-time is not within tolerance,
adjust 1A32A3R84 as necessary.
aa. Measure the Half Amplitude Width. It should be 3.5Fs 0.5Fs. This is dependent upon the tuning
of the previous adjustments (R38 and R84). Make minor adjustments as necessary to these
potentiometers for Half-amplitude width.
ab. Place the transponder FINAL H.V. switch to the OFF position.
MODEL 1119 DME
6-76 Rev. D December, 2002
ac. Remove and install Power Amplifier Assembly cover. Replace Power Amplifier in system.
ad. Place the transponder FINAL H.V. switch to the ON position.
ae. Return the station to normal operation.
af. Turn the TEST SELECT switch to the TX SPAC position.
ag. Verify the spacing of transmitted pulse pair is 12.00 0.05 Fs, for X-Channel operation, or 30.00
0.05 Fs, for Y-Channel operation, by adjusting switches 1A27S2 (fine), S3 (medium), and S4
(coarse) on the Transmitter Video CCA (1A27).
ah. Turn the TEST SELECT switch to the TX SPAC position.
6.4.14 Monitor B (1A12) Alignment.- If the Dual Monitor B (012019) CCA is used, all procedures must
be performed on the upper and lower circuitry as noted. When looking for LED indications, verify both
upper and lower indicators illuminate or extinguish together.
a. Place all system operational switches to the initial setting listed in Table 6-9.
b. Disconnect the external keying to the DME by opening the DME power panel and disconnecting the
terminal from TB1-7.
c. Place DC circuit breaker to the OFF position. Place the FINAL HV switch to NORMAL.
d. Place Monitor B CCA (1A12) on Extender CCA and reinstall into cabinet assembly.
e. Refer to Figure 6-1. Remove Monitor B CCA (1A12) from cabinet and verify jumper J3 has pins
1-2 strapped for PWR primary fault and J6 has 2-3 strapped for ID secondary fault. Reinstall into
cabinet assembly. Note: For Dual Monitor B (012019) turn ON (close) switch S4-3 and S6-3
positions and turn OFF (open) switch S4-6 and S6-6 positions.
f. Remove Keyer CCA (1A26) from the cabinet assembly. Record the current settings of the Keyer
card jumpers.
g. Refer to Figure 6-10. Remove Keyer CCA (1A26) temporarily from the cabinet assembly and set
all code switches to the closed position and set J5 to ILS. This sets a long, continuous keying cycle.
Reinstall Keyer CCA (1A26) into cabinet assembly.
h. Place DC circuit breaker to the ON position and transponder CHASSIS POWER switch to
NORMAL.
i. Turn the TEST SELECT switch to the IDENT position. Note: For Dual Monitor B (012019), the
ident timing must be verified for each side independently.
MODEL 1119 DME
Rev. D December, 2002 6-77
j. Allow the system to come up and run normally. After approximately 30 seconds the internal keying
will begin.
k. Start the stopwatch immediately after the letter I. Observe the Monitor B CCA (1A12) and stop the
stopwatch when the Monitor B ID LED illuminates.
l. Refer to Figure 6-1. Verify stopwatch time indicates 5 1 seconds. If not, adjust 5 SEC ADJ
potentiometer 1A12R61 (R99 or R126 for Dual Monitor) slightly CW to decrease time, or slightly
CCW to increase the time. Repeat step j. with the next keying sequence. Continue timing and
adjusting potentiometer 1A12R61 (R99 or R126 for Dual Monitor) until ID LED illuminates after
5 seconds.
m. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
n. Refer to Figure 6-2. Connect a pair of test leads to external keyer input terminals on terminal board
1A1-TB1, pins 7 and 8 (behind the Power Control Panel Assembly).
o. Refer to Figure 6-10. Remove Keyer CCA (1A26) temporarily from the cabinet assembly and set
all code switches to the open position and set J5 to NORM. This inhibits all internal keying,
including the letter I. Reinstall Keyer CCA (1A26) into cabinet assembly.
p. Place DC circuit breaker to the ON position and transponder CHASSIS POWER switch to
NORMAL. Allow the system to come up and run normally.
q. Tap the test leads together momentarily to simulate normal external keying. Separate the test leads
and start the stopwatch to time the alarm delay with the loss of keying. Stop the stopwatch when the
ID LED illuminates.
NOTE
It will be necessary to tap the test leads together to extinguish the ID LED and
start another timing sequence.
r. Verify the stopwatch indicates 75 5 seconds. If the ID LED does not illuminate in 75 seconds after
the loss of external keying, turn 75 SEC ADJ potentiometer 1A12R64 (R103 or R129 for Dual
Monitor) slightly CW to decrease time, or slightly CCW to increase the time. Repeat step q.
Continue timing and adjusting potentiometer 1A12R64 (R103 or R129 for Dual Monitor) until ID
LED illuminates after a loss of keying for 75 seconds.
s. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
Disconnect test leads at 1A1-TB1.
t. Refer to Figure 6-10. Remove Keyer CCA (1A26) and set ident code switches as recorded in step
f. above for the proper keying sequence. If necessary, reconnect the external keyer input to TB1-7
at the bottom of the cabinet. Secure the DME power panel assembly.
MODEL 1119 DME
6-78 Rev. D December, 2002
u. Reinstall Keyer CCA (1A26) into cabinet assembly.
v. Place transponder CHASSIS POWER switch and DC circuit breaker to the ON position.
w. Press and hold switch S1 (and S2 on Dual Monitor) on the Monitor B CCA (1A12) to simulate a 3
dB loss in transmitter power.
x. Adjust PWR Alarm Set potentiometer 1A12R30 (R39 or R77 for Dual Monitor) slowly CW until
the Monitor B CCA PWR LED illuminates. If the Monitor B CCA PWR LED is already
illuminated, slowly adjust PWR Alarm Set potentiometer 1A12R30 (R39 or R77 for Dual Monitor)
CCW until the PWR LED extinguishes. Then, slowly adjust potentiometer 1A12R30 (R39 or R77
for Dual Monitor) until the PWR LED illuminates.
y. Release switch S1 (and S2 on Dual Monitor) and verify PWR LED extinguishes.
z. Turn the TEST SELECT switch to the TX PRF position.
aa. Observe Monitor B CCA PRF LED and adjust potentiometer 1A25R45 (located on 1A25 Decoder
CCA) CCW until LED Display indicates 725 25 PPS.
ab. Adjust potentiometer 1A12R39 (R27 or R65 for Dual Monitor) until the PRF LED alarm
illuminates. Adjust potentiometer 1A25R45 to indicate 1000 50 on LED Display.
ac. Verify the PRF LED extinguishes.
ad. Place the SIGNAL GENERATOR PRF switch to PRF position and TEST SELECT switch to SG
SPAC. Adjust SIGNAL GENERATOR VARIABLE PRF control on the Monitor Control Panel
Assembly (1A2) for approximately 2600 PPS on LED Display.
ae. Verify Monitor B CCA OL (Overload) LED illuminates. Reduce PRF control to 1000 PPS and place
the SIGNAL GENERATOR PRF switch to the NORMAL position. Verify the OL LED
extinguishes.
af. Place the MONITOR TEST switch to the ON position and TEST SELECT switch to TX SPAC
position.
NOTE
The PRF LED will light during this test due to the low PRF. This will not
affect the results of the test.
ag. Connect the oscilloscope to Delayed Pulse test point 1A11-TP3. Observe the oscilloscope display
and adjust MONITOR TEST VARIABLE SPAC control potentiometer to place the second Monitor
pulse outside of the spacing tolerances for the station (e.g. 11.00 and 13.00for X channel and 29.00
to 31.00 for Y channel).
ah. Verify LED Display indicates approximately 00.00.
MODEL 1119 DME
Rev. D December, 2002 6-79
ai. Verify Monitor B CCA SPC LED illuminates indicating a spacing fault.
aj. Adjust MONITOR TEST VARIABLE SPAC control potentiometer to indicate 12.00 for X channel
or 30.00 for Y channel on the LED Display. Verify SPC LED extinguishes.
ak. Turn the TEST SELECT switch to the TX DELAY position.
al. Observe oscilloscope display and adjust MONITOR TEST VARIABLE DELAY control to place
the first Monitor pulse outside of the delay tolerances for the station (e.g. 49.00 and 51.00 for X
channel or 55.00 and 57.00 for Y channel). Verify the LED Display indicates approximately 00.00.
am. Verify Monitor B CCA DLY LED illuminates indicating a delay fault. Adjust MONITOR TEST
VARIABLE DELAY potentiometer to indicate 50.00 for X channel or 56.00 for Y channel on the
LED Display. Verify DLY LED extinguishes.
an. Verify all LEDs on Monitor B CCA (1A12) are extinguished.
ao. Place transponder CHASSIS POWER switch to the NORMAL position.
ap. Press and hold switch S1 (and S2 on Dual Monitor) and start the stopwatch when the test panel
MONITOR FAULT LED illuminates. Verify the Monitor B CCA PWR (Power) LED also
illuminates.
aq. Stop the stopwatch and release switch S1 (and S2 on Dual Monitor) when the DME station shuts
down. The shutdown time delay will read 4-10 seconds on the stopwatch (nominal setting is 7
seconds).
ar. When the DME station is in SHUTDOWN mode, press switch S2 (S3 and S5 for Dual Monitor),
Previous Fault Display (PFD) switch. The PWR LED will light indicating a power failure caused
the station shutdown. Release switch S2 (S3 and S5 for Dual Monitor). Verify PWR LED
extinguishes.
as. If shutdown time delay indicated on the stopwatch in step aq. is not correct, adjust potentiometer
1A12R87 (R159 and R188 for Dual Monitor) clockwise for more delay, counterclockwise for less
delay.
at. Reset the DME station with the front panel RESET button.
au. Repeat steps ap. through at. as necessary to set the shutdown timer delay to the correct time.
av. Place transponder CHASSIS POWER switch and DC circuit breaker to the OFF position.
aw. Configure the jumpers on the Monitor B CCA (1A12) as required for normal station operation.
ax. Remove the Extender CCA and reinsert the Monitor B CCA (1A12) into DME cabinet assembly.
MODEL 1119 DME
6-80 Rev. D December, 2002
ay. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.15 RMM CALIBRATION- The RMM is factory-calibrated. However, if a new CPU CCA is installed,
it may be necessary to adjust certain parameters in the field. The following step-by-step instructions explain
field calibration procedures.
Equipment and tools required
Video Terminal
Ambient thermometer
Multimeter (AC and DC volts)
Ammeter (DC current up to 5 amps)
a. Place all system operational switches to the initial setting listed in Table 6-9.
b. Place AC and DC circuit breakers to the OFF position.
c. Remove the four screws and lower the Power Control Panel Assembly.
CAUTION
Do not allow Power Control Panel Assembly (1A29) to be suspended by the power
supply electrical harness.
d. Install an ammeter in series with Positive battery lead at TB3.
e. Place AC and DC circuit breakers to the ON position.
f. Place transponder CHASSIS POWER and FINAL HV switches to the NORMAL position.
g. Log on to the DME with the appropriate passwords. Type [.AD.LIMITS], then press ENTER.
h. Note the value for AC volts shown on the screen (Example: 121.6). With multimeter, measure
actual line voltage. Compare actual line voltage (Example: 117.5) with that shown on the screen.
If these are not identical, then proceed to step i.
NOTE
If the number shown on the screen for AC volts is "zero" (00.0), "9" must be
entered in step i. The screen will then show a positive number (above zero),
and step i must be repeated using the new number shown for ACV.
MODEL 1119 DME
Rev. D December, 2002 6-81
i. Type [AC.V][SPACE][Actual value][SPACE][Screen value][SPACE][AD.SCALE], then press
ENTER. (Example: AC.V 1175 1216 AD.SCALE)
j. Type [.AD.LIMITS], then press ENTER. Note the value shown for AC volts. Compare the reading
shown on the Video Terminal screen with the measured value for AC volts. If these values do not
agree, repeat step i.
k. Type [.AD.LIMITS], then press ENTER. Observe the value on the Video Terminal screen for
TEMP. (Example; "TEMP 37.3").
l. Convert the value to Kelvin by adding 273.2 to the reading. (Example: 37.3 + 273.2 = 310.5). Enter
the screen temp value and the converted Kelvin value in the next step.
m. Type [TEMP][SPACE][Kelvin value][SPACE][Celcius Value][SPACE][AD.ZERO], then press
ENTER. (Example: TEMP 3105 0373 AD.ZERO)
n. Using ambient thermometer, measure the room temperature in centigrade. Add 273.2 to this value
to convert centigrade to Kelvin. If room temperature is 24EC, add 5E for cabinet rise = 29EC +
273.2 = 302.2K.
o. Enter the value shown on the screen and the calculated temperature using the following commands;
[TEMP][SPACE][Actual value][SPACE][Screen value][SPACE][AD.SCALE]. (Example: TEMP
3022 3105 AD.SCALE) Then press ENTER. Observe that the screen is now showing the TEMP
reading in KE.
p. Type [.AD.LIMITS], then press ENTER. Note the value shown for TEMP. Compare the reading
shown on the Video Terminal with the value calculated in step n. If the two values do not agree,
repeat step o.
q. Convert the value on screen back to Celcius by subtracting 273.2 from the value and using in the
next step. (Example: 3022 - 2732 = 290)
r. Type [TEMP][SPACE][Celcius value][SPACE][Kelvin value][SPACE][AD.ZERO], then press
ENTER. (Example: TEMP 0290 3022 AD.ZERO)
s. Type [.AD.LIMITS] the press ENTER. Video Terminal screen will now show cabinet temperature
in centigrade. For example;TEMP.C = 29.0.
t. On the Video Terminal, type [.AD.LIMITS] then press ENTER.
u. Note the number for DC volts shown on the screen (Example: 28.9). With multimeter, measure
actual DC input voltage at E5 on the Input Power Monitor CCA (1A29A2) (located on the back of
the Power Control Panel Assembly). Compare the measured voltage (Example: 27.9) with that
shown on the Video Terminal screen. If these are not identical, then proceed to step v.
NOTE
MODEL 1119 DME
6-82 Rev. D December, 2002
If the number shown on the screen for DC volts is "zero" (00.0), "9" must be
entered in step v. The screen will then show a positive number (above zero),
and step v must be repeated using new number shown for DCV.
v. Type [DC.V][SPACE][Actual DC volts value][SPACE][Screen value][SPACE][AD.SCALE], then
press ENTER. (Example: DC.V 279 289 AD.SCALE)
w. Type [.AD.LIMITS], then press ENTER. Note the value shown for DC volts. Compare the reading
shown on the Video Terminal screen with the measured value for DC volts. If these values do not
agree, repeat step v.
x. On the Video Terminal type [.AD.LIMITS], then press ENTER.
y. Note the number for DC.amps shown on the screen (Example: 4.1). With multimeter, measure the
voltage across R11 on the back of the Power Control Panel Assembly (1A29). Divide the voltage
by 0.05 (the value of R11) to calculate DC amps. Compare actual line current (Example: 5.3) with
that shown on the screen. If these are not identical, then proceed to step z.
NOTE
If the number shown on the screen for DC amps is "zero" (00.0), "9" must be
entered in step z. The screen will then show a positive number (above zero),
and step z. must be repeated using the new number shown for DCA.
z. Type [DC.A][SPACE][Actual value][SPACE][Screen value][SPACE] [AD.SCALE], then press
ENTER. (Example: DC.A 053 041 AD.SCALE)
aa. Type [.AD.LIMITS], then press ENTER. Note the value shown for DC amps. Compare the reading
shown on the Video Terminal screen with the calculated value for DC amps. If these values do not
agree, repeat step z.
ab. On the video Terminal type [.AD.LIMITS], then press ENTER.
ac. Note the number for BAT amps shown on the screen (Example: 01.0). Measure actual battery current
with the ammeter in line with the + terminal of TB3. Compare actual battery current (Example: 3.4)
with that shown on the screen. If these are not identical, then proceed to step ad.
NOTE
If the number shown on the screen for BAT amps is "zero" (00.0), "9" must
be entered in step ad. The screen will then show a positive number (above
zero), and step ad. must be repeated using the new number shown for BAT
A.
ad. Type [BAT.A][SPACE][Actual value][SPACE][Screen value][SPACE][AD.SCALE], then press
ENTER. (Example: BAT.A 034 010 AD.SCALE)
MODEL 1119 DME
Rev. D December, 2002 6-83
ae. Type [.AD.LIMITS], then press ENTER. Note the value shown for BAT amps. Compare the
reading shown on the Video Terminal screen with the actual value for BAT amps. If these values
do not agree, repeat step ad.
af. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.16 Power Measurement CCA (1A1A3) Alignment.- This procedure sets the LED display for TX power
to match the actual output power.
a. Perform Output Power Test as per paragraph 6.4.13.
b. Place TEST SELECT switch to the TX PWR position.
c. Verify that the LED Display indicates 700 W minimum and the power indication is within 20W of
the actual power. If reading is not within tolerance adjust control potentiometer 1A1A3R36 (on the
Power Measurement CCA) to agree with transmitter power output level.
6.4.17 Speaker Volume Adjustment.- This procedure sets the speaker volume for desired level.
a. Place all system operation switches to the initial settings listed in Table 6-9.
b. Turn the TEST SELECT switch to the IDENT position.
c. Remove the screws on the right-hand side of the Test Panel Assembly (1A1) and open it.
d. Locate Power Measurement CCA (1A1A3)
e. Place FINAL HV switch to NORMAL and CHASSIS POWER switch to ON.
f. Place the IDENT switch to CONST/IDENT and adjust potentiometer 1A1A3R16 for desired volume
from the panel speaker.
g. Place IDENT switch to NORMAL and CHASSIS POWER switch to OFF.
h. Close and secure Test Panel Assembly (1A1).
i. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
6-84 Rev. D December, 2002
6.4.18 +28 Vdc Power Supply (1A30) Output Adjustment.-
a. Place all system operational switches to the initial setting listed in Table 6-9.
b. Place system AC and DC circuit breakers to the OFF position.
c. Remove and save four Power Control Panel Assembly (1A29) screws. Carefully lift Power Control
Panel Assembly (1A29) away from DME cabinet to expose +28 Vdc Power Supply (1A30).
CAUTION
Do not allow Power Control Panel Assembly (1A29) to be suspended by the power
supply electrical harness.
d. Place system AC and DC circuit breakers to the ON position.
e. Connect digital voltmeter to -DC and +DC terminals of +28 Vdc Power Supply 1A30.
f. Adjust 1A30 Voltage Adjust Potentiometer for an output voltage of +28.5 to +29.0 Vdc.
g. Place system AC and DC circuit breakers to the OFF position.
h. Secure Power Control Panel Assembly (1A29).
i. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
MODEL 1119 DME
Rev. D December, 2002 6-85
Figure 6-13. Cabinet Interface Connections Using Todd Power Supply Part No. 950572-0001.
6.4.19 Low Battery Shutdown Voltage Adjust. - This procedure sets the voltage level for low voltage
shutdown.
Equipment and tools required
DC Power Supply (+28V at 10A)
Screwdriver, Phillips No.2
Screwdriver, Straight, small
a. Place all system operational switches to the initial settings listed in Table 6-9.
b. Set AC and DC circuit breaker to OFF. Shut off the Shelter AC circuit breaker for the system. Shut
off the circuit breaker for the Battery Box.
c. Remove the four screws on the Power Control Panel and lower the panel.
MODEL 1119 DME
6-86 Rev. D December, 2002
CAUTION
Do not allow Power Control Panel Assembly (1A29) to be suspended by
the power supply electrical harness.
d. Disconnect the Battery cables from 1A1 TB3 in the bottom of the cabinet.
e. Set voltage out of external Power Supply to +28 0.5Vdc. Turn external supply OFF. Connect
external variable Power Supply to 1A1-TB3, observing polarity.
f. Reconnect unit to Shelter AC line power with circuit breaker.
g. Set all system operational switches to NORMAL, and AC and DC circuit breakers to ON.
h. Turn on external supply and monitor output voltage with multimeter.
i. Set AC circuit breaker on the DME Power Panel to OFF. Verify system operates on external supply.
j. Slowly reduce voltage from external supply. The DC voltage when shutdown occurs should read
21.5 0.5Vdc. Adjust the Input Power Monitor CCA Shutdown Potentiometer 1A29A2R9 if
necessary and repeat the test.
k. Set DC circuit breaker to OFF. Set external power supply to OFF. Disconnect unit from line power.
Disconnect external power supply from 1A1-TB3.
l. Replace the Power Control Panel. Reconnect unit to Shelter AC line power.
m. Return the DME to normal operation by placing all system operation switches to the normal settings
listed in Table 6-2.
6.4.20 High Voltage Power Supply (1A14) Output Adjustment.-
a. Place all system operational switches to the initial setting listed in Table 6-9.
b. Place system AC and DC circuit breakers to the OFF position.
c. Connect DVM, set to measure DC, to the High Voltage Power Supply CCA (012654-0001).
Connect the positive lead to test point TP2 and connect the negative lead to test point TP1.
d. Place system AC and DC circuit breakers to the OFF position.
e. Adjust the V.ADJ on the High Voltage Power Supply (1A14) for an indication of +50 to +52 Vdc
on the DVM.
f. Connect DVM the positive lead to test point TP3.
MODEL 1119 DME
Rev. D December, 2002 6-87
g. Adjust the V.ADJ on the High Voltage Power CCA for an indication of +62 to +64 Vdc on the
DVM.
6.5 OTHER MAINTENANCE INFORMATION.- The following procedures give information that may be
needed on special occasions. A list of typical jumper settings for each assembly is included. Also included
are instructions for converting from an X-channel to a Y-channel.
6.5.1 Jumper and Switch Settings. - Some of the individual assemblies in the DME have jumpers and
switches that require proper setting. Some of these are the same for all DMEs and some of them are site
and/or channel specific. The following paragraphs list these jumpers and either their required setting or
typical factory setting. Use this a guide when the position of the jumpers or switches is in question for
proper system operation.
6.5.1.1 Monitor RF Signal Generator (1A8) Switch Setting
a. Locate the assigned Station frequency on the Frequency Setup Chart and record the appropriate
settings. The "INTERROGATION" settings are for the 1A8 Module.
Record switch settings for Channel ________
S1_____ S2______ S3______
b. Switch settings can be seen through the top panel of the module. The switches are Hexadecimal (0,
1, 2,...9, A, B, C, D, E, F) with a rotary pointer in the center. Check switch settings (where rotary
pointer is lined up) on Module and compare with recorded settings.
6.5.1.2 Signal Generator Video (1A10) Jumper Check
a. Locate E1 and E2.
b. For Y-channel stations, these terminals should be jumpered together. For X-channel there should
be no jumper installed.
c. Locate S3, S2, and S1.
d. These switches determine the Monitor Interrogation pulse spacing. Typical settings for X and Y
channels are listed below. Variations exist between systems.
S3 S2 S1
For X-channel D A 8
For Y-channel 8 F F
MODEL 1119 DME
6-88 Rev. D December, 2002
6.5.1.3 Monitor A (1A11) Jumper Check
a. Refer to Figure 6-6. Locate E1 and E3. These are jumpered at the factory to provide 1st pulse
timing. If 2nd pulse timing is required, remove the jumper.
b. Locate E4 and E5. These are jumpered at the factory to provide 1st pulse timing. If 2nd pulse timing
is required, remove the jumper.
c. Locate Switches S1, S2, S3. These switches determine the position of the Transmitter Spacing
Acceptance Gate. Typical settings for X and Y channels are listed below. Variations exist between
systems.
S1 S2 S3
For X-channel A C D
For Y-channel 5 4 A
d. Locate Switches S4, S5, S6. These switches determine the position of the Efficiency Gate. Typical
settings for X and Y channels are listed below. Variations exist between systems.
S4 S5 S6
For X-channel 8 A 5
For Y-channel 0 8 7
6.5.1.4 Monitor B CCA (1A12) Jumper Check
6.5.1.4.1 Monitor B CCA (012001) (1A12) Jumper Check
a. Refer to Figure 6-1. Locate the jumpers J1-J6. There are three pins for each jumper. A jumper
between 1-2 is a primary fault; a jumper between 2-3 is a secondary fault.
Typical settings from the factory are listed below. Site requirements may change the configuration.
J1 1-2, J2 1-2, J3 1-2, J4 2-3, J5 2-3, J6 2-3
Jumper Description
J1 Reply Delay
J2 Transmitter Pulse Spacing
J3 Transmitter Power
J4 Transmitter Count
J5 Reply Efficiency
J6 Transmitter Ident Code
b. Locate jumper J7. J7 is used to disable Reply Efficiency fault if the system is experiencing Overload
conditions. Pins 1-2 enable, pins 2-3 disable. Typical factory setting is 2-3, Disabled.
MODEL 1119 DME
Rev. D December, 2002 6-89
6.5.1.4.2 Monitor B CCA (012019) (1A12) Jumper Check
a. Locate the switched S4 and S6. There are two states for each switch position. The ON (closed) state
is a primary fault; the OFF (open) state is a secondary fault.
Typical settings from the factory are listed below. Site requirements may change the configuration.
Pos 1 ON, Pos 2 ON, Pos 3 ON, Pos 4 OFF, Pos 5 OFF, Pos 6 OFF, Pos 8 OFF
Position Description
1 Reply Delay
2 Transmitter Pulse Spacing
3 Transmitter Power
4 Transmitter Count
5 Reply Efficiency
6 Transmitter Ident Code
8 Reply Efficiency disabled
6.5.1.5 CPU CCA (1A15) Jumper Check.- Paragraph 6.5.1.5.1 details the procedure for checking the
jumpers on CPU CCA part number 012775-1001.
MODEL 1119 DME
6-90 Rev. D December, 2002
6.5.1.5.1 CPU CCA (012775-1001) (1A15) Jumper Check.- Refer to Figure 6-14.
Figure 6-14. CPU CCA (012775-1001) Component Location Guide.
a. Insure that no jumper exists at terminal locations E1-E2.
b. Insure that a jumper is placed between terminals E3-E4.
c. Insure that a jumper is placed between terminals E6-E7.
d. Insure that a jumper is placed between terminals E10-E11 and that no jumpers exist between
terminals E8-E9 or E12-E13.
MODEL 1119 DME
Rev. D December, 2002 6-91
e. Insure that a jumper is placed between terminals E14-E15.
f. Insure that a jumper is placed between terminals E17-E18.
g. Insure that a jumper is placed between terminals E20-E22. This sets the baud rate of the CPU CCA
to 1200.
h. Insure that no jumper is placed between terminals E21-E23. This sets the baud rate of the CPU CCA
to 300.
6.5.1.6 Interface CCA (1A17) Jumper Check
a. Locate terminals E1 and E2. Verify a jumper is installed.
6.5.1.7 Transmitter RF Generator (1A23) Switch Setting
a. Locate the assigned Station frequency on the Frequency Setup Chart and record the appropriate
settings. Use either the "X-CHANNEL" or "Y-CHANNEL" settings for the 1A23 Module.
Record switch settings for Channel ________
S1_____ S2______ S3______
b. Switch settings can be seen through the top panel of the module. The switches are Hexadecimal (0,
1, 2,...9, A, B, C, D, E, F) with a rotary pointer in the center. Check switch settings (where rotary
pointer is lined up) on Module and compare with recorded settings.
6.5.1.8 IF Amplifier (1A24) Jumper Check
a. Remove the cover from the module.
b. Locate terminals E21 and E22. For Y-channel stations, these should be jumpered together. For X-
channel there should be no jumper installed.
6.5.1.9 Decoder CCA (1A25) Jumper Check
a. Verify the following jumpers are in place:
X channel E1 5 to 10; E2 1 to 14, 4 to 11, 5 to 10
Y channel E1 5 to 10; E2 4 to 11, 5 to 10
MODEL 1119 DME
6-92 Rev. D December, 2002
6.5.1.10 Keyer CCA (1A26) Jumper Check
a. Using paragraph 6.4.10.1, set up the keying sequence for the assigned Station Identification signal
on switches S1 through S6.
b. Typical factory settings are given below. Site requirements may change the configuration.
J1 NORM, J2 NORM, J3 NORM, J4 NORM,
J5 ILS, J6 NORM, J7 INTERNAL, J8 NORM
6.5.1.11 Transmitter Video CCA (1A27) Jumper Check
a. Locate E1 and E3. These are jumpered together from the factory to provide 1st pulse timing for the
DME System. Unless second pulse timing is required there is no need to change the factory setting.
b. Locate E5 and E6. These are jumpered together from the factory to provide 1st pulse timing for the
DME System. Unless second pulse timing is required there is no need to change the factory setting.
c. Locate S1 Thumbwheel switch.
For X-channel, thumbwheels should be set for 5 0 0 0.
For Y-channel, thumbwheels should be set for 5 6 0 0.
d. Locate S2, S4, S3. The setting of these switches may vary slightly with each system due to
component tolerances. Typical channel settings are given below.
S2 S4 S3
For X-channel, 4 A D
For Y-channel, F A 2
6.6 FREQUENCY OR CHANNEL CHANGE PROCEDURE. -
6.6.1 Frequency Change. - This procedure describes the steps necessary to change the frequency of the DME
station within the same channel (X to X or Y to Y).
a. Perform the setup for the RF Generators as presented in paragraph 6.4.1.2.
b. Perform the Preselector Assembly (1A20) presets as presented in paragraph 6.4.5.
c. Perform the Power Amplifier Assembly (1A32) alignment as presented in paragraph 6.6.2.7.
d. Perform the IF Amplifier Assembly (1A24) alignment as presented in paragraph 6.4.7.
e. Perform the Monitor B CCA (1A11) half power check as presented in paragraph 6.6.2.10.
MODEL 1119 DME
Rev. D December, 2002 6-93
f. Perform the DME minimum performance check as presented in paragraph 6.2.2.
6.6.2 Conversion from X-Channel to Y-Channel.- This procedure describes the steps necessary (e.g., due
to site relocation, etc.) to convert a fielded DME from an X-Channel station into a Y-Channel station.
The alignment procedures are arranged to provide a systematic progression through the unit and should be
performed in the order presented. Prior to beginning this procedure it will be necessary to determine the
frequency/channel for the station.
6.6.2.1 RF Generator Assembly (1A8/1A23) Conversion. -
a. It will be necessary to know the station frequency/channel in order to continue with this conversion
paragraph.
b. Use Frequency Set-up Chart in the Appendix to determine switch settings for 1A8 and 1A23
Modules.
Channel 1A8 Freq and Setting 1A23 Freq and Setting
Example: 36Y 1060MHz 423 1123MHz 462
c. Set system switches to those positions listed in Table 6-9.
d. Remove RF Generators (1A8 and 1A23) from the system and set switches (S1, S2, S3) to the correct
positions.
NOTE
1A8 is Interrogation (MON) Generator; 1A23 is Transmit (Xmit) Generator
e. Place RF Generator Assembly (1A8) on extender cable.
f. Connect a frequency counter to 1A8P1 on the back of the Assembly.
g. Place the transponder CHASSIS POWER switch to the ON position.
h. While monitoring frequency counter, verify the frequency is correct according to the switch settings
and system channel.
i. Adjust 1A8Y1 as necessary until frequency counter indicates the assigned channel frequency +1.2/-0
KHz. (Example: adjust between 1060.0012 and 1060.0000MHz)
j. While monitoring frequency counter, rotate the FREQ switch on the Monitor Control Panel
Assembly to the +900, +200, -200, and -900 positions. Verify a correct indication (+1.2/-0 KHz)
on the counter for each position.
(Example: Frequency of 1060MHz should read 1060.200 at +200 position, etc.)
k. Place the transponder CHASSIS POWER switch to the OFF position.
l. Connect an average power meter to 1A8P1 through a 20dB attenuator.
MODEL 1119 DME
6-94 Rev. D December, 2002
m. Place the transponder CHASSIS POWER switch to the ON position.
n. Set the RF Generator 1A8 for an output level of 250 to 260 mW as indicated on the power meter by
adjusting the POWER SET potentiometer 1A8R38. Rotate the FREQ switch on the Monitor Control
Panel Assembly to the 900 and 200 positions. Verify the output level does not change more than
25mW from Fo at any position.
o. Place the transponder CHASSIS POWER switch to the OFF position.
p. Remove the RF Generator from the extender cable and reinstall in the cabinet.
q. Place RF Generator Assembly (1A23) on extender cable.
r. Connect a frequency counter to 1A23P1 on the back of the Assembly.
s. Place the transponder CHASSIS POWER switch to the ON position.
t. While monitoring frequency counter, verify the frequency is correct according to the switch settings
and system channel.
u. Adjust 1A23Y1 as necessary until frequency counter indicates the assigned channel frequency +1.2/-
0 KHz. (Example: adjust between 1123.0012 and 1123.0000MHz)
v. Place the transponder CHASSIS POWER switch to the OFF position.
w. Connect an average power meter to 1A23P1 through a 20dB attenuator.
x. Place the transponder CHASSIS POWER switch to the ON position.
y. Set the RF Generator 1A23 for an output level of 450 to 460 mW as indicated on the power meter
by adjusting the POWER SET potentiometer 1A23R38.
z. Place the transponder CHASSIS POWER switch to the OFF position.
aa. Remove the RF Generator from the extender cable and reinstall in the cabinet.
6.6.2.2 Signal Generator Video CCA (1A10) Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove the Signal Generator Video CCA (1A10) from the cabinet insert.
c. Locate terminals E1 - E2 and solder a the jumper wire between them for Y-Channel operation. Place
the Signal Generator Video CCA (1A10) on Extender CCA. Locate switches S3, S2 and S1 and
preset them to the following positions: S3-8, S2-F and S1-F.
MODEL 1119 DME
Rev. D December, 2002 6-95
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect frequency counter to 1A10-TP5 and verify Monitor clock frequency of 50-MHZ 5-kHz.
f. With an oscilloscope connected to test point 1A9-TP2, trigger the oscilloscope externally with SG
TRIG from the DME.
g. Adjust Intergate Width Adjust potentiometer 1A10R58 to the maximum clockwise position, and
adjust the pulse shape controls for the following pulse parameters:
Rise Time 1A10R65 Pulse Rise Time 1.5 0.2 Fs
Decay Time 1A10R63 Pulse Decay Time 1.5 0.2 Fs
Amp Width 1A10R56 Pulse Width 3.5 0.2 Fs
Since there is interaction between control settings, final adjustment may require repeated adjustment
between two or more controls to obtain the desired shape.
h. Observe the pulses at 1A9-TP2 and verify a spacing of 36.00 .05Fs as measured between the half-
amplitude points on the leading edges of the two pulses. If indication is not correct, adjust switches
1A10S1, 1A10S2, and 1A10S3 to obtain the correct spacing.
i. Connect an oscilloscope probe to 1A11-TP3; volt/div set to 1V, time/div set to 10Fs.
j. Set the MONITOR TEST switch on the Monitor Control Panel Assembly to the up (ON) position.
k. Verify the presence of two interrogation pulses and two monitor reply pulses.
NOTE
In the following steps, DELAY is measured between the half-amplitude
points of the leading edge of the first interrogation pulse and the leading edge
of the first reply pulse. SPACING is measured between the half-amplitude
points of the two reply pulses.
l. Set the variable MONITOR TEST DELAY control for a delay of 56.0Fs 0.05.
m. Set variable MONITOR TEST SPAC control for a spacing of 30.0 Fs 0.05.
n. Return the MONITOR TEST switch on the Monitor Control Panel Assembly to the down
(NORMAL) position.
o. Place the transponder CHASSIS POWER switch to the OFF position.
p. Remove Extender CCA and reinstall Signal Generator Video CCA (1A10).
6.6.2.3 Monitor A CCA (1A11) Conversion. -
MODEL 1119 DME
6-96 Rev. D December, 2002
a. Set system switches to those positions listed in Table 6-9.
b. Remove the screws that are holding the test panel door closed. Cut jumper between E1 and E2 on
the Steering Logic (012391-0000) Assembly.

c. Remove the Monitor A CCA (1A11) from the cabinet assembly.
d. Refer to Figure 6-6. Insure that terminals E1 - E3 and E4 - E5 are jumpered for 1st pulse timing.
Locate switches S1 thru S6 and preset them to the following positions: S1-5, S2-4, S3-A, S4-0, S5-8,
S6-7.
e. Place the Monitor A CCA (1A11) on Extender CCA and reinstall into cabinet assembly.
f. Place the transponder CHASSIS POWER switch to the ON position.
g. Connect oscilloscope probes for channels 1 and 2 to Delayed Pulses test point 1A11-TP3.
h. Trigger the oscilloscope externally with SG TRIG.
i. Set both oscilloscope channels to DC and set both traces to the same ground reference. Adjust scope
channel amplifier gains so that both are identical. The oscilloscope shall be set to 10 Fs/div.
j. Place the MONITOR TEST switch to the ON position.
k. Move oscilloscope probe No.2 to Peak Rider test point 1A11-TP4. Set the oscilloscope time base
to 2Fs/div.
l. Adjust potentiometer 1A11R35 until the signal at 1A11-TP4 is half the amplitude of the signal at
1A11-TP3.
m. Set the oscilloscope time base to 10Fs/div. Adjust Detected Transmitter Pulse Matching
potentiometer 1A11R4 for reply pulse amplitude of 1 V. (The reply pulse pair is second pair of
pulses displayed.)
n. Adjust Half-Amp Enable Pulse Trigger potentiometer 1A11R36 clockwise until disabled then back
counterclockwise to enable the peak rider signal and set the minimum signal trip point using the 1
V reply pulses as a reference. Refer to Figure 6-7.
o. Connect oscilloscope probe No.2 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5. Verify triggers
occur at the half-amplitude point for each of the pulses at 1A11-TP3.
p. Increase the amplitude of the reply pulses with control potentiometer 1A11R4 to match the
amplitude of the interrogation pair.
q. Connect oscilloscope probe No.2 to 1A11-TP4. Half-Amp Enable Pulse Width potentiometer
1A11R40 is adjusted so the peak rider (TP4) begins to discharged at approximately the same time
that the delayed pulse (TP3) reaches its peak.
MODEL 1119 DME
Rev. D December, 2002 6-97
r. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to INTRG Inhibit Pulse Pair test point 1A11-TP6.
s. Adjust the Inhibit Pulse Delay potentiometer 1A11R49 fully CW and verify the triggers at 1A11-TP5
are centered in the interrogation inhibit gates at 1A11-TP6.
t. Move oscilloscope probe No.2 to 1st INTRG Pulse Enable test point 1A11-TP9.
u. Adjust 1st Enable Pulse Position potentiometer 1A11R94 to center the gate (observed at 1A11-TP9)
around the trigger pulse for the first interrogation pulse (observed at 1A11-TP5). It may be necessary
to set oscilloscope time base to 10Fs/div temporarily to verify the gate is centering on the correct
trigger pulse.
v. Move the oscilloscope probe No.2 to 2nd INTRG Pulse Enable test point 1A11-TP10.
w. Adjust 2nd Enable Pulse Position potentiometer 1A11R98 to center the gate (observed at 1A11-
TP10) around the trigger pulse for the second interrogation pulse (observed at 1A11-TP5). It may
be necessary to set oscilloscope time base to 10Fs/div temporarily to verify the gate is centering on
the correct trigger pulse.
x. Turn the TEST SELECT switch to the S.G. PRF position.
y. Place the SIGNAL GENERATOR PRF switch to the PRF position.
z. Adjust SIGNAL GENERATOR PRF control potentiometer for 1350 10 PPS as displayed on the
LED Display.
aa. Observe the 1350-Hz Tone at test point 1A11-TP7 on the oscilloscope.
ab. Adjust Filter FO potentiometer 1A11R60 for a maximum signal at 1A11-TP7.
ac. Adjust 1350-Hz Output Level Adjust potentiometer 1A11R66 to produce 1 Vpp at pin 15 of
connector 1A11P1.
ad. Set the TEST SELECT switch to the TX DELAY position.
ae. Set the variable MONITOR TEST DELAY control to provide a delay of 56.00Fs 0.05 as indicated
on the LED display.
af. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to Efficiency Gate test point 1A11-TP12.
ag. Adjust Efficiency Gate Width Adjust potentiometer 1A11R121 to produce a 5 0.1Fs reply
efficiency gate, as observed at 1A11-TP12.
MODEL 1119 DME
6-98 Rev. D December, 2002
ah. Set gate position so first reply trigger at 1A11-TP5 lags the leading edge of reply efficiency gate at
1A11-TP12 by 2Fs 0.1Fs. The gate position is determined by the setting of switches 1A11S4,
1A11S5, and 1A11S6.
ai. Move oscilloscope probe No.2 to Delay Gate test point 1A11-TP11.
aj. Adjust Delay Gate Width Adjust potentiometer 1A11R118 fully clockwise.
ak. Adjust Delay Gate Position Adjust potentiometer 1A11R116 to center the delay gate at TP11 about
the first reply trigger at 1A11-TP5.
al. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 55.70
(0.05).
am. Adjust Delay Gate Position Adjust potentiometer 1A11R116 until the DLY fault LED on the
Monitor B CCA (1A12) just begins to illuminate.
an. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 56.30
(0.05).
ao. Adjust Delay Gate Width Adjust potentiometer 1A11R118 until the DLY fault LED on the Monitor
B CCA (1A12) just begins to illuminate.
ap. Connect Oscilloscope to 1A11-TP3 and adjust the variable MONITOR TEST DELAY control until
the indicated delay between first interrogation and first reply pulses is 55.80 (0.05). Verify DLY
LED remains extinguished.
aq. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 55.50
(0.05). Verify DLY LED is illuminated.
ar. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 56.20
(0.05). Verify DLY LED remains extinguished.
as. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 56.50
(0.05). Verify DLY LED is illuminated.
at. Readjust the variable MONITOR TEST DELAY control until the delay on scope indicates 56.00
(0.05).
au. Set the TEST SELECT switch to the TX SPAC position.
av. Verify the variable MONITOR TEST SPAC control is adjusted to provide a spacing of 30.00 Fs
(0.05).
aw. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and probe No.2
to Transmitter Pulse Pair Spacing Gate test point 1A11-TP8.
MODEL 1119 DME
Rev. D December, 2002 6-99
ax. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 fully clockwise.
ay. Adjust 1A11S1, S2, and S3 to center the second reply trigger (TP5) in the accept gate at TP8.
az. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 29.40
(0.05).
ba. Adjust 1A11S1, S2, and S3 until the SPC fault LED on the Monitor B CCA (1A12) just begins to
illuminate.
bb. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 30.60
(0.05).
bc. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 until the SPC fault LED on
the Monitor B CCA (1A12) just begins to illuminate.
bd. Adjust the variable MONITOR TEST SPAC control until the spacing on scope at 1A11-TP3
indicates 29.50 (0.05). Verify SPC LED remains extinguished.
be. Adjust the variable MONITOR TEST SPAC control until spacing on scope indicates 29.00 (0.05).
Verify SPC LED is illuminated.
bf. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 30.50
(0.05). Verify SPC LED remains extinguished.
bg. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 31.00
(0.05). Verify SPC LED is illuminated.
bh. Readjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 30.00
(0.05).
bi. Place the transponder CHASSIS POWER switch to the OFF position.
bj. Place the MONITOR TEST switch to the NORMAL position.
bk. Remove Extender CCA and reinstall Monitor A CCA (1A11) into the cabinet.
NOTE
The Monitor B CCA (1A12) will be aligned in paragraph 6.6.2.10 after the
Transponder section is aligned and running normal.
6.6.2.4 IF Amplifier Assembly (1A24) and Preselector (1A20) Alignment. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove the If Amplifier Assembly (1A24) from the cabinet and install on extender cables.
MODEL 1119 DME
6-100 Rev. D December, 2002
c. Remove the cover from the left side of the IF Amplifier to allow access to adjustments and test
points located inside the assembly. Locate terminals E21 and E22 and solder a jumper between them
for Y-channel operation.
d. Align the Preselector Assembly (1A20) to the station interrogation frequency (the frequency of the
1A8 module) by following the procedures in paragraph 6.4.5.
e. Place the transponder CHASSIS POWER switch to the ON position.
f. Preset 1A24R40 and 1A24R50 to the maximum clockwise position.
g. Connect an oscilloscope probe to 1A24-TP12; volt/div set to 1.0V, time/div set to 10Fs. Signal at
1A24-TP12 has a -9V DC offset, adjust vertical position variable control as necessary to get an on-
scope display.
h. While observing oscilloscope display, peak tune the top and bottom cavities of the Preselector
Assembly (1A20) until the two interrogation pulses appear.
i. Peak tune the middle (second) cavity of the Preselector Assembly (1A20) for maximum amplitude
of the pulses at 1A24-TP12 then adjust at least two turns clockwise.
j. Readjust the top cavity for maximum pulse height on the scope and lock the adjustor in place.
k. Adjust the middle cavity for maximum pulse height on the scope and lock in place.
l. Adjust the bottom cavity for maximum pulse height on the scope and lock in place.
NOTE
Do NOT use a metal screwdriver to tune 1A12C5 due to the DC voltage present.
m. Peak tune the First Mixer Assembly (1A21) 63-MHZ Tune capacitor 1A21C5 for maximum
amplitude of the pulses at 1A24-TP12.
n. Adjust 1A24C10 for a peak amplitude of interrogation pulses at 1A24-TP12. Pulses should peak
between 4-5V in amplitude.
o. Connect an oscilloscope probe to second local-oscillator detected output 1A24-TP13. Verify +1
0.2 Vdc is present. If voltage is not within tolerance, adjust 1A24C37 for a voltage peak, and tune
the capacitor 1/8 turn clockwise of the peak response point.
p. Connect an oscilloscope probe to Narrow Band Tuning test point 1A24-TP10. Observe two negative
pulses.
q. Tune 2nd Mixer Tuning inductor 1A24L7 and inductor 1A24L9 for maximum negative pulse
amplitude.
MODEL 1119 DME
Rev. D December, 2002 6-101
r. Move an oscilloscope probe to ON Channel Gate Trigger test point 1A24-TP8 and observe two
positive square pulses. If pulses are not present, adjust On Channel Gate Trigger potentiometer
1A24R39 clockwise for a stable display on the oscilloscope.
NOTE
When properly adjusted, ON channel gate pulses at 1A24-TP8 should be
greater than 5 Fs wide with less than 10 squitter pulses appearing in between
two separate pairs.
s. Set the oscilloscope so that both probes are DC-coupled. Set the voltage scale of both channels to
.5 V/div and set time base to 10 Fs/div. Set the oscilloscope to the alternate mode of operation and
set ground references for both channels to the same level.
t. Connect both oscilloscope probes to Delayed Interrogation test point 1A24-TP5 and use the variable
scope controls to equalize the responses.
u. Move oscilloscope probe No.2 to Peak Rider test point 1A24-TP4.
v. Set the vertical input of both channels to GND. Using the oscilloscope position controls, adjust the
CHAN 2 trace so that it is 0.2 V below the CHAN 1 trace. Set both channels to the AC-coupled
position.
w. Adjust Peak Rider Amplitude potentiometer 1A24R89 to match peak amplitudes of the peak riders
(TP4) with the delayed interrogation (TP5) signal levels.
x. Set both oscilloscope vertical inputs to GND and adjust vertical position controls until both traces
are at the same ground reference.
y. Set oscilloscope coupling to DC and set both vertical inputs to DC.
z. Verify the leading edge crossover point of peak rider pulse 1A24-TP4 is approximately 0.4 V less
than the peak of delayed interrogation signal 1A24-TP5. If necessary, adjust Half Amplitude Adjust
potentiometer 1A24R79.
aa. Connect oscilloscope probe No.2 to Decoder Trigger test point 1A24-TP1. Observe that output
pulses at TP1 are synchronized with the half-amplitude point of the delayed interrogation at TP5.
Adjust oscilloscope amplitude controls if necessary.
ab. Adjust Narrow Pulse Gate potentiometer 1A24R97 for pulse width of 1 Fs 0.1 at 1A24-TP1.
ac. Adjust Short Distance Echo Suppression potentiometer 1A24R103 to set the pulse width of the
negative pulses at TP2 to 19.0Fs 0.1.
ad. Connect oscilloscope probe No. 1 to 1A24-E28 and probe No. 2 to 1A24-E30.
ae. Adjust potentiometer 1A24R94 so the leading edge of the signal from terminal E28 lags the leading
edge of the signal from E30 by 2 Fs.
MODEL 1119 DME
6-102 Rev. D December, 2002
NOTE
Waveform at 1A24-E30 is a negative going pulse; 1A24-E28 is a positive
going pulse.
af. Connect an oscilloscope probe to 1A24-E13. Verify the presence of a 50 2.0Fs negative blanking
pulse.
ag. Place the transponder CHASSIS POWER switch to the OFF position.
ah. Replace the cover on the IF Amplifier and reinstall the If Amplifier Assembly (1A24) in the cabinet.
6.6.2.5 Decoder CCA (1A25) Alignment. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove Decoder CCA (1A25) from the cabinet. Insure E1 component carrier is configured with
a jumper connecting pins 5 and 10. On component carrier E2, remove the jumper from pins 1 to 14,
and insure that it is configured with jumpers connecting pins 4 and 11, 5 and 10.
c. Place the Decoder CCA (1A25) on Extender CCA and reinstall into cabinet assembly.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect oscilloscope probe No.1 to Clock Enable pulse test point 1A25-TP2.
f. Trigger the oscilloscope externally with SG TRIG.
g. Insure Clock Enable pulse (at 1A25-TP2) is 81.0 0.5 Fs.
h. Connect oscilloscope probe No. 1 to Decode Gate test point 1A25-TP3.
i. Insure decode gate width is set for 3.0 0.2Fs. Adjust 1A25R10 as necessary.
j. Place the transponder CHASSIS POWER switch to the OFF position.
k. Remove Extender CCA and reinstall Decoder CCA (1A25).
6.6.2.6 Transmitter Video CCA (1A27) Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove Transmitter Video CCA (1A27) from DME cabinet assembly.
c. Verify terminals E1 - E3 on Transmitter Video CCA (1A27) are connected for 1st pulse timing.
Locate switches S2, S4 and S3 and preset them to the following positions: S2-F, S4-A and S3-2.
MODEL 1119 DME
Rev. D December, 2002 6-103
d. Set REPLY DELAY thumbwheel switch S1 to 5600. Place the Transmitter Video CCA (1A27) on
Extender CCA and reinstall into cabinet assembly.
e. Place the transponder CHASSIS POWER switch to the ON position.
f. Connect an oscilloscope probe to Decodes test point 1A27-TP1. Insure negative decode pulse is
present.
g. Move an oscilloscope probe to Encode TRIG test pint 1A27-TP2. Insure encode trigger is present.
h. Place the transponder CONST IDENT/OFF/NORMAL switch to the CONST/IDENT position.
i. Trigger the oscilloscope externally with TX TRIG.
j. Connect an oscilloscope probe to 1350-Hz test point 1A27-TP3. Insure spacing for equalizing pulses
are 100 Fs 5Fs and spacing between ident pulses is 740.7 5.0Fs.
k. Connect CH1 oscilloscope probe to edge connector 1A27P1-33. Adjust Pulse No.1 Width ADJ
potentiometer 1A27R46 for a pulse width of 6.75 .2 Fs.
l. Connect CH2 oscilloscope probe to edge connector 1A27P1-34. Adjust Pulse No.2 Width ADJ
potentiometer 1A27R48 for a pulse width of 6.75 .2 Fs.
m. Set the oscilloscope to add the two channels and verify two gate pulses are present.
n. Adjust 1A27S2, 1A27S3, 1A27S4 for a spacing between the two pulses of 30.00 0.05Fs.
o. Place the transponder CHASSIS POWER switch to the OFF position.
p. Remove Transmitter Video CCA (1A27) from extender CCA and reinstall in DME cabinet
assembly.
6.6.2.7 Power Amplifier Assembly (1A32) Alignment. - Perform the procedures in paragraph 6.4.13.
6.6.2.8 Monitor A CCA (1A11) Search Pulse Alignment. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove Monitor A CCA (1A11) and install on Extender CCA in DME cabinet.
c. Connect an oscilloscope probe to 1A11-TP3 and trigger oscilloscope externally with SG TRIG. Set
volt/div to 1V and time base to 10Fs/div.
d. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
MODEL 1119 DME
6-104 Rev. D December, 2002
e. When Search pulses appear at 1A11-TP3, place the CONST IDENT/OFF/NORMAL switch to the
OFF position to stop the Search pulses.
f. Adjust 1A11R7 to set the amplitude of the Search pulses to match the amplitude of the interrogation
pulses at 1A11-TP3.
g. Place the CONST IDENT/OFF/NORMAL switch to the down (NORMAL) position. The Search
pulses should search, lock then be replaced with the Transmitted pulses.
h. Remove Monitor A CCA (1A11) from Extender CCA and reinstall in DME cabinet.
6.6.2.9 PRF Check. -
a. Set system switches to those positions listed in Table 6-9.
b. Insure all CCAs and Modules are installed securely.
c. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
d. System should come up and operate normally (all green LEDs except the red TEST and BYPASS
LEDs).
e. Set TEST SELECT switch to the SG PRF position.
f. Adjust Signal Generator Video CCA Fixed PRF ADJ, 1A10R6, for an indication on the LED display
of 100 3.
g. Set TEST SELECT switch to the TX PRF position.
h. Adjust Decoder Squitter Rate ADJ, 1A25R45, maximum counterclockwise.
i. On the IF Amplifier Assembly (1A24), verify Receiver Noise Threshold Adjust potentiometer
1A24R40 is maximum clockwise. Adjust On Channel Gate Trigger potentiometer 1A24R39 for a
pulse count of 100-120 as indicated on the LED Display.
j. Slowly adjust Squitter Rate ADJ potentiometer 1A25R45 clockwise for a count of 1000 50, as
displayed on the LED Display.
6.6.2.10 Monitor B CCA (1A12) Half Power Check. -
a. Set system switches to those positions listed in Table 6-9.
b. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
MODEL 1119 DME
Rev. D December, 2002 6-105
c. Press and hold switch S1 (and S2 on Dual Monitor) on the Monitor B (1A12) card to simulate a 3
dB loss in transmitter power. Adjust 1A12R30 (R39 or R77 for Dual Monitor) until the PWR LED
lights.
d. Release switch S1 (and S2 on Dual Monitor). The PWR LED should extinguish.
6.6.2.11 Receiver Sensitivity Check. -
a. Set system switches to those positions listed in Table 6-9.
b. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
c. Allow the system to come up and operate normally.
d. Connect both scope probes to IF delayed interrogation test point 1A24-TP5 and sync scope with SG
TRIG.
e. With the scope set to .5 V/div and 10 sec/div, the delayed interrogation pulse pair should be
displayed. Set scope channels to DC, superimpose the traces, and adjust the amplitudes for equal
height.
f. Move one probe to peak rider test point 1A24-TP4. The scope should now display two sets of pulse
pairs, one pair of higher amplitude and delay with respect to the other.
g. Set CAL ATTEN to a setting of 37. Note the peak rider (TP4) amplitude as a reference.
h. Increase CAL ATTEN setting to 43. The delayed signal (TP5) should now be within .1V of the
reference peak rider (TP4) signal. If signal amplitudes are not within tolerance adjust 1A24R79 and
repeat the test.
i. Remove scope probes and set TEST SELECT to TX PRF. Adjust 1A25-R45 max CCW.
j. Ensure that the SIG GEN PRF switch is NORMAL (down).
k. Note the displayed reading on the DME LED display. The count should be between 100-120 pulses
per second.
l. Adjust 1A25-R45 from max CCW position until TX PRF rate is 1000 50.
m. Set TEST SELECT to % EFF.
n. Increase CAL ATTEN setting while depressing the DISPLAY PUSH BUTTON until the average
reading for 10 readings is 70 -0/+5. Verify that the attenuator dial setting is 57dB or greater. Return
CAL ATTEN to 20.
MODEL 1119 DME
6-106 Rev. D December, 2002
NOTE
Always achieve final CAL ATTEN settings using CW rotation.
o. Set the Sig. Gen. FREQ switch to -200 KHz. Increase CAL ATTEN setting while depressing the
DISPLAY PUSH BUTTON until the average reading for 10 readings is 70 -0/+5. The attenuator dial
setting must be greater than 54dB. Set Sig. Gen. FREQ switch to F0 and CAL ATTEN to 20.
p. Set the Sig. Gen. FREQ switch to +200 KHz. Increase CAL ATTEN setting while depressing the
DISPLAY PUSH BUTTON until the average reading for 10 readings is 70 -0/+5. The attenuator dial
setting must be greater than 54dB.
q. Set CAL ATTEN to 0dB. Set Sig. Gen. FREQ switch to F0. Allow system to achieve normal status.
r. Set Sig. Gen. FREQ switch to -900 kHz. Verify reply efficiency is less than 5%. Return FREQ
switch to F0.
s. Set Sig. Gen. FREQ switch to +900 kHz. Verify reply efficiency is less than 5%. Return FREQ
switch to F0.
6.6.2.12 RMM Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
c. On the DME terminal interface, logon at the Service level. Enter the test service limits as shown in
the following screen sample using the SET commands.
To set a minimum for SG Spac, use [SG.S]space[3550]space[SET.TST.MIN].
To set a maximum for SG Spac, use [SG.S]space[3650]space[SET.TST.MAX].
Substitute the appropriate characters in the above commands for the parameter being entered
(Check settings with .TST.LIMITS):
For SG PRF, use SG.F; for SG level, use SG.L; for TX eff, use TX.E; for TX Delay, use
TX.D; for TX power, use TX.P; for TX PRF, use TX.F; for TX Spacing, use TX.S.
MODEL 1119 DME
Rev. D December, 2002 6-107
Y Channel
INPUT MIN MAX
SG.SPC xx.xx 35.50 36.50
SG.PRF xxx 90 110
SG.LEVEL xx.xx 00.70 01.30
TX.EFF xx 60 100
TX.DELAY xx.xx 55.80 56.20
TX.POWER xxx 500 1100
TX.PRF xxx 750 2600
TX.SPAC xx.xx 29.80 30.20
6.6.3 Conversion from Y-Channel to X-Channel.- This procedure describes the steps necessary (e.g., due
to site relocation, etc.) to convert a fielded DME from a Y-Channel station into an X-Channel station.
The alignment procedures are arranged to provide a systematic progression through the unit and should be
performed in the order presented. Prior to beginning this procedure it will be necessary to determine the
frequency/channel for the station.
6.6.3.1 RF Generator Assembly (1A8/1A23) Conversion. - The process of converting the RF Generator
Assembly does not differ for Y-Channel to X-Channel; therefore, perform the procedures in paragraph
6.6.2.1.
6.6.3.2 Signal Generator Video CCA (1A10) Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove the Signal Generator Video CCA (1A10) from the cabinet insert.
c. Locate terminals E1 - E2 and remove a the jumper wire between them for X-Channel operation.
Place the Signal Generator Video CCA (1A10) on Extender CCA. Locate switches S3, S2 and S1
and preset them to the following positions: S3-D, S2-A and S1-8.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect frequency counter to 1A10-TP5 and verify Monitor clock frequency of 50-MHZ 5-kHz.
f. With an oscilloscope connected to test point 1A9-TP2, trigger the oscilloscope externally with SG
TRIG from the DME.
MODEL 1119 DME
6-108 Rev. D December, 2002
g. Adjust Intergate Width Adjust potentiometer 1A10R58 to the maximum clockwise position, and
adjust the pulse shape controls for the following pulse parameters:
Rise Time 1A10R65 Pulse Rise Time 1.5 0.2 Fs
Decay Time 1A10R63 Pulse Decay Time 1.5 0.2 Fs
Amp Width 1A10R56 Pulse Width 3.5 0.2 Fs
Since there is interaction between control settings, final adjustment may require repeated adjustment
between two or more controls to obtain the desired shape.
h. Observe the pulses at 1A9-TP2 and verify a spacing of 12.00 .05Fs as measured between the half-
amplitude points on the leading edges of the two pulses. If indication is not correct, adjust switches
1A10S1, 1A10S2, and 1A10S3 to obtain the correct spacing.
i. Connect an oscilloscope probe to 1A11-TP3; volt/div set to 1V, time/div set to 10Fs.
j. Set the MONITOR TEST switch on the Monitor Control Panel Assembly to the up (ON) position.
k. Verify the presence of two interrogation pulses and two monitor reply pulses.
NOTE
In the following steps, DELAY is measured between the half-amplitude
points of the leading edge of the first interrogation pulse and the leading edge
of the first reply pulse. SPACING is measured between the half-amplitude
points of the two reply pulses.
l. Set the variable MONITOR TEST DELAY control for a delay of 50.0Fs 0.05.
m. Set variable MONITOR TEST SPAC control for a spacing of 12.0 Fs 0.05.
n. Return the MONITOR TEST switch on the Monitor Control Panel Assembly to the down
(NORMAL) position.
o. Place the transponder CHASSIS POWER switch to the OFF position.
p. Remove Extender CCA and reinstall Signal Generator Video CCA (1A10).
6.6.3.3 Monitor A CCA (1A11) Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove the screws that are holding the test panel door closed. Add jumper between E1 and E2 on
the Steering Logic (012391-0000) Assembly.

c. Remove the Monitor A CCA (1A11) from the cabinet assembly.
MODEL 1119 DME
Rev. D December, 2002 6-109
d. Refer to Figure 6-6. Insure that terminals E1 - E3 and E4 - E5 are jumpered for 1st pulse timing.
Locate switches S1 thru S6 and preset them to the following positions: S1-A, S2-C, S3-D, S4-8, S5-
A, S6-5.
e. Place the Monitor A CCA (1A11) on Extender CCA and reinstall into cabinet assembly.
f. Place the transponder CHASSIS POWER switch to the ON position.
g. Connect oscilloscope probes for channels 1 and 2 to Delayed Pulses test point 1A11-TP3.
h. Trigger the oscilloscope externally with SG TRIG.
i. Set both oscilloscope channels to DC and set both traces to the same ground reference. Adjust scope
channel amplifier gains so that both are identical. The oscilloscope shall be set to 10 Fs/div.
j. Place the MONITOR TEST switch to the ON position.
k. Move oscilloscope probe No.2 to Peak Rider test point 1A11-TP4. Set the oscilloscope time base
to 2Fs/div.
l. Adjust potentiometer 1A11R35 until the signal at 1A11-TP4 is half the amplitude of the signal at
1A11-TP3.
m. Set the oscilloscope time base to 10Fs/div. Adjust Detected Transmitter Pulse Matching
potentiometer 1A11R4 for reply pulse amplitude of 1 V. (The reply pulse pair is second pair of
pulses displayed.)
n. Adjust Half-Amp Enable Pulse Trigger potentiometer 1A11R36 clockwise until disabled then back
counterclockwise to enable the peak rider signal and set the minimum signal trip point using the 1
V reply pulses as a reference. Refer to Figure 6-7.
o. Connect oscilloscope probe No.2 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5. Verify triggers
occur at the half-amplitude point for each of the pulses at 1A11-TP3.
p. Increase the amplitude of the reply pulses with control potentiometer 1A11R4 to match the
amplitude of the interrogation pair.
q. Connect oscilloscope probe No.2 to 1A11-TP4. Half-Amp Enable Pulse Width potentiometer
1A11R40 is adjusted so the peak rider (TP4) begins to discharged at approximately the same time
that the delayed pulse (TP3) reaches its peak.
r. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to INTRG Inhibit Pulse Pair test point 1A11-TP6.
s. Adjust the Inhibit Pulse Delay potentiometer 1A11R49 fully CW and verify the triggers at 1A11-TP5
are centered in the interrogation inhibit gates at 1A11-TP6.
MODEL 1119 DME
6-110 Rev. D December, 2002
t. Move oscilloscope probe No.2 to 1st INTRG Pulse Enable test point 1A11-TP9.
u. Adjust 1st Enable Pulse Position potentiometer 1A11R94 to center the gate (observed at 1A11-TP9)
around the trigger pulse for the first interrogation pulse (observed at 1A11-TP5). It may be necessary
to set oscilloscope time base to 10Fs/div temporarily to verify the gate is centering on the correct
trigger pulse.
v. Move the oscilloscope probe No.2 to 2nd INTRG Pulse Enable test point 1A11-TP10.
w. Adjust 2nd Enable Pulse Position potentiometer 1A11R98 to center the gate (observed at 1A11-
TP10) around the trigger pulse for the second interrogation pulse (observed at 1A11-TP5). It may
be necessary to set oscilloscope time base to 10Fs/div temporarily to verify the gate is centering on
the correct trigger pulse.
x. Turn the TEST SELECT switch to the S.G. PRF position.
y. Place the SIGNAL GENERATOR PRF switch to the PRF position.
z. Adjust SIGNAL GENERATOR PRF control potentiometer for 1350 10 PPS as displayed on the
LED Display.
aa. Observe the 1350-Hz Tone at test point 1A11-TP7 on the oscilloscope.
ab. Adjust Filter FO potentiometer 1A11R60 for a maximum signal at 1A11-TP7.
ac. Adjust 1350-Hz Output Level Adjust potentiometer 1A11R66 to produce 1 Vpp at pin 15 of
connector 1A11P1.
ad. Set the TEST SELECT switch to the TX DELAY position.
ae. Set the variable MONITOR TEST DELAY control to provide a delay of 50.00Fs 0.05 as indicated
on the LED display.
af. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and oscilloscope
probe No.2 to Efficiency Gate test point 1A11-TP12.
ag. Adjust Efficiency Gate Width Adjust potentiometer 1A11R121 to produce a 5 0.1Fs reply
efficiency gate, as observed at 1A11-TP12.
ah. Set gate position so first reply trigger at 1A11-TP5 lags the leading edge of reply efficiency gate at
1A11-TP12 by 2Fs 0.1Fs. The gate position is determined by the setting of switches 1A11S4,
1A11S5, and 1A11S6.
ai. Move oscilloscope probe No.2 to Delay Gate test point 1A11-TP11.
aj. Adjust Delay Gate Width Adjust potentiometer 1A11R118 fully clockwise.
MODEL 1119 DME
Rev. D December, 2002 6-111
ak. Adjust Delay Gate Position Adjust potentiometer 1A11R116 to center the delay gate at TP11 about
the first reply trigger at 1A11-TP5.
al. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 49.70
(0.05).
am. Adjust Delay Gate Position Adjust potentiometer 1A11R116 until the DLY fault LED on the
Monitor B CCA (1A12) just begins to illuminate.
an. Adjust the variable MONITOR TEST DELAY control until the Test LED display indicates 50.30
(0.05).
ao. Adjust Delay Gate Width Adjust potentiometer 1A11R118 until the DLY fault LED on the Monitor
B CCA (1A12) just begins to illuminate.
ap. Connect Oscilloscope to 1A11-TP3 and adjust the variable MONITOR TEST DELAY control until
the indicated delay between first interrogation and first reply pulses is 49.80 (0.05). Verify DLY
LED remains extinguished.
aq. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 49.50
(0.05). Verify DLY LED is illuminated.
ar. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.20
(0.05). Verify DLY LED remains extinguished.
as. Adjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.50
(0.05). Verify DLY LED is illuminated.
at. Readjust the variable MONITOR TEST DELAY control until the delay on scope indicates 50.00
(0.05).
au. Set the TEST SELECT switch to the TX SPAC position.
av. Verify the variable MONITOR TEST SPAC control is adjusted to provide a spacing of 12.00 Fs
(0.05).
aw. Connect oscilloscope probe No.1 to 0.1 Fs Half-Amp Triggers test point 1A11-TP5 and probe No.2
to Transmitter Pulse Pair Spacing Gate test point 1A11-TP8.
ax. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 fully clockwise.
ay. Adjust 1A11S1, S2, and S3 to center the second reply trigger (TP5) in the accept gate at TP8.
az. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 11.40
(0.05).
MODEL 1119 DME
6-112 Rev. D December, 2002
ba. Adjust 1A11S1, S2, and S3 until the SPC fault LED on the Monitor B CCA (1A12) just begins to
illuminate.
bb. Adjust the variable MONITOR TEST SPAC control until the Test LED display indicates 12.60
(0.05).
bc. Adjust Transmitter Spacing Gate Width Adjust potentiometer 1A11R89 until the SPC fault LED on
the Monitor B CCA (1A12) just begins to illuminate.
bd. Adjust the variable MONITOR TEST SPAC control until the spacing on scope at 1A11-TP3
indicates 11.50 (0.05). Verify SPC LED remains extinguished.
be. Adjust the variable MONITOR TEST SPAC control until spacing on scope indicates 11.00 (0.05).
Verify SPC LED is illuminated.
bf. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 12.50
(0.05). Verify SPC LED remains extinguished.
bg. Adjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 13.00
(0.05). Verify SPC LED is illuminated.
bh. Readjust the variable MONITOR TEST SPAC control until the spacing on scope indicates 12.00
(0.05).
bi. Place the transponder CHASSIS POWER switch to the OFF position.
bj. Place the MONITOR TEST switch to the NORMAL position.
bk. Remove Extender CCA and reinstall Monitor A CCA (1A11) into the cabinet.
NOTE
The Monitor B CCA (1A12) will be aligned in paragraph 6.6.3.10 after the
Transponder section is aligned and running normal.
6.6.3.4 IF Amplifier Assembly (1A24) and Preselector (1A20) Alignment. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove the If Amplifier Assembly (1A24) from the cabinet and install on extender cables.
c. Remove the cover from the left side of the IF Amplifier to allow access to adjustments and test
points located inside the assembly. Locate terminals E21 and E22 and remove the jumper between
them for X-channel operation.
d. Align the Preselector Assembly (1A20) to the station interrogation frequency (the frequency of the
1A8 module) by following the procedures in paragraph 6.4.5.
MODEL 1119 DME
Rev. D December, 2002 6-113
e. Place the transponder CHASSIS POWER switch to the ON position.
f. Preset 1A24R40 and 1A24R50 to the maximum clockwise position.
g. Connect an oscilloscope probe to 1A24-TP12; volt/div set to 1.0V, time/div set to 10Fs. Signal at
1A24-TP12 has a -9V DC offset, adjust vertical position variable control as necessary to get an on-
scope display.
h. While observing oscilloscope display, peak tune the top and bottom cavities of the Preselector
Assembly (1A20) until the two interrogation pulses appear.
i. Peak tune the middle (second) cavity of the Preselector Assembly (1A20) for maximum amplitude
of the pulses at 1A24-TP12 then adjust at least two turns clockwise.
j. Readjust the top cavity for maximum pulse height on the scope and lock the adjustor in place.
k. Adjust the middle cavity for maximum pulse height on the scope and lock in place.
l. Adjust the bottom cavity for maximum pulse height on the scope and lock in place.
NOTE
Do NOT use a metal screwdriver to tune 1A12C5 due to the DC voltage present.
m. Peak tune the First Mixer Assembly (1A21) 63-MHZ Tune capacitor 1A21C5 for maximum
amplitude of the pulses at 1A24-TP12.
n. Adjust 1A24C10 for a peak amplitude of interrogation pulses at 1A24-TP12. Pulses should peak
between 4-5V in amplitude.
o. Connect an oscilloscope probe to second local-oscillator detected output 1A24-TP13. Verify +1
0.2 Vdc is present. If voltage is not within tolerance, adjust 1A24C37 for a voltage peak, and tune
the capacitor 1/8 turn clockwise of the peak response point.
p. Connect an oscilloscope probe to Narrow Band Tuning test point 1A24-TP10. Observe two negative
pulses.
q. Tune 2nd Mixer Tuning inductor 1A24L7 and inductor 1A24L9 for maximum negative pulse
amplitude.
r. Move an oscilloscope probe to ON Channel Gate Trigger test point 1A24-TP8 and observe two
positive square pulses. If pulses are not present, adjust On Channel Gate Trigger potentiometer
1A24R39 clockwise for a stable display on the oscilloscope.
MODEL 1119 DME
6-114 Rev. D December, 2002
NOTE
When properly adjusted, ON channel gate pulses at 1A24-TP8 should be
greater than 5 Fs wide with less than 10 squitter pulses appearing in between
two separate pairs.
s. Set the oscilloscope so that both probes are DC-coupled. Set the voltage scale of both channels to
.5 V/div and set time base to 10 Fs/div. Set the oscilloscope to the alternate mode of operation and
set ground references for both channels to the same level.
t. Connect both oscilloscope probes to Delayed Interrogation test point 1A24-TP5 and use the variable
scope controls to equalize the responses.
u. Move oscilloscope probe No.2 to Peak Rider test point 1A24-TP4.
v. Set the vertical input of both channels to GND. Using the oscilloscope position controls, adjust the
CHAN 2 trace so that it is 0.2 V below the CHAN 1 trace. Set both channels to the AC-coupled
position.
w. Adjust Peak Rider Amplitude potentiometer 1A24R89 to match peak amplitudes of the peak riders
(TP4) with the delayed interrogation (TP5) signal levels.
x. Set both oscilloscope vertical inputs to GND and adjust vertical position controls until both traces
are at the same ground reference.
y. Set oscilloscope coupling to DC and set both vertical inputs to DC.
z. Verify the leading edge crossover point of peak rider pulse 1A24-TP4 is approximately 0.4 V less
than the peak of delayed interrogation signal 1A24-TP5. If necessary, adjust Half Amplitude Adjust
potentiometer 1A24R79.
aa. Connect oscilloscope probe No.2 to Decoder Trigger test point 1A24-TP1. Observe that output
pulses at TP1 are synchronized with the half-amplitude point of the delayed interrogation at TP5.
Adjust oscilloscope amplitude controls if necessary.
ab. Adjust Narrow Pulse Gate potentiometer 1A24R97 for pulse width of 1 Fs 0.1 at 1A24-TP1.
ac. Adjust Short Distance Echo Suppression potentiometer 1A24R103 to set the pulse width of the
negative pulses at TP2 to 5.50Fs 0.1.
ad. Connect oscilloscope probe No. 1 to 1A24-E28 and probe No. 2 to 1A24-E30.
ae. Adjust potentiometer 1A24R94 so the leading edge of the signal from terminal E28 lags the leading
edge of the signal from E30 by 2 Fs.
MODEL 1119 DME
Rev. D December, 2002 6-115
NOTE
Waveform at 1A24-E30 is a negative going pulse; 1A24-E28 is a positive
going pulse.
af. Connect an oscilloscope probe to 1A24-E13. Verify the presence of a 50 2.0Fs negative blanking
pulse.
ag. Place the transponder CHASSIS POWER switch to the OFF position.
ah. Replace the cover on the IF Amplifier and reinstall the If Amplifier Assembly (1A24) in the cabinet.
6.6.3.5 Decoder CCA (1A25) Alignment. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove Decoder CCA (1A25) from the cabinet. Insure E1 component carrier is configured with
a jumper connecting pins 5 and 10. On component carrier E2, solder a jumper from pins 1 to 14, and
insure that it is configured with jumpers connecting pins 4 and 11, 5 and 10.
c. Place the Decoder CCA (1A25) on Extender CCA and reinstall into cabinet assembly.
d. Place the transponder CHASSIS POWER switch to the ON position.
e. Connect oscilloscope probe No.1 to Clock Enable pulse test point 1A25-TP2.
f. Trigger the oscilloscope externally with SG TRIG.
g. Insure Clock Enable pulse (at 1A25-TP2) is 32.0 0.5 Fs.
h. Connect oscilloscope probe No. 1 to Decode Gate test point 1A25-TP3.
i. Insure decode gate width is set for 3.0 0.2Fs. Adjust 1A25R10 as necessary.
j. Place the transponder CHASSIS POWER switch to the OFF position.
k. Remove Extender CCA and reinstall Decoder CCA (1A25).
6.6.3.6 Transmitter Video CCA (1A27) Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Remove Transmitter Video CCA (1A27) from DME cabinet assembly.
c. Verify terminals E1 - E3 on Transmitter Video CCA (1A27) are connected for 1st pulse timing.
Locate switches S2, S4 and S3 and preset them to the following positions: S2-4, S4-A and S3-D.
MODEL 1119 DME
6-116 Rev. D December, 2002
d. Set REPLY DELAY thumbwheel switch S1 to 5000. Place the Transmitter Video CCA (1A27) on
Extender CCA and reinstall into cabinet assembly.
e. Place the transponder CHASSIS POWER switch to the ON position.
f. Connect an oscilloscope probe to Decodes test point 1A27-TP1. Insure negative decode pulse is
present.
g. Move an oscilloscope probe to Encode TRIG test pint 1A27-TP2. Insure encode trigger is present.
h. Place the transponder CONST IDENT/OFF/NORMAL switch to the CONST/IDENT position.
i. Trigger the oscilloscope externally with TX TRIG.
j. Connect an oscilloscope probe to 1350-Hz test point 1A27-TP3. Insure spacing for equalizing pulses
are 100 Fs 5Fs and spacing between ident pulses is 740.7 5.0Fs.
k. Connect CH1 oscilloscope probe to edge connector 1A27P1-33. Adjust Pulse No.1 Width ADJ
potentiometer 1A27R46 for a pulse width of 6.75 .2 Fs.
l. Connect CH2 oscilloscope probe to edge connector 1A27P1-34. Adjust Pulse No.2 Width ADJ
potentiometer 1A27R48 for a pulse width of 6.75 .2 Fs.
m. Set the oscilloscope to add the two channels and verify two gate pulses are present.
n. Adjust 1A27S2, 1A27S3, 1A27S4 for a spacing between the two pulses of 12.00 0.05Fs.
o. Place the transponder CHASSIS POWER switch to the OFF position.
p. Remove Transmitter Video CCA (1A27) from extender CCA and reinstall in DME cabinet
assembly.
6.6.3.7 Power Amplifier Assembly (1A32) Alignment. - Perform the procedures in paragraph 6.4.13.
6.6.3.8 Monitor A CCA (1A11) Search Pulse Alignment. - The process for the Monitor A CCA Search
Pulse Alignment does not differ for Y-Channel to X-Channel; therefore, perform the procedures in paragraph
6.6.2.8.
6.6.3.9 PRF Check. - The process for PRF Check does not differ for Y-Channel to X-Channel; therefore,
perform the procedures in paragraph 6.6.2.9.
MODEL 1119 DME
Rev. D December, 2002 6-117
6.6.3.10 Monitor B CCA (1A12) Half Power Check. - The process for Monitor B CCA Half Power Check
does not differ for Y-Channel to X-Channel; therefore, perform the procedures in paragraph 6.6.2.10.
6.6.3.11 Receiver Sensitivity Check. - The process for Receiver Sensitivity Check does not differ for Y-
Channel to X-Channel; therefore, perform the procedures in paragraph 6.6.2.11.
6.6.3.12 RMM Conversion. -
a. Set system switches to those positions listed in Table 6-9.
b. Place the transponder CHASSIS POWER switch to the ON position. Place the FINAL HV switch
to NORMAL.
c. On the DME terminal interface, logon at the Service level. Enter the test service limits as shown in
the following screen sample using the SET commands.
To set a minimum for SG Spac, use [SG.S]space[1150]space[SET.TST.MIN].
To set a maximum for SG Spac, use [SG.S]space[1250]space[SET.TST.MAX].
Substitute the appropriate characters in the above commands for the parameter being entered
(Check settings with .TST.LIMITS):
For SG PRF, use SG.F; for SG level, use SG.L; for TX eff, use TX.E; for TX Delay, use
TX.D; for TX power, use TX.P; for TX PRF, use TX.F; for TX Spacing, use TX.S.
X Channel
INPUT MIN MAX
SG.SPC xx.xx 11.50 12.50
SG.PRF xxx 90 110
SG.LEVEL xx.xx 00.70 01.30
TX.EFF xx 60 100
TX.DELAY xx.xx 49.80 50.20
TX.POWER xxx 500 1100
TX.PRF xxx 750 2600
TX.SPAC xx.xx 11.80 12.20
MODEL 1119 DME
6-118 Rev. D December, 2002
THIS PAGE INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 7-1
SECTION 7. CORRECTIVE MAINTENANCE
NOTE
Maintenance of the Model 1119 DME is facilitated by the Enhanced RMM Option. If your
Model 1119 is equipped with the Enhanced RMM, please refer to the Enhanced RMM
Operations Manual (Part Number 561119-0002) for automated fault isolation, trend data
collection, and remote certification procedures.
7.1 INTRODUCTION.- This section contains information necessary to troubleshoot and perform corrective
maintenance at the DME site. Repairs to the 1119 DME are limited to module replacement.
7.2 TEST EQUIPMENT REQUIRED.- Table 7-1 contains a list of the test equipment required to maintain
the 1119 DME. Although specific model numbers are listed, equivalent equipment may be used in lieu of
that listed.
Table 7-1. Test Equipment.
Frequency Counter, Sencor FC71
Oscilloscope, Type 2225 (Tektronix)
Multimeter, Digital, Model 77 (Fluke)
Power Meter, Model 432A (Hewlett Packard)
Peak Power Meter, Model 8900C* (Hewlett Packard)
For purposes of economy, a BIRD Thruline Wattmeter and peak detector element may be substituted.
However, be advised that the BIRD Wattmeter will not read the actual peak of a Gaussian Pulse, it typically
reads 1.75 dB low. This equates to an average response to the peak pulse, typically 30-40 Watts less than
the radiated power when the power out is 100 Watts peak. A relative reading may be obtained at the time
of installation, by connecting the DME to a dummy load thru the BIRD. This reading should correspond
to 100 Watts peak, and may be recorded and confirmed as part of the annual inspection.
7.3 ON-SITE CORRECTIVE MAINTENANCE.- Corrective maintenance procedures in this section cover
the DME station. Initial switch settings for corrective maintenance are given in Table 7-2. The corrective
maintenance procedures of Table 7-3 enable the technician to isolate troubles to an individual module.
Figure 7-2 through 7-38 contain test point data. Table 7-4 contains a list of voltages and signals that will
be found on assembly test points. The corrective maintenance procedures are intended only as a guide and
do not give all possible symptoms or all possible causes of trouble. They are to be used in conjunction with
figures and diagrams found in section 11. The first step in corrective maintenance is inspection of the
equipment with the power OFF. Whether or not all or a portion of the trouble may be found in this manner,
it is always good practice to perform visual inspections and basic continuity checks on equipment whose
condition is unknown. The major elements of inspection are:
MODEL 1119 DME
7-2 Rev. D December, 2002
a. Electrical connections. (Cables and plug-in modules).
b. Mechanical joints and linkages, including switches.
c. Wiring condition. Water, heat, or extreme cold can affect internal and external wiring. Look for
frayed, broken, or damaged wiring.
d. Incorrect repairs or recent modifications.
e. Corrosion, broken, burnt, or missing parts.
f. Build up of dirt, moisture, insect or rodent nesting.
After finding and correcting the trouble, perform adjustment procedures. Maintenance records are to be kept
and as much data as possible recorded to assist in future repairs. List abnormal indications and what was
done to correct the fault. Records are to include actual measurements taken before and after the repair to
accumulate a work history. This practice will aid in identifying troubles before they interfere with
equipment operation.
7.3.1 General Troubleshooting Information.-
a. Identify the symptom.
b. List the symptoms that you find or a field technician describes. If someone else describes the
symptoms to you, check the symptoms yourself or have that person demonstrate the symptoms to
make sure the problem is not an operator error.
c. Carefully inspect the suspected assembly. Read the following suggestions before the inspection.
1. Check for signs of excessive heat.
2. Verify that all integrated circuits are firmly seated in their sockets and that there are no bent
pins.
3. Check that printed circuit board edge connectors are clean and fully seated.
4. Check ribbon-cable and CCA edge mounted connectors.
d. Check the power supplies. Power supplies are a very common source of problems. Low voltage or
excessive ripple can cause a good component to appear to be defective.
1. Measure the power supply voltages. Verify that they are within specifications.
2. Using an oscilloscope, ascertain that the power supply outputs are not excessively noisy.
e. Using an oscilloscope, check waveforms of the suspected faulty assembly against those in this
section.
MODEL 1119 DME
Rev. D December, 2002 7-3
f. Verify the clock signals. Using an oscilloscope, check that the clock signals are present and correct.
g. Verify the microprocessor input control signals.
1. Check that input signals, such as CLOCK, RESET, READY, HOLD, INT, etc., are at the
proper level for normal operation. A common problem is that the processor will get stuck
in a wait, hold, reset, or interrupt condition because of some other hardware problem.
2. If one of these signals is at the wrong level, refer to the appropriate schematic, see what is
connected to the input, and track down the problem.
h. Verify the microprocessor output control signals.
1. Check active output signals. The absence of these signals may indicate a bad processor IC.
2. Check whether pulses are present on lower address lines and data lines. On a normal
oscilloscope these pulses will appear random, but this is a quick way to find out whether the
CPU is sending out addresses and whether the data bus is active.
3. Check with an oscilloscope whether the memory decoders are producing chip-select signals.
If a decoder is not producing these signals, it may be defective or may not be enabled.
Table 7-2. Initial Switch Positions for Corrective Maintenance.
Switch Position
Test Unit:
TEST SELECT OFF
Monitor Control Panel:
CALIBRATION ATTENUATOR 20 dBm
SIGNAL GENERATOR PRF NORMAL
SIGNAL GENERATOR SPACING NORMAL
SIGNAL GENERATOR CW NORMAL
SIGNAL GENERATOR FREQ FO
MONITOR TEST NORMAL
DISPLAY NORMAL
Transponder Control Panel:
CHASSIS POWER ON
FINAL HV NORMAL
IDENTIFICATION NORMAL
Power Control Panel:
AC Breaker ON
DC Breaker ON
MODEL 1119 DME
7-4 Rev. D December, 2002
Table 7-3. 1119 DME On-Site Corrective Maintenance.
Symptom Troubleshooting
AC CB lamp off a. Check AC power connections.
DC CB lamp off a. Check DC supply output.
Video Terminal
will not respond a. Using Terminal Setup procedures detailed in paragraphs 3.3.2 or 3.3.2.1 set
baud rate of Video Terminal.
Internal Keying
Fault a. Place initial switch settings to those listed in Table 7-2.
b. Verify jumper J8 on the Keyer CCA (1A26) is in the NORM position.
c. Reinstall the Keyer CCA (1A26) into cabinet assembly.
d. Place the TEST SELECT switch to the IDENT position. Verify audible ident
tone occurs every 40 seconds. If ident is present go to step e. If ident is not
present go to step h.
e. Check TB1 terminal 14 for a LOW signal that goes HIGH when keying is
present. If keying is not present replace the Interface CCA (1A17). If keying
is present go to step f.
f. Check connector P1 pin 33 of the Monitor B CCA (1A12) for MON ID Code
signal. If signal is present replace the Monitor B CCA (1A12). If signal is
not present go to step g.
g. Verify continuity between connector P1 pin 2 and P1 pin 3 on the Keyer CCA
(1A26). If continuity exists troubleshoot the wiring harness. If continuity
does not exist replace the Keyer CCA (1A26).
Internal Keying
h. Check Transmitter Video CCA 1A27-TP4 and verify that keying occurs at 40
second intervals. If keying is present go to step i. If keying is not present
replace the Keyer CCA (1A26).
i. Check Monitor A CCA (1A11) connector P1 pin 24. Verify 1350-Hz ident
tone is present when system keys. If tone is present go to step c. and
troubleshoot the Power Measurement CCA (1A1A3). If tone is not present
replace the Monitor A CCA (1A11).
MODEL 1119 DME
Rev. D December, 2002 7-5
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
External Keying
Fault a. Place initial switch settings to those listed in Table 7-2.
b. Verify external keying is present at 30 second intervals at TB1 terminal 7.
If keying is not present troubleshoot external keying source. If keying is
present go to step c.
c. Verify jumpers on the Keyer CCA (1A26) are in the correct positions. If
jumpers are in the correct position go to step d. If jumpers are not in the
correct positions, place jumpers in the correct positions.
d. Place the TEST SELECT switch to the IDENT position. Verify audible ident
tone occurs every 30 seconds. If ident is present go to step e. If ident is not
present go to step h.
e. Check TB1 terminal 14 for a LOW signal that goes HIGH when keying is
present. If keying is not present replace the Interface CCA (1A17). If keying
is present go to step f.
f. Check connector P1 pin 33 of the Monitor B CCA (1A12) for MON ID Code
signal. If signal is present replace the Monitor B CCA (1A12). If signal is
not present go to step g.
g. Verify continuity between connector P1 pin 2 and P1 pin 3 on the Keyer CCA
(1A26). If continuity exists troubleshoot the wiring harness. If continuity
does not exist replace the Keyer CCA (1A26).
h. Check Transmitter Video CCA 1A27-TP4 and verify that keying occurs at 40
second intervals. If keying is present go to step i. If keying is not present
replace the Keyer CCA (1A26).
i. Check Monitor A CCA (1A11) connector P1 pin 24. Verify 1350-Hz ident
tone is present when system keys. If tone is present go to step c. and
troubleshoot the Power Measurement CCA (1A1A3). If tone is not present
replace the Monitor A CCA (1A11).
MODEL 1119 DME
7-6 Rev. D December, 2002
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
Power Fault a. Place initial switch settings to those listed in Table 7-2.
b. Turn the TEST SELECT switch to the TX PWR position. Verify the
transmitter power reading is within 10% of normal. If reading is not within
10% of normal perform Power Amplifier Assembly (1A32) alignment. If
power fault still exists replace the Power Amplifier Assembly (1A32). If
reading is within 10% of normal go to step c.
c. Verify DET.TX signal at connector P1 pin 35 of the Monitor B CCA (1A12).
If signal is present replace the Monitor B CCA (1A12). If signal is not
present go to step d.
d. Check 1A4-TP1 on the Monitor Detector (1A4). Verify detected transmitter
pulses are present. If pulses are present troubleshoot interconnecting cable
harness. If pulses are not present go to step e.
e. Verify continuity of monitor antenna cable. If continuity exists replace
Monitor Detector (1A4) or troubleshoot DME antenna. If continuity does not
exist troubleshoot monitor antenna cable.
Efficiency Fault a. Place initial switch settings to those listed in Table 7-2.
b. Ensure CALIBRATED ATTENUATOR is set to 20 dBm. If fault still exists
go to step c.
c. Turn the TEST SELECT switch to the % EFF position. Verify LED display
indicates greater than 70%. If display indicates greater than 70% go to step
d. If display indicates less than 70% go to step e.
d. Verify the presence of the INT (E) and REP (E) signals at connector P1 pins
7 and 8 respectively, of the Monitor B CCA (1A12). If both signals are
present replace the Monitor B CCA (1A12). If one or both signals are not
present troubleshoot the wiring harness.
e. Check IF Amplifier Assembly 1A24-TP12 for Log IF pulses. If pulses are
not present go to step f. If pulses are present go to step h.
f. Check for 250 to 275 mW signal from 1A8P1 of RF Generator Assembly
(1A8). If 250 to 275 mW signal is present go to step g. If 250 to 275 mW
signal is not present perform alignment on RF Generator Assembly (1A8).
If efficiency fault still exists replace RF Generator Assembly (1A8).
MODEL 1119 DME
Rev. D December, 2002 7-7
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
Eff Fault (Cont) g. Replace Diode Modulator Assembly (1A9). If fault still exists check the
CALIBRATED ATTENUATOR Assembly (1A3).
h. Check Monitor A CCA (1A11) connector P1 pin 35 for DET TX signal. Set
oscilloscope time base to 10 Fs/div and set voltage base to 1v/div. Set
oscilloscope trigger source to external and connect to SG TRIG output.
Insure stable display as shown in Figure 7-1. If waveform is present replace
the Monitor A CCA (1A11). If waveform is not present replace the IF
Amplifier Assembly (1A24).
Figure 7-1. DET TX Signal.
MODEL 1119 DME
7-8 Rev. D December, 2002
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
PRF Fault a. Place initial switch settings to those listed in Table 7-2.
b. Turn the TEST SELECT switch to the TX PRF position. If the LED Display
indicates greater than 700 go to step c. If LED display indicates less than 700
go to step e.
c. Check for PRF pulses at connector P1 pin 28 on the Monitor B CCA (1A12).
If pulses are present go to step d. If pulses are not present replace the
Monitor A CCA (1A11).
d. Adjust potentiometer 1A12R39 until the PRF LED on the Monitor B CCA
(1A12) extinguishes. If LED will not go out replace the Monitor B CCA
(1A12).
e. Adjust potentiometer 1A25R45 (Decoder CCA) for a reading of greater than
700 as seen on the LED Display. If potentiometer 1A25R45 will not set the
reading to greater than 700 go to step f. If reading does indicate greater than
700, but Monitor B CCA PRF LED remains illuminated go to step c.
f. Perform alignment procedure on the IF Amplifier Assembly (1A24) and
Decoder CCA (1A25). If problem still exists replace the IF Amplifier
Assembly (1A24) and Decoder CCA (1A25).
Spacing Fault a. Place initial switch settings to those listed in Table 7-1.
b. Place the TEST SELECT switch to the TX SPAC position. If LED display
indicates correct spacing go to step c. If LED display window indicates
incorrect spacing go to step d.
c. Check for Not TX Pulse signal at connector P1 pin 32 of the Monitor B
CCA (1A12). If signal is present replace the Monitor B CCA (1A12). If
signal is not present replace the Monitor A CCA (1A11).
d. Check for DET TX pulses at 1A11-TP3. If pulses are correctly spaced (12
0.8 Fs for X-Channel or 30 0.8 Fs for Y-Channel) replace the Monitor A
CCA. If pulses are not correctly spaced go to step e.
e. Adjust Transmitter Video CCA (1A27) switches 1A27S2, S3, and S4 for
correct pulse spacing. If spacing will not adjust replace the Transmitter
Video CCA (1A27).
MODEL 1119 DME
Rev. D December, 2002 7-9
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
Delay Fault a. Place initial switch settings to those listed in Table 7-2.
b. Place the TEST SELECT switch to the DELAY position. If LED display
window indicates correct delay (50 0.5 Fs for X-channel or 56 0.5 Fs for
Y-channel) go to step c. If LED indicates incorrect delay go to step d.
c. Verify presence of Not INT (D) and Not REP (D) signals at connector
P1 pins 10 and 9, respectively of the Monitor B CCA (1A12). If both signals
are present replace the Monitor B CCA (1A12). If one or both signals are
missing replace the Monitor A CCA (1A11).
d. Observe 1A11-TP3 for DET TX pulses. If delay is correct replace the
Monitor A CCA (1A11). If delay is not correct go to step e.
e. Adjust Transmitter Video 1A27S1 for proper system delay. If delay will not
adjust, replace the Transmitter Video CCA (1A27).
Frequency Unlock
Indicator is
Illuminated a. Perform Low Voltage Power Supply performance check as detailed in section
6, paragraph 6.2.3 on the Low Voltage Power Supply CCA for corresponding
RF Generator Assembly. If Low Voltage Power Supply fails performance
check, replace Low Voltage Power Supply. If Low Voltage Power Supply
passes performance check replace corresponding RF Generator Assembly.
Fuse on High
Voltage Power
Supply Blows a. Check output of High Voltage Power Supply Assembly (1A14) as detailed
in section 6, paragraph 6.2.14 If output is correct replace the Power
Amplifier Assembly (1A32). If output is not correct replace High Voltage
Power Supply Assembly (1A14).
Fuse on Low
Voltage Power
Supply Blows a. Replace fuse and switch positions of Low Voltage Power Supplies
(1A13/1A28). Reapply power. If fuse on the same Low Voltage Power
Supply blows replace that Low Voltage Power Supply CCA. If fuse on other
Low Voltage Power Supply blows go to step b.
MODEL 1119 DME
7-10 Rev. D December, 2002
Table 7-3. 1119 DME On-Site Corrective Maintenance (Cont).
Symptom Troubleshooting
Fuse on Low
Voltage Power
Supply Blows
(Cont) b. If fuse on Low Voltage Power Supply CCA (1A13) blows, remove 1A7 (if
installed), 1A8, 1A9, 1A10, 1A11, and 1A12. If fuse on Low Voltage Power
Supply CCA (1A28) blows, remove 1A23, 1A24, 1A25, 1A26, 1A27, and
1A32. Reapply power. If fuse continues to blow replace Low Voltage Power
Supply. If fuse does not blow go to step c.
c. Replace each assembly or CCA one at a time, reapplying power after each
new CCA or Assembly has been inserted. Continue this process until fuse
blows. When fuse blows, replace assembly or CCA that caused fuse to blow.
7.4 OFF-SITE REPAIRS.- This manual has no provision for off-site repairs. Defective modules are to be
returned to the depot or factory. Repair to component level may require an external power source, signal
generating equipment and, in some cases, special analyzers. Module repairs are beyond the scope of this
manual. In all cases where the module or circuits are badly damaged, the module or component is to be
returned to the proper repair facility.
7.5 OVERHAUL, MAINTENANCE, AND REPAIR STANDARDS.- When a performance step results
in an abnormal indication, stop and correct the problem while referring to the standards and tolerances in
Table 4-1.
7.6 PACKING INSTRUCTIONS.- Equipment requiring shipment from the site for repair shall be packaged
and marked. Components sensitive to electrostatic discharge shall be properly marked and packed in
accordance with DOD-STD-1686, Electrostatic Discharge Control Programs for Protection of Electrical and
Electronic Parts.
MODEL 1119 DME
Rev. D December, 2002 7-11
Test point data is recorded for all external test points for a X-Channel DME system. For a Y-Channel DME,
the typical delay is 56Fs, the receive pulse spacing is 36Fs, and the transmit pulse spacing is 30Fs.
Figure 7-2. Waveform 1A24-TP1 Decoder Trigger
1 V/cm Vertical
5 Fs/cm Horizontal
Place the SIGNAL GENERATOR PRF switch to the PRF position to enhance the display. Presence of the
above waveform verifies that the receiver is functioning. The following three IF amplifier waveforms
pertain to the suppression circuits, which are normally not used.
Figure 7-3. Waveform 1A24-TP2 Short Distance Echo Suppression (SDES)
2 V/cm Vertical
5 Fs/cm Horizontal
Place the SIGNAL GENERATOR PRF switch to the PRF position to enhance the display. The short
distance echo suppression is normally not used. In order to observe this gate, it may be necessary to adjust
potentiometer 1A24R103 (SDES duration).
MODEL 1119 DME
7-12 Rev. D December, 2002
Figure 7-4. Waveform 1A24-TP3 Narrow Pulse Inhibit
1 V/cm Vertical
5 Fs/cm Horizontal
This signal is only present hen there are received interrogations which are less than 1 Fs in duration.
Figure 7-5. Waveform 1A24-TP4 Peak Rider
1 V/cm Vertical
2 Fs/cm Horizontal
Adjustment of peak rider amplitude control potentiometer 1A24R89 is accomplished in conjunction with
the adjustment of half-amplitude adjust potentiometer 1A24R79. Refer to section 6, paragraph 6.4.7 if
difficulty is experienced in this area.
MODEL 1119 DME
Rev. D December, 2002 7-13
Figure 7-6. Waveform 1A24-TP5 Delayed Interrogation
1V/cm Vertical
2 Fs/cm Horizontal
This signal is delayed 2.5 Fs from the peak rider signal at 1A24-TP4. Adjustment of potentiometer
1A24R79 was discussed in the previous paragraph.
Figure 7-7. Waveform 1A24-TP4 Peak Rider and 1A24-TP5 Delayed Interrogation
.5 V/cm Vertical
5 Fs/cm Horizontal
This is the proper display for adjustment of the 6 dB if amplifier half-amplitude finder circuitry.
MODEL 1119 DME
7-14 Rev. D December, 2002
Figure 7-8. Waveform 1A24-TP6 Long Distance Echo Suppression (LDES) Gate
1 V/cm Vertical
10 Fs/cm Horizontal
Normally, long distance suppression is not used. In order to observe this gate, potentiometers 1A24R66
(time constant adjust) and 1A24R68 (gate width) must be adjusted. Since the LDES circuit is enabled with
a decoder output signal, the Decoder CCA must be operational before adjustments can be made to the LDES
circuit.
Figure 7-9. Waveform 1A24-TP8 ON-Channel Gate Trigger
1 V/cm Vertical
5 Fs/cm Horizontal
This waveform will be observed as long as the received interrogation is within the bandpass of the receiver.
MODEL 1119 DME
Rev. D December, 2002 7-15
Figure 7-10. Waveform 1A24-TP10 Narrow Band Tuning
0.5 V/cm Vertical
5 Fs/cm Horizontal
This signal is used to determine the quality of adjacent channel rejection characteristics.
Figure 7-11. Waveform 1A24-TP11 Second Mixer
0.2 V/cm Vertical
5 Fs/cm Horizontal
This test point is used to adjust the second mixer and narrow-band filter. Adjustment should be made only
if there is a problem with meeting receiver bandpass specifications. For adjustment procedure, refer to
section 6, paragraph 6.4.7.
MODEL 1119 DME
7-16 Rev. D December, 2002
Figure 7-12. Waveform 1A24-TP12 Log Video
1 V/cm Vertical
5 Fs/cm Horizontal
When the TEST SELECT switch is in the % EFF position, or during normal operation, these log video
pulses will follow the setting of the CALIBRATED ATTENUATOR on the Monitor Control Panel
Assembly. There must be no limiting at any attenuator setting, and the pulses should disappear into the
noise at the maximum attenuator position of 80 dBm. If there is excessive signal at 80 dBm, check for loose
RF cable connections; and insure that all cover screws are in place and tight, especially on RF Generator
(1A8) and Diode Modulator CCA (1A9).
Figure 7-13. Waveform 1A25-TP2 Decoder Clock Enable
1 V/cm Vertical
5 Fs/cm Horizontal
The clock enable pulse is 20 1 Fs long for X-channel and 45 1 Fs long for Y-channel. Adjust
potentiometer 1A25R2, if necessary, on 012380-0000 version CCA. Version 012380-0001 CCA is fixed
in operation, no adjustment can be made.
MODEL 1119 DME
Rev. D December, 2002 7-17
Figure 7-14. Waveform 1A25-TP3 Decode Gate
1 V/cm Vertical
1 Fs/cm Horizontal
A decode gate will be generated for each decoder trigger. If 1st pulse timing is used, the first decoder trigger
at 1A25-TP7 will be centered within the second decode gate. If 2nd pulse timing is used, the second decoder
trigger will be centered within the first decode gate. The decode gate width is controlled by 1A25R10.
Figure 7-15. Waveform 1A25-TP4 Dead Time Gate
1 V/cm Vertical
10 Fs/cm Horizontal
This gate is used to blank decode action and squitter pulses for 60 Fs after a valid decode has occured.
Adjust potentiometer 1A25R14, if necessary, on 012380-0000 version CCA. Version 012380-0001 CCA
is fixed in operation, no adjustment can be made.
MODEL 1119 DME
7-18 Rev. D December, 2002
Figure 7-16. Waveform 1A25-TP5 Squitter Pulses
1 V/cm Vertical
1 Fs/cm Horizontal
Use internal sync on the scope as the squitter pulses are randomly generated.
Figure 7-17. Waveform 1A25-TP6 Decoder Output
1 V/cm Vertical
5 Fs/cm Horizontal
This pulse represents either a decoded DME interrogation, a receiver noise pulse or a squitter pulse.
MODEL 1119 DME
Rev. D December, 2002 7-19
Figure 7-18. Waveform 1A25-TP7 Decoder Trigger
2 V/cm Vertical
5 Fs/cm Horizontal
A very narrow (<0.1 Fs) pulse that represents the half-amplitude measurement point of a received
interrogation or receiver noise pulses.
Figure 7-19. Waveform 1A27-TP1 Decodes
2 V/cm Vertical
5 Fs/cm Horizontal
Input from Decoder CCA. If not present then place 1A25 on extender and troubleshoot.
MODEL 1119 DME
7-20 Rev. D December, 2002
Figure 7-20. Waveform 1A27-TP2 Encode Trigger
1 V/cm Vertical
10 Fs/cm Horizontal
This pulse is delayed in time from the decodes pulse (1A27-TP1) by the delay control action of the
transmitter fideo microprocessor.
Figure 7-21. Waveform 1A27-TP3 1350-Hz
0.1 V/cm Vertical
0.2ms/cm Horizontal
Place the IDENT switch set to the CONST/IDENT position to observe. The first pulse of each group is the
Ident pulse and should be about 740 Fs apart. The second pulse of each group is the equalizer pulse. This
pulse should occur about 100 Fs after each Ident pulse. No adjustments can be made to these pulses.
MODEL 1119 DME
Rev. D December, 2002 7-21
Figure 7-22. Waveform 1A9-TP1 Diode Mod Shaped Pulse Input
0.1 V/cm Vertical
2 Fs/cm Horizontal
Shaped pulse interrogation pair from the Signal Generator Video CCA.
Figure 7-23. Waveform 1A9-TP2 Diode Modulator Detected Interrogation
0.5 V/cm Vertical
2 Fs/cm Horizontal
This test point provides a detected sample of the signal generator interrogation applied to the Transponder.
This detected signal is used in Monitor A and the Test Panel Assembly to establish the "time 0" reference
point for the overall system delay measurement. The signal generator interrogation is injected into the
transponder through Directional Coupler Assembly (1A6). The following waveforms follow the
interrogations through the receiver.
MODEL 1119 DME
7-22 Rev. D December, 2002
Figure 7-24. Waveform 1A10-TP1 Signal Generator Video Start Pulse
2 V/cm Vertical
2 Fs/cm Horizontal
The normal repetition rate is 100 pps adjusted by potentiometer 1A10R6. If the TEST SELECT switch is
in the S.G. SPAC, S.G. LEVEL, % EFF or DELAY position, and the display push button is depressed or
if the transmitter video microprocessor is in search mode, the PRF will be approximately 900 pps. If the
SIGNAL GENERATOR PRF is in the PRF position, the PRF will be adjustable, with the SIGNAL
GENERATOR PRF control, between 20 to 4000 pps.
Figure 7-25. Waveform 1A10-TP2 Delay Enable
2 V/cm Vertical
2 ms/cm Horizontal
This pulse is obtained during normal operation of current DME systems. Early versions of the DME with
the 012682-0001 version of the Monitor B CCA may require the TEST SELECT switch to be in the % EFF
position to display this pulse.
MODEL 1119 DME
Rev. D December, 2002 7-23
Figure 7-26. Waveform 1A10-TP3 Efficiency Enable
2 V/cm Vertical
2 ms/cm Horizontal
This pulse is obtained during normal operation of current DME systems. Early versions of the DME with
the 012682-0001 version of the Monitor B CCA may require the TEST SELECT switch to be in the % EFF
position to display this pulse.
Figure 7-27. Waveform 1A10-TP4 Alternate
2 V/cm Vertical
2 ms/cm Horizontal
This pulse is obtained during normal operation of current DME systems. Early versions of the DME with
the 012682-0001 version of the Monitor B CCA may require the TEST SELECT switch to be in the % EFF
position to display this pulse.
MODEL 1119 DME
7-24 Rev. D December, 2002
Figure 7-28. Waveform 1A10-TP5 50-MHz Clock
0.5 V/cm Vertical
2 ns/cm Horizontal
This output not only drives the Signal Generator Video CCA, but it also is applied to the Test Panel
Assembly, and Monitor A CCA.
Figure 7-29. Waveform 1A10-TP6 Diode Modulator Shaped Pulse
0.5 V/cm Vertical
5 Fs/cm Horizontal
These interrogation pulses are applied to the Diode Modulator, where they will be used to modulate the RF
signal from the RF Generator (1A8). This simulated interrogation pulse pair continually tests the
transponder. Pulse pair spacing is adjusted by hexadecimal switches S1, S2 and S3. When the SIGNAL
GENERATOR CW switch is in the CW position, these pulses will be replaced by a DC level, which can
be adjusted by 1A10R77.
MODEL 1119 DME
Rev. D December, 2002 7-25
Figure 7-30. Waveform 1A11-TP2 Composite Half-Amplitude Input
0.2 V/cm Vertical
10 Fs/cm Horizontal
The first pair of pulses represent the detected interrogation from the Diode Modulator Assembly. The
second pair of pulses represents the transponder reply from Monitor Detector 1A4. The random pulses in
evidence are due to squitter. Toggle the IDENT switch to place the microprocessor in search mode; and stop
it, while in search mode, by switching the IDENT switch to the OFF position. Note that the reply pulses are
replaced by search pulses. Adjust potentiometer 1A11R7 to make the search pulses equal to the
interrogation pulses.
Figure 7-31. Waveform 1A11-TP3 Delayed Pulses
1V/cm Vertical
10 Fs/cm Horizontal
The same information as seen at 1A11-TP2 should be observed except the pulses will be delayed by 2.5 Fs
and amplified.
MODEL 1119 DME
7-26 Rev. D December, 2002
Figure 7-32. Waveform 1A11-TP4 Peak Rider
1V/cm Vertical
2 Fs/cm Horizontal
Adjustment potentiometers 1A11R35, 1A11R36, and 1A11R40, affect this waveform. Refer to section 6,
paragraph 6.4.4.
Figure 7-33. Waveform 1A11-TP3 (CHANNEL 1) DELAYED PULSES
1A11-TP4 (CHANNEL 2) PEAK RIDER
Both channels set for: 1 V/cm Vertical
2 Fs/cm Horizontal
Section 6, paragraph 6.4.4 describes adjustments which affect these waveforms. These waveforms represent
the Monitor A Half Amplitude finder circuit. The point where the small amplitude pulse crosses the leading
edge of the large amplitude pulse should represent the half amplitude point of the delayed pulses.
MODEL 1119 DME
Rev. D December, 2002 7-27
Figure 7-34. Waveform 1A11-TP5 Half-Amplitude Trigger
1 V/cm Vertical
1 Fs/cm Horizontal
Place the SIGNAL GENERATOR PRF switch to the PRF position to enhance the trace. The leading edge
of this trigger will correspond with the crossover point on the previous waveform.
Figure 7-35. Waveform 1A11-TP6 Interrogation Inhibit Pulse Pair
1 V/cm Vertical
5 Fs/cm Horizontal
These Signal Generator sourced pulses are processed within Monitor A and controlled by 1A11R49 to block
interrogation pulses from reaching some circuits within Monitor A, and to prevent detected transmitter
pulses from entering Monitor A when the Signal Generator Interrogation pulse pair is generated.
MODEL 1119 DME
7-28 Rev. D December, 2002
Figure 7-36. Waveform 1A11-TP5 (Channel 1) Half-Amplitude Trigger
1A11-TP9 (Channel 2) First Interrogation Pulse
Channel 1: 1 V/cm Vertical
Channel 2: 2 V/cm Vertical
1 Fs/cm Horizontal
Use the delay time multiplier to verify that the first interrogation pulse trigger is inside the gate at 1A11-TP9.
The position of the gate is adjusted with potentiometer 1A11R94.
Move Channel 2 probe to 1A11-TP10. The waveform will appear identical except that the second
interrogation pulse trigger will be inside the gate. Use the delay time multiplier to position the waveform
on the scope. The position of the gate is adjusted with potentiometer 1A11R96.
MODEL 1119 DME
Rev. D December, 2002 7-29
Figure 7-37. Waveform 1A11-TP5 (Channel 1) Half-Amplitude Trigger
1A11-TP11 (Channel 2) Delay Gate
Channel 1: 1 V/cm Vertical
Channel 2: 2 V/cm Vertical
10 Fs/cm Horizontal
The gate at 1A11-TP11 is positioned under the first transmitter pulse using hexadecimal switches 1A11S4,
1A11S5, and 1A11S6, as well as potentiometer 1A11R116. The gate width is adjusted with potentiometer
1A11R118.
Move the Channel 2 probe to 1A11-TP12 to observe the efficiency gate. The scope pattern will be identical.
Figure 7-38. Waveform 1A11-TP7 1350-Hz Tone
2 V/cm Vertical
1 ms/cm Horizontal
The IDENT switch must be in CONST/IDENT.
MODEL 1119 DME
7-30 Rev. D December, 2002
Table 7-4. Assembly or CCA Signals and Voltage Levels.
Test Point Description
Steering Logic CCA (1A1A4)
TP1 50-MHz 5-kHz at TTL level.
TP2 1-Hz at TTL level.
TP3 55 5 Fs, logic level pulses with TEST SELECT switch in DELAY position.
15 1 Fs, logic level pulses with TEST SELECT switch in S.G.SPAC position (X-
Channel).
40 1Fs, logic level pulses with TEST SELECT switch in S.G.SPAC position (Y-
Channel).
Detector Assembly (1A4/1A5)
TP1 Detected pulse pair, typically +1.5 .5 vp but never distored, spaced 12 1 Fs apart, for X-Channel,
30 1 Fs apart for Y-Channel.
RF Generator Assembly (1A8/1A23)
U2 Pin 3 (C31 positive) +18 .5 Vdc.
Q1 Collector, +7 1 Vdc.
Q2 Collector, +7 1 Vdc.
P1 450 to 475 mW for 1A23.
P1 250 to 275 mW for 1A8.
P2 7 to 10 mW for 1A23.
Q6 Base, +6 .5 Vdc.
Q7 Base, 6.2 to 12.5 Vdc.
C1 Tuning voltage +2 to +11 Vdc.
C2 +15 0.5 Vdc.
C3 +15 0.5 Vdc.
C30 +28 0.5 Vdc.
C33 Detected RF +.2 to +.7 Vdc.
Synthesizer CCA (1A8/1A23A1)
TP1 Positive going, 1.5 .5 Fs TTL level pulses at a 12.5-kHz rate.
TP2 1.25-MHz, TTL level square wave.
TP3 0 to +5 Vdc. Nominal value of +2.5 Vdc.
TP4 +2 to +10 Vdc.
TP5 Ground.
MODEL 1119 DME
Rev. D December, 2002 7-31
Table 7-4. Assembly or CCA Signals and Voltage Levels (Cont).
Test Point Description
Diode Modulator Assembly (1A9)
TP1 -.2 0.05 vp, trapezoid pulse pair.
TP2 +1.5 0.5 vp pulse pair.
Signal Generator Video (1A10)
TP1 3 0.5 Fs negative going pulse.
TP2 50 1-Hz, TTL level square wave.
TP3 50 1-Hz, TTL level square wave.
TP4 50 1-Hz, TTL level square wave.
TP5 50-MHz 5-kHz.
TP6 1 0.5 vp pulse pair.
TP7 Ground
Monitor A CCA (1A11)
TP1 Ground
TP2 Detected interrogations and replies, .4 0.1 vp pulse pairs on a -8 Vdc level.
TP3 Detected interrogations and replies, +2.5 0.5 vp pulse pairs.
TP4 Peak Rider, half the amplitude of signal at TP3.
TP5 .1 to .2 Fs, TTL level triggers.
TP6 -4 vp, 10 0.5 Fs pulse pair.
TP7 1350 10-Hz tone when identity keying is present.
TP8 1 0.2 Fs, positive TTL level gate.
TP9 1.5 0.25 Fs, positive TTL level gate.
TP10 1.5 0.25 Fs, positive TTL level gate.
TP11 1 0.2 Fs, positive TTL level gate.
TP12 5 0.25 Fs, positive TTL gate.
Monitor B CCA (1A12)
C40 (+ side) +10.2 0.2 Vdc.
C41 (+ side) +5.1 0.2 Vdc.
MODEL 1119 DME
7-32 Rev. D December, 2002
Table 7-4. Assembly or CCA Signals and Voltage Levels (Cont).
Test Point Description
Low Voltage Power Supply (1A13/1A28)
TP1 +28 0.5 Vdc.
TP2 +12 0.5 Vdc.
TP3 -12 0.5 Vdc.
TP4 Ground.
TP5 +28 0.5 Vdc.
TP6 +5.2 0.25 Vdc.
High Voltage Power Supply (1A14)
TP1 Ground.
TP2 +50(-0,+2)Vdc.
TP3 +62(-0,+2)Vdc.
CPU CCA (1A15)
Y1 Pin 8, 7.3728-MHz 368-Hz.
DME System Interface CCA (1A16)
U2 2-Hz, TTL level square wave.
Interface CCA (1A17)
U14 Pin 12, +5 .25 Vdc.
U14 Pin 14, Ground.
Control Interface CCA (1A18)
U1D Pin 8, 3.58-MHz 180-Hz.
U16 Pin 3, 10 1-Hz.
IF Amplifier Assembly (1A24)
TP1 Pair of TTL level, 1 Fs triggers, spaced 12 1 Fs apart for X-Channel, or 36 1 Fs apart for Y-
Channel.
TP2 Pair of negative going, 5.5 0.5 Fs pulses, spaced 12 1 Fs apart for X-Channel or 19.0 0.5 Fs
pulses, spaced 36 1 Fs apart for Y-Channel.
MODEL 1119 DME
Rev. D December, 2002 7-33
Table 7-4. Assembly or CCA Signals and Voltage Levels (Cont).
Test Point Description
IF Amplifier Assembly (1A24) (Cont)
TP3 TTL HIGH.
TP4 Pair of TTL level, 4.5 0.5 Fs pulses, spaced 12 1 Fs for X-Channel, or 36 1 Fs for Y-Channel.
TP5 Pair of TTL level, 5.5 0.5 Fs pulses, riding on a +0.5 Vdc level, and spaced 12 1 Fs apart for X-
Channel, or 36 1 Fs apart for Y-Channel.
TP6 0 Vdc when disabled, variable pulse greater than 350 Fs when enabled.
TP7 +4 to +5 Vdc.
TP8 Pair of TTL level, 9 Fs pulses, spaced 12 1 Fs apart for X-Channel, or 36 1 Fs apart for Y-
Channel.
TP9 +12 Vdc (Test).
TP10 Pair of negative going pulses, at -1.8 0.5 vp.
TP11 Pulse pair, +.1 0.05 vp in amplitude.
TP12 Pair of +4 .5 vp, 6 0.5 Fs pulses, riding on a -10 Vdc level, spaced 12 1 Fs apart for X-Channel,
or 36 1 Fs apart for X-Channel.
TP13 +1 .2 Vdc.
Decoder CCA (1A25)
TP1 Ground.
TP2 20 0.5 Fs, positive going pulse at TTL levels for X-Channel.
45 0.5 Fs, positive going pulse at TTL levels for Y-Channel.
TP3 Positive going, TTL level pulse pair, each pulse is 3 0.5Fs wide. Each pulse pair is spaced 12 1
Fs apart for X-Channel, or 36 1 Fs apart for Y-Channel.
TP4 Negative going pulse, 60 2 Fs wide.
TP5 Negative going noise pulses, -4 0.5 vp.
TP6 Positive going pulse, 1 0.2 Fs at TTL level.
TP7 Negative going pulse pair, -4 0.5 vp, .1 Fs wide, 12 1 Fs apart for X-Channel, or 36 1 Fs apart
for Y-Channel.
Keyer CCA (1A26)
TP1 Logic HIGH goes LOW when keying is present.
TP2 Ground.
TP3 50-MHz 5-kHz.
MODEL 1119 DME
7-34 Rev. D December, 2002
Table 7-4. Assembly or CCA Signals and Voltage Levels (Cont).
Test Point Description
Transmitter Video CCA (1A27)
TP1 Negative going decode trigger, 1 0.2 Fs wide, -4 0.5 vp in amplitude.
TP2 Positive going encode trigger, 1 0.2 Fs wide at TTL levels.
TP3 Positive pulse pairs 100 10Fs between pulses, 740 5 Fs between pulse pairs. Present only when
DME is keying.
TP4 Logic HIGH goes LOW when keying is present.
TP5 Ground.
Input Power Monitor (1A29A2)
E3 20 Fs trigger at a 2.6-Hz rate at TTL levels.
E4 25 ms pulses at 8-Hz rate at TTL levels.
+28 Vdc Power Supply Assembly (1A30)
+DC +28 0.5 Vdc.
Power Amplifier Assembly (1A32)
TP1 -.5 .5Vdc.
TP2 Negative going gate, .8.2 s at TTL level.
TP4 Alternates between the 0 and 100% point of waveform at TP5 with RUN/TEST switch in the TEST
position.
TP5 Detected pulse, +2.5 .5vp, 3.5 .5 s wide.
TP6 +7.5 .5Vdc.
R19 Junction E10/R19, +50vp pulse pair.
MODEL 1119 DME
Rev. D December, 2002 8-1
SECTION 8. PARTS LIST
8.1 INTRODUCTION.- Table 8-1 contains a list of the different variations of the Model 1119 DME. Table
8-2 contains a parts list of the assemblies and printed circuit cards used in the Single Model 1119 DME.
Table 8-3 contains a parts list of the assemblies and printed circuit cards used in the Dual Model 1119 DME.
Table 8-4 contains a list of the kits and optional equipment used in the Model 1119 DME. Detailed Parts
Lists are available through the electronic version of this manual.
Table 8-1. Model 1119 DME (Single and Dual)
Part Number Description
001119-0101 DME Assembly Single Equipment Single Monitor, w/RMM
001119-0102 DME Assembly Dual Equipment Single Monitor, w/Tfr Unit
001119-0104 DME Assembly Single Equipment Dual Monitor, w/RMM
001119-0105 DME Assembly Dual Equipment Dual Monitor, w/RMM & Tfr. Unit
Table 8-2. Single 1119 DME Parts List
Part Number Description Ref Des
030213-0000 Test Panel Assembly 1A1
012390-0000 Display CCA 1A1A1
012398-0000 Time Interval CCA 1A1A2
012400-0000 Power Measurement CCA 1A1A3
012391-0000 Steering Logic CCA 1A1A4
012537-0006 Backplane CCA
030224-0000 Monitor Control Assembly 1A2
030211-0000 Calibration Attenuator Assembly 1A3
030204-0001 Detector Assembly 1A4/1A5
012378-0001 Detector CCA 1A4A1/1A5A1
030026-0003 Directional Coupler Assembly 1A6
030748-0001 Secondary Line Assembly 1A6A1
030207-0002 RF Generator Assembly 1A8
012036-0001 Synthesizer CCA 1A8A1
030215-0001 Diode Modulator Assembly 1A9
012393-0000 Modulator Driver CCA 1A9A1
012394-0000 Signal Generator Video CCA 1A10
012668-0001 Monitor A CCA 1A11
012001-0001 or Monitor B CCA (Single Monitor) 1A12
012019-0001 Monitor B CCA (Dual Monitor) 1A12
012670-0002 Low Voltage Power Supply CCA 1A13/1A28
030418-0001 Power Supply Assembly 1A14
012654-0001 High Voltage Power Supply CCA 1A14A1
012775-1001 Microprocessor CCA w/Software 1A15
MODEL 1119 DME
8-2 Rev. D December, 2002
Table 8-2. Single 1119 DME Parts List (cont.)
Part Number Description Ref Des
012775-0001 Microprocessor CCA 1A15A1
012740-1001 DME System Interface CCA 1A16 (optional)
012573-0003 Interface CCA 1A17
030654-0001 DME Control Assembly 1A18 (optional)
012004-1001 DME Control Interface CCA 1A18A1 (optional)
030225-0002 Transponder Control Assembly 1A19
030206-0003 Preselector Assembly 1A20
030205-0000 First Mixer Assembly 1A21
012379-0000 First Mixer CCA 1A21A1
030207-0001 RF Generator Assembly 1A23
012036-0001 Synthesizer CCA 1A23A1
030210-0000 Module Assembly 1A24
012387-0000 IF Amplifier CCA 1A24A1
012380-0001 Decoder CCA 1A25
012735-0001 Keyer CCA 1A26
012629-0002 Transmitter Video CCA 1A27
030218-0002 Power Panel Assembly 1A29
012547-0001 Voltage & Scaling CCA 1A29A1
012406-0004 Input Power Monitor CCA 1A29A2
950572-0001 Power Supply 28V 1A30
030347-0001 ILS Current Limiter Assembly 1A31
030312-0001 Power Amplifier Module Assembly 1A32
030435-0001 Fan Assembly 1A33
030676-0001 Connector Panel Assembly 1A34
012021-0001 Connector Panel CCA 1A34A1
950086-0000 RF Circulator
Table 8-3. Dual 1119 DME Parts List
Part Number Description Ref Des
030213-0000 Test Panel Assembly 1A1
012390-0000 Display CCA 1A1A1
012398-0000 Time Interval CCA 1A1A2
012400-0000 Power Measurement CCA 1A1A3
012391-0000 Steering Logic CCA 1A1A4
012537-0006 Backplane CCA
030224-0000 Monitor Control Assembly 1A2
030211-0000 Calibration Attenuator Assembly 1A3
030204-0001 Detector Assembly 1A4/1A5
012378-0001 Detector CCA 1A4A1/1A5A1
030026-0003 Directional Coupler Assembly 1A6
MODEL 1119 DME
Rev. D December, 2002 8-3
Table 8-3. Dual 1119 DME Parts List (cont.)
Part Number Description Ref Des
030748-0001 Secondary Line Assembly 1A6A1
030345-0002 Monitor Transfer Assembly 1A7
012589-0002 Transfer Logic CCA 1A7A1
030207-0002 RF Generator Assembly 1A8
012036-0001 Synthesizer CCA 1A8A1
030215-0001 Diode Modulator Assembly 1A9
012393-0000 Modulator Driver CCA 1A9A1
012394-0000 Signal Generator Video CCA 1A10
012668-0001 Monitor A CCA 1A11
012001-0001 or Monitor B CCA (Single Monitor) 1A12
012019-0001 Monitor B CCA (Dual Monitor) 1A12
012670-0002 Low Voltage Power Supply CCA 1A13/1A28
030418-0001 Power Supply Assembly 1A14
012654-0001 High Voltage Power Supply CCA 1A14A1
012775-1001 Microprocessor CCA w/Software 1A15
012775-0001 Microprocessor CCA 1A15A1
012740-1001 DME System Interface CCA 1A16 (optional)
012573-0003 Interface CCA 1A17
030654-0001 DME Control Assembly 1A18 (optional)
012004-1001 DME Control Interface CCA 1A18A1 (optional)
030225-0002 Transponder Control Assembly 1A19
030206-0003 Preselector Assembly 1A20
030205-0000 First Mixer Assembly 1A21
012379-0000 First Mixer CCA 1A21A1
030207-0001 RF Generator Assembly 1A23
012036-0001 Synthesizer CCA 1A23A1
030210-0000 Module Assembly 1A24
012387-0000 IF Amplifier CCA 1A24A1
012380-0001 Decoder CCA 1A25
012735-0001 Keyer CCA 1A26
012629-0002 Transmitter Video CCA 1A27
030218-0002 Power Panel Assembly 1A29
012547-0001 Voltage & Scaling CCA 1A29A1
012406-0004 Input Power Monitor CCA 1A29A2
950572-0001 Power Supply 28V 1A30
030347-0001 ILS Current Limiter Assembly 1A31
030312-0001 Power Amplifier Module Assembly 1A32
950086-0000 RF Circulator
030435-0001 Fan Assembly 1A33
030676-0001 Connector Panel Assembly 1A34
012021-0001 Connector Panel CCA 1A34A1
MODEL 1119 DME
8-4 Rev. D December, 2002
Table 8-4. Model 1119 DME Kits and Optional Equipment
Part Number Description
001125-0101 DME Remote Status Receiver Assy 110V
001125-0102 DME Remote Status Receiver Assy 220V
030341-0002 Communication Control Unit Assy w/Installation Kit
470026-0004 Accessory Kit Single Station DME
470026-0005 Accessory Kit Dual Station DME
470040-0001 Installation Kit 1125 DME Monitor Receiver
470074-0000 Computer Kit w/Modem 110V
470074-0002 Computer Kit w/o Modem 110V
470074-0004 Computer Kit 240V/50Hz
470074-0005 Computer Kit 110V/60Hz
470074-0007 Computer Kit w/Modem 230V
470074-0008 Computer Kit w/o Modem 230V
470077-0003 Test Equipment Kit DME
470077-0005 Test Equipment Kit DME
470085-0001 Antenna Kit 510a Omni Dir w/o Tower, 115V
470085-0002 Antenna Kit 510a Omni Dir w/Tower, 115V
470085-0003 Antenna Kit 510a Omni Dir w/o Tower, 230V
470085-0004 Antenna Kit 510a Omni Dir w/Tower, 230V
470085-0005 Antenna Kit 5100A Omni Dir w/o Tower, 115V
470085-0006 Antenna Kit 5100A Omni Dir w/Tower, 115V
470085-0007 Antenna Kit 5100A Omni Dir w/o Tower, 230V
470085-0008 Antenna Kit 5100A Omni Dir w/Tower, 230V
470100-0001 Cabinet Interconnect Kit Dual, 1118/1119
470159-0001 Remote Maintenance System Kit w/Terminal, 110v/60Hz
470159-0002 Remote Maintenance System Kit w/Terminal, 240V/50Hz
470191-0001 Interface Kit 1138 RSCU Dual DME
470213-0001 Interface Kit 1138 RSCU Single DME
470222-0001 Interface Harness Kit VOR/DME
470252-0002 Civil Installation Kit 45G Rohn Tower
470288-0001 Equipment Cabinet Mounting Kit
470410-0001 Computer Kit Dual ERMM w/Battery Backup, 120V
470410-0002 Computer Kit Single ERMM w/Battery Backup, 120V
470410-0003 Computer Kit Dual ERMM w/Battery Backup, 240V
470410-0004 Computer Kit Single ERMM w/Battery Backup, 240V
470483-0001 Battery Backup Kit LOC/GS/DME/MB Single
470483-0002 Battery Backup Kit LOC/GS/DME/MB Dual
470488-0001 Interface Kit 2138 RCSU Single DME, Factory Installed
470488-0002 Interface Kit 2138 RCSU Dual DME, Factory Installed
480011-0001 Spares Kit Minimum 1119 DME
480011-0002 Spares Kit Full,Single 1119 DME
480011-0003 Spares Kit Full,Dual 1119 DME
480011-0004 Spares Kit Recommended,Single 1119 DME
MODEL 1119 DME
Rev. D December, 2002 8-5
Table 8-4. Model 1119 DME Kits and Optional Equipment (cont.)
Part Number Description
480011-0005 Spares Kit Recommended,Dual 1119 DME
480014-0001 Spares Kit Components 1119 DME
480036-0001 Spares Kit Recommended RSCU Interface
480082-0001 Spares Kit Components RSCU Iterface
480118-0001 Spares Kit Min,Single/Dual w/Dual Monitor
480119-0001 Spares Kit Recommended Single/Dual Monitor
480119-0002 Spares Kit Recommended Dual/Dual Monitor
480120-0001 Spares Kit Full Single/Dual Monitor
480120-0002 Spares Kit Full Dual/Dual Monitor
MODEL 1119 DME
8-6 Rev. D December, 2002
THIS SHEET IS INTENTIONALLY BLANK
MODEL 1119 DME
Rev. D December, 2002 9-1
SECTION 9. INSTALLATION, INTEGRATION AND CHECKOUT
9.1 INTRODUCTION.- This section contains installation data for the independently-located DME. If the
DME is to be collocated with VOR or ILS, refer to the basic instructions in this section and to the
installation instructions for the VOR or ILS equipment. With respect to general requirements, a good VOR
or ILS installation satisfies the requirements of DME also. System performance must be verified by a flight
inspection closely duplicating all approach procedures a pilot may use in actual air navigation flight paths.
This is normally done by the government agency having cognizance over the airspace in which the facility
is installed. Figure 9-1 shows a typical 1119 DME site.
NOTE
After flight inspections and prior to use by pilots, it is mandatory that the monitor be left
in control of the facility.
9.2 SITE INFORMATION.-
9.2.1 Site Selection.- The signal radiated from the DME is affected by obstructions and terrain in the
immediate vicinity of the antenna and by obstructions and terrain within the service range of the station.
An ideal site would be the highest ground in the vicinity with level terrain, cleared of all objects for a radius
of at least 3000 feet (915 meters), and with no obstructions extending above the horizontal plane of the
antenna within the service range of the station. In most localities, it is not possible to satisfy the ideal site
requirements. Every effort must be made to obtain the best site available. Although no absolute minimum
requirements can be stated, a site is normally acceptable if it meets the recommendations contained in the
following paragraphs.
9.2.1.1 Terrain Features.- The terrain should be level within a radius of 200 feet (61 meters). In a radius
between 200 and 1000 feet (61 and 305 meters), a downward slope is acceptable if (1) the rate of descent
is not more than 4 feet in 100 feet (1.22 meters in 30.5 meters) and (2) contour lines are generally circular
around the site. Beyond a radius of 1000 feet (305 meters), terrain should be below the horizontal plane of
the antenna.
9.2.1.2 Obstructions.- There should be no structures within 750 feet (229 meters) of the antenna. Metallic
structures should not subtend vertical angles greater than 1.2 degrees as measured from the antenna.
Wooden structures with negligible metal content should not subtend vertical angles greater than 2.5 degrees
as measured from the antenna. Structures having considerable length (such as aircraft hangers or
administration buildings) should be situated lengthwise on a radial from the antenna. Single trees less than
35 feet (11 meters) high may be tolerated beyond 750 feet. No group of trees or groves may be within 1000
feet. No overhead power or control lines are permissible within 750 feet of the antenna.
MODEL 1119 DME
9-2 Rev. D December, 2002
Figure 9-1. Typical DME Site.
MODEL 1119 DME
Rev. D December, 2002 9-3
9.2.2 Shelter Requirements.- A shelter may be provided for the use of the DME applications in association
with ILS or VOR. The location depends primarily on the maximum cable run allowed and on the desired
location for the DME antenna. An RF transmission line of " foamflex cable (with Type N connectors at
each end), one cable for the monitor antenna made up of 1/4" foamflex (with a Type N connector at one end
and a TNC male connector at the opposite end), and one AC cable for the OB Lite are supplied with the
DME equipment. These cables are 35 feet long. When the requirements exceed 35 feet, company
engineering personnel can provide the necessary planning to determine the requirements.
The 1119 DME ground equipment is designed to operate continuously and unattended, but space must be
allocated for maintenance personnel and their equipment. The door, which covers most of the equipment,
is key-lockable to prevent access by unauthorized personnel. The Test Panel Assembly LED Display above
the door allows non-technical personnel to take periodic readings. Any maintenance or adjustment,
however, must be done by competent technical personnel.
9.3 UNPACKING AND REPACKING.- The DME electronic subsystem is shipped unassembled. Only
general precautions can be given because the crating and unpacking depends upon destination and what
optional equipment is included. Most items are packed separately in individual containers; these are then
grouped for crating. Each crate contains a packing list which details what equipment is enclosed in the crate.
Unpack the equipment and visually inspect each item for accuracy and damage, but DO NOT REMOVE
any ESD protective wrapping. Report damage immediately. After inspection, repack each item to prevent
damage. During installation, unpack items as they are needed.
9.3.1 Environmental Considerations.- The environmental conditions must not exceed those listed in the
Specifications of Table 1-1.
9.4 INPUT REQUIREMENT SUMMARY.- The requirements for input power must not exceed those listed
in the Specification of Table 1-1.
9.5 INSTALLATION PROCEDURES.-
9.5.1 Installation Tools and Test Equipment.- Refer to Table 7-1 for a list of test equipment and Table 9-1
for a list of special tools required for installation.
9.5.2 Installation Kits.- Refer to Table 9-2 for all component or modification kits required to install the
1119 DME station.
MODEL 1119 DME
9-4 Rev. D December, 2002
Table 9-1. Special Tools Required for Installation.
Description
Tube Cutter
File
Knife
2-1/4" Hole Saw
Assorted Screw Drivers and Wrenches
Thread Tape
Table 9-2. Component or Modification Kits Required to Install the 1119 DME.
Part Number Description
470085-0001 115 V DME Antenna Kit.
470085-0002 115 V DME Antenna Kit with Tower.
470085-0003 230 V DME Antenna Kit.
470085-0004 230 V DME Antenna Kit with Tower.
470288-0001 DME Shelter Mounting Kit.
470483-0001 Single DME Battery Backup Kit.
470483-0002 Dual DME Battery Backup Kit
470026-0004 Single DME Accessory kit
470026-0005 Dual DME Accessory Kit
470100-0001 Cabinet Interconnect Kit (Dual only)
Table 9-3. Additional kits required to Install Shelter and Tower Grounding Systems.
Part Number Description
470252-0002 Civil Install Kit, 45G Rohn Tower
470225-0001 Civil Install Kit, Shelter
9.5.3 Shelter Foundation Installation.- For shelters not supplied by Alenia Marconi Systems (ASI) Inc., the
manufacturer of the shelter will supply drawings for the siting engineer.
9.5.4 Shelter Installation.-
a. Using a crane and four nylon slings (20 feet long), position the equipment shelter on the four
concrete piers.
b. Attach the shelter to the pier anchor bolts using appropriate hardware.
NOTE
All items attached directly to the shelter interior or exterior walls are affixed using either 1-
1/4" x 1/4" lag screws or plus nuts. Silicon (Part No. 900065-0000) seal must be used
around each screw to provide a weather tight seal.
MODEL 1119 DME
Rev. D December, 2002 9-5
9.5.5 Tower Foundation and Tower Installation.- An optional triangular steel tower is available for use as
an antenna support. Figure 9-2 shows the installation details for this tower. Figure 9-3 illustrates the
triangular tower adapter plate required to mount the antenna to the DME tower.
9.5.6 Shelter and Tower Installation Grounding Diagram.- Install ground rods and ground wire as detailed
in Figures 9-2 and 9-4.
9.5.7 Air Conditioner Installation.- If a wall mounted air conditioner is supplied install the air conditioner
in the wall opening and secure it in place using bracket supplied. Apply silicon seal around air conditioner
and wall opening to maintain a weather tight seal.
9.5.8 DME Transmitter Cabinet Installation.- Refer to Figure 9-5. Attach unistrut to shelter wall and attach
DME transmitter cabinet to unistrut using appropriate hardware. Figure 9-6 shows a typical single DME
transmitter to shelter wall installation and Figure 9-7 shows a typical dual DME transmitter to shelter wall
installation. Figure 9-8 shows a typical single DME transmitter installation and Figure 9-9 shows a typical
dual DME transmitter installation.
9.5.9 Battery Backup Assembly Installation.-
a. Install battery backup unit as detailed in the drawing provided with the kit.
b. Install the two batteries and connect batteries in series using #14 stranded copper wire.
c. Insure 1119 DME system AC and DC circuit breakers are in the OFF position.
d. Remove and save the four screws securing the Power Control Panel Assembly (1A29). Carefully
lift Power Control Panel Assembly away from DME cabinet to expose AC power and battery
terminal blocks.
CAUTION
Do not allow Power Control Panel Assembly (1A29) to be suspended by power supply
electrical harness.
e. Install battery backup wiring between the DME transmitter cabinet and the battery backup assembly
by connecting the positive terminal (wire) to TB3-2 and the negative terminal (wire) to TB3-1. Refer
to Figure 9-10.
MODEL 1119 DME
9-6 Rev. D December, 2002
9.5.10 Primary AC Power Installation.- Connect primary AC power to DME as shown in Figure 9-10.
Insure that Shelter Primary Power circuit breakers and DME system AC and DC circuit breakers are in the
OFF position.
a. Remove and save the four screws securing the Power Control Panel Assembly (1A29). Carefully
lift Power Control Panel Assembly away from DME cabinet to expose AC power and battery
terminal blocks.
NOTE
The 1119 DME is now shipped with an auto-ranging +28 Vdc Power Supply (1A30)
that does not require configuration for AC voltages between 90 and 264Vac; however,
older models use factory-jumpered supplies that must be configured for proper AC
operation, in accordance with site plan data.
b. Determine factory-jumpered AC input power requirement by locating factory status test report.
c. Prepare +28 Vdc Power Supply for proper AC operation as follows:
(1) From the underside of the DME cabinet, remove and save the four screws holding the +28
Vdc Power Supply (1A30) in place.
(2) Remove and tag each power supply electrical interface cable lead.
(3) Remove +28 Vdc Power Supply and place on clean, stable work surface.
(4) Position +28 Volt Power Supply with AC terminal block to the technician's right.
(5) Verify the presence of AC Input Jumper. If the jumper is present, Power Supply (1A30) is
configured for 120 Vac operation. If the jumper is not present, Power Supply (1A30) is
configured for 240 Vac operation.
d. If necessary, configure Power Supply (1A30) for correct input voltage.
MODEL 1119 DME
Rev. D December, 2002 9-7
Figure 9-2. Typical DME Tower Installation Diagram.
MODEL 1119 DME
9-8 Rev. D December, 2002
Figure 9-3. Triangular Tower Adapter Plate.
MODEL 1119 DME
Rev. D December, 2002 9-9
e. Install system +28 Vdc Power Supply (1A30) into DME cabinet bottom.
f. Reinstall previously tagged power supply electrical interface leads to +28 Vdc Power Supply (1A30).
g. DME system power cord, supplied with DME, is no. 14 AWG stranded copper wire, six foot long.
Fabricate system power cord in accordance with National Electrical Code (NEC).
h. Connect AC-HIGH (black wire) to AC LINE terminal.
i. Connect AC-NEUTRAL (white wire) to AC NEU terminal.
j. Connect AC-GND (green wire) to AC GND terminal.
9.5.11 DME/ILS Collocation Keying Installation.- The Model 1119 DME has a built-in Keyer CCA. An
external keyer, that from a collocated ILS, may be connected to the 1119 via DME terminal boards TB1-7
and TB1-8. As long as the external keying data is present, the Keyer CCA (1A26) will remain deactivated.
The external keying loop must have DC resistance of less than 125 ohms with the 012735 Keyer CCA (500
ohms with the older version 012381-0001 Keyer CCA). If the loop resistance is greater than specified, an
optional DME Keying Interface Kit (470301 series) may be used As long as the external keying data is
present, the Keyer CCA (1A26) will remain deactivated and allow the external keying source to key the
DME. The Keyer CCA (1A26) is set by the factory to independently key the DME when no external keying
signal is detected. In this mode of operation, jumper J7 is in the INTERNAL position and J8 is in the
NORM position.
For collocation with a Localizer, the Keyer CCA (1A26) may be set so that the DME operation is slaved to
the Localizer. When the Localizer keying is absent, the DME will shutdown. When the Localizer keying
is restored, the DME will restart. Refer to Figure 11-33. To select this mode of operation, place jumper J7
to the RESTART position and place jumper J8 in the TRIG position. To prevent the DME from attempting
to restart after the Localizer keying is lost, the number of restart attempts must be set to 0. To change this
setting, refer to paragraph 3.6.4.10.
The 1119 DME has the capability to operate with edge triggered keyers provided by Cardion. The leading
edge of the keying signal triggers the keyer and the Keyer CCA then provides the DME keying signals. To
select this mode, place jumpers J2, J3, J4, and J8 in the TRIG position. The DME Keyer CCA is shipped
with the jumpers placed in the NORM position.
The 1119 DME has the capability to operate with negative (keying when the input signal is high) keyers
provided by other equipment manufacturers. To select this mode, place jumpers J1 and J6 to the INV
position.
The 1119 DME has the capability to generate the letter "I" to precede all of the Morse Code letters. To
select this mode, place jumper J5 to the ILS position.
MODEL 1119 DME
9-10 Rev. D December, 2002
Figure 9-4. Typical DME Shelter and Tower Grounding Diagram.
MODEL 1119 DME
Rev. D December, 2002 9-11
Figure 9-5. Typical Unistrut Layout for Interior Shelter Wall.
MODEL 1119 DME
9-12 Rev. D December, 2002
Figure 9-6. Typical Single DME Transmitter to Shelter Wall Installation.
9.5.12 Triangular Tower Adapter Plate Installation.- Refer to Figures 9-2 and 9-3.
a. Install Triangular Tower Adapter Plate on top of tower and secure with appropriate hardware.
9.5.13 Shelter to Tower Conduit Connections.-
a. Using a 2-1/4" hole saw, cut a 2-1/4" hole in the center of the wall in which the DME transmitters
are attached.
b. Refer to Figure 9-12. Slide 2" x 5" threaded conduit into hole. Install reducing washer and 2"
locknut on each end of threaded conduit. Tighten locknut.
MODEL 1119 DME
Rev. D December, 2002 9-13
c. Install protective bushing on exposed threaded conduit threads of interior shelter wall. Install 2"
PVC female adapter on threaded conduit of outer shelter wall.
d. Refer to Figure 9-13. Cut 2" PVC appropriate length to center of tower directly under antenna.
e. Install 2" PVC hole adapter in bottom of triangular tower adapter plate. Install reducing washer and
2" locknut onto hole adapter. Install protective bushing over exposed threads.
f. Cut 2" PVC appropriate length to extend from triangular tower adapter plate to 2" PVC from shelter.
Insure that 2" PVC from triangular tower adapter plate is cut so that PVC from shelter slopes slightly
downward as it runs to tower.
g. Install 2", 90 degree PVC connector and 2" conduit adapters between the two pieces of 2" PVC and
insure that all pieces fit. Drill a 1/8" hole in the bottom of 2" 90 degree PVC connector. This will
allow any water seepage to drain. Prefit all pieces to insure proper fit.
9.5.14 Obstruction Light Installation.- The obstruction light assembly is shipped separately from the DME
antenna and it is necessary to attach the obstruction light to the top of the DME antenna; and the wiring that
extends from the antenna must be connected to the bulb sockets. Figure 9-14 shows the assembly details.
NOTE
The mounting hole on the top of the DME antenna is threaded for a 3/4" pipe thread. There
are two versions of obstruction light assemblies available: one is threaded for a 3/4" pipe
thread; the other is threaded for a 1" pipe thread. For the 3/4" pipe version, a 1" to 3/4"
reducer and a 3/4" by 1-1/2" nipple stainless steel combination should be used.
a. Remove lens and bulbs.
b. Route the three wire AC cable from the DME antenna through the required pipe adapters and into
the bulb sockets.
MODEL 1119 DME
9-14 Rev. D December, 2002
Figure 9-7. Typical Dual DME Transmitter to Shelter Wall Installation.
MODEL 1119 DME
Rev. D December, 2002 9-15
Figure 9-8. Typical Single DME Transmitter Cabinet Installation.
MODEL 1119 DME
9-16 Rev. D December, 2002
Figure 9-9. Typical Dual DME Transmitter Cabinet Installation.
MODEL 1119 DME
Rev. D December, 2002 9-17
Figure 9-10. Cabinet Interface Connections.
c. Thread the obstruction light assembly into the antenna. Use thread tape on all pipe threads to insure
a water tight fit.
d. Connect the three wire AC cable from the antenna to the bulb sockets, as shown in Figure 9-11A &
9-11B.
e. Use a silicon rubber sealant or caulking compound to weatherproof the adapter connections.
9.5.15 Obstruction Light Power Cable Connections.- Connect obstruction light power cable to shelter
circuit breaker box as shown in Figures 9-11A and 9-11B.
9.5.16 DME Antenna Installation.- Install DME antenna on Triangular Tower Adapter Plate. Secure
antenna with appropriate hardware.
MODEL 1119 DME
9-18 Rev. D December, 2002
Figure 9-11A. DME Obstruction Light 120 Vac Interconnect Diagram.
Figure 9-11B. DME Obstruction Light 240 Vac Interconnect Diagram.
(International Use Only)
MODEL 1119 DME
Rev. D December, 2002 9-19
Figure 9-12. Typical Threaded Conduit Installation.
9.5.17 1119 DME Transmitter to Antenna Interconnect.- There are two version of the 1119 DME
Transmitter to Antenna Interconnect procedure. Paragraph 9.5.17.1 details the procedure for connecting a
single 1119 DME transmitter to the antenna. Paragraph 9.5.17.2 details the procedure for interconnecting
dual 1119 DME transmitters to the antenna.
MODEL 1119 DME
9-20 Rev. D December, 2002
Figure 9-13. Typical Shelter to Tower Conduit Installation.
MODEL 1119 DME
Rev. D December, 2002 9-21
Figure 9-14. Obstruction Light Installation Diagram.
MODEL 1119 DME
9-22 Rev. D December, 2002
9.5.17.1 Single 1119 DME Transmitter to Antenna Interconnect.- Refer to Figure 11-1.
a. Route RF feedcable through conduit and connect to antenna connector J1.
b. Route antenna monitor cable through conduit and connect to antenna connector J2
c. Route obstruction light power cable through conduit and to antenna connector J4.
d. Connect RF feedcable to DME transmitter connector J2.
e. Connect antenna monitor cable to DME transmitter connector J1.
f. Place obstruction light circuit breaker to the ON position. Verify obstruction lights illuminate.
9.5.17.2 Dual DME Interconnection (Dual Systems Only use 470100-0001 kit).- Refer to Figure 11-2.
a. Route RF feedcable through conduit and connect to antenna connector J1.
b. Route antenna monitor cable through conduit and connect to antenna connector J2.
c. Route obstruction light power cable through conduit and to antenna connector J4.
d. Connect antenna RF feedcable to DME transmitter #2 (1119-0102) connector J2.
e. Connect antenna monitor cable to DME transmitter #2 (1119-0102) connector J1.
f. Connect Helix cable (070217-0001) from DME transmitter #1 (1119-0101) connector J2 to DME
transmitter #2 (1119-0102) connector J3.
g. Connect Heliax cable (070236-0016) from DME transmitter #1 (1119-0101) connector J1 to DME
transmitter (1119-0102) #2 connector J4. Locate the D-shell connectors on the bottom of the DME
transmitter cabinets. Using interconnection cable (070475-0001), connect DME transmitter #1 and
DME transmitter #2.
h. Place obstruction light circuit breaker to the ON position. Verify obstruction lights illuminate.
9.5.18 Gluing 2" PVC Conduit.- Using PVC cement, glue 2" PVC conduit connections that were installed
in paragraph 9.5.13.
9.5.19 1119 DME to Optional RSCU Interconnect.- Refer to Figure 11-6 and 1138 RSCU Operations and
Maintenance Manual (Part Number 571138-0001) for 1119/RSCU connections.
MODEL 1119 DME
Rev. D December, 2002 9-23
9.5.20 VOR/DME Collocation.- Refer to Alenia Marconi Systems (ASI) Inc. CVOR Operations and
Maintenance Manual, Part Number 571150-0001 and DVOR Operations and Maintenance Manual, Part
Number 571150-0002 for collocation installation details.
9.5.21 Connecting VOR/DME Keyer Wiring.- For VOR that are collocated with a DME, refer to Figure
11-7, for connecting the DME keyer to the VOR.
a. Place the primary AC power circuit breakers (located in the shelter main circuit breaker box) to the
OFF position.
b. Place the VOR equipment circuit breakers (CB1) AC INPUT POWER and (CB2) DC INPUT
BATTERY (for a single system) or circuit breakers (CB1, CB2, CB3, and CB4) SYSTEM A and
SYSTEM B AC INPUT POWER and DC INPUT BATTERY (for a dual system) to the OFF
position.
c. Place DME AC and DC circuit breakers to the OFF position.
d. Unscrew the two captive screws securing the VOR Power Panel and open it.
e. Remove and save the four screws securing the DME Power Control Panel Assembly (1A29).
Carefully lift Power Control Panel Assembly (1A29) away from DME cabinet.
f. Locate VOR terminal board TB10. Jumper TB10 pin 5 to DME terminal board TB1 pin 7. Jumper
VOR terminal board TB10 pin 6 to DME terminal board TB1 pin 8. Route wires behind their
respective transmitter so they are out of the way.
g. Secure the Power Panel Assemblies of both systems.
9.6 INSPECTION.- Model 1119 DME inspection consists of mechanical and electrical interface inspection
procedures. Refer to paragraphs 6.3.1, 6.3.2, and 6.3.3 for mechanical and for electrical inspection
procedures.
9.7 INITIAL START-UP AND PRELIMINARY TESTING.- The following paragraphs detail the step-by-
step procedures for initial start-up and preliminary testing of the DME.
9.7.1 Input Voltage Checks.- Refer to Figure 9-10. After the AC and DC power has been connected to the
DME transmitter. It is necessary to check the input power to insure the proper voltage is applied to the
system.
a. Place system AC and DC circuit breakers to the OFF position.
b. Set the shelter primary AC power circuit breakers to the OFF position.
MODEL 1119 DME
9-24 Rev. D December, 2002
c. Remove 4 screws securing the Power Control Panel Assembly (1A29) of the DME transmitter
cabinet. Carefully lower Power Control Panel Assembly (1A29). Locate the AC power terminal
block TB2. TB2 is located to the right of the +28 Vdc Power Supply Assembly (1A30).
d. Set the shelter primary AC power circuit breakers to the ON position.
e. Using an AC voltmeter check voltage across terminals 1 and 2 of TB2. Insure proper voltage for the
site is present here.
9.7.2 +28 Vdc Power Supply (1A30) Output Check.- Refer to Figure 9-10. This procedure verifies that
the +28 Vdc Power Supply (1A30) is supplying the correct voltage to the system's Low Voltage Power
Supplies (1A13/1A28).
a. Locate the terminal board of the +28 Vdc Power Supply (1A30).
b. Place AC and DC circuit breakers to the ON position.
c. Using a multimeter insure that DC voltage across the -DC and +DC terminals of +28 Vdc Power
Supply (1A30) is +20.5 to 29.0 VDC. If voltage is not within tolerance refer to paragraph 6.4.18 to
adjust output of +28 Vdc Power Supply (1A30).
d. Place system AC and DC circuit breakers to the OFF position.
e. Replace and secure Power Control Panel Assembly (1A29).
9.7.3 Low Voltage Power Supply (1A13/1A28) Installation.-
a. Refer to Figure 9-15. Install Low Voltage Power Supply CCAs 1A13 and 1A28.
b. Perform Low Voltage Power Supply (1A13/1A28) Performance Check as detailed in paragraph
6.2.3.
MODEL 1119 DME
Rev. D December, 2002 9-25
Figure 9-15. 1119 DME Module Location Diagram.
MODEL 1119 DME
9-26 Rev. D December, 2002
9.7.4 Setting Station Frequency.- Refer to Table 9-4. The operating frequency of the station is established
by switch settings in the RF Generator Assembly (1A8/1A23). If the operating frequency is known, the
switches are factory set to the correct facility frequency; however, the switch settings should be checked
prior to station operation.
Table 9-4. Frequency Setup Chart.
RF GENERATOR SWITCH SETTINGS
DME X-CHANNEL Y-CHANNEL INTERROGATION
CHAN Xmit Switch Xmit Switch (MON) Switch
NO Freq Settings Freq Settings Freq Settings
NOTE
Switch settings read from left to right. Example: 3C1 (switch S1 is "3", switch S2 is "C",
and switch S3 is "1")
1 962 3C1 1088 43F 1025 400
2 963 3C2 1089 440 1026 401
3 964 3C3 1090 441 1027 402
4 965 3C4 1091 442 1028 403
5 966 3C5 1092 443 1029 404
6 967 3C6 1093 444 1030 405
7 968 3C7 1094 445 1031 406
8 969 3C8 1095 446 1032 407
9 970 3C9 1096 447 1033 408
10 971 3CA 1097 448 1034 409
11 972 3CB 1098 449 1035 40A
12 973 3CC 1099 44A 1036 40B
13 974 3CD 1100 44B 1037 40C
14 975 3CE 1101 44C 1038 40D
15 976 3CF 1102 44D 1039 40E
16 977 3D0 1103 44E 1040 40F
17 978 3D1 1104 44F 1041 410
18 979 3D2 1105 450 1042 411
19 980 3D3 1106 451 1043 412
20 981 3D4 1107 452 1044 413
21 982 3D5 1108 453 1045 414
22 983 3D6 1109 454 1046 415
23 984 3D7 1110 455 1047 416
24 985 3D8 1111 456 1048 417
25 986 3D9 1112 457 1049 418
26 987 3DA 1113 458 1050 419
27 988 3DB 1114 459 1051 41A
28 989 3DC 1115 45A 1052 41B
29 990 3DD 1116 45B 1053 41C
MODEL 1119 DME
Rev. D December, 2002 9-27
Table 9-4. Frequency Setup Chart (Cont).
RF GENERATOR SWITCH SETTINGS
DME X-CHANNEL Y-CHANNEL INTERROGATION
CHAN Xmit Switch Xmit Switch (MON) Switch
NO Freq Settings Freq Settings Freq Settings
30 991 3DE 1117 45C 1054 41D
31 992 3DF 1119 45D 1055 41E
32 993 3E0 1119 45E 1056 41F
33 994 3E1 1120 45F 1057 420
34 995 3E2 1121 460 1058 421
35 996 3E3 1122 461 1059 422
36 997 3E4 1123 462 1060 423
37 998 3E5 1124 463 1061 424
38 999 3E6 1125 464 1062 425
39 1000 3E7 1126 465 1063 426
40 1001 3E8 1127 466 1064 427
41 1002 3E9 1128 467 1065 428
42 1003 3EA 1129 468 1066 429
43 1004 3EB 1130 469 1067 42A
44 1005 3EC 1131 46A 1068 42B
45 1006 3ED 1132 46B 1069 42C
46 1007 3EE 1133 46C 1070 42D
47 1008 3EF 1134 46D 1071 42E
48 1009 3F0 1135 46E 1072 42F
49 1010 3F1 1136 46F 1073 430
50 1011 3F2 1137 470 1074 431
51 1012 3F3 1138 471 1075 432
52 1013 3F4 1139 472 1076 433
53 1014 3F5 1140 473 1077 434
54 1015 3F6 1141 474 1078 435
55 1016 3F7 1142 475 1079 436
56 1017 3F8 1143 476 1080 437
57 1018 3F9 1144 477 1081 438
58 1019 3FA 1145 478 1082 439
59 1020 3FB 1146 479 1083 43A
60 1021 3FC 1147 47A 1084 43B
61 1022 3FD 1148 47B 1085 43C
62 1023 3FE 1149 47C 1086 43D
63 1024 3FF 1150 47D 1087 43E
64 1151 47E 1025 400 1088 43F
65 1152 47F 1026 401 1089 440
66 1153 480 1027 402 1090 441
67 1154 481 1028 403 1091 442
68 1155 482 1029 404 1092 443
MODEL 1119 DME
9-28 Rev. D December, 2002
Table 9-4. Frequency Setup Chart (Cont).
RF GENERATOR SWITCH SETTINGS
DME X-CHANNEL Y-CHANNEL INTERROGATION
CHAN Xmit Switch Xmit Switch (MON) Switch
NO Freq Settings Freq Settings Freq Settings
69 1156 483 1030 405 1093 444
70 1157 484 1031 406 1094 445
71 1158 485 1032 407 1095 446
72 1159 486 1033 408 1096 447
73 1160 487 1034 409 1097 448
74 1161 488 1035 40A 1098 449
75 1162 489 1036 40B 1099 44A
76 1163 48A 1037 40C 1100 44B
77 1164 48B 1038 40D 1101 44C
78 1165 48C 1039 40E 1102 44D
79 1166 48D 1040 40F 1103 44E
80 1167 48E 1041 410 1104 44F
81 1168 48F 1042 411 1105 450
82 1169 490 1043 412 1106 451
83 1170 491 1044 413 1107 452
84 1171 492 1045 414 1108 453
85 1172 493 1046 415 1109 454
86 1173 494 1047 416 1110 455
87 1174 495 1048 417 1111 456
88 1175 496 1049 418 1112 457
89 1176 497 1050 419 1113 458
90 1177 498 1051 41A 1114 459
91 1178 499 1052 41B 1115 45A
92 1179 49A 1053 41C 1116 45B
93 1180 49B 1054 41D 1117 45C
94 1181 49C 1055 41E 1119 45D
95 1182 49D 1056 41F 1119 45E
96 1183 49E 1057 420 1120 45F
97 1184 49F 1058 421 1121 460
98 1185 4A0 1059 422 1122 461
99 1186 4A1 1060 423 1123 462
100 1187 4A2 1061 424 1124 463
101 1188 4A3 1062 425 1125 464
102 1189 4A4 1063 426 1126 465
103 1190 4A5 1064 427 1127 466
104 1191 4A6 1065 428 1128 467
105 1192 4A7 1066 429 1129 468
106 1193 4A8 1067 42A 1130 469
107 1194 4A9 1068 42B 1131 46A
MODEL 1119 DME
Rev. D December, 2002 9-29
Table 9-4. Frequency Setup Chart (Cont).
RF GENERATOR SWITCH SETTINGS
DME X-CHANNEL Y-CHANNEL INTERROGATION
CHAN Xmit Switch Xmit Switch (MON) Switch
NO Freq Settings Freq Settings Freq Settings
108 1195 4AA 1069 42C 1132 46B
109 1196 4AB 1070 42D 1133 46C
110 1197 4AC 1071 42E 1134 46D
111 1198 4AD 1072 42F 1135 46E
112 1199 4AE 1073 430 1136 46F
113 1200 4AF 1074 431 1137 470
114 1201 4B0 1075 432 1138 471
115 1202 4B1 1076 433 1139 472
116 1203 4B2 1077 434 1140 473
117 1204 4B3 1078 435 1141 474
118 1205 4B4 1079 436 1142 475
119 1206 4B5 1080 437 1143 476
120 1207 4B6 1081 438 1144 477
121 1208 4B7 1082 439 1145 478
122 1209 4B8 1083 43A 1146 479
123 1210 4B9 1084 43B 1147 47A
124 1211 4BA 1085 43C 1148 47B
125 1212 4BB 1086 43D 1149 47C
126 1213 4BC 1087 43E 1150 47D
9.7.5 Installing Modules in Transmitter Cabinet.- Since the DME transmitter cabinet is shipped separately
from its electronic modules, it will be necessary to install them into the transmitter equipment cabinet.
Insure AC and DC circuit breakers are set to the OFF position. Refer to Figure 9-15 for proper Assembly
and CCA locations.
CAUTION
Many of the modules used in the DME transmitter contain Electrostatic Discharge
(ESD) sensitive components. ALWAYS wear protective wrist strap when installing
modules or CCAs. Before modules are installed into transmitter cabinet, check
modules or CCAs for cracked or broken connectors, bent pins, and loose hardware.
Report damage immediately.
9.7.6 Video Terminal Hookup and Setup.- Refer to paragraph 3.3.2 for initial Video Terminal hookup and
setup procedures.
MODEL 1119 DME
9-30 Rev. D December, 2002
9.7.7 Turn on Procedure.-
Table 9-5. Switch Positions for Turn on Procedure.
Switch Position
Test Unit:
TEST SELECT OFF
Monitor Control Panel:
VARIABLE ATTENUATOR Control 51 dBm
SIGNAL GENERATOR PRF NORMAL
SIGNAL GENERATOR SPACING NORMAL
SIGNAL GENERATOR CW NORMAL
SIGNAL GENERATOR FREQ FO
MONITOR TEST NORMAL
DISPLAY NORMAL
Transponder Control Panel:
CHASSIS POWER NORMAL
FINAL HV NORMAL
IDENTIFICATION NORMAL
Power Control Panel:
AC Breaker OFF
DC Breaker OFF
a. Place initial switch setting to those listed in Table 9-5.
b. Remove Keyer CCA (1A26) and perform paragraph 6.4.10.1, Keyer Programming to setup station
identifier. Replace Keyer CCA.
c. Verify all assemblies are properly installed.
d. Place transponder Chassis Power switch to the ON position.
e. Connect oscilloscope probe to Monitor A CCA test point 1A11-TP3.
f. Connect oscilloscope external trigger source to SG TRIG output and set oscilloscope trigger source
to external.
g. Verify detected interrogations and replies are present and the Monitor is NORMAL (no alarms).
h Perform 1119 Minimum Performance Check as detailed in paragraph 6.2.2.
i. Perform RMM Calibration procedures as detailed in paragraph 6.4.15.
MODEL 1119 DME
Rev. D December, 2002 9-31
j. Perform Battery Performance Check as detailed in paragraph 6.2.16.
k. Perform Transfer Performance Check (Dual 1119 Systems Only) as detailed in paragraph 6.2.18.
l. Place initial switch setting to those listed in Table 9-5.
m. Place AC and DC circuit breakers to the ON position.

9.7.8 System Checkout-
a. Place initial switch setting to those listed in Table 9-5.
b. Perform Turn on and Checkout procedure as detailed in paragraph 3.3.
c. Wait 3 minutes and verify the STATUS NORMAL, TEST NORMAL, and DC POWER indicators
on the Test Panel Assembly (1A1) are illuminated.
d. Verify MONITOR NORMAL indicator on the Monitor Control Assembly (1A2) is illuminated. If
MONITOR FAULT indicator is illuminated, place the transponder CHASSIS POWER switch to the
ON position and continue with procedure.
e. Verify POWER and FINAL HV indicators are illuminated.
f. Verify current DME status by typing:[STATUS] then pressing [ENTER].
CAUTION
The transponder CHASSIS POWER switch does not remove +28 Vdc from Monitor
B CCA (1A12), CPU CCA (1A15), Interface CCA (1A17), or the Keyer CCA (1A26).
Consequently, the DC circuit breaker located on the Power Control Panel Assembly
must be switched OFF before inserting or removing them. Chassis power must be
removed whenever an Assembly or CCA is being disconnected from or connected to the
chassis.
CAUTION
Insure that the antenna and monitor RF input connections have been properly made.
g. If "AD.FLAGS are clear" and "TST.FLAGS are clear" messages are displayed input power
parameters and system parameters are operating within tolerances. If either AD.FLAGS > or
TST.FLAGS > message(s) appear, note the out-of-limit value and proceed to Limit Data Checks and
Modification as detailed in paragraph 9.7.9.
MODEL 1119 DME
9-32 Rev. D December, 2002
NOTE
DME minimum and maximum limit parameters are set at factory to available site data.
9.7.9 Limit Data Checks And Modification.-
a. At the DME prompt type:[.AD.LIMITS] then press enter. The DME will respond with a display that
is similar to the example below:
ANALOG INPUT SERVICE LIMITS
INPUT MIN MAX
AC.volts 123.7 110.6 130.0
DC.volts 27.2 23.0 29.0
BAT.amps 0.06 -0.05 10.00
DC.amps 4.78 0.32 14.00
TEMP.C 26.0 -20.0 55.0
DME>
b. Compare factory status test report with displayed MIN and MAX analog service limits obtained in
step a.
c. If minimum or maximum data limits are to be changed for analog input service limits refer to
changing input power parameter limits procedure as detailed in paragraph 3.3.7.
d. Type:[.TST.LIMITS] then press [ENTER]. The DME will respond with a display that is similar to
the examples shown below:
TEST INPUT SERVICE LIMITS (X-Channel)
INPUT MIN MAX
SG.SPAC 11.99 11.50 12.50
SG.PRF 101 90 110
SG.LEVEL 01.04 00.70 01.30
TX.EFF 92 60 100
TX.DELAY 50.03 49.80 50.20
TX.POWER 850 525* 950*
TX.PRF 1011 750 2600
TX.SPAC 12.04 11.80 12.20
MODEL 1119 DME
Rev. D December, 2002 9-33
DME>
TEST INPUT SERVICE LIMITS (Y-Channel)
INPUT MIN MAX
SG.SPAC 35.99 35.50 36.50
SG.PRF 101 90 110
SG.LEVEL 01.04 00.70 01.30
TX.EFF 92 60 100
TX.DELAY 56.03 55.80 56.20
TX.POWER 850 525* 950*
TX.PRF 1011 750 2600
TX.SPAC 30.04 29.80 30.20
DME>
* Typical factory settings are: MIN - 100W above half power, MAX - 100W above power out.
e. If MIN or MAX system parameter limits are to be changed refer to changing system parameter limits
as detailed in paragraph 3.3.9.
MODEL 1119 DME
9-34 Rev. D December, 2002
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MODEL 1119 DME
Rev. D December, 2002 10-1
SECTION 10. COMPUTER SOFTWARE
10.1 INTRODUCTION.- Software documentation contains proprietary information and such information
is not applicable to this manual.
MODEL 1119 DME
10-2 Rev. D December, 2002
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MODEL 1119 DME
Rev. D December, 2002 11-1
SECTION 11. TROUBLESHOOTING SUPPORT DATA
11.1 INTRODUCTION.- This section contains parts locations illustrations for the DME. Table 11-1
contains a list of wiring diagrams, schematic diagrams, and system interconnect wiring diagrams.
Table 11-1. Schematic Diagrams.
Description Schematic Number Figure Page
Single 1119 DME RF Interconnect 571119-077 11-1 11-5
Dual 1119 DME RF Interconnect 571119-078 11-2 11-7
1119 DME Interconnect Diagram 001119-9001 11-3 11-9
Backplane CCA 012537-9001 11-4 11-21
Dual DME Interconnect 470100-9002 11-5 11-23
DME-RSCU Interface Schematic Diagram 070412-9001 11-6 11-25
CVOR/DME Interconnect Diagram 470222-9001 11-7 11-27
Test Panel Assembly (1A1)
Display CCA (1A1A1) 012390-9001 11-8 11-29
Time Interval CCA (1A1A2) 012398-9001 11-9 11-31
Power Measurement CCA (1A1A3) 012400-9001 11-10 11-33
Steering Logic CCA (1A1A4) 012391-9001 11-11 11-35
Calibration Attenuator Assembly (1A3) 030211-9001 11-12 11-37
Detector Assembly (1A4/1A5) 030204-9001 11-13 11-39
Monitor Transfer Assembly (1A7) 030345-9001 11-14 11-41
Transfer Logic CCA (1A7A1) 012589-9001 11-15 11-43
RF Generator Assembly (1A8/1A23) 030207-9001 11-16 11-45
Synthesizer CCA(1A8A1/1A23A1) 012036-9001 11-17 11-47
MODEL 1119 DME
11-2 Rev. D December, 2002
Table 11-1. Schematic Diagrams (Cont).
Description Schematic Number Figure Page
Diode Modulator Assembly (1A9) 030215-9001 11-18 11-49
Signal Generator Video (1A10) 012394-9001 11-19 11-51
Monitor A CCA (1A11) 012668-9001 11-20 11-55
Monitor B CCA (1A12) Note - the monitor B is provided in two versions, see appropriate
schematic for your version
Single monitor B CCA 012001-9001 11-21 11-63
Dual monitor B CCA 012019-9001 11-22 11-65
Low Voltage Power Supply (1A13/1A28) 012670-9001 11-23 11-79
High Voltage Power Supply (1A14) 030418-9001 11-24 11-81
CPU CCA (1A15A1) 012775-9001 11-25 11-83
DME System Interface CCA (1A16) (optional) 012740-9001 11-26 11-85
Interface CCA (1A17) 012573-9001 11-27 11-87
Control Interface Assy (1A18) (optional) 030654-9001 11-28 11-89
Control Interface CCA (optional) 012004-9001 11-29 11-91
First Mixer Assembly (1A21) 030205-9001 11-30 11-93
IF Amplifier Assembly (1A24) 030210-9001 11-31 11-95
Decoder CCA (1A25) 012380-9002 11-32 11-103
Keyer CCA (1A26) 012735-9001 11-33 11-107
MODEL 1119 DME
Rev. D December, 2002 11-3
Table 11-1. Schematic Diagrams (Cont).
Description Schematic Number Figure Page
Transmitter Video CCA (1A27) 012629-9001 11-34 11-109
Power Panel Assembly (1A29) 030218-9001 11-35 11-115
Scaling CCA (1A29A1) 012547-9001 11-36 11-117
Input Power Monitor CCA (1A29A2) 012406-9004 11-37 11-119
ILS Current Limiter (1A31) 030347-9001 11-38 11-121
Power Amplifier Assembly (1A32) 030312-9001 11-39 11-123
Control Panel Assembly, ERMM (1A34A1) 012021-9001 11-40 11-133
MODEL 1119 DME
11-4 Rev. D December, 2002
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