MESI Simulator Report by Mapepe Phenethe

NATIONAL UNIVESITY OF LESOTHO,
FOST, MACS
MESI CACHE COHERENCY PROTOCOL
SIMULATOR
Supervisor; Prof AV Nikolov
Authors; Mapepe P, 200700020
Letuka MD,200902077

5/26/2014

Development report
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Contents
Abstract .................................................................. 3Error! Bookmark not defined.
Acknowledgements ................................................................................................ 3
Chapter 1 ............................................................................................................... 4
Introduction ........................................................................................................ 4
Objectives ........................................................................................................... 4
Problem statement and scope definition .............................................................. 5
Mesi protocol ................................................................................................... 5
Scope ............................................................................................................... 7
Chapter 2 ............................................................................................................... 7
System planning ................................................................................................. 7
Operational considerations ............................................................................... 8
Technical considerations .................................................................................. 8
Project schedule ............................................................................................... 8
Chapter 3 ............................................................................................................... 9
Requirements modeling ...................................................................................... 9
Fact finding techniques .................................................................................... 9
Development methodology ............................................................................... 10
General system analysis and design .................................................................. 10
System boundary ........................................................................................... 11
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User and simulator interactions ...................................................................... 11
figure 6 below. .............................................................................................. 12
Simulator architecture .................................................................................... 13
Chapter 4 ............................................................................................................. 14
System implementation ........................................................................................ 14
Iteration 1 ...................................................................................................... 14
Iteration 1 system analysis ............................................................................. 15
Iteration 1 system design ............................................................................... 15
Iteration 1 coding ........................................................................................... 17
Iteration 1 Testing and integration ................................................................. 18
Iteration 2 ...................................................................................................... 18
Iteration 2 system analysis ............................................................................. 19
Iteration 2 system design ............................................................................... 20
Iteration 2 coding ........................................................................................... 20
Iteration 2 testing and integration ................................................................... 21
System integration and acceptance testing ........................................................ 22
Chapter 5 ............................................................................................................. 22
Lessons learnt ................................................................................................... 22
Further improvements ....................................................................................... 22
Discussion ........................................................................................................ 23
Conclusion ........................................................................................................ 23
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Appendices ....................................................................................................... 24
Appendix A ................................................................................................... 24
Appendix B.................................................................................................... 24

Abstract
The modern computer system in a bid to improve speed consists of multiple
processors and a distributed shared memory system, but this set up while
significantly enhancing performance also presents a cache coherency problem; a
different view of memory among the processors. Several techniques are available
to solve this problem. This paper focuses on a simulator of MESI protocol for
educational purposes. It elaborates on the development from inception through to
delivery. The simulator is used for teaching purposes, in a multicore hierarchical
memory system. A Short description of MESI protocol and some short educational
experiments are also presented.
Key words: cache memory, cache coherency, MESI, simulator

Acknowledgements
We sincerely convey our warmest regards to our supervisor, Prof A.V Nikolov for
his robust support and supervision throughout the entire development process. We
will not forget the prayers and solid encouragements of our family, colleagues and
friends throughout our undergraduate academia, honestly the computer science
class of 2014 is the best ever! Till the skies fall, Jesus Christ is the Lord and to him
be all the glory.
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Chapter 1
Introduction
In multiprocessor systems, the memory should provide a set of locations that
hold values, and when a location is read it should return the latest written
value to that location. This property must be established to communicate
data between all processors. One reading returns the latest written value to
the location regardless of which processor wrote it. This question is known
as the cache coherence problem. Essentially all microprocessors today
provide support for multiprocessor cache coherence. The MESI cache
coherence protocol is a technique to maintain the coherence of the cache
memory content in hierarchical memory systems [1], [2]. It is based on four
possible states of the cache blocks: Modified, Exclusive, Shared and Invalid.
Each accessed block lies in one of these stages and the transitions among
them define the MESI protocol.

Most processors (Intel, AMD) use this protocol or its versions. Knowing
how these processors maintain the cache coherence is very important for the
students. This paper presents a simulator of the MESI cache coherence
protocol [3], [4]. The MESI simulator is a software tool which has been
implemented in the C# language. It has been developed specifically for
teaching purposes. It has been designed to show how the MESI protocol
works to maintain the cache memory coherence in a multi-processor system.
Objectives
This tool could be integral in enhancing the understanding of cache
coherency topics in multiprocessor and distributed shared memory systems.

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Introducing the copy-back coherency protocols for cache memory
through the understanding of the MESI protocol performance.

Understanding the meaning of each state of the MESI protocol in the
cache memory shown by the simulator and the corresponding state in
any other cache memory in a multiprocessor environment.

Realizing when a transition between states is needed in order to reflect
the actions taken by a processor.

Strengthening the knowledge about distributed shared memory
systems.
Problem statement and scope definition
Mesi protocol
The MESI is a write-back write-invalidate cache coherency protocol
designed to maintain the cache coherence in distributed shared memory and
multiprocessor systems. It is based on the four states that a block in the
cache memory can have. These four states are the abbreviations for MESI;
modified, exclusive, shared and invalid. States are explained below:
Invalid: It is a non-valid state. The data is not in the cache, or the local
copy of this data is not correct because another processor has updated
the corresponding memory position.
Shared: Shared without having been modified. Another processor has
the data into the cache memory and both copies are in their current
version.
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Exclusive: Exclusive without having been modified. That is, this
cache is the only one that has the correct value of the block. Data
blocks are according to the existing ones in the main memory.

Modified: Actually, it is an exclusive-modified state. It means that the
cache has the only copy that is correct in the whole system. The data
which are in the main memory are wrong.

The state of each cache memory block can change depending on the actions
taken by the processor. Figure 1 presents these transitions below;

Figure 1. MESI state transitions
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The concepts of distributed shared memory and multiprocessing and cache
coherency in a conventional classroom teaching methods overwhelm the cognition
process of students. There are challenges in processing and decoding the
underlying information, hence a need for visualization tools which significantly
enhance this cognition and hence understanding processes.
Scope
The project will deliver a MESI cache coherency protocol simulator to be used
as a teaching visualization aid.
All memory access operations, read and write will be covered with up to three
processors, clearly displaying the state transitions, data modifications and bus
activities. Finally memory access statistics will be calculated by the simulator to
determine the performance of the set-up.
Operations covered
A read on a modified, exclusive, shared and invalid cache block, involving
both a hit and miss.
A write on a modified, exclusive, shared and invalid cache block, involving
both a hit and miss.
Statistics involving hit/miss rates to determine performance
Chapter 2
System planning
The development aims at delivering a high quality simulator the will efficiently
and effectively aid students in clarifying the cache coherency in distributed
memory and multiprocessor systems, the development shall not exceed the
academic year and should not threaten successful learning of other topics.
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Operational considerations
To use the simulator a user requires the following;
Memory < 256 MB
Hard disk < 250 bytes
Processor Any current market offering
Monitor Any current market colour screen
Operating system Later than Windows 95 for windows
and current Linux offerings
Table 1. Operational grid of MESI simulator
Technical considerations
An average CS 4420 (currently offered in the year 2013/14) will be able to use and
understand the operations of the simulator
Project schedule
The following timeline was proposed and has been approved

Figure 2. Project scheduling
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Schedule risk management
A well articulated schedule shall be agreed upon, less priorty functionality may be
tweaked off to deliver the simulator in time.
To protect the schedule from scope creeps proposed functionality other the one in
the specification will be flagged and given lowest priority.
Chapter 3
Requirements modeling
To fully visualize the cache coherency and memory accesses in a distributed
shared memory and multiprocessor systems the user will need to be able to
perform the following activities;
Users shall be able to select any processor from those available, select an
operation; a read or a write on any memory block in the memory.
Users shall be able to view the state, address and data value of any cache
block.
Users shall be able to see state transitions depending on operations on a
cache block
From any number of memory access attempts users shall be able to view
number of hits or misses.
Fact finding techniques
All processes that involve discussions with the users and other stake holders,
interviews were used in a casual manner, primarily because they were within reach
and interviews are quite effective.
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Development methodology
In order to speed up the delivery of the complete simulator and ensure at least
some reference model to enhance and motivate development and give some student
a feel of event-driven learning, the most suitable approach is to deliver it
incrementally with an extreme feedback to the students who will be using the
system.

General system analysis and design
Although, an agile methodology that interleaves the analysis, design and
implementation processes has been chosen, for thorough logical and physical
modeling of the simulator it suffices to consider both analysis and design in a
preliminary holistic approach.

Figure 3. XP methodology
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System boundary
The simulator will interact only with users, solely to demonstrate cache coherency
using MESI protocol exclusively for educational purposes, this is illustrated below;

User and simulator interactions
In general the user can choose to simulate either or a read operation and this will
involve state transitions, or a user can view a simulation statistic.

Figure 4. MESI simulator context model
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Having considered the possible interactions between the user and the simulator, the
simulator requires the following objects with their respective attributes and
methods to support all possible user and system interactions. This further defines
the structure of the system. This is elaborated in a class diagram in figure 6 below.

Figure 5. user and simulator interactions use case
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Simulator architecture
The simulator consists of user controls to select processors, memory and
operations, the models to support thviews to relay visual events to the user

jnfds

Figure 6. MESI simulator class diagram
Figure 7. MESI simulator composition diagram
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Chapter 4
System implementation
The system is implemented incrementally through small releases adding
functionality to the final system. Each release involves planning, a selection of
requirements to implement, interleaving of thorough analysis and design, coding
and testing using pair programming where tests are designed before a respective
coding, each release goes through acceptance testing before subsequent integration
into the simulator. This provides students will a feel of the simulator where they
can interact with it provide feedback to guide succeeding processes. It also
motivates the development team to see a representation of the envisaged simulator.
Iteration 1
In this iteration the read operation is considered. The requirements and estimates
are specified in the story card below, actual figures are also provides.
Story 1 , Iteration 1
Priority level: 1
Users shall be able to select any processor from those available, select a read
on any memory block in the memory.
Operation: read
Time estimate: 10 days
Actual time: 10 days
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Table 2. Read activity story card
Iteration 1 system analysis
The objects, users and interactions and their timing to perform a read operation is
described by the use case below

Iteration 1 system design
In order to successfully perform a read operation, the user needs interfaces, the
screens that supports a read operations is shown below followed by a read
operation flow chart.

Figure 8. Read interactions sequence diagram
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Figure 9. Read operation interface
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Iteration 1 coding
The programming lines are snipped in a figure below.

Figure 10. Read operation flow chart.
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Iteration 1 Testing and integration
Upon successful coding of this story the simulator was tested to read both a cached
and memory block. The block could also be in the following states in some other
cache, modified, shared, invalid and exclusive. The tests passed state transitions
behaved as expected and data read were consistent. The module was the
successfully integrated in the final simulator.
Iteration 2
In this iteration a fairly complex write requirement was implemented, this required
a functioning read operation. This is explained in the story card below along with
all it respective estimates and actual figures.

Figure 11. A code sniped during coding a read
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Table 3. Write functionality story card
Iteration 2 system analysis
The sequence diagram below describes all the user and simulator objects
interactions and their timing during a write simulation performed by the user.

Story 2, Iteration 2
Priority level:2
Users shall be able to select any processor from those available, select a write
on any memory block in the memory.
Operation: write
Time estimate: 15 days
Actual time: 21 days

Figure 12. A write functionality sequence diagram
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Iteration 2 system design
A flow chart below describes a write operation.

Iteration 2 coding
The snippet below demonstrates some coding of the write function.

Figure 13. Write operation flow chart
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Iteration 2 testing and integration
Likewise this function was tested, where each processor attempted first to write a
local cache memory, this was the simplest part and it was successful, secondly a
memory block which involved a bus activity and also passed. Lastly, an attempt to
write some cache block in some node, in all states, all the state transitions, write-
backs, bus activities and data values were correct.

Figure 14. Write function code snippet
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System integration and acceptance testing
Each release was integrated continuously, a process involving acceptance testing at
each step. We used the CS 4420 2013/14 class to perform the tests which was
ultimately successful and let to the final MESI simulator.
Chapter 5
Lessons learnt
In general terms the schedule and scope permitted the succefful completion of the
project within planned estimates. However mega challenges were experienced,
these included;
Schedule deviations
Scope redefinitions
Scope creeps
Schedule slips
And these challenges could be attributed to the following in the specified order;
A lot of courses and credit hours in the final project year
Lack of formal agreements and project deliverables from the department
Limited learning resources in the university
However, we came pretty close if we did not deliver the proposed MESI simulator
will all its objectives. Although, replacement policies and configuration options
were not implemented.
Further improvements
It has been proven that event-driven learning enhances understanding significantly,
in the horizon all the implementations missed in this implementation will be
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considered these include, having multiple local caches, replacement policy options
and configurations options for the user.
Again, other protocols such as MSI and directory based will be included in this.
Discussion
This project has rekindled a burning love for computer architecture which
continues to propel innovation to support ever demanding applications in this
dynamic information and knowledge age.
We were equipped with the skills and knowledge underlying performance
enhancements and its implications, soft skills to engage with different peoples as
well as a team-oriented approach to solve any problem.
Conclusion
The presented tool is very suitable to show the cache memory occupation from
memory references during the execution of a program. It is specially developed to
enhance the understanding of the memory access concepts in the distributed shared
and multiprocessor environments. Experimental results confirm the perfect
applicability in a real classroom environment.
References
[1] Hamacher, C., Vranesic, Z., and Zaky, S. Computer Organization.
McGraw-Hill, 2003.
[2] Tanembaum, A.S. Structured Computer Organization. Prentice-Hall,
2006.
[3] Culler, D.E., Singh, J.P., and Gupta, A. Parallel Computer Architecture. A
hardware/software approach. Morgan Kaufmann Publishers, Inc., 1999.
[4] Stalling, W. Computer Organization and Architecture. Prentice-Hall,
2006

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Appendices
Appendix A
MESI simulators read and write flow chart

Appendix B
MESI simulator code
using System;

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using System.Collections.Generic;
using System.Linq;
using System.Windows.Forms;

namespace SIM_PRO
{
class Program
{
/// <summary>
/// The main entry point for the application.
/// </summary>
[STAThread]
static void Main()
{

Application.EnableVisualStyles();
Application.SetCompatibleTextRenderingDefault(false);
Application.Run(new Form1());
}
}
}

namespace SIM_PRO
{
partial class Statistics
{
/// <summary>
/// Required designer variable.
/// </summary>
private System.ComponentModel.IContainer components = null;

/// <summary>
/// Clean up any resources being used.
/// </summary>
/// <param name="disposing">true if managed resources should be disposed;
otherwise, false.</param>
protected override void Dispose(bool disposing)
{
if (disposing && (components != null))
{
components.Dispose();
}
base.Dispose(disposing);
}

#region Windows Form Designer generated code

/// <summary>
/// Required method for Designer support - do not modify
/// the contents of this method with the code editor.
/// </summary>
private void InitializeComponent()
{
System.Windows.Forms.DataVisualization.Charting.ChartArea chartArea1 = new
System.Windows.Forms.DataVisualization.Charting.ChartArea();
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System.Windows.Forms.DataVisualization.Charting.Legend legend1 = new
System.Windows.Forms.DataVisualization.Charting.Legend();
System.Windows.Forms.DataVisualization.Charting.Series series1 = new
System.Windows.Forms.DataVisualization.Charting.Series();
this.chart1 = new System.Windows.Forms.DataVisualization.Charting.Chart();
this.button1 = new System.Windows.Forms.Button();
((System.ComponentModel.ISupportInitialize)(this.chart1)).BeginInit();
this.SuspendLayout();
//
// chart1
//
chartArea1.Name = "ChartArea1";
this.chart1.ChartAreas.Add(chartArea1);
legend1.Name = "Legend1";
this.chart1.Legends.Add(legend1);
this.chart1.Location = new System.Drawing.Point(254, 21);
this.chart1.Name = "chart1";
series1.ChartArea = "ChartArea1";
series1.Legend = "Legend1";
series1.MarkerSize = 3;
series1.Name = "Memory Access Stats";
this.chart1.Series.Add(series1);
this.chart1.Size = new System.Drawing.Size(466, 265);
this.chart1.TabIndex = 0;
this.chart1.Text = "chart1";
this.chart1.Click += new System.EventHandler(this.chart1_Click);
//
// button1
//
this.button1.Location = new System.Drawing.Point(422, 307);
this.button1.Name = "button1";
this.button1.Size = new System.Drawing.Size(107, 28);
this.button1.TabIndex = 1;
this.button1.Text = "Load Chart";
this.button1.UseVisualStyleBackColor = true;
this.button1.Click += new System.EventHandler(this.button1_Click);
//
// Statistics
//
this.AutoScaleDimensions = new System.Drawing.SizeF(6F, 13F);
this.AutoScaleMode = System.Windows.Forms.AutoScaleMode.Font;
this.ClientSize = new System.Drawing.Size(878, 347);
this.Controls.Add(this.button1);
this.Controls.Add(this.chart1);
this.Name = "Statistics";
this.Text = "Statistics";
((System.ComponentModel.ISupportInitialize)(this.chart1)).EndInit();
this.ResumeLayout(false);

}

#endregion

private System.Windows.Forms.DataVisualization.Charting.Chart chart1;
private System.Windows.Forms.Button button1;
}
}
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namespace SIM_PRO
{
partial class Form1
{
/// <summary>
/// Required designer variable.
/// </summary>
private System.ComponentModel.IContainer components = null;

/// <summary>
/// Clean up any resources being used.
/// </summary>
/// <param name="disposing">true if managed resources should be disposed;
otherwise, false.</param>
protected override void Dispose(bool disposing)
{
if (disposing && (components != null))
{
components.Dispose();
}
base.Dispose(disposing);
}

#region Windows Form Designer generated code

/// <summary>
/// Required method for Designer support - do not modify
/// the contents of this method with the code editor.
/// </summary>
private void InitializeComponent()
{
this.panel1 = new System.Windows.Forms.Panel();
this.label1 = new System.Windows.Forms.Label();
this.comboBox1 = new System.Windows.Forms.ComboBox();
this.textBox1 = new System.Windows.Forms.TextBox();
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this.lineShape1 = new Microsoft.VisualBasic.PowerPacks.LineShape();
this.shapeContainer2 = new Microsoft.VisualBasic.PowerPacks.ShapeContainer();
this.Processor3 = new System.Windows.Forms.Panel();
this.rectangleShape1 = new Microsoft.VisualBasic.PowerPacks.RectangleShape();
this.rectangleShape10 = new
Microsoft.VisualBasic.PowerPacks.RectangleShape();
this.panel1.SuspendLayout();
29 | P a g e

this.Processor3.SuspendLayout();
this.SuspendLayout();
//
// panel1
//
this.panel1.BorderStyle = System.Windows.Forms.BorderStyle.Fixed3D;
this.panel1.Controls.Add(this.textBox3);
this.panel1.Controls.Add(this.label10);
this.panel1.Location = new System.Drawing.Point(3, 549);
this.panel1.Name = "panel1";
this.panel1.Size = new System.Drawing.Size(1302, 55);
this.panel1.TabIndex = 1;
//
// panel2
//
this.panel2.Controls.Add(this.panel12);
this.panel2.Controls.Add(this.comboBox4);
//
// panel3
//
//
// label1
//
this.label1.AutoSize = true;
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this.label1.Font = new System.Drawing.Font("Microsoft Sans Serif", 12F,
System.Drawing.FontStyle.Bold, System.Drawing.GraphicsUnit.Point, ((byte)(0)));
this.label1.ForeColor = System.Drawing.Color.Blue;
this.label1.Location = new System.Drawing.Point(84, 10);
this.label1.Name = "label1";
this.label1.Size = new System.Drawing.Size(126, 20);
this.label1.TabIndex = 0;
this.label1.Text = "Configurations";
//
// comboBox1
//
this.comboBox1.FormattingEnabled = true;
this.comboBox1.Location = new System.Drawing.Point(185, 52);
this.comboBox1.Name = "comboBox1";
this.comboBox1.Size = new System.Drawing.Size(66, 21);
this.comboBox1.TabIndex = 0;
//
// comboBox2
//
//
// label2
//
this.label2.Text = "Cache Size:";
//
// label3
//
this.label3.Text = "Memory Size:";
//
// comboBox3
//
//
// label4
//
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this.label4.Text = "Processors:";
//
// comboBox4
//
this.comboBox4.SelectedIndexChanged += new
System.EventHandler(this.comboBox4_SelectedIndexChanged);
//
// label5
//
this.label5.Text = "Replacement Policy";
//
// label6
//
this.label6.Font = new System.Drawing.Font("Microsoft Sans Serif", 12F,
System.Drawing.FontStyle.Bold, System.Drawing.GraphicsUnit.Point, ((byte)(0)));
this.label6.Text = "MESI SIMULATOR";
//
// panel4
//
this.panel4.BackgroundImage = global::SIM_PRO.Properties.Resources.header2;
this.panel4.ForeColor = System.Drawing.Color.FromArgb(((int)(((byte)(0)))),
((int)(((byte)(0)))), ((int)(((byte)(192)))));
//
// label7
//
this.label7.Text = "OUTPUT";
//
// label8
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//
this.label8.Text = "Miss rate:";
//
// textBox1
//
this.textBox1.Location = new System.Drawing.Point(258, 6);
this.textBox1.Name = "textBox1";
this.textBox1.Size = new System.Drawing.Size(33, 20);
this.textBox1.TabIndex = 5;
//
// panel5
//
this.panel5.BackColor = System.Drawing.SystemColors.ControlDark;
this.panel5.Controls.Add(this.shapeContainer1);
//
// panel6
//
//
// panel7
//
this.panel7.BackColor = System.Drawing.SystemColors.ControlDarkDark;
this.panel7.Controls.Add(this.button12);
//
// button7
//
this.button7.BackColor = System.Drawing.Color.Blue;
this.button7.FlatStyle = System.Windows.Forms.FlatStyle.Flat;
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this.button7.Text = "R1";
this.button7.UseVisualStyleBackColor = false;
//
// button8
//
//
// button9
//
this.button9.ForeColor = System.Drawing.SystemColors.ActiveCaptionText;
//
// button10
//
//
// button11
//
//
// button12
//
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//
// panel8
//
//
// lineShape1
//
this.lineShape1.BorderColor = System.Drawing.Color.Red;
this.lineShape1.BorderWidth = 4;
this.lineShape1.Name = "lineShape1";
this.lineShape1.X1 = 101;
this.lineShape1.Y1 = 211;
//
// shapeContainer2
//
this.shapeContainer2.Location = new System.Drawing.Point(0, 0);
this.shapeContainer2.Margin = new System.Windows.Forms.Padding(0);
this.shapeContainer2.Name = "shapeContainer2";
this.shapeContainer2.Shapes.AddRange(new
Microsoft.VisualBasic.PowerPacks.Shape[] {
this.lineShape5,
this.lineShape4,
this.lineShape3,
this.lineShape2,
this.lineShape1});
this.shapeContainer2.Size = new System.Drawing.Size(1308, 604);
this.shapeContainer2.TabIndex = 11;
this.shapeContainer2.TabStop = false;
//
// lineShape2
//
//
// lineShape3
//
//
35 | P a g e

// lineShape4
//
//
// lineShape5
//
//
// label9
//
this.label9.Text = "No of Miss:";
//
// textBox2
//
//
// label10
//
this.label10.Text = "No of Cache:";
//
// textBox3
//
//
// comboBox5
//
this.comboBox5.AutoCompleteCustomSource.AddRange(new string[] {
"R",
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"W"});
this.comboBox5.Items.AddRange(new object[] {
"W",
"R"});
//
// button19
//
this.button19.Text = "RUN";
//
// comboBox6
//
"R1",
"R2",
"R3",
"R4",
"R5",
"R6",
"R7",
"R8"});
"R1",
"R2",
"R3",
"R4",
"R5",
"R6"});
//
// label11
//
this.label11.Text = "Reg no:";
//
// label12
//
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this.label12.Text = "Operation:";
//
// Processor3
//
this.Processor3.BorderStyle = System.Windows.Forms.BorderStyle.Fixed3D;
this.Processor3.Controls.Add(this.comboBox5);
this.Processor3.Controls.Add(this.label12);
this.Processor3.Controls.Add(this.button19);
this.Processor3.Location = new System.Drawing.Point(727, 443);
this.Processor3.Name = "Processor3";
this.Processor3.Size = new System.Drawing.Size(116, 90);
this.Processor3.TabIndex = 17;
//
// Processor2
//
//
// comboBox7
//
"R",
"W"});
"W",
"R"});
//
// label13
//
//
// comboBox8
//
"R1",
"R2",
"R3",
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"R4",
"R5",
"R6",
"R7",
"R8"});
"R1",
"R2",
"R3",
"R4",
"R5",
"R6"});
//
// button20
//
//
// label14
//
//
// Processor1
//
//
// comboBox9
//
"R",
"W"});
"W",
"R"});
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//
// label15
//
//
// comboBox10
//
"R1",
"R2",
"R3",
"R4",
"R5",
"R6",
"R7",
"R8"});
"R1",
"R2",
"R3",
"R4",
"R5",
"R6"});
//
// button21
//
//
// label16
//
//
// rectangleShape1
//
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this.rectangleShape1.BackColor = System.Drawing.Color.White;
this.rectangleShape1.BackStyle =
Microsoft.VisualBasic.PowerPacks.BackStyle.Opaque;
this.rectangleShape1.FillGradientColor = System.Drawing.Color.Transparent;
this.rectangleShape1.Location = new System.Drawing.Point(89, 33);
this.rectangleShape1.Name = "rectangleShape1";
this.rectangleShape1.SelectionColor = System.Drawing.Color.White;
this.rectangleShape1.Size = new System.Drawing.Size(63, 18);
//
// label17
//
this.label17.Text = "Empty:";
//
// panel12
//
//
// shapeContainer3
//
this.rectangleShape4,
this.rectangleShape1});
//
// rectangleShape2
//
this.rectangleShape2.BackColor = System.Drawing.Color.Blue;
//
// label18
//
41 | P a g e

this.label18.Text = "Uncached:";
//
// rectangleShape3
//
this.rectangleShape3.BackColor = System.Drawing.Color.Red;
//
// label19
//
this.label19.Text = "Exclusive:";
//
// rectangleShape4
//
this.rectangleShape4.BackColor =
System.Drawing.Color.FromArgb(((int)(((byte)(0)))), ((int)(((byte)(192)))),
((int)(((byte)(0)))));
//
// label20
//
this.label20.Text = "Shared:";
//
// rectangleShape5
//
this.rectangleShape5.Click += new
System.EventHandler(this.rectangleShape5_Click);
//
// shapeContainer1
//
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//
// rectangleShape6
//
//
// rectangleShape7
//
//
// shapeContainer4
//
//
// rectangleShape8
//
//
// rectangleShape9
//
43 | P a g e

//
// rectangleShape10
//
//
// rectangleShape11
//
//
// shapeContainer5
//
//
// rectangleShape12
//
//
// rectangleShape13
//
//
// label21
//
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this.label21.Text = "Processor1";
//
// label22
//
//
// label23
//
//
// Form1
//
this.AutoScaleDimensions = new System.Drawing.SizeF(6F, 13F);
this.AutoScaleMode = System.Windows.Forms.AutoScaleMode.Font;
this.ClientSize = new System.Drawing.Size(1308, 604);
this.Controls.Add(this.label23);
this.Controls.Add(this.Processor1);
this.Controls.Add(this.panel8);
this.Controls.Add(this.shapeContainer2);
this.Name = "Form1";
this.Text = "Form1";
this.panel1.ResumeLayout(false);
this.panel1.PerformLayout();
this.Processor3.ResumeLayout(false);
this.Processor3.PerformLayout();
45 | P a g e

this.ResumeLayout(false);
this.PerformLayout();

}

#endregion

private System.Windows.Forms.Panel panel1;
private System.Windows.Forms.Label label1;
private System.Windows.Forms.ComboBox comboBox4;
private System.Windows.Forms.TextBox textBox1;
private Microsoft.VisualBasic.PowerPacks.LineShape lineShape1;
private Microsoft.VisualBasic.PowerPacks.ShapeContainer shapeContainer2;
private System.Windows.Forms.Panel Processor3;
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private Microsoft.VisualBasic.PowerPacks.RectangleShape rectangleShape4;
}
}

using System;
using System.Collections.Generic;
using System.Linq;
using System.Text;
using System.Threading.Tasks;

namespace MESI
{
/*
* Initially, the cache is empty, therefore the MESI state for the block is Invalid
* cacheList vector
* */
class Block : IEquatable<Block>
{
//DATA MEMBERS
public String state{ get; set; }
public String address{ get; set; }
public String value { get; set; }
public int useCount = 0; // { get; set; }
// public int prcCount { get; set; }//number of sharers
47 | P a g e

// int[] cacheList;//list of caches, which cache this block, 1 if is cached

//CONSTRUCTOR
public Block(String _state, String _address, String _value)
/*
* NB: function inputs must be validated priori
* */
{

state = _state;//initialy(in memory)
address = _address;//validate
value = _value;//validate

}
//CONSTRUCTOR
public Block()
{
state = null;
address = null;
value = null;

}

//METHODS

public override string ToString()
/*
* Sets block to string
* */
{
return state + ":" + address + ":" + value;
}

// Overrite system's Equals() method
public override bool Equals(object obj)
{
if (obj == null) return false;
Block objAsPart = obj as Block;
if (objAsPart == null) return false;
else return Equals(objAsPart);
}

public bool Equals(Block block)
/*Right == Left?(logical)
* */
{
if (block == null)
return false;

return (this.address.Equals(block.address));
}
}
//PASSED TEST

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class Memory
{
//int memCapacity { get; set; }//HAVE CLOBAL MEM=CACHECAPACITY
public List<Block> memory;
public List<int> sharers; // processors sharing a memory block

//Constructor
public Memory()
{
memory = new List<Block>();

sharers = new List<int>();
}

//ADD ELEMENTS
public void addBlocks(String directory)
/*
* Adds initial memory blocks data
* Either manually of through a text file
* NB: FIND TEXT FILE METHODS
* */
{
// Read each line of the file into a string array. Each element
// of the array is one line of the file.
String[] lines = System.IO.File.ReadAllLines(@directory);

// Split each line int Block objects and add into memory
foreach (string line in lines)
{
String[] words = line.Split(':');

String state = words[0];
String address = words[1];
String value = words[2];

memory.Add(new Block(state, address, value));

//Console.WriteLine("STATE:{0}", state);

}

//Console.WriteLine("PRINT:{0}",memory.Find(x =>
x.address.Contains("a0")));//FINDS RETURNS
}

//Print memory blocks
public void printMemory()
{
foreach (Block block in memory)
Console.WriteLine(block);
//Console.WriteLine(memory[0]);
//Console.WriteLine(memory[1]);
//Console.WriteLine("-------------------");
}

public Block dataReply(String _address)
/*
* Data responce
49 | P a g e

* */
{

foreach (Block block in this.memory)
{
if (block.address == _address)
{
// sharers.Add(procID);
return block;
}
}

return null;
}
public void dataUpdate(String _address, String _data)
/*Updates data value at a give address
* */
{
foreach (Block block in this.memory)
{
block.value = _data;
}
}

}
//PASSED TEST

class Cache
{
//DATA MEMBERS
public List<Block> cacheblocks;
// public int cacheCapacity { get; set; }
public int cacheNo { get;set; }

//CONSTRUCTOR
public Cache()
{
cacheblocks = new List<Block>();//must be set priori, NB: set = to
memCapacity to avoid replacement algs
}

public void addBlock(Block _block)
/*
* Add a block to the local cache
* Assuming the block is in the appropriate state
* */
{
//BEFORE ADD ON BACKGROUND DO STATE TRANSITION(ENSURE THE CORRECT STATE B4
ADDITION)
this.cacheblocks.Add(_block);
}
public Boolean hasCopy(String blockAddress)
/*
* Determines if this block is cached
50 | P a g e

* */
{
// Locate proccessor using prcNo
foreach (Block block in this.cacheblocks)
{
if (block.address == blockAddress)

return true;
}

return false;

}

public void removeBlock(Block _block)
/*
* Simply removes the block from the local cache
* NB: Ensure first that the block is validly removed
* */
{
{
if (block.address == _block.address)
this.cacheblocks.Remove(block);
}
}

public void dataUpdate(String _address,String _data)
/*
* Update local cacheblock at a given address
* NB: offer no validity(ensure the appropriateness)
* */
{
{
block.value = _data;
}
}

public String dataReply(String _address)
/*
* Return cacheblock data value at a give address
* */
{
{
return block.value;
}

return "-1";
}

public void stateUpdate(String _state, String _address)
/*Updates state at a given address
* NB: assumes no correctness responsibility
51 | P a g e

* */
{
{
block.state = _state;
}
}

public String stateReply(String _state)
/*
* Returns a state at a given address
* */
{
{
if (block.address == _state)
return block.state;
}

return "na";
}
//ADD VIA PROCESSOR REQUEST

public void printCache()
{
foreach (Block block in cacheblocks)
{
Console.WriteLine(block);
}
}

}
//PASSED

class Processor
{

public int processorNo { get; set; }
//public int cycleCounter { get; set; }
public Cache cache;
// public int cacheSize { get; set; }
// public int blockSize { get; set; }
public bool isBlocked { get; set; }

// public int memoryAccess { get; set; }
// public int cacheHit { get; set; }

public Processor(int procID)
//Constructor
{
processorNo = procID;
isBlocked = false;
cache = new Cache();
}
52 | P a g e

public Processor()
{
processorNo = -1;
isBlocked = false;
cache = new Cache();
}

public bool hasAddress(string _address)
// raises a flag if it has a block
{
return this.cache.hasCopy(_address);
}
//TODO SET&GET

public void read(String _address)
/*
* Must specify block address,=>
* A cacheHit => no bus activity
* or cacheMiss,then the cache retrieves the block state, if state is:
* 1.Invalid, then
* 2.Shared, then
* 3.Exclusive, then
* 4.Modified, then
* */
{

//Determine node similarity

Block temp = new Block();

String dataread;

if (this.cache.hasCopy(_address))
//CACHE HIT
{
}
else
//CACHE MISS
{
//travers all processors
// temp.value=
// this.cache.addBlock();
}

// bool hit = false;

if (this.processorNo == this.cache.cacheNo)
{
//Dertermine hit/miss
foreach (Block block in this.cache.cacheblocks)
{
//HIT
{
if (block.state.ToUpper() == "M" || block.state.ToUpper() == "E"
|| block.state.ToUpper() == "S" || block.state.ToUpper() == "I")
{
53 | P a g e

dataread = block.value;
}
}

}

// A CACHEMISS (DO CLOBAL VAR NUM_OF_PRCS)

//1. No copies of a block in other caches
if (howManyWithCopy(_address)==0)
{
//BACKGROUND CODE HERE TO ENSURE NO COPIES IN ANY CACHES(CAN ONLY
DETERMINE USING EACH CPU'S hasCopyThis)
//data requests

}

//2. One cache has a copy, in E
if (howManyWithCopy(_address) == 1)
{
//AND state is E
}

//3. Several caches have a copy, in S
if (howManyWithCopy(_address) >= 2)
{
//Make sure state is S, accross the board
}

//4. One cache has a copy, in M

}
public void write(String blockAddress, String _value)
/*
* Must specify block address,=>
* A cacheHit => no bus activity
* or cacheMiss,then the cache retrieves the block state, if state is:
* 1.Invalid, then
* 2.Shared, then
* 3.Exclusive, then
* 4.Modified, then
* */
{
}
public void writeBack(Block block)
/*
* */
{
}

public bool hasCopy(String blockAddress, int prcNo)
/*
*
54 | P a g e

* Determines if a THIS proccessor, has a a given copy
* */
{
// Locate proccessor using prcNo

for (int i = 1; i <= 3; i++)
{
//must instantiate a prc base class
}

foreach (Block block in cache.cacheblocks)
{
if (block.address == blockAddress)

return true;
}

return false;

}

//MUST GO TO LIBRARY USE ALONG WITH ONE ABOVE
public int howManyWithCopy(String blockAddress)
/*
* Determines number of nodes/proccesors with a copy of a given block
* */
{
int pro_with_copies = 0;

for (int i = 1; i <= 3; i++)//NUM_OF_PRCS, clobal var, in some container
class also this method
{
if (hasCopy(blockAddress, i))
pro_with_copies++;
}

return pro_with_copies;
}

//Constructor
Processor(int _cacheCapacity, int _id)
{

}
}

/*
* MESI_CODE here...
* */

}

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MESI Simulator Report by Mapepe Phenethe

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