International Journal of Computer Trends and Technology (IJCTT) volume 5 number 5Nov 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page230

Implementation of Lifting-Based Two Dimensional Discrete
Wavelet Transform on FPGA Using Pipeline Architecture
Raghavendra G
1
, Mrs. Anita R
2
1
(PG Student , EPCET, Bangalore, India)
2
(Assoc. Prof, Dept. of ECE, EPCET, Bangalore, India)

ABSTRACT: This paper presents the
implementation of the high speed lifting-based two
dimensional discrete wavelet transform (2D-DWT)
algorithm on Field Programmable Gate Array
(FPGA). Pipelining structure in DWT reduces
hardware complexity and memory accesses and
speeds up the performance. The conversion of raw
image into Hex format is done using MATLAB and
the Hex image is loaded into the FPGA Kit. The
result of the 2D-DWT provides four filtered images
and is passed to display. The algorithm has been
realized in Verilog HDL and implemented using
Xilinx Spartan-6 FPGA device. The lifting
procedure to perform the DWT operation is folded
architecture where in first stage each row of the
raw image is processed to generate the
approximate coefficients (L) and Detailed (H) and
the output generated is stored back in the
corresponding locations. In second stage each of
the L and H is transposed and given to 1-D engine,
which this time does the DWT operation row wise,
but it results in column wise because of previous
transpose operation. The DWT engine is run twice
on L and H data to generate further subdivided
images LL, LH, HL and HH.
Keywords-Discrete wavelet transform (DWT);
lifting scheme.
I. INTRODUCTION
The discrete wavelet transform is well
known tool used in several application such as
signal analysis, image processing and image
compression. It is due to its characters of multi-
resolution analysis and nonblack-based analysis,
and it has also become an ingredient of many new
image compression standards, such as JPEG2000.
Early implementations of the wavelet transform
were based on filters convolution algorithms. But
this approach requires a large amount of resources
for computation. The algorithm requires the
convolution of the filters at each resolution, used
with the approximation image. A recent approach
uses a reliable technique of lifting scheme for the
implementation of the discrete wavelet transform
(DWT)[1]. This method still constitutes an active
area of research in mathematics and signal
processing. This DWT based on lifting scheme
presents many advantages over the convolution-
based approach such as computational efficiency,
saving of memory, "in-place" computation of the
DWT, integer-to-integer wavelet transform(IWT),
symmetric forward and inverse transform, etc.
Image compression techniques can compress with
or without loss of data of original image.
The lossy compression can achieve higher
ratio than lossless compression. As a result, the 9/7
DWT which is recommended by JPEG2000 for
lossy compression has been widely used in image
compression area. The high-speed implementation
of lifting-based 9/7 DWT on field-programmable
gate array (FPGA) using multi-stage pipelining is
International Journal of Computer Trends and Technology(IJCTT) volume 5 Issue 4November 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page231

briefly described in further sections. The
organization of the paper is as follows. Section 2
gives the introduction of the discrete wavelet
transforms, section 3 the theoretical basis of the
lifting-based discrete wavelet transforms are briefly
presented. Section 4 describes the design of the 9/7
lifting DWT architectures. Section 5 describes the
performance evaluation of the architecture are
presented and finally, section 6 presents a
conclusion for this paper.

II. DISCRETE WAVELET TRANS
FORM

The Discrete Wavelet Transform is based
on the sub-band coding technique. It is found to
yield a fast computation of Wavelet Transform. It
is very easy to implement and it also reduces the
computation time and overall hardware resources
requirement. The DWT follows the filtering
method by using filter banks for the construction of
the time-frequency plane, with multi resolution.
The DWT analyzes the given signal at different
frequency bands with variable resolutions by
decomposing the signal into two parts, (i)
Approximation Co-efficient (ii) Detail Information
Co-efficient. The decomposition of the original
signal is segregated into different frequency bands
which is obtained by successive high pass filtering
g[n] and low pass filtering h[n] performed on the
time domain signal. This combination of high pass
filter g[n] and low pass filter h[n] forms a pair of
analyzing filters. The output signal of each filter
contains half the frequency content, but an equal
amount of samples as that of the input signal.
These two output signals contain the same
frequency content as the input signal; but the
amount of data will be doubled. These compels the
use of down sampling by a factor 2, applied to the
outputs of the filters.

The Two-Dimensional DWT (2D-DWT)
is a multi-level decomposition technique. First, it
converts the images from the spatial domain to the
frequency domain. 1-level of wavelet
decomposition produces four filtered and sub-
sampled images, referred to as sub bands. Figure 1
shows the output of 1-level decomposition of 2D-
DWT.

Fig.1 1-level decomposition of 2-D
DWT

There are a lot of advantages of the sub
band image decomposition using wavelet
transform. Generally, it boost analysis for non-
stationary image signal. It also provides a high
compression rate. Its transform field is represented
in multi resolution, which helps transmit data in
any line even with a low transmission rate. The
Discrete Wavelet Transform processes data on a
variable time-frequency plane that matches the
lower frequency components to coarser time
resolutions and the high-frequency components to
International Journal of Computer Trends and Technology(IJCTT) volume 5 Issue 4November 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page232

finer time resolutions, thus achieving a multi
resolution analysis. The Discrete Wavelet
Transform has become powerful tool in a wide
range of applications like image or video
processing, medical imaging, telecommunication
and numerical analysis etc. The DWT is
advantageous over existing transforms, such as
discrete Fourier transform (DFT) and DCT,
because it performs a multi resolution analysis of a
signal with localization in both time and frequency
domain.
III. LIFTING-BASED WAVELET
TRANSFORM

The second generation of wavelets under
the category of lifting scheme, was introduced by
Sweldens. The main feature of the lifting-based
discrete wavelet transform scheme is to break up
the high-pass and low-pass wavelet filters into a
sequence of smaller filters that in turn can be
converted into a sequence of upper and lower
triangular matrices[4]. The basic idea behind the
lifting scheme is to use data correlation to remove
data redundancy, if any. This lifting algorithmis
computed at three main phases, namely: (i) The
split phase (ii) The predict phase (iii) The update
phase. This is illustrated in Fig.2.

Fig.2. Split, predict and update phases of
the lifting based DWT.

At first the Lifting Scheme structure splits
the input signal samples into even and odd samples.
Then Prediction function (P) is applied on even
samples. It is called prediction because P function
predicts odd samples using even samples.

The prevailing difference between this
prediction and the actual value of odd sample,
creates a high frequency part of the signal is called
"detail" coefficients (d). Then applying the U
function on the resultant detail signal and
combining the result with even samples update
themso that the output coefficients (s) have the
desired properties. Usually, the properties of s is
the same as the properties of input signal (x) but
with half the size. So the signal s is an
approximation for x and is called approximation
coefficient.
A. Split phase.
In the split phase, the data set x(n) is split
into two subsets to separate the even samples x(2n)
fromthe odd ones x(2n+1) .
B. Prediction phase.

In the prediction stage, the main step is to
eliminate redundancy left and give a more compact
data representation. It is proposed to use the even
subset x(2n) to predict the odd subset x(2n+1)
using a prediction function P as described in
equation(1). The difference between the predicted
value of the subset and the original value is
processed and replaces the latter
d=X
0dd

-P(X
even
)
(1)
C. Update phase.
The third stage of the lifting scheme is
called the update phase. In this stage, the
International Journal of Computer Trends and Technology(IJCTT) volume 5 Issue 4November 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page233

coefficient x(2n) is lifted with the help of the
neighboring wavelet coefficients as represented by
equation(2). This phase is also referred as the
primal lifting phase or update phase:
s = Xeven+ U (d)
(2)
Where, U is the new update operator.

IV. DESIGN OF THE PIPELINED
ARCHITECTURE

The standard Lifting Scheme for the 9/7
wavelet filters is shown in Fig.3. In this, the four
lifting coefficients , , , and the scaling factor k
can be observed. The table.1 shows the Lifting
Coefficients. Here the decimal is turned into binary
by firstly multiplying the decimal by 216, and then
it is converted into binary format. The conversion
coefficient and the original coefficient have a
certain degree of offset, but it will not impact the
transformresults.

Fig.3. 9/7 lifting DWT.
Since the image signals are two-
dimensional, the 2D wavelet transform are
required. The 2D wavelet transformis computed by
recursive application of 1D wavelet transform.
After the 2D wavelet transform of the first level,
the original image is divided into four equal parts.
There are the horizontal low frequency-vertical low
frequency component (LL), the horizontal low
frequency-vertical high frequency component
(LH), the horizontal high frequency-vertical low
frequency (HL), and the horizontal high frequency-
vertical high frequency (HH), respectively.


Table1. Lifting Coefficients: Original9/7,
Rational9/7 And
Fixed Point Binary Of Rational9/7

1D-DWT architecture can be designed as
a pipelined structure following the lifting scheme.
This basic design is shown in Fig.4. This basic
architecture can be utilizes 8 adders , 6 multipliers
and 14 registers.

Fig.4. Basic pipeline architecture of 1D-DWT

For 1
st
clock cycle the even and odd pixel
value of the image stored in c
0
and c
1
registers are
moved to c
2
and c
3
registers, respectively. For 2nd
clock cycle the data present in c
0
and c
2
gets added
International Journal of Computer Trends and Technology(IJCTT) volume 5 Issue 4November 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page234

and then multiplied with the coefficient and this
result is added with data present in the c
3
register.
This result is stored in the predicted data in c
5
register. For 3rd clock cycle the data present in c
5

get added with c
7
and multiply with the coefficient
and the results adds with data present in the c
4

register stores the updated data in c
6
register. For 4
th

clock cycle the data present in c
6
get added with c
8

and multiply with the coefficient and the results
adds with data present in the c
9
register stores the
2
nd
time predicted data in c
11
register. For 5
th
clock
cycle the data present in c
11
moved into c
13

multiply with 1/k coefficient and gives high pass
output (detail coefficient) and c
11
get added with c
13

and multiply with the coefficient and the results
adds with data present in the c
10
register stores the
2
nd
time updated data in c
12
multiply with k
coefficient and gives low pass output
(approximation coefficient).


Fig 5.Proposed 2D-DWT Block Diagram

A UART module to load a input a raw
image.
A raw image memory to store the input
image, DWT processing engine which
performs dwt operation on Row and
Column,
The control block to sequence and control
DWT operations
Output memory to store the HH, HL, LH
and LL images.

V. IMPLEMENTATION RESULTS

The input image having size of 256*256, it is read
by using Matlab command and it is used for input
image to 1D-DWT and 2D-DWT. A high speed 9/7
lifting 2D-DWT algorithm which is implemented
on FPGA-based platforms with multi-stage
pipelining structure. It is realized in Verilog HDL
language and optimized in terms of memory
requirements., the proposed architecture has higher
operating frequency, the design raises operating
frequency around 1.5 times more fast , than
architecture which without multi-stage pipeline.
The hardware architecture is suitable for high speed
implementation. The final results is as shown in
fig.1. The original image is divided into
approximation and detail sub images. Therefore
first filter is applied along the rows and then
applied along the columns, thus the operation
results in four bands, low- low(LL),low-
high(LH),high-low(HL) and high-high(HH).Four
sub-images are obtained, the approximation, the
vertical sub image, the horizontal sub image and
diagonal sub image.

International Journal of Computer Trends and Technology(IJCTT) volume 5 Issue 4November 2013

ISSN: 2231-2803 http://www.ijcttjournal.org Page235

VI. CONCLUSION
DWT is an extremely important part of
modern Image compression and computing. By
having the ability to decompose and compress
images to a fraction of their original size, valuable
(and expensive) disk space can be saved. In
addition, transportation of images from one
computer to another becomes easier and less time
consuming. DWT based compression technique
algorithm provides a very effective way to
compress with minimal loss in quality. Although
the actual implementation of the JPEG2000
algorithm is more difficult than other image
formats, and the actual compression of images is
expensive computationally, the high compression
ratios that can be routinely attained using the
JPEG2000 algorithm easily compensate for the
amount of time spent implementing the algorithm
and compressing an image. It successfully
implements a significant part JPEG2000 algorithm
on Spartan6 FPGA chip.

REFERENCES

[1] A. S. Lewis and G. Knowles, Image
compression using the 2-D wavelet transform,
IEEE Trans. Image Process., 1992, 1(3), pp. 244
250
[2] T. Park and S. Jung, High speed lattice based
VLSI architecture of 2D discrete wavelet transform
for real-time video signal processing, IEEE Trans.
Consum. Electron. 2002, 48(4), pp. 10261032
[3] K. A. Kotteri, S. Barua,et.al,"A Comparison of
Hardware Implementations of the Biorthogonal 9/7
DWT: Convolution Versus Lifting,"IEEE Trans. on
circuit and systems,2005,52(5),256-260
[4] S.Khanfir, M. J emni, Reconfigurable
Hardware Implementations for Lifting-Based DWT
Image Processing Algorithms, ICESS08, 2008,
pp. 283-290.