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IMPLEMENTATION OF A

SIGNAL CONDITIONING UNIT


Robert Herrera | Dakota Burrow
User_Admin

In the following report we look at how the SCU is built and what its comprised of, as well as
present our results using our implementation of the SCU circuit with an incoming signal.
1


INTRODUCTION
The overall objective of this lab is to realize that most incoming electrical signals will be
composed of unstable (noisy) signals that must be interpreted by either a computer or
microprocessor.
The process of conditioning our signal is comprised of first filtering our incoming signal
while maintaining the same the level voltage that is being supplied. The filtering is done so
by using operational amplifiers. In order to carry out the actual functionality of the filter we
must evaluate the op-amp to result in the desired output voltage. We use Kirchhoffs
Voltage Laws to calculate the necessary resistance and capacitance values as shown in
figure 1.
Secondly, we must implement a second circuit (shown in figure 2) to condition the signal to
a readable range that the computing element must interpret (usually anywhere between 0-
5V). It is here where, our now clean electrical signal, is scaled down or attenuated into the
proper DSP (Digital Signal Processor) voltage.

FILTERING (Circuit I)
The filtering process is made of operational amplifiers with the implementation of a
capacitor and resistors. We must use this filter to gain a signal that is not composed of so
many high frequencies. The circuit seen below is responsible for filtering out our unwanted
high frequency component of the incoming electrical signal.

Figure 1



V
IN
V
OUT
R
1
R
2

C
2

SIGNAL CONDITIONING (Circuit II) The conditioning process is also made of an operational
amplifier with the implementation of suitable resistor values that give us the desired
output voltage that can be calculated using super-positioning principals.
Figure 2

PROCEDURE
We begin this experiment by implementing our circuits to fit the functionality that we seek
to instill. In order for our circuit to output a DSP compatible voltage, it is necessary to
generalize formulas using every parameter with each circuit (i.e. resistor values,
capacitance, Op-Amp behavior)
Designing the filter circuit


Figure 1-1
V
IN
V
OUT
R
1
R
2

R
3

R
4

V
IN
V
OUT
R
1
R
2

C
V
OUT
R
1
Z
T

V
N

V
p

I
1

1
=



3

We can covert the circuit to phasor form to solve (below) and apply KVL to equate the following:


Using the above equation we can plot filter response. (Figure 7)
Designing the SCU circuit
Now that we have filtered our signal, we must condition it to the desired output voltage by
feeding the output voltage of our filter to our signal conditioning circuit.

Figure 2-1
The generalized equation that would yield V0 can be derived through the following steps:
Using the principals of super-positioning we first deactivate one of the power sources.
Since there is no power where Vs was, we can assume virtual ground at VN and apply KCL
and Op-Amp properties.
V
IN
V
OUT
R
1
R
2

R
3

R
4

Filter

Input
~

=

2
1 +
2

=
0
=

1
1 +
2


4

Solving for V0 , yields the following:
Next we deactivate the opposite power source, and get the next circuit with following
derivations:
-Applying Op-Amp properties & KCL
Figure 2-3
Solving for V0 , yields the following:
(

) +(

1
+

1
)


Through principals of super-positioning, we sum the voltages to gain the complete
expression for V0 (V01+ V02).

0
=

1
+
2

3
+
4

1

1
The above expressions can be used to calculate the necessary resistor values to carry out
our experimental portion of this project.
V
IN
V
OUT
R
1
R
2

R
3

R
4

V
P
V
N

V
P
= V
N
= 0

1
+

2
=

01
= (

1
)
1

Figure 2-2
V
S
V
OUT
R
1
R
2

R
3

R
4

V
N

V
P

V
P
= V
N

1
+

2
=

(

) +(

1
+


5


R1= 18k
R2=3k
R3=15k
R4=4.1k (

) +(

) = = (

15

) +(
13
1
) =
V1 = -15V (

)
1
= = (
1
15
)
1
=





Simulation
Fully implemented Signal Conditioning Unit











Using MATLAB we can plot a relationship between frequency of our signal and the magnitude of our output
gain in decibels (dBs) shown in Figure 7.


Using the given values supplied buy our lab
manual we can solve for the remaining
resistor values (R2 and R4) utilizing the
following equations:
Figure 3
Waveform at 200Hz
6





























Figure 4
Figure 5
Waveform at 1000Hz
Waveform at 10000Hz
7














We can come to the conclusion seen from Figure 4 to Figure 6 that as our frequency
increases, the VPP (Peak-to-Peak Voltage) approaches a smaller voltage.

The figure below shows filter response with respect to increasing signal frequency.











8







Experimental
The following pictures (below) represent each step during the experimental portion of the
lab to have the signal cleaned. The first picture below is the raw signal being filtered while
maintaining its original voltage. The next photo is the signal once it has been scaled to
approximately 5VPP once it has gone through the Signal Conditioning portion of our circuit.





Figure 7
Incoming signal that has been filtered
9



Signal that has been both filtered and scaled to 2.65[V] VP 5V VPP

Conclusion
Overall, we can conclude and verify that our experimental results were highly consistent
with that of our theoretical values. The experimental gain was 2.656V (Vpp) while the gain
in our simulation (theoretical) at 10 kHz (keeping in mind that we used a triangular wave
in Multisim) was at 2.798V (Vpp). With the following values we can calculate that our
percent error at 5.35%. In retrospect, there were several factors that could have
contributed to this error in terms of experimental results such as component malfunction
or error.
References
APA
1.) EE-8 FINAL PROJECT(1,April)
2.) Nilsson, J. W., & Riedel, S. A. (2011). Electric circuits (9th ed.). Reading, Mass.:
Addison-Wesley.

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